1 #include <linux/kernel.h> 2 #include <linux/mm.h> 3 #include <asm/cpufeature.h> 4 #include <asm/msr.h> 5 #include "cpu.h" 6 7 static void early_init_transmeta(struct cpuinfo_x86 *c) 8 { 9 u32 xlvl; 10 11 /* Transmeta-defined flags: level 0x80860001 */ 12 xlvl = cpuid_eax(0x80860000); 13 if ((xlvl & 0xffff0000) == 0x80860000) { 14 if (xlvl >= 0x80860001) 15 c->x86_capability[CPUID_8086_0001_EDX] = cpuid_edx(0x80860001); 16 } 17 } 18 19 static void init_transmeta(struct cpuinfo_x86 *c) 20 { 21 unsigned int cap_mask, uk, max, dummy; 22 unsigned int cms_rev1, cms_rev2; 23 unsigned int cpu_rev, cpu_freq = 0, cpu_flags, new_cpu_rev; 24 char cpu_info[65]; 25 26 early_init_transmeta(c); 27 28 cpu_detect_cache_sizes(c); 29 30 /* Print CMS and CPU revision */ 31 max = cpuid_eax(0x80860000); 32 cpu_rev = 0; 33 if (max >= 0x80860001) { 34 cpuid(0x80860001, &dummy, &cpu_rev, &cpu_freq, &cpu_flags); 35 if (cpu_rev != 0x02000000) { 36 pr_info("CPU: Processor revision %u.%u.%u.%u, %u MHz\n", 37 (cpu_rev >> 24) & 0xff, 38 (cpu_rev >> 16) & 0xff, 39 (cpu_rev >> 8) & 0xff, 40 cpu_rev & 0xff, 41 cpu_freq); 42 } 43 } 44 if (max >= 0x80860002) { 45 cpuid(0x80860002, &new_cpu_rev, &cms_rev1, &cms_rev2, &dummy); 46 if (cpu_rev == 0x02000000) { 47 pr_info("CPU: Processor revision %08X, %u MHz\n", 48 new_cpu_rev, cpu_freq); 49 } 50 pr_info("CPU: Code Morphing Software revision %u.%u.%u-%u-%u\n", 51 (cms_rev1 >> 24) & 0xff, 52 (cms_rev1 >> 16) & 0xff, 53 (cms_rev1 >> 8) & 0xff, 54 cms_rev1 & 0xff, 55 cms_rev2); 56 } 57 if (max >= 0x80860006) { 58 cpuid(0x80860003, 59 (void *)&cpu_info[0], 60 (void *)&cpu_info[4], 61 (void *)&cpu_info[8], 62 (void *)&cpu_info[12]); 63 cpuid(0x80860004, 64 (void *)&cpu_info[16], 65 (void *)&cpu_info[20], 66 (void *)&cpu_info[24], 67 (void *)&cpu_info[28]); 68 cpuid(0x80860005, 69 (void *)&cpu_info[32], 70 (void *)&cpu_info[36], 71 (void *)&cpu_info[40], 72 (void *)&cpu_info[44]); 73 cpuid(0x80860006, 74 (void *)&cpu_info[48], 75 (void *)&cpu_info[52], 76 (void *)&cpu_info[56], 77 (void *)&cpu_info[60]); 78 cpu_info[64] = '\0'; 79 pr_info("CPU: %s\n", cpu_info); 80 } 81 82 /* Unhide possibly hidden capability flags */ 83 rdmsr(0x80860004, cap_mask, uk); 84 wrmsr(0x80860004, ~0, uk); 85 c->x86_capability[CPUID_1_EDX] = cpuid_edx(0x00000001); 86 wrmsr(0x80860004, cap_mask, uk); 87 88 /* All Transmeta CPUs have a constant TSC */ 89 set_cpu_cap(c, X86_FEATURE_CONSTANT_TSC); 90 91 #ifdef CONFIG_SYSCTL 92 /* 93 * randomize_va_space slows us down enormously; 94 * it probably triggers retranslation of x86->native bytecode 95 */ 96 randomize_va_space = 0; 97 #endif 98 } 99 100 static const struct cpu_dev transmeta_cpu_dev = { 101 .c_vendor = "Transmeta", 102 .c_ident = { "GenuineTMx86", "TransmetaCPU" }, 103 .c_early_init = early_init_transmeta, 104 .c_init = init_transmeta, 105 .c_x86_vendor = X86_VENDOR_TRANSMETA, 106 }; 107 108 cpu_dev_register(transmeta_cpu_dev); 109