1 /* 2 * local mtrr defines. 3 */ 4 5 #include <linux/types.h> 6 #include <linux/stddef.h> 7 8 #define MTRRcap_MSR 0x0fe 9 #define MTRRdefType_MSR 0x2ff 10 11 #define MTRRphysBase_MSR(reg) (0x200 + 2 * (reg)) 12 #define MTRRphysMask_MSR(reg) (0x200 + 2 * (reg) + 1) 13 14 #define NUM_FIXED_RANGES 88 15 #define MAX_VAR_RANGES 256 16 #define MTRRfix64K_00000_MSR 0x250 17 #define MTRRfix16K_80000_MSR 0x258 18 #define MTRRfix16K_A0000_MSR 0x259 19 #define MTRRfix4K_C0000_MSR 0x268 20 #define MTRRfix4K_C8000_MSR 0x269 21 #define MTRRfix4K_D0000_MSR 0x26a 22 #define MTRRfix4K_D8000_MSR 0x26b 23 #define MTRRfix4K_E0000_MSR 0x26c 24 #define MTRRfix4K_E8000_MSR 0x26d 25 #define MTRRfix4K_F0000_MSR 0x26e 26 #define MTRRfix4K_F8000_MSR 0x26f 27 28 #define MTRR_CHANGE_MASK_FIXED 0x01 29 #define MTRR_CHANGE_MASK_VARIABLE 0x02 30 #define MTRR_CHANGE_MASK_DEFTYPE 0x04 31 32 /* In the Intel processor's MTRR interface, the MTRR type is always held in 33 an 8 bit field: */ 34 typedef u8 mtrr_type; 35 36 extern unsigned int mtrr_usage_table[MAX_VAR_RANGES]; 37 38 struct mtrr_ops { 39 u32 vendor; 40 u32 use_intel_if; 41 // void (*init)(void); 42 void (*set)(unsigned int reg, unsigned long base, 43 unsigned long size, mtrr_type type); 44 void (*set_all)(void); 45 46 void (*get)(unsigned int reg, unsigned long *base, 47 unsigned long *size, mtrr_type * type); 48 int (*get_free_region)(unsigned long base, unsigned long size, 49 int replace_reg); 50 int (*validate_add_page)(unsigned long base, unsigned long size, 51 unsigned int type); 52 int (*have_wrcomb)(void); 53 }; 54 55 extern int generic_get_free_region(unsigned long base, unsigned long size, 56 int replace_reg); 57 extern int generic_validate_add_page(unsigned long base, unsigned long size, 58 unsigned int type); 59 60 extern struct mtrr_ops generic_mtrr_ops; 61 62 extern int positive_have_wrcomb(void); 63 64 /* library functions for processor-specific routines */ 65 struct set_mtrr_context { 66 unsigned long flags; 67 unsigned long cr4val; 68 u32 deftype_lo; 69 u32 deftype_hi; 70 u32 ccr3; 71 }; 72 73 struct mtrr_var_range { 74 u32 base_lo; 75 u32 base_hi; 76 u32 mask_lo; 77 u32 mask_hi; 78 }; 79 80 void set_mtrr_done(struct set_mtrr_context *ctxt); 81 void set_mtrr_cache_disable(struct set_mtrr_context *ctxt); 82 void set_mtrr_prepare_save(struct set_mtrr_context *ctxt); 83 84 void fill_mtrr_var_range(unsigned int index, 85 u32 base_lo, u32 base_hi, u32 mask_lo, u32 mask_hi); 86 void get_mtrr_state(void); 87 88 extern void set_mtrr_ops(struct mtrr_ops * ops); 89 90 extern u64 size_or_mask, size_and_mask; 91 extern struct mtrr_ops * mtrr_if; 92 93 #define is_cpu(vnd) (mtrr_if && mtrr_if->vendor == X86_VENDOR_##vnd) 94 #define use_intel() (mtrr_if && mtrr_if->use_intel_if == 1) 95 96 extern unsigned int num_var_ranges; 97 extern u64 mtrr_tom2; 98 99 void mtrr_state_warn(void); 100 const char *mtrr_attrib_to_str(int x); 101 void mtrr_wrmsr(unsigned, unsigned, unsigned); 102 103 /* CPU specific mtrr init functions */ 104 int amd_init_mtrr(void); 105 int cyrix_init_mtrr(void); 106 int centaur_init_mtrr(void); 107