1 // SPDX-License-Identifier: GPL-2.0-only 2 /* 3 * HyperV Detection code. 4 * 5 * Copyright (C) 2010, Novell, Inc. 6 * Author : K. Y. Srinivasan <ksrinivasan@novell.com> 7 */ 8 9 #include <linux/types.h> 10 #include <linux/time.h> 11 #include <linux/clocksource.h> 12 #include <linux/init.h> 13 #include <linux/export.h> 14 #include <linux/hardirq.h> 15 #include <linux/efi.h> 16 #include <linux/interrupt.h> 17 #include <linux/irq.h> 18 #include <linux/kexec.h> 19 #include <linux/i8253.h> 20 #include <linux/random.h> 21 #include <asm/processor.h> 22 #include <asm/hypervisor.h> 23 #include <asm/hyperv-tlfs.h> 24 #include <asm/mshyperv.h> 25 #include <asm/desc.h> 26 #include <asm/irq_regs.h> 27 #include <asm/i8259.h> 28 #include <asm/apic.h> 29 #include <asm/timer.h> 30 #include <asm/reboot.h> 31 #include <asm/nmi.h> 32 33 struct ms_hyperv_info ms_hyperv; 34 EXPORT_SYMBOL_GPL(ms_hyperv); 35 36 #if IS_ENABLED(CONFIG_HYPERV) 37 static void (*vmbus_handler)(void); 38 static void (*hv_stimer0_handler)(void); 39 static void (*hv_kexec_handler)(void); 40 static void (*hv_crash_handler)(struct pt_regs *regs); 41 42 __visible void __irq_entry hyperv_vector_handler(struct pt_regs *regs) 43 { 44 struct pt_regs *old_regs = set_irq_regs(regs); 45 46 entering_irq(); 47 inc_irq_stat(irq_hv_callback_count); 48 if (vmbus_handler) 49 vmbus_handler(); 50 51 if (ms_hyperv.hints & HV_DEPRECATING_AEOI_RECOMMENDED) 52 ack_APIC_irq(); 53 54 exiting_irq(); 55 set_irq_regs(old_regs); 56 } 57 58 void hv_setup_vmbus_irq(void (*handler)(void)) 59 { 60 vmbus_handler = handler; 61 } 62 63 void hv_remove_vmbus_irq(void) 64 { 65 /* We have no way to deallocate the interrupt gate */ 66 vmbus_handler = NULL; 67 } 68 EXPORT_SYMBOL_GPL(hv_setup_vmbus_irq); 69 EXPORT_SYMBOL_GPL(hv_remove_vmbus_irq); 70 71 /* 72 * Routines to do per-architecture handling of stimer0 73 * interrupts when in Direct Mode 74 */ 75 76 __visible void __irq_entry hv_stimer0_vector_handler(struct pt_regs *regs) 77 { 78 struct pt_regs *old_regs = set_irq_regs(regs); 79 80 entering_irq(); 81 inc_irq_stat(hyperv_stimer0_count); 82 if (hv_stimer0_handler) 83 hv_stimer0_handler(); 84 add_interrupt_randomness(HYPERV_STIMER0_VECTOR, 0); 85 ack_APIC_irq(); 86 87 exiting_irq(); 88 set_irq_regs(old_regs); 89 } 90 91 int hv_setup_stimer0_irq(int *irq, int *vector, void (*handler)(void)) 92 { 93 *vector = HYPERV_STIMER0_VECTOR; 94 *irq = -1; /* Unused on x86/x64 */ 95 hv_stimer0_handler = handler; 96 return 0; 97 } 98 EXPORT_SYMBOL_GPL(hv_setup_stimer0_irq); 99 100 void hv_remove_stimer0_irq(int irq) 101 { 102 /* We have no way to deallocate the interrupt gate */ 103 hv_stimer0_handler = NULL; 104 } 105 EXPORT_SYMBOL_GPL(hv_remove_stimer0_irq); 106 107 void hv_setup_kexec_handler(void (*handler)(void)) 108 { 109 hv_kexec_handler = handler; 110 } 111 EXPORT_SYMBOL_GPL(hv_setup_kexec_handler); 112 113 void hv_remove_kexec_handler(void) 114 { 115 hv_kexec_handler = NULL; 116 } 117 EXPORT_SYMBOL_GPL(hv_remove_kexec_handler); 118 119 void hv_setup_crash_handler(void (*handler)(struct pt_regs *regs)) 120 { 121 hv_crash_handler = handler; 122 } 123 EXPORT_SYMBOL_GPL(hv_setup_crash_handler); 124 125 void hv_remove_crash_handler(void) 126 { 127 hv_crash_handler = NULL; 128 } 129 EXPORT_SYMBOL_GPL(hv_remove_crash_handler); 130 131 #ifdef CONFIG_KEXEC_CORE 132 static void hv_machine_shutdown(void) 133 { 134 if (kexec_in_progress && hv_kexec_handler) 135 hv_kexec_handler(); 136 native_machine_shutdown(); 137 } 138 139 static void hv_machine_crash_shutdown(struct pt_regs *regs) 140 { 141 if (hv_crash_handler) 142 hv_crash_handler(regs); 143 native_machine_crash_shutdown(regs); 144 } 145 #endif /* CONFIG_KEXEC_CORE */ 146 #endif /* CONFIG_HYPERV */ 147 148 static uint32_t __init ms_hyperv_platform(void) 149 { 150 u32 eax; 151 u32 hyp_signature[3]; 152 153 if (!boot_cpu_has(X86_FEATURE_HYPERVISOR)) 154 return 0; 155 156 cpuid(HYPERV_CPUID_VENDOR_AND_MAX_FUNCTIONS, 157 &eax, &hyp_signature[0], &hyp_signature[1], &hyp_signature[2]); 158 159 if (eax >= HYPERV_CPUID_MIN && 160 eax <= HYPERV_CPUID_MAX && 161 !memcmp("Microsoft Hv", hyp_signature, 12)) 162 return HYPERV_CPUID_VENDOR_AND_MAX_FUNCTIONS; 163 164 return 0; 165 } 166 167 static unsigned char hv_get_nmi_reason(void) 168 { 169 return 0; 170 } 171 172 #ifdef CONFIG_X86_LOCAL_APIC 173 /* 174 * Prior to WS2016 Debug-VM sends NMIs to all CPUs which makes 175 * it dificult to process CHANNELMSG_UNLOAD in case of crash. Handle 176 * unknown NMI on the first CPU which gets it. 177 */ 178 static int hv_nmi_unknown(unsigned int val, struct pt_regs *regs) 179 { 180 static atomic_t nmi_cpu = ATOMIC_INIT(-1); 181 182 if (!unknown_nmi_panic) 183 return NMI_DONE; 184 185 if (atomic_cmpxchg(&nmi_cpu, -1, raw_smp_processor_id()) != -1) 186 return NMI_HANDLED; 187 188 return NMI_DONE; 189 } 190 #endif 191 192 static unsigned long hv_get_tsc_khz(void) 193 { 194 unsigned long freq; 195 196 rdmsrl(HV_X64_MSR_TSC_FREQUENCY, freq); 197 198 return freq / 1000; 199 } 200 201 #if defined(CONFIG_SMP) && IS_ENABLED(CONFIG_HYPERV) 202 static void __init hv_smp_prepare_boot_cpu(void) 203 { 204 native_smp_prepare_boot_cpu(); 205 #if defined(CONFIG_X86_64) && defined(CONFIG_PARAVIRT_SPINLOCKS) 206 hv_init_spinlocks(); 207 #endif 208 } 209 #endif 210 211 static void __init ms_hyperv_init_platform(void) 212 { 213 int hv_host_info_eax; 214 int hv_host_info_ebx; 215 int hv_host_info_ecx; 216 int hv_host_info_edx; 217 218 /* 219 * Extract the features and hints 220 */ 221 ms_hyperv.features = cpuid_eax(HYPERV_CPUID_FEATURES); 222 ms_hyperv.misc_features = cpuid_edx(HYPERV_CPUID_FEATURES); 223 ms_hyperv.hints = cpuid_eax(HYPERV_CPUID_ENLIGHTMENT_INFO); 224 225 pr_info("Hyper-V: features 0x%x, hints 0x%x\n", 226 ms_hyperv.features, ms_hyperv.hints); 227 228 ms_hyperv.max_vp_index = cpuid_eax(HYPERV_CPUID_IMPLEMENT_LIMITS); 229 ms_hyperv.max_lp_index = cpuid_ebx(HYPERV_CPUID_IMPLEMENT_LIMITS); 230 231 pr_debug("Hyper-V: max %u virtual processors, %u logical processors\n", 232 ms_hyperv.max_vp_index, ms_hyperv.max_lp_index); 233 234 /* 235 * Extract host information. 236 */ 237 if (cpuid_eax(HYPERV_CPUID_VENDOR_AND_MAX_FUNCTIONS) >= 238 HYPERV_CPUID_VERSION) { 239 hv_host_info_eax = cpuid_eax(HYPERV_CPUID_VERSION); 240 hv_host_info_ebx = cpuid_ebx(HYPERV_CPUID_VERSION); 241 hv_host_info_ecx = cpuid_ecx(HYPERV_CPUID_VERSION); 242 hv_host_info_edx = cpuid_edx(HYPERV_CPUID_VERSION); 243 244 pr_info("Hyper-V Host Build:%d-%d.%d-%d-%d.%d\n", 245 hv_host_info_eax, hv_host_info_ebx >> 16, 246 hv_host_info_ebx & 0xFFFF, hv_host_info_ecx, 247 hv_host_info_edx >> 24, hv_host_info_edx & 0xFFFFFF); 248 } 249 250 if (ms_hyperv.features & HV_X64_ACCESS_FREQUENCY_MSRS && 251 ms_hyperv.misc_features & HV_FEATURE_FREQUENCY_MSRS_AVAILABLE) { 252 x86_platform.calibrate_tsc = hv_get_tsc_khz; 253 x86_platform.calibrate_cpu = hv_get_tsc_khz; 254 } 255 256 if (ms_hyperv.hints & HV_X64_ENLIGHTENED_VMCS_RECOMMENDED) { 257 ms_hyperv.nested_features = 258 cpuid_eax(HYPERV_CPUID_NESTED_FEATURES); 259 } 260 261 #ifdef CONFIG_X86_LOCAL_APIC 262 if (ms_hyperv.features & HV_X64_ACCESS_FREQUENCY_MSRS && 263 ms_hyperv.misc_features & HV_FEATURE_FREQUENCY_MSRS_AVAILABLE) { 264 /* 265 * Get the APIC frequency. 266 */ 267 u64 hv_lapic_frequency; 268 269 rdmsrl(HV_X64_MSR_APIC_FREQUENCY, hv_lapic_frequency); 270 hv_lapic_frequency = div_u64(hv_lapic_frequency, HZ); 271 lapic_timer_period = hv_lapic_frequency; 272 pr_info("Hyper-V: LAPIC Timer Frequency: %#x\n", 273 lapic_timer_period); 274 } 275 276 register_nmi_handler(NMI_UNKNOWN, hv_nmi_unknown, NMI_FLAG_FIRST, 277 "hv_nmi_unknown"); 278 #endif 279 280 #ifdef CONFIG_X86_IO_APIC 281 no_timer_check = 1; 282 #endif 283 284 #if IS_ENABLED(CONFIG_HYPERV) && defined(CONFIG_KEXEC_CORE) 285 machine_ops.shutdown = hv_machine_shutdown; 286 machine_ops.crash_shutdown = hv_machine_crash_shutdown; 287 #endif 288 mark_tsc_unstable("running on Hyper-V"); 289 290 /* 291 * Generation 2 instances don't support reading the NMI status from 292 * 0x61 port. 293 */ 294 if (efi_enabled(EFI_BOOT)) 295 x86_platform.get_nmi_reason = hv_get_nmi_reason; 296 297 /* 298 * Hyper-V VMs have a PIT emulation quirk such that zeroing the 299 * counter register during PIT shutdown restarts the PIT. So it 300 * continues to interrupt @18.2 HZ. Setting i8253_clear_counter 301 * to false tells pit_shutdown() not to zero the counter so that 302 * the PIT really is shutdown. Generation 2 VMs don't have a PIT, 303 * and setting this value has no effect. 304 */ 305 i8253_clear_counter_on_shutdown = false; 306 307 #if IS_ENABLED(CONFIG_HYPERV) 308 /* 309 * Setup the hook to get control post apic initialization. 310 */ 311 x86_platform.apic_post_init = hyperv_init; 312 hyperv_setup_mmu_ops(); 313 /* Setup the IDT for hypervisor callback */ 314 alloc_intr_gate(HYPERVISOR_CALLBACK_VECTOR, hyperv_callback_vector); 315 316 /* Setup the IDT for reenlightenment notifications */ 317 if (ms_hyperv.features & HV_X64_ACCESS_REENLIGHTENMENT) 318 alloc_intr_gate(HYPERV_REENLIGHTENMENT_VECTOR, 319 hyperv_reenlightenment_vector); 320 321 /* Setup the IDT for stimer0 */ 322 if (ms_hyperv.misc_features & HV_STIMER_DIRECT_MODE_AVAILABLE) 323 alloc_intr_gate(HYPERV_STIMER0_VECTOR, 324 hv_stimer0_callback_vector); 325 326 # ifdef CONFIG_SMP 327 smp_ops.smp_prepare_boot_cpu = hv_smp_prepare_boot_cpu; 328 # endif 329 330 /* 331 * Hyper-V doesn't provide irq remapping for IO-APIC. To enable x2apic, 332 * set x2apic destination mode to physcial mode when x2apic is available 333 * and Hyper-V IOMMU driver makes sure cpus assigned with IO-APIC irqs 334 * have 8-bit APIC id. 335 */ 336 # ifdef CONFIG_X86_X2APIC 337 if (x2apic_supported()) 338 x2apic_phys = 1; 339 # endif 340 341 #endif 342 } 343 344 const __initconst struct hypervisor_x86 x86_hyper_ms_hyperv = { 345 .name = "Microsoft Hyper-V", 346 .detect = ms_hyperv_platform, 347 .type = X86_HYPER_MS_HYPERV, 348 .init.init_platform = ms_hyperv_init_platform, 349 }; 350