1 // SPDX-License-Identifier: GPL-2.0-only 2 /* 3 * HyperV Detection code. 4 * 5 * Copyright (C) 2010, Novell, Inc. 6 * Author : K. Y. Srinivasan <ksrinivasan@novell.com> 7 */ 8 9 #include <linux/types.h> 10 #include <linux/time.h> 11 #include <linux/clocksource.h> 12 #include <linux/init.h> 13 #include <linux/export.h> 14 #include <linux/hardirq.h> 15 #include <linux/efi.h> 16 #include <linux/interrupt.h> 17 #include <linux/irq.h> 18 #include <linux/kexec.h> 19 #include <linux/random.h> 20 #include <asm/processor.h> 21 #include <asm/hypervisor.h> 22 #include <asm/hyperv-tlfs.h> 23 #include <asm/mshyperv.h> 24 #include <asm/desc.h> 25 #include <asm/idtentry.h> 26 #include <asm/irq_regs.h> 27 #include <asm/i8259.h> 28 #include <asm/apic.h> 29 #include <asm/timer.h> 30 #include <asm/reboot.h> 31 #include <asm/nmi.h> 32 #include <clocksource/hyperv_timer.h> 33 #include <asm/numa.h> 34 #include <asm/svm.h> 35 36 /* Is Linux running as the root partition? */ 37 bool hv_root_partition; 38 /* Is Linux running on nested Microsoft Hypervisor */ 39 bool hv_nested; 40 struct ms_hyperv_info ms_hyperv; 41 42 /* Used in modules via hv_do_hypercall(): see arch/x86/include/asm/mshyperv.h */ 43 bool hyperv_paravisor_present __ro_after_init; 44 EXPORT_SYMBOL_GPL(hyperv_paravisor_present); 45 46 #if IS_ENABLED(CONFIG_HYPERV) 47 static inline unsigned int hv_get_nested_reg(unsigned int reg) 48 { 49 if (hv_is_sint_reg(reg)) 50 return reg - HV_REGISTER_SINT0 + HV_REGISTER_NESTED_SINT0; 51 52 switch (reg) { 53 case HV_REGISTER_SIMP: 54 return HV_REGISTER_NESTED_SIMP; 55 case HV_REGISTER_SIEFP: 56 return HV_REGISTER_NESTED_SIEFP; 57 case HV_REGISTER_SVERSION: 58 return HV_REGISTER_NESTED_SVERSION; 59 case HV_REGISTER_SCONTROL: 60 return HV_REGISTER_NESTED_SCONTROL; 61 case HV_REGISTER_EOM: 62 return HV_REGISTER_NESTED_EOM; 63 default: 64 return reg; 65 } 66 } 67 68 u64 hv_get_non_nested_register(unsigned int reg) 69 { 70 u64 value; 71 72 if (hv_is_synic_reg(reg) && ms_hyperv.paravisor_present) 73 hv_ivm_msr_read(reg, &value); 74 else 75 rdmsrl(reg, value); 76 return value; 77 } 78 EXPORT_SYMBOL_GPL(hv_get_non_nested_register); 79 80 void hv_set_non_nested_register(unsigned int reg, u64 value) 81 { 82 if (hv_is_synic_reg(reg) && ms_hyperv.paravisor_present) { 83 hv_ivm_msr_write(reg, value); 84 85 /* Write proxy bit via wrmsl instruction */ 86 if (hv_is_sint_reg(reg)) 87 wrmsrl(reg, value | 1 << 20); 88 } else { 89 wrmsrl(reg, value); 90 } 91 } 92 EXPORT_SYMBOL_GPL(hv_set_non_nested_register); 93 94 u64 hv_get_register(unsigned int reg) 95 { 96 if (hv_nested) 97 reg = hv_get_nested_reg(reg); 98 99 return hv_get_non_nested_register(reg); 100 } 101 EXPORT_SYMBOL_GPL(hv_get_register); 102 103 void hv_set_register(unsigned int reg, u64 value) 104 { 105 if (hv_nested) 106 reg = hv_get_nested_reg(reg); 107 108 hv_set_non_nested_register(reg, value); 109 } 110 EXPORT_SYMBOL_GPL(hv_set_register); 111 112 static void (*vmbus_handler)(void); 113 static void (*hv_stimer0_handler)(void); 114 static void (*hv_kexec_handler)(void); 115 static void (*hv_crash_handler)(struct pt_regs *regs); 116 117 DEFINE_IDTENTRY_SYSVEC(sysvec_hyperv_callback) 118 { 119 struct pt_regs *old_regs = set_irq_regs(regs); 120 121 inc_irq_stat(irq_hv_callback_count); 122 if (vmbus_handler) 123 vmbus_handler(); 124 125 if (ms_hyperv.hints & HV_DEPRECATING_AEOI_RECOMMENDED) 126 apic_eoi(); 127 128 set_irq_regs(old_regs); 129 } 130 131 void hv_setup_vmbus_handler(void (*handler)(void)) 132 { 133 vmbus_handler = handler; 134 } 135 136 void hv_remove_vmbus_handler(void) 137 { 138 /* We have no way to deallocate the interrupt gate */ 139 vmbus_handler = NULL; 140 } 141 142 /* 143 * Routines to do per-architecture handling of stimer0 144 * interrupts when in Direct Mode 145 */ 146 DEFINE_IDTENTRY_SYSVEC(sysvec_hyperv_stimer0) 147 { 148 struct pt_regs *old_regs = set_irq_regs(regs); 149 150 inc_irq_stat(hyperv_stimer0_count); 151 if (hv_stimer0_handler) 152 hv_stimer0_handler(); 153 add_interrupt_randomness(HYPERV_STIMER0_VECTOR); 154 apic_eoi(); 155 156 set_irq_regs(old_regs); 157 } 158 159 /* For x86/x64, override weak placeholders in hyperv_timer.c */ 160 void hv_setup_stimer0_handler(void (*handler)(void)) 161 { 162 hv_stimer0_handler = handler; 163 } 164 165 void hv_remove_stimer0_handler(void) 166 { 167 /* We have no way to deallocate the interrupt gate */ 168 hv_stimer0_handler = NULL; 169 } 170 171 void hv_setup_kexec_handler(void (*handler)(void)) 172 { 173 hv_kexec_handler = handler; 174 } 175 176 void hv_remove_kexec_handler(void) 177 { 178 hv_kexec_handler = NULL; 179 } 180 181 void hv_setup_crash_handler(void (*handler)(struct pt_regs *regs)) 182 { 183 hv_crash_handler = handler; 184 } 185 186 void hv_remove_crash_handler(void) 187 { 188 hv_crash_handler = NULL; 189 } 190 191 #ifdef CONFIG_KEXEC_CORE 192 static void hv_machine_shutdown(void) 193 { 194 if (kexec_in_progress && hv_kexec_handler) 195 hv_kexec_handler(); 196 197 /* 198 * Call hv_cpu_die() on all the CPUs, otherwise later the hypervisor 199 * corrupts the old VP Assist Pages and can crash the kexec kernel. 200 */ 201 if (kexec_in_progress) 202 cpuhp_remove_state(CPUHP_AP_HYPERV_ONLINE); 203 204 /* The function calls stop_other_cpus(). */ 205 native_machine_shutdown(); 206 207 /* Disable the hypercall page when there is only 1 active CPU. */ 208 if (kexec_in_progress) 209 hyperv_cleanup(); 210 } 211 212 static void hv_machine_crash_shutdown(struct pt_regs *regs) 213 { 214 if (hv_crash_handler) 215 hv_crash_handler(regs); 216 217 /* The function calls crash_smp_send_stop(). */ 218 native_machine_crash_shutdown(regs); 219 220 /* Disable the hypercall page when there is only 1 active CPU. */ 221 hyperv_cleanup(); 222 } 223 #endif /* CONFIG_KEXEC_CORE */ 224 225 static u64 hv_ref_counter_at_suspend; 226 static void (*old_save_sched_clock_state)(void); 227 static void (*old_restore_sched_clock_state)(void); 228 229 /* 230 * Hyper-V clock counter resets during hibernation. Save and restore clock 231 * offset during suspend/resume, while also considering the time passed 232 * before suspend. This is to make sure that sched_clock using hv tsc page 233 * based clocksource, proceeds from where it left off during suspend and 234 * it shows correct time for the timestamps of kernel messages after resume. 235 */ 236 static void save_hv_clock_tsc_state(void) 237 { 238 hv_ref_counter_at_suspend = hv_read_reference_counter(); 239 } 240 241 static void restore_hv_clock_tsc_state(void) 242 { 243 /* 244 * Adjust the offsets used by hv tsc clocksource to 245 * account for the time spent before hibernation. 246 * adjusted value = reference counter (time) at suspend 247 * - reference counter (time) now. 248 */ 249 hv_adj_sched_clock_offset(hv_ref_counter_at_suspend - hv_read_reference_counter()); 250 } 251 252 /* 253 * Functions to override save_sched_clock_state and restore_sched_clock_state 254 * functions of x86_platform. The Hyper-V clock counter is reset during 255 * suspend-resume and the offset used to measure time needs to be 256 * corrected, post resume. 257 */ 258 static void hv_save_sched_clock_state(void) 259 { 260 old_save_sched_clock_state(); 261 save_hv_clock_tsc_state(); 262 } 263 264 static void hv_restore_sched_clock_state(void) 265 { 266 restore_hv_clock_tsc_state(); 267 old_restore_sched_clock_state(); 268 } 269 270 static void __init x86_setup_ops_for_tsc_pg_clock(void) 271 { 272 if (!(ms_hyperv.features & HV_MSR_REFERENCE_TSC_AVAILABLE)) 273 return; 274 275 old_save_sched_clock_state = x86_platform.save_sched_clock_state; 276 x86_platform.save_sched_clock_state = hv_save_sched_clock_state; 277 278 old_restore_sched_clock_state = x86_platform.restore_sched_clock_state; 279 x86_platform.restore_sched_clock_state = hv_restore_sched_clock_state; 280 } 281 #endif /* CONFIG_HYPERV */ 282 283 static uint32_t __init ms_hyperv_platform(void) 284 { 285 u32 eax; 286 u32 hyp_signature[3]; 287 288 if (!boot_cpu_has(X86_FEATURE_HYPERVISOR)) 289 return 0; 290 291 cpuid(HYPERV_CPUID_VENDOR_AND_MAX_FUNCTIONS, 292 &eax, &hyp_signature[0], &hyp_signature[1], &hyp_signature[2]); 293 294 if (eax < HYPERV_CPUID_MIN || eax > HYPERV_CPUID_MAX || 295 memcmp("Microsoft Hv", hyp_signature, 12)) 296 return 0; 297 298 /* HYPERCALL and VP_INDEX MSRs are mandatory for all features. */ 299 eax = cpuid_eax(HYPERV_CPUID_FEATURES); 300 if (!(eax & HV_MSR_HYPERCALL_AVAILABLE)) { 301 pr_warn("x86/hyperv: HYPERCALL MSR not available.\n"); 302 return 0; 303 } 304 if (!(eax & HV_MSR_VP_INDEX_AVAILABLE)) { 305 pr_warn("x86/hyperv: VP_INDEX MSR not available.\n"); 306 return 0; 307 } 308 309 return HYPERV_CPUID_VENDOR_AND_MAX_FUNCTIONS; 310 } 311 312 #ifdef CONFIG_X86_LOCAL_APIC 313 /* 314 * Prior to WS2016 Debug-VM sends NMIs to all CPUs which makes 315 * it difficult to process CHANNELMSG_UNLOAD in case of crash. Handle 316 * unknown NMI on the first CPU which gets it. 317 */ 318 static int hv_nmi_unknown(unsigned int val, struct pt_regs *regs) 319 { 320 static atomic_t nmi_cpu = ATOMIC_INIT(-1); 321 322 if (!unknown_nmi_panic) 323 return NMI_DONE; 324 325 if (atomic_cmpxchg(&nmi_cpu, -1, raw_smp_processor_id()) != -1) 326 return NMI_HANDLED; 327 328 return NMI_DONE; 329 } 330 #endif 331 332 static unsigned long hv_get_tsc_khz(void) 333 { 334 unsigned long freq; 335 336 rdmsrl(HV_X64_MSR_TSC_FREQUENCY, freq); 337 338 return freq / 1000; 339 } 340 341 #if defined(CONFIG_SMP) && IS_ENABLED(CONFIG_HYPERV) 342 static void __init hv_smp_prepare_boot_cpu(void) 343 { 344 native_smp_prepare_boot_cpu(); 345 #if defined(CONFIG_X86_64) && defined(CONFIG_PARAVIRT_SPINLOCKS) 346 hv_init_spinlocks(); 347 #endif 348 } 349 350 static void __init hv_smp_prepare_cpus(unsigned int max_cpus) 351 { 352 #ifdef CONFIG_X86_64 353 int i; 354 int ret; 355 #endif 356 357 native_smp_prepare_cpus(max_cpus); 358 359 /* 360 * Override wakeup_secondary_cpu_64 callback for SEV-SNP 361 * enlightened guest. 362 */ 363 if (!ms_hyperv.paravisor_present && hv_isolation_type_snp()) { 364 apic->wakeup_secondary_cpu_64 = hv_snp_boot_ap; 365 return; 366 } 367 368 #ifdef CONFIG_X86_64 369 for_each_present_cpu(i) { 370 if (i == 0) 371 continue; 372 ret = hv_call_add_logical_proc(numa_cpu_node(i), i, cpu_physical_id(i)); 373 BUG_ON(ret); 374 } 375 376 for_each_present_cpu(i) { 377 if (i == 0) 378 continue; 379 ret = hv_call_create_vp(numa_cpu_node(i), hv_current_partition_id, i, i); 380 BUG_ON(ret); 381 } 382 #endif 383 } 384 #endif 385 386 /* 387 * When a fully enlightened TDX VM runs on Hyper-V, the firmware sets the 388 * HW_REDUCED flag: refer to acpi_tb_create_local_fadt(). Consequently ttyS0 389 * interrupts can't work because request_irq() -> ... -> irq_to_desc() returns 390 * NULL for ttyS0. This happens because mp_config_acpi_legacy_irqs() sees a 391 * nr_legacy_irqs() of 0, so it doesn't initialize the array 'mp_irqs[]', and 392 * later setup_IO_APIC_irqs() -> find_irq_entry() fails to find the legacy irqs 393 * from the array and hence doesn't create the necessary irq description info. 394 * 395 * Clone arch/x86/kernel/acpi/boot.c: acpi_generic_reduced_hw_init() here, 396 * except don't change 'legacy_pic', which keeps its default value 397 * 'default_legacy_pic'. This way, mp_config_acpi_legacy_irqs() sees a non-zero 398 * nr_legacy_irqs() and eventually serial console interrupts works properly. 399 */ 400 static void __init reduced_hw_init(void) 401 { 402 x86_init.timers.timer_init = x86_init_noop; 403 x86_init.irqs.pre_vector_init = x86_init_noop; 404 } 405 406 static void __init ms_hyperv_init_platform(void) 407 { 408 int hv_max_functions_eax; 409 int hv_host_info_eax; 410 int hv_host_info_ebx; 411 int hv_host_info_ecx; 412 int hv_host_info_edx; 413 414 #ifdef CONFIG_PARAVIRT 415 pv_info.name = "Hyper-V"; 416 #endif 417 418 /* 419 * Extract the features and hints 420 */ 421 ms_hyperv.features = cpuid_eax(HYPERV_CPUID_FEATURES); 422 ms_hyperv.priv_high = cpuid_ebx(HYPERV_CPUID_FEATURES); 423 ms_hyperv.misc_features = cpuid_edx(HYPERV_CPUID_FEATURES); 424 ms_hyperv.hints = cpuid_eax(HYPERV_CPUID_ENLIGHTMENT_INFO); 425 426 hv_max_functions_eax = cpuid_eax(HYPERV_CPUID_VENDOR_AND_MAX_FUNCTIONS); 427 428 pr_info("Hyper-V: privilege flags low 0x%x, high 0x%x, hints 0x%x, misc 0x%x\n", 429 ms_hyperv.features, ms_hyperv.priv_high, ms_hyperv.hints, 430 ms_hyperv.misc_features); 431 432 ms_hyperv.max_vp_index = cpuid_eax(HYPERV_CPUID_IMPLEMENT_LIMITS); 433 ms_hyperv.max_lp_index = cpuid_ebx(HYPERV_CPUID_IMPLEMENT_LIMITS); 434 435 pr_debug("Hyper-V: max %u virtual processors, %u logical processors\n", 436 ms_hyperv.max_vp_index, ms_hyperv.max_lp_index); 437 438 /* 439 * Check CPU management privilege. 440 * 441 * To mirror what Windows does we should extract CPU management 442 * features and use the ReservedIdentityBit to detect if Linux is the 443 * root partition. But that requires negotiating CPU management 444 * interface (a process to be finalized). For now, use the privilege 445 * flag as the indicator for running as root. 446 * 447 * Hyper-V should never specify running as root and as a Confidential 448 * VM. But to protect against a compromised/malicious Hyper-V trying 449 * to exploit root behavior to expose Confidential VM memory, ignore 450 * the root partition setting if also a Confidential VM. 451 */ 452 if ((ms_hyperv.priv_high & HV_CPU_MANAGEMENT) && 453 !(ms_hyperv.priv_high & HV_ISOLATION)) { 454 hv_root_partition = true; 455 pr_info("Hyper-V: running as root partition\n"); 456 } 457 458 if (ms_hyperv.hints & HV_X64_HYPERV_NESTED) { 459 hv_nested = true; 460 pr_info("Hyper-V: running on a nested hypervisor\n"); 461 } 462 463 /* 464 * Extract host information. 465 */ 466 if (hv_max_functions_eax >= HYPERV_CPUID_VERSION) { 467 hv_host_info_eax = cpuid_eax(HYPERV_CPUID_VERSION); 468 hv_host_info_ebx = cpuid_ebx(HYPERV_CPUID_VERSION); 469 hv_host_info_ecx = cpuid_ecx(HYPERV_CPUID_VERSION); 470 hv_host_info_edx = cpuid_edx(HYPERV_CPUID_VERSION); 471 472 pr_info("Hyper-V: Host Build %d.%d.%d.%d-%d-%d\n", 473 hv_host_info_ebx >> 16, hv_host_info_ebx & 0xFFFF, 474 hv_host_info_eax, hv_host_info_edx & 0xFFFFFF, 475 hv_host_info_ecx, hv_host_info_edx >> 24); 476 } 477 478 if (ms_hyperv.features & HV_ACCESS_FREQUENCY_MSRS && 479 ms_hyperv.misc_features & HV_FEATURE_FREQUENCY_MSRS_AVAILABLE) { 480 x86_platform.calibrate_tsc = hv_get_tsc_khz; 481 x86_platform.calibrate_cpu = hv_get_tsc_khz; 482 setup_force_cpu_cap(X86_FEATURE_TSC_KNOWN_FREQ); 483 } 484 485 if (ms_hyperv.priv_high & HV_ISOLATION) { 486 ms_hyperv.isolation_config_a = cpuid_eax(HYPERV_CPUID_ISOLATION_CONFIG); 487 ms_hyperv.isolation_config_b = cpuid_ebx(HYPERV_CPUID_ISOLATION_CONFIG); 488 489 if (ms_hyperv.shared_gpa_boundary_active) 490 ms_hyperv.shared_gpa_boundary = 491 BIT_ULL(ms_hyperv.shared_gpa_boundary_bits); 492 493 hyperv_paravisor_present = !!ms_hyperv.paravisor_present; 494 495 pr_info("Hyper-V: Isolation Config: Group A 0x%x, Group B 0x%x\n", 496 ms_hyperv.isolation_config_a, ms_hyperv.isolation_config_b); 497 498 499 if (hv_get_isolation_type() == HV_ISOLATION_TYPE_SNP) { 500 static_branch_enable(&isolation_type_snp); 501 } else if (hv_get_isolation_type() == HV_ISOLATION_TYPE_TDX) { 502 static_branch_enable(&isolation_type_tdx); 503 504 /* A TDX VM must use x2APIC and doesn't use lazy EOI. */ 505 ms_hyperv.hints &= ~HV_X64_APIC_ACCESS_RECOMMENDED; 506 507 if (!ms_hyperv.paravisor_present) { 508 /* To be supported: more work is required. */ 509 ms_hyperv.features &= ~HV_MSR_REFERENCE_TSC_AVAILABLE; 510 511 /* HV_REGISTER_CRASH_CTL is unsupported. */ 512 ms_hyperv.misc_features &= ~HV_FEATURE_GUEST_CRASH_MSR_AVAILABLE; 513 514 /* Don't trust Hyper-V's TLB-flushing hypercalls. */ 515 ms_hyperv.hints &= ~HV_X64_REMOTE_TLB_FLUSH_RECOMMENDED; 516 517 x86_init.acpi.reduced_hw_early_init = reduced_hw_init; 518 } 519 } 520 } 521 522 if (hv_max_functions_eax >= HYPERV_CPUID_NESTED_FEATURES) { 523 ms_hyperv.nested_features = 524 cpuid_eax(HYPERV_CPUID_NESTED_FEATURES); 525 pr_info("Hyper-V: Nested features: 0x%x\n", 526 ms_hyperv.nested_features); 527 } 528 529 #ifdef CONFIG_X86_LOCAL_APIC 530 if (ms_hyperv.features & HV_ACCESS_FREQUENCY_MSRS && 531 ms_hyperv.misc_features & HV_FEATURE_FREQUENCY_MSRS_AVAILABLE) { 532 /* 533 * Get the APIC frequency. 534 */ 535 u64 hv_lapic_frequency; 536 537 rdmsrl(HV_X64_MSR_APIC_FREQUENCY, hv_lapic_frequency); 538 hv_lapic_frequency = div_u64(hv_lapic_frequency, HZ); 539 lapic_timer_period = hv_lapic_frequency; 540 pr_info("Hyper-V: LAPIC Timer Frequency: %#x\n", 541 lapic_timer_period); 542 } 543 544 register_nmi_handler(NMI_UNKNOWN, hv_nmi_unknown, NMI_FLAG_FIRST, 545 "hv_nmi_unknown"); 546 #endif 547 548 #ifdef CONFIG_X86_IO_APIC 549 no_timer_check = 1; 550 #endif 551 552 #if IS_ENABLED(CONFIG_HYPERV) && defined(CONFIG_KEXEC_CORE) 553 machine_ops.shutdown = hv_machine_shutdown; 554 machine_ops.crash_shutdown = hv_machine_crash_shutdown; 555 #endif 556 if (ms_hyperv.features & HV_ACCESS_TSC_INVARIANT) { 557 /* 558 * Writing to synthetic MSR 0x40000118 updates/changes the 559 * guest visible CPUIDs. Setting bit 0 of this MSR enables 560 * guests to report invariant TSC feature through CPUID 561 * instruction, CPUID 0x800000007/EDX, bit 8. See code in 562 * early_init_intel() where this bit is examined. The 563 * setting of this MSR bit should happen before init_intel() 564 * is called. 565 */ 566 wrmsrl(HV_X64_MSR_TSC_INVARIANT_CONTROL, HV_EXPOSE_INVARIANT_TSC); 567 setup_force_cpu_cap(X86_FEATURE_TSC_RELIABLE); 568 } 569 570 /* 571 * Generation 2 instances don't support reading the NMI status from 572 * 0x61 port. 573 */ 574 if (efi_enabled(EFI_BOOT)) 575 x86_platform.get_nmi_reason = hv_get_nmi_reason; 576 577 #if IS_ENABLED(CONFIG_HYPERV) 578 if ((hv_get_isolation_type() == HV_ISOLATION_TYPE_VBS) || 579 ms_hyperv.paravisor_present) 580 hv_vtom_init(); 581 /* 582 * Setup the hook to get control post apic initialization. 583 */ 584 x86_platform.apic_post_init = hyperv_init; 585 hyperv_setup_mmu_ops(); 586 /* Setup the IDT for hypervisor callback */ 587 alloc_intr_gate(HYPERVISOR_CALLBACK_VECTOR, asm_sysvec_hyperv_callback); 588 589 /* Setup the IDT for reenlightenment notifications */ 590 if (ms_hyperv.features & HV_ACCESS_REENLIGHTENMENT) { 591 alloc_intr_gate(HYPERV_REENLIGHTENMENT_VECTOR, 592 asm_sysvec_hyperv_reenlightenment); 593 } 594 595 /* Setup the IDT for stimer0 */ 596 if (ms_hyperv.misc_features & HV_STIMER_DIRECT_MODE_AVAILABLE) { 597 alloc_intr_gate(HYPERV_STIMER0_VECTOR, 598 asm_sysvec_hyperv_stimer0); 599 } 600 601 # ifdef CONFIG_SMP 602 smp_ops.smp_prepare_boot_cpu = hv_smp_prepare_boot_cpu; 603 if (hv_root_partition || 604 (!ms_hyperv.paravisor_present && hv_isolation_type_snp())) 605 smp_ops.smp_prepare_cpus = hv_smp_prepare_cpus; 606 # endif 607 608 /* 609 * Hyper-V doesn't provide irq remapping for IO-APIC. To enable x2apic, 610 * set x2apic destination mode to physical mode when x2apic is available 611 * and Hyper-V IOMMU driver makes sure cpus assigned with IO-APIC irqs 612 * have 8-bit APIC id. 613 */ 614 # ifdef CONFIG_X86_X2APIC 615 if (x2apic_supported()) 616 x2apic_phys = 1; 617 # endif 618 619 /* Register Hyper-V specific clocksource */ 620 hv_init_clocksource(); 621 x86_setup_ops_for_tsc_pg_clock(); 622 hv_vtl_init_platform(); 623 #endif 624 /* 625 * TSC should be marked as unstable only after Hyper-V 626 * clocksource has been initialized. This ensures that the 627 * stability of the sched_clock is not altered. 628 */ 629 if (!(ms_hyperv.features & HV_ACCESS_TSC_INVARIANT)) 630 mark_tsc_unstable("running on Hyper-V"); 631 632 hardlockup_detector_disable(); 633 } 634 635 static bool __init ms_hyperv_x2apic_available(void) 636 { 637 return x2apic_supported(); 638 } 639 640 /* 641 * If ms_hyperv_msi_ext_dest_id() returns true, hyperv_prepare_irq_remapping() 642 * returns -ENODEV and the Hyper-V IOMMU driver is not used; instead, the 643 * generic support of the 15-bit APIC ID is used: see __irq_msi_compose_msg(). 644 * 645 * Note: for a VM on Hyper-V, the I/O-APIC is the only device which 646 * (logically) generates MSIs directly to the system APIC irq domain. 647 * There is no HPET, and PCI MSI/MSI-X interrupts are remapped by the 648 * pci-hyperv host bridge. 649 * 650 * Note: for a Hyper-V root partition, this will always return false. 651 * The hypervisor doesn't expose these HYPERV_CPUID_VIRT_STACK_* cpuids by 652 * default, they are implemented as intercepts by the Windows Hyper-V stack. 653 * Even a nested root partition (L2 root) will not get them because the 654 * nested (L1) hypervisor filters them out. 655 */ 656 static bool __init ms_hyperv_msi_ext_dest_id(void) 657 { 658 u32 eax; 659 660 eax = cpuid_eax(HYPERV_CPUID_VIRT_STACK_INTERFACE); 661 if (eax != HYPERV_VS_INTERFACE_EAX_SIGNATURE) 662 return false; 663 664 eax = cpuid_eax(HYPERV_CPUID_VIRT_STACK_PROPERTIES); 665 return eax & HYPERV_VS_PROPERTIES_EAX_EXTENDED_IOAPIC_RTE; 666 } 667 668 #ifdef CONFIG_AMD_MEM_ENCRYPT 669 static void hv_sev_es_hcall_prepare(struct ghcb *ghcb, struct pt_regs *regs) 670 { 671 /* RAX and CPL are already in the GHCB */ 672 ghcb_set_rcx(ghcb, regs->cx); 673 ghcb_set_rdx(ghcb, regs->dx); 674 ghcb_set_r8(ghcb, regs->r8); 675 } 676 677 static bool hv_sev_es_hcall_finish(struct ghcb *ghcb, struct pt_regs *regs) 678 { 679 /* No checking of the return state needed */ 680 return true; 681 } 682 #endif 683 684 const __initconst struct hypervisor_x86 x86_hyper_ms_hyperv = { 685 .name = "Microsoft Hyper-V", 686 .detect = ms_hyperv_platform, 687 .type = X86_HYPER_MS_HYPERV, 688 .init.x2apic_available = ms_hyperv_x2apic_available, 689 .init.msi_ext_dest_id = ms_hyperv_msi_ext_dest_id, 690 .init.init_platform = ms_hyperv_init_platform, 691 #ifdef CONFIG_AMD_MEM_ENCRYPT 692 .runtime.sev_es_hcall_prepare = hv_sev_es_hcall_prepare, 693 .runtime.sev_es_hcall_finish = hv_sev_es_hcall_finish, 694 #endif 695 }; 696