1 /* SPDX-License-Identifier: GPL-2.0 */
2 #ifndef _X86_MICROCODE_INTERNAL_H
3 #define _X86_MICROCODE_INTERNAL_H
4
5 #include <linux/earlycpio.h>
6 #include <linux/initrd.h>
7
8 #include <asm/cpu.h>
9 #include <asm/microcode.h>
10
11 struct ucode_patch {
12 struct list_head plist;
13 void *data; /* Intel uses only this one */
14 unsigned int size;
15 u32 patch_id;
16 u16 equiv_cpu;
17 };
18
19 extern struct list_head microcode_cache;
20
21 struct device;
22
23 enum ucode_state {
24 UCODE_OK = 0,
25 UCODE_NEW,
26 UCODE_UPDATED,
27 UCODE_NFOUND,
28 UCODE_ERROR,
29 };
30
31 struct microcode_ops {
32 enum ucode_state (*request_microcode_fw)(int cpu, struct device *dev);
33
34 void (*microcode_fini_cpu)(int cpu);
35
36 /*
37 * The generic 'microcode_core' part guarantees that
38 * the callbacks below run on a target cpu when they
39 * are being called.
40 * See also the "Synchronization" section in microcode_core.c.
41 */
42 enum ucode_state (*apply_microcode)(int cpu);
43 int (*collect_cpu_info)(int cpu, struct cpu_signature *csig);
44 };
45
46 extern struct ucode_cpu_info ucode_cpu_info[];
47 struct cpio_data find_microcode_in_initrd(const char *path, bool use_pa);
48
49 #define MAX_UCODE_COUNT 128
50
51 #define QCHAR(a, b, c, d) ((a) + ((b) << 8) + ((c) << 16) + ((d) << 24))
52 #define CPUID_INTEL1 QCHAR('G', 'e', 'n', 'u')
53 #define CPUID_INTEL2 QCHAR('i', 'n', 'e', 'I')
54 #define CPUID_INTEL3 QCHAR('n', 't', 'e', 'l')
55 #define CPUID_AMD1 QCHAR('A', 'u', 't', 'h')
56 #define CPUID_AMD2 QCHAR('e', 'n', 't', 'i')
57 #define CPUID_AMD3 QCHAR('c', 'A', 'M', 'D')
58
59 #define CPUID_IS(a, b, c, ebx, ecx, edx) \
60 (!(((ebx) ^ (a)) | ((edx) ^ (b)) | ((ecx) ^ (c))))
61
62 /*
63 * In early loading microcode phase on BSP, boot_cpu_data is not set up yet.
64 * x86_cpuid_vendor() gets vendor id for BSP.
65 *
66 * In 32 bit AP case, accessing boot_cpu_data needs linear address. To simplify
67 * coding, we still use x86_cpuid_vendor() to get vendor id for AP.
68 *
69 * x86_cpuid_vendor() gets vendor information directly from CPUID.
70 */
x86_cpuid_vendor(void)71 static inline int x86_cpuid_vendor(void)
72 {
73 u32 eax = 0x00000000;
74 u32 ebx, ecx = 0, edx;
75
76 native_cpuid(&eax, &ebx, &ecx, &edx);
77
78 if (CPUID_IS(CPUID_INTEL1, CPUID_INTEL2, CPUID_INTEL3, ebx, ecx, edx))
79 return X86_VENDOR_INTEL;
80
81 if (CPUID_IS(CPUID_AMD1, CPUID_AMD2, CPUID_AMD3, ebx, ecx, edx))
82 return X86_VENDOR_AMD;
83
84 return X86_VENDOR_UNKNOWN;
85 }
86
x86_cpuid_family(void)87 static inline unsigned int x86_cpuid_family(void)
88 {
89 u32 eax = 0x00000001;
90 u32 ebx, ecx = 0, edx;
91
92 native_cpuid(&eax, &ebx, &ecx, &edx);
93
94 return x86_family(eax);
95 }
96
97 extern bool initrd_gone;
98
99 #ifdef CONFIG_CPU_SUP_AMD
100 void load_ucode_amd_bsp(unsigned int family);
101 void load_ucode_amd_ap(unsigned int family);
102 void load_ucode_amd_early(unsigned int cpuid_1_eax);
103 int save_microcode_in_initrd_amd(unsigned int family);
104 void reload_ucode_amd(unsigned int cpu);
105 struct microcode_ops *init_amd_microcode(void);
106 void exit_amd_microcode(void);
107 #else /* CONFIG_CPU_SUP_AMD */
load_ucode_amd_bsp(unsigned int family)108 static inline void load_ucode_amd_bsp(unsigned int family) { }
load_ucode_amd_ap(unsigned int family)109 static inline void load_ucode_amd_ap(unsigned int family) { }
load_ucode_amd_early(unsigned int family)110 static inline void load_ucode_amd_early(unsigned int family) { }
save_microcode_in_initrd_amd(unsigned int family)111 static inline int save_microcode_in_initrd_amd(unsigned int family) { return -EINVAL; }
reload_ucode_amd(unsigned int cpu)112 static inline void reload_ucode_amd(unsigned int cpu) { }
init_amd_microcode(void)113 static inline struct microcode_ops *init_amd_microcode(void) { return NULL; }
exit_amd_microcode(void)114 static inline void exit_amd_microcode(void) { }
115 #endif /* !CONFIG_CPU_SUP_AMD */
116
117 #ifdef CONFIG_CPU_SUP_INTEL
118 void load_ucode_intel_bsp(void);
119 void load_ucode_intel_ap(void);
120 int save_microcode_in_initrd_intel(void);
121 void reload_ucode_intel(void);
122 struct microcode_ops *init_intel_microcode(void);
123 #else /* CONFIG_CPU_SUP_INTEL */
load_ucode_intel_bsp(void)124 static inline void load_ucode_intel_bsp(void) { }
load_ucode_intel_ap(void)125 static inline void load_ucode_intel_ap(void) { }
save_microcode_in_initrd_intel(void)126 static inline int save_microcode_in_initrd_intel(void) { return -EINVAL; }
reload_ucode_intel(void)127 static inline void reload_ucode_intel(void) { }
init_intel_microcode(void)128 static inline struct microcode_ops *init_intel_microcode(void) { return NULL; }
129 #endif /* !CONFIG_CPU_SUP_INTEL */
130
131 #endif /* _X86_MICROCODE_INTERNAL_H */
132