1 // SPDX-License-Identifier: GPL-2.0-or-later 2 /* 3 * CPU Microcode Update Driver for Linux 4 * 5 * Copyright (C) 2000-2006 Tigran Aivazian <aivazian.tigran@gmail.com> 6 * 2006 Shaohua Li <shaohua.li@intel.com> 7 * 2013-2016 Borislav Petkov <bp@alien8.de> 8 * 9 * X86 CPU microcode early update for Linux: 10 * 11 * Copyright (C) 2012 Fenghua Yu <fenghua.yu@intel.com> 12 * H Peter Anvin" <hpa@zytor.com> 13 * (C) 2015 Borislav Petkov <bp@alien8.de> 14 * 15 * This driver allows to upgrade microcode on x86 processors. 16 */ 17 18 #define pr_fmt(fmt) "microcode: " fmt 19 20 #include <linux/platform_device.h> 21 #include <linux/stop_machine.h> 22 #include <linux/syscore_ops.h> 23 #include <linux/miscdevice.h> 24 #include <linux/capability.h> 25 #include <linux/firmware.h> 26 #include <linux/kernel.h> 27 #include <linux/delay.h> 28 #include <linux/mutex.h> 29 #include <linux/cpu.h> 30 #include <linux/nmi.h> 31 #include <linux/fs.h> 32 #include <linux/mm.h> 33 34 #include <asm/microcode_intel.h> 35 #include <asm/cpu_device_id.h> 36 #include <asm/microcode_amd.h> 37 #include <asm/perf_event.h> 38 #include <asm/microcode.h> 39 #include <asm/processor.h> 40 #include <asm/cmdline.h> 41 #include <asm/setup.h> 42 43 #define DRIVER_VERSION "2.2" 44 45 static struct microcode_ops *microcode_ops; 46 static bool dis_ucode_ldr = true; 47 48 bool initrd_gone; 49 50 LIST_HEAD(microcode_cache); 51 52 /* 53 * Synchronization. 54 * 55 * All non cpu-hotplug-callback call sites use: 56 * 57 * - microcode_mutex to synchronize with each other; 58 * - get/put_online_cpus() to synchronize with 59 * the cpu-hotplug-callback call sites. 60 * 61 * We guarantee that only a single cpu is being 62 * updated at any particular moment of time. 63 */ 64 static DEFINE_MUTEX(microcode_mutex); 65 66 struct ucode_cpu_info ucode_cpu_info[NR_CPUS]; 67 68 struct cpu_info_ctx { 69 struct cpu_signature *cpu_sig; 70 int err; 71 }; 72 73 /* 74 * Those patch levels cannot be updated to newer ones and thus should be final. 75 */ 76 static u32 final_levels[] = { 77 0x01000098, 78 0x0100009f, 79 0x010000af, 80 0, /* T-101 terminator */ 81 }; 82 83 /* 84 * Check the current patch level on this CPU. 85 * 86 * Returns: 87 * - true: if update should stop 88 * - false: otherwise 89 */ 90 static bool amd_check_current_patch_level(void) 91 { 92 u32 lvl, dummy, i; 93 u32 *levels; 94 95 native_rdmsr(MSR_AMD64_PATCH_LEVEL, lvl, dummy); 96 97 if (IS_ENABLED(CONFIG_X86_32)) 98 levels = (u32 *)__pa_nodebug(&final_levels); 99 else 100 levels = final_levels; 101 102 for (i = 0; levels[i]; i++) { 103 if (lvl == levels[i]) 104 return true; 105 } 106 return false; 107 } 108 109 static bool __init check_loader_disabled_bsp(void) 110 { 111 static const char *__dis_opt_str = "dis_ucode_ldr"; 112 113 #ifdef CONFIG_X86_32 114 const char *cmdline = (const char *)__pa_nodebug(boot_command_line); 115 const char *option = (const char *)__pa_nodebug(__dis_opt_str); 116 bool *res = (bool *)__pa_nodebug(&dis_ucode_ldr); 117 118 #else /* CONFIG_X86_64 */ 119 const char *cmdline = boot_command_line; 120 const char *option = __dis_opt_str; 121 bool *res = &dis_ucode_ldr; 122 #endif 123 124 /* 125 * CPUID(1).ECX[31]: reserved for hypervisor use. This is still not 126 * completely accurate as xen pv guests don't see that CPUID bit set but 127 * that's good enough as they don't land on the BSP path anyway. 128 */ 129 if (native_cpuid_ecx(1) & BIT(31)) 130 return *res; 131 132 if (x86_cpuid_vendor() == X86_VENDOR_AMD) { 133 if (amd_check_current_patch_level()) 134 return *res; 135 } 136 137 if (cmdline_find_option_bool(cmdline, option) <= 0) 138 *res = false; 139 140 return *res; 141 } 142 143 extern struct builtin_fw __start_builtin_fw[]; 144 extern struct builtin_fw __end_builtin_fw[]; 145 146 bool get_builtin_firmware(struct cpio_data *cd, const char *name) 147 { 148 #ifdef CONFIG_FW_LOADER 149 struct builtin_fw *b_fw; 150 151 for (b_fw = __start_builtin_fw; b_fw != __end_builtin_fw; b_fw++) { 152 if (!strcmp(name, b_fw->name)) { 153 cd->size = b_fw->size; 154 cd->data = b_fw->data; 155 return true; 156 } 157 } 158 #endif 159 return false; 160 } 161 162 void __init load_ucode_bsp(void) 163 { 164 unsigned int cpuid_1_eax; 165 bool intel = true; 166 167 if (!have_cpuid_p()) 168 return; 169 170 cpuid_1_eax = native_cpuid_eax(1); 171 172 switch (x86_cpuid_vendor()) { 173 case X86_VENDOR_INTEL: 174 if (x86_family(cpuid_1_eax) < 6) 175 return; 176 break; 177 178 case X86_VENDOR_AMD: 179 if (x86_family(cpuid_1_eax) < 0x10) 180 return; 181 intel = false; 182 break; 183 184 default: 185 return; 186 } 187 188 if (check_loader_disabled_bsp()) 189 return; 190 191 if (intel) 192 load_ucode_intel_bsp(); 193 else 194 load_ucode_amd_bsp(cpuid_1_eax); 195 } 196 197 static bool check_loader_disabled_ap(void) 198 { 199 #ifdef CONFIG_X86_32 200 return *((bool *)__pa_nodebug(&dis_ucode_ldr)); 201 #else 202 return dis_ucode_ldr; 203 #endif 204 } 205 206 void load_ucode_ap(void) 207 { 208 unsigned int cpuid_1_eax; 209 210 if (check_loader_disabled_ap()) 211 return; 212 213 cpuid_1_eax = native_cpuid_eax(1); 214 215 switch (x86_cpuid_vendor()) { 216 case X86_VENDOR_INTEL: 217 if (x86_family(cpuid_1_eax) >= 6) 218 load_ucode_intel_ap(); 219 break; 220 case X86_VENDOR_AMD: 221 if (x86_family(cpuid_1_eax) >= 0x10) 222 load_ucode_amd_ap(cpuid_1_eax); 223 break; 224 default: 225 break; 226 } 227 } 228 229 static int __init save_microcode_in_initrd(void) 230 { 231 struct cpuinfo_x86 *c = &boot_cpu_data; 232 int ret = -EINVAL; 233 234 switch (c->x86_vendor) { 235 case X86_VENDOR_INTEL: 236 if (c->x86 >= 6) 237 ret = save_microcode_in_initrd_intel(); 238 break; 239 case X86_VENDOR_AMD: 240 if (c->x86 >= 0x10) 241 ret = save_microcode_in_initrd_amd(cpuid_eax(1)); 242 break; 243 default: 244 break; 245 } 246 247 initrd_gone = true; 248 249 return ret; 250 } 251 252 struct cpio_data find_microcode_in_initrd(const char *path, bool use_pa) 253 { 254 #ifdef CONFIG_BLK_DEV_INITRD 255 unsigned long start = 0; 256 size_t size; 257 258 #ifdef CONFIG_X86_32 259 struct boot_params *params; 260 261 if (use_pa) 262 params = (struct boot_params *)__pa_nodebug(&boot_params); 263 else 264 params = &boot_params; 265 266 size = params->hdr.ramdisk_size; 267 268 /* 269 * Set start only if we have an initrd image. We cannot use initrd_start 270 * because it is not set that early yet. 271 */ 272 if (size) 273 start = params->hdr.ramdisk_image; 274 275 # else /* CONFIG_X86_64 */ 276 size = (unsigned long)boot_params.ext_ramdisk_size << 32; 277 size |= boot_params.hdr.ramdisk_size; 278 279 if (size) { 280 start = (unsigned long)boot_params.ext_ramdisk_image << 32; 281 start |= boot_params.hdr.ramdisk_image; 282 283 start += PAGE_OFFSET; 284 } 285 # endif 286 287 /* 288 * Fixup the start address: after reserve_initrd() runs, initrd_start 289 * has the virtual address of the beginning of the initrd. It also 290 * possibly relocates the ramdisk. In either case, initrd_start contains 291 * the updated address so use that instead. 292 * 293 * initrd_gone is for the hotplug case where we've thrown out initrd 294 * already. 295 */ 296 if (!use_pa) { 297 if (initrd_gone) 298 return (struct cpio_data){ NULL, 0, "" }; 299 if (initrd_start) 300 start = initrd_start; 301 } else { 302 /* 303 * The picture with physical addresses is a bit different: we 304 * need to get the *physical* address to which the ramdisk was 305 * relocated, i.e., relocated_ramdisk (not initrd_start) and 306 * since we're running from physical addresses, we need to access 307 * relocated_ramdisk through its *physical* address too. 308 */ 309 u64 *rr = (u64 *)__pa_nodebug(&relocated_ramdisk); 310 if (*rr) 311 start = *rr; 312 } 313 314 return find_cpio_data(path, (void *)start, size, NULL); 315 #else /* !CONFIG_BLK_DEV_INITRD */ 316 return (struct cpio_data){ NULL, 0, "" }; 317 #endif 318 } 319 320 void reload_early_microcode(void) 321 { 322 int vendor, family; 323 324 vendor = x86_cpuid_vendor(); 325 family = x86_cpuid_family(); 326 327 switch (vendor) { 328 case X86_VENDOR_INTEL: 329 if (family >= 6) 330 reload_ucode_intel(); 331 break; 332 case X86_VENDOR_AMD: 333 if (family >= 0x10) 334 reload_ucode_amd(); 335 break; 336 default: 337 break; 338 } 339 } 340 341 static void collect_cpu_info_local(void *arg) 342 { 343 struct cpu_info_ctx *ctx = arg; 344 345 ctx->err = microcode_ops->collect_cpu_info(smp_processor_id(), 346 ctx->cpu_sig); 347 } 348 349 static int collect_cpu_info_on_target(int cpu, struct cpu_signature *cpu_sig) 350 { 351 struct cpu_info_ctx ctx = { .cpu_sig = cpu_sig, .err = 0 }; 352 int ret; 353 354 ret = smp_call_function_single(cpu, collect_cpu_info_local, &ctx, 1); 355 if (!ret) 356 ret = ctx.err; 357 358 return ret; 359 } 360 361 static int collect_cpu_info(int cpu) 362 { 363 struct ucode_cpu_info *uci = ucode_cpu_info + cpu; 364 int ret; 365 366 memset(uci, 0, sizeof(*uci)); 367 368 ret = collect_cpu_info_on_target(cpu, &uci->cpu_sig); 369 if (!ret) 370 uci->valid = 1; 371 372 return ret; 373 } 374 375 static void apply_microcode_local(void *arg) 376 { 377 enum ucode_state *err = arg; 378 379 *err = microcode_ops->apply_microcode(smp_processor_id()); 380 } 381 382 static int apply_microcode_on_target(int cpu) 383 { 384 enum ucode_state err; 385 int ret; 386 387 ret = smp_call_function_single(cpu, apply_microcode_local, &err, 1); 388 if (!ret) { 389 if (err == UCODE_ERROR) 390 ret = 1; 391 } 392 return ret; 393 } 394 395 #ifdef CONFIG_MICROCODE_OLD_INTERFACE 396 static int do_microcode_update(const void __user *buf, size_t size) 397 { 398 int error = 0; 399 int cpu; 400 401 for_each_online_cpu(cpu) { 402 struct ucode_cpu_info *uci = ucode_cpu_info + cpu; 403 enum ucode_state ustate; 404 405 if (!uci->valid) 406 continue; 407 408 ustate = microcode_ops->request_microcode_user(cpu, buf, size); 409 if (ustate == UCODE_ERROR) { 410 error = -1; 411 break; 412 } else if (ustate == UCODE_NEW) { 413 apply_microcode_on_target(cpu); 414 } 415 } 416 417 return error; 418 } 419 420 static int microcode_open(struct inode *inode, struct file *file) 421 { 422 return capable(CAP_SYS_RAWIO) ? stream_open(inode, file) : -EPERM; 423 } 424 425 static ssize_t microcode_write(struct file *file, const char __user *buf, 426 size_t len, loff_t *ppos) 427 { 428 ssize_t ret = -EINVAL; 429 unsigned long nr_pages = totalram_pages(); 430 431 if ((len >> PAGE_SHIFT) > nr_pages) { 432 pr_err("too much data (max %ld pages)\n", nr_pages); 433 return ret; 434 } 435 436 get_online_cpus(); 437 mutex_lock(µcode_mutex); 438 439 if (do_microcode_update(buf, len) == 0) 440 ret = (ssize_t)len; 441 442 if (ret > 0) 443 perf_check_microcode(); 444 445 mutex_unlock(µcode_mutex); 446 put_online_cpus(); 447 448 return ret; 449 } 450 451 static const struct file_operations microcode_fops = { 452 .owner = THIS_MODULE, 453 .write = microcode_write, 454 .open = microcode_open, 455 .llseek = no_llseek, 456 }; 457 458 static struct miscdevice microcode_dev = { 459 .minor = MICROCODE_MINOR, 460 .name = "microcode", 461 .nodename = "cpu/microcode", 462 .fops = µcode_fops, 463 }; 464 465 static int __init microcode_dev_init(void) 466 { 467 int error; 468 469 error = misc_register(µcode_dev); 470 if (error) { 471 pr_err("can't misc_register on minor=%d\n", MICROCODE_MINOR); 472 return error; 473 } 474 475 return 0; 476 } 477 478 static void __exit microcode_dev_exit(void) 479 { 480 misc_deregister(µcode_dev); 481 } 482 #else 483 #define microcode_dev_init() 0 484 #define microcode_dev_exit() do { } while (0) 485 #endif 486 487 /* fake device for request_firmware */ 488 static struct platform_device *microcode_pdev; 489 490 /* 491 * Late loading dance. Why the heavy-handed stomp_machine effort? 492 * 493 * - HT siblings must be idle and not execute other code while the other sibling 494 * is loading microcode in order to avoid any negative interactions caused by 495 * the loading. 496 * 497 * - In addition, microcode update on the cores must be serialized until this 498 * requirement can be relaxed in the future. Right now, this is conservative 499 * and good. 500 */ 501 #define SPINUNIT 100 /* 100 nsec */ 502 503 static int check_online_cpus(void) 504 { 505 unsigned int cpu; 506 507 /* 508 * Make sure all CPUs are online. It's fine for SMT to be disabled if 509 * all the primary threads are still online. 510 */ 511 for_each_present_cpu(cpu) { 512 if (topology_is_primary_thread(cpu) && !cpu_online(cpu)) { 513 pr_err("Not all CPUs online, aborting microcode update.\n"); 514 return -EINVAL; 515 } 516 } 517 518 return 0; 519 } 520 521 static atomic_t late_cpus_in; 522 static atomic_t late_cpus_out; 523 524 static int __wait_for_cpus(atomic_t *t, long long timeout) 525 { 526 int all_cpus = num_online_cpus(); 527 528 atomic_inc(t); 529 530 while (atomic_read(t) < all_cpus) { 531 if (timeout < SPINUNIT) { 532 pr_err("Timeout while waiting for CPUs rendezvous, remaining: %d\n", 533 all_cpus - atomic_read(t)); 534 return 1; 535 } 536 537 ndelay(SPINUNIT); 538 timeout -= SPINUNIT; 539 540 touch_nmi_watchdog(); 541 } 542 return 0; 543 } 544 545 /* 546 * Returns: 547 * < 0 - on error 548 * 0 - no update done 549 * 1 - microcode was updated 550 */ 551 static int __reload_late(void *info) 552 { 553 int cpu = smp_processor_id(); 554 enum ucode_state err; 555 int ret = 0; 556 557 /* 558 * Wait for all CPUs to arrive. A load will not be attempted unless all 559 * CPUs show up. 560 * */ 561 if (__wait_for_cpus(&late_cpus_in, NSEC_PER_SEC)) 562 return -1; 563 564 /* 565 * On an SMT system, it suffices to load the microcode on one sibling of 566 * the core because the microcode engine is shared between the threads. 567 * Synchronization still needs to take place so that no concurrent 568 * loading attempts happen on multiple threads of an SMT core. See 569 * below. 570 */ 571 if (cpumask_first(topology_sibling_cpumask(cpu)) == cpu) 572 apply_microcode_local(&err); 573 else 574 goto wait_for_siblings; 575 576 if (err > UCODE_NFOUND) { 577 pr_warn("Error reloading microcode on CPU %d\n", cpu); 578 ret = -1; 579 } else if (err == UCODE_UPDATED || err == UCODE_OK) { 580 ret = 1; 581 } 582 583 wait_for_siblings: 584 if (__wait_for_cpus(&late_cpus_out, NSEC_PER_SEC)) 585 panic("Timeout during microcode update!\n"); 586 587 /* 588 * At least one thread has completed update on each core. 589 * For others, simply call the update to make sure the 590 * per-cpu cpuinfo can be updated with right microcode 591 * revision. 592 */ 593 if (cpumask_first(topology_sibling_cpumask(cpu)) != cpu) 594 apply_microcode_local(&err); 595 596 return ret; 597 } 598 599 /* 600 * Reload microcode late on all CPUs. Wait for a sec until they 601 * all gather together. 602 */ 603 static int microcode_reload_late(void) 604 { 605 int ret; 606 607 atomic_set(&late_cpus_in, 0); 608 atomic_set(&late_cpus_out, 0); 609 610 ret = stop_machine_cpuslocked(__reload_late, NULL, cpu_online_mask); 611 if (ret > 0) 612 microcode_check(); 613 614 pr_info("Reload completed, microcode revision: 0x%x\n", boot_cpu_data.microcode); 615 616 return ret; 617 } 618 619 static ssize_t reload_store(struct device *dev, 620 struct device_attribute *attr, 621 const char *buf, size_t size) 622 { 623 enum ucode_state tmp_ret = UCODE_OK; 624 int bsp = boot_cpu_data.cpu_index; 625 unsigned long val; 626 ssize_t ret = 0; 627 628 ret = kstrtoul(buf, 0, &val); 629 if (ret) 630 return ret; 631 632 if (val != 1) 633 return size; 634 635 tmp_ret = microcode_ops->request_microcode_fw(bsp, µcode_pdev->dev, true); 636 if (tmp_ret != UCODE_NEW) 637 return size; 638 639 get_online_cpus(); 640 641 ret = check_online_cpus(); 642 if (ret) 643 goto put; 644 645 mutex_lock(µcode_mutex); 646 ret = microcode_reload_late(); 647 mutex_unlock(µcode_mutex); 648 649 put: 650 put_online_cpus(); 651 652 if (ret >= 0) 653 ret = size; 654 655 return ret; 656 } 657 658 static ssize_t version_show(struct device *dev, 659 struct device_attribute *attr, char *buf) 660 { 661 struct ucode_cpu_info *uci = ucode_cpu_info + dev->id; 662 663 return sprintf(buf, "0x%x\n", uci->cpu_sig.rev); 664 } 665 666 static ssize_t pf_show(struct device *dev, 667 struct device_attribute *attr, char *buf) 668 { 669 struct ucode_cpu_info *uci = ucode_cpu_info + dev->id; 670 671 return sprintf(buf, "0x%x\n", uci->cpu_sig.pf); 672 } 673 674 static DEVICE_ATTR_WO(reload); 675 static DEVICE_ATTR(version, 0444, version_show, NULL); 676 static DEVICE_ATTR(processor_flags, 0444, pf_show, NULL); 677 678 static struct attribute *mc_default_attrs[] = { 679 &dev_attr_version.attr, 680 &dev_attr_processor_flags.attr, 681 NULL 682 }; 683 684 static const struct attribute_group mc_attr_group = { 685 .attrs = mc_default_attrs, 686 .name = "microcode", 687 }; 688 689 static void microcode_fini_cpu(int cpu) 690 { 691 if (microcode_ops->microcode_fini_cpu) 692 microcode_ops->microcode_fini_cpu(cpu); 693 } 694 695 static enum ucode_state microcode_resume_cpu(int cpu) 696 { 697 if (apply_microcode_on_target(cpu)) 698 return UCODE_ERROR; 699 700 pr_debug("CPU%d updated upon resume\n", cpu); 701 702 return UCODE_OK; 703 } 704 705 static enum ucode_state microcode_init_cpu(int cpu, bool refresh_fw) 706 { 707 enum ucode_state ustate; 708 struct ucode_cpu_info *uci = ucode_cpu_info + cpu; 709 710 if (uci->valid) 711 return UCODE_OK; 712 713 if (collect_cpu_info(cpu)) 714 return UCODE_ERROR; 715 716 /* --dimm. Trigger a delayed update? */ 717 if (system_state != SYSTEM_RUNNING) 718 return UCODE_NFOUND; 719 720 ustate = microcode_ops->request_microcode_fw(cpu, µcode_pdev->dev, refresh_fw); 721 if (ustate == UCODE_NEW) { 722 pr_debug("CPU%d updated upon init\n", cpu); 723 apply_microcode_on_target(cpu); 724 } 725 726 return ustate; 727 } 728 729 static enum ucode_state microcode_update_cpu(int cpu) 730 { 731 struct ucode_cpu_info *uci = ucode_cpu_info + cpu; 732 733 /* Refresh CPU microcode revision after resume. */ 734 collect_cpu_info(cpu); 735 736 if (uci->valid) 737 return microcode_resume_cpu(cpu); 738 739 return microcode_init_cpu(cpu, false); 740 } 741 742 static int mc_device_add(struct device *dev, struct subsys_interface *sif) 743 { 744 int err, cpu = dev->id; 745 746 if (!cpu_online(cpu)) 747 return 0; 748 749 pr_debug("CPU%d added\n", cpu); 750 751 err = sysfs_create_group(&dev->kobj, &mc_attr_group); 752 if (err) 753 return err; 754 755 if (microcode_init_cpu(cpu, true) == UCODE_ERROR) 756 return -EINVAL; 757 758 return err; 759 } 760 761 static void mc_device_remove(struct device *dev, struct subsys_interface *sif) 762 { 763 int cpu = dev->id; 764 765 if (!cpu_online(cpu)) 766 return; 767 768 pr_debug("CPU%d removed\n", cpu); 769 microcode_fini_cpu(cpu); 770 sysfs_remove_group(&dev->kobj, &mc_attr_group); 771 } 772 773 static struct subsys_interface mc_cpu_interface = { 774 .name = "microcode", 775 .subsys = &cpu_subsys, 776 .add_dev = mc_device_add, 777 .remove_dev = mc_device_remove, 778 }; 779 780 /** 781 * mc_bp_resume - Update boot CPU microcode during resume. 782 */ 783 static void mc_bp_resume(void) 784 { 785 int cpu = smp_processor_id(); 786 struct ucode_cpu_info *uci = ucode_cpu_info + cpu; 787 788 if (uci->valid && uci->mc) 789 microcode_ops->apply_microcode(cpu); 790 else if (!uci->mc) 791 reload_early_microcode(); 792 } 793 794 static struct syscore_ops mc_syscore_ops = { 795 .resume = mc_bp_resume, 796 }; 797 798 static int mc_cpu_starting(unsigned int cpu) 799 { 800 microcode_update_cpu(cpu); 801 pr_debug("CPU%d added\n", cpu); 802 return 0; 803 } 804 805 static int mc_cpu_online(unsigned int cpu) 806 { 807 struct device *dev = get_cpu_device(cpu); 808 809 if (sysfs_create_group(&dev->kobj, &mc_attr_group)) 810 pr_err("Failed to create group for CPU%d\n", cpu); 811 return 0; 812 } 813 814 static int mc_cpu_down_prep(unsigned int cpu) 815 { 816 struct device *dev; 817 818 dev = get_cpu_device(cpu); 819 /* Suspend is in progress, only remove the interface */ 820 sysfs_remove_group(&dev->kobj, &mc_attr_group); 821 pr_debug("CPU%d removed\n", cpu); 822 823 return 0; 824 } 825 826 static struct attribute *cpu_root_microcode_attrs[] = { 827 &dev_attr_reload.attr, 828 NULL 829 }; 830 831 static const struct attribute_group cpu_root_microcode_group = { 832 .name = "microcode", 833 .attrs = cpu_root_microcode_attrs, 834 }; 835 836 int __init microcode_init(void) 837 { 838 struct cpuinfo_x86 *c = &boot_cpu_data; 839 int error; 840 841 if (dis_ucode_ldr) 842 return -EINVAL; 843 844 if (c->x86_vendor == X86_VENDOR_INTEL) 845 microcode_ops = init_intel_microcode(); 846 else if (c->x86_vendor == X86_VENDOR_AMD) 847 microcode_ops = init_amd_microcode(); 848 else 849 pr_err("no support for this CPU vendor\n"); 850 851 if (!microcode_ops) 852 return -ENODEV; 853 854 microcode_pdev = platform_device_register_simple("microcode", -1, 855 NULL, 0); 856 if (IS_ERR(microcode_pdev)) 857 return PTR_ERR(microcode_pdev); 858 859 get_online_cpus(); 860 mutex_lock(µcode_mutex); 861 862 error = subsys_interface_register(&mc_cpu_interface); 863 if (!error) 864 perf_check_microcode(); 865 mutex_unlock(µcode_mutex); 866 put_online_cpus(); 867 868 if (error) 869 goto out_pdev; 870 871 error = sysfs_create_group(&cpu_subsys.dev_root->kobj, 872 &cpu_root_microcode_group); 873 874 if (error) { 875 pr_err("Error creating microcode group!\n"); 876 goto out_driver; 877 } 878 879 error = microcode_dev_init(); 880 if (error) 881 goto out_ucode_group; 882 883 register_syscore_ops(&mc_syscore_ops); 884 cpuhp_setup_state_nocalls(CPUHP_AP_MICROCODE_LOADER, "x86/microcode:starting", 885 mc_cpu_starting, NULL); 886 cpuhp_setup_state_nocalls(CPUHP_AP_ONLINE_DYN, "x86/microcode:online", 887 mc_cpu_online, mc_cpu_down_prep); 888 889 pr_info("Microcode Update Driver: v%s.", DRIVER_VERSION); 890 891 return 0; 892 893 out_ucode_group: 894 sysfs_remove_group(&cpu_subsys.dev_root->kobj, 895 &cpu_root_microcode_group); 896 897 out_driver: 898 get_online_cpus(); 899 mutex_lock(µcode_mutex); 900 901 subsys_interface_unregister(&mc_cpu_interface); 902 903 mutex_unlock(µcode_mutex); 904 put_online_cpus(); 905 906 out_pdev: 907 platform_device_unregister(microcode_pdev); 908 return error; 909 910 } 911 fs_initcall(save_microcode_in_initrd); 912 late_initcall(microcode_init); 913