1 // SPDX-License-Identifier: GPL-2.0-only 2 /* 3 * AMD CPU Microcode Update Driver for Linux 4 * 5 * This driver allows to upgrade microcode on F10h AMD 6 * CPUs and later. 7 * 8 * Copyright (C) 2008-2011 Advanced Micro Devices Inc. 9 * 2013-2018 Borislav Petkov <bp@alien8.de> 10 * 11 * Author: Peter Oruba <peter.oruba@amd.com> 12 * 13 * Based on work by: 14 * Tigran Aivazian <aivazian.tigran@gmail.com> 15 * 16 * early loader: 17 * Copyright (C) 2013 Advanced Micro Devices, Inc. 18 * 19 * Author: Jacob Shin <jacob.shin@amd.com> 20 * Fixes: Borislav Petkov <bp@suse.de> 21 */ 22 #define pr_fmt(fmt) "microcode: " fmt 23 24 #include <linux/earlycpio.h> 25 #include <linux/firmware.h> 26 #include <linux/uaccess.h> 27 #include <linux/vmalloc.h> 28 #include <linux/initrd.h> 29 #include <linux/kernel.h> 30 #include <linux/pci.h> 31 32 #include <asm/microcode_amd.h> 33 #include <asm/microcode.h> 34 #include <asm/processor.h> 35 #include <asm/setup.h> 36 #include <asm/cpu.h> 37 #include <asm/msr.h> 38 39 static struct equiv_cpu_table { 40 unsigned int num_entries; 41 struct equiv_cpu_entry *entry; 42 } equiv_table; 43 44 /* 45 * This points to the current valid container of microcode patches which we will 46 * save from the initrd/builtin before jettisoning its contents. @mc is the 47 * microcode patch we found to match. 48 */ 49 struct cont_desc { 50 struct microcode_amd *mc; 51 u32 cpuid_1_eax; 52 u32 psize; 53 u8 *data; 54 size_t size; 55 }; 56 57 static u32 ucode_new_rev; 58 59 /* One blob per node. */ 60 static u8 amd_ucode_patch[MAX_NUMNODES][PATCH_MAX_SIZE]; 61 62 /* 63 * Microcode patch container file is prepended to the initrd in cpio 64 * format. See Documentation/arch/x86/microcode.rst 65 */ 66 static const char 67 ucode_path[] __maybe_unused = "kernel/x86/microcode/AuthenticAMD.bin"; 68 69 static u16 find_equiv_id(struct equiv_cpu_table *et, u32 sig) 70 { 71 unsigned int i; 72 73 if (!et || !et->num_entries) 74 return 0; 75 76 for (i = 0; i < et->num_entries; i++) { 77 struct equiv_cpu_entry *e = &et->entry[i]; 78 79 if (sig == e->installed_cpu) 80 return e->equiv_cpu; 81 } 82 return 0; 83 } 84 85 /* 86 * Check whether there is a valid microcode container file at the beginning 87 * of @buf of size @buf_size. Set @early to use this function in the early path. 88 */ 89 static bool verify_container(const u8 *buf, size_t buf_size, bool early) 90 { 91 u32 cont_magic; 92 93 if (buf_size <= CONTAINER_HDR_SZ) { 94 if (!early) 95 pr_debug("Truncated microcode container header.\n"); 96 97 return false; 98 } 99 100 cont_magic = *(const u32 *)buf; 101 if (cont_magic != UCODE_MAGIC) { 102 if (!early) 103 pr_debug("Invalid magic value (0x%08x).\n", cont_magic); 104 105 return false; 106 } 107 108 return true; 109 } 110 111 /* 112 * Check whether there is a valid, non-truncated CPU equivalence table at the 113 * beginning of @buf of size @buf_size. Set @early to use this function in the 114 * early path. 115 */ 116 static bool verify_equivalence_table(const u8 *buf, size_t buf_size, bool early) 117 { 118 const u32 *hdr = (const u32 *)buf; 119 u32 cont_type, equiv_tbl_len; 120 121 if (!verify_container(buf, buf_size, early)) 122 return false; 123 124 cont_type = hdr[1]; 125 if (cont_type != UCODE_EQUIV_CPU_TABLE_TYPE) { 126 if (!early) 127 pr_debug("Wrong microcode container equivalence table type: %u.\n", 128 cont_type); 129 130 return false; 131 } 132 133 buf_size -= CONTAINER_HDR_SZ; 134 135 equiv_tbl_len = hdr[2]; 136 if (equiv_tbl_len < sizeof(struct equiv_cpu_entry) || 137 buf_size < equiv_tbl_len) { 138 if (!early) 139 pr_debug("Truncated equivalence table.\n"); 140 141 return false; 142 } 143 144 return true; 145 } 146 147 /* 148 * Check whether there is a valid, non-truncated microcode patch section at the 149 * beginning of @buf of size @buf_size. Set @early to use this function in the 150 * early path. 151 * 152 * On success, @sh_psize returns the patch size according to the section header, 153 * to the caller. 154 */ 155 static bool 156 __verify_patch_section(const u8 *buf, size_t buf_size, u32 *sh_psize, bool early) 157 { 158 u32 p_type, p_size; 159 const u32 *hdr; 160 161 if (buf_size < SECTION_HDR_SIZE) { 162 if (!early) 163 pr_debug("Truncated patch section.\n"); 164 165 return false; 166 } 167 168 hdr = (const u32 *)buf; 169 p_type = hdr[0]; 170 p_size = hdr[1]; 171 172 if (p_type != UCODE_UCODE_TYPE) { 173 if (!early) 174 pr_debug("Invalid type field (0x%x) in container file section header.\n", 175 p_type); 176 177 return false; 178 } 179 180 if (p_size < sizeof(struct microcode_header_amd)) { 181 if (!early) 182 pr_debug("Patch of size %u too short.\n", p_size); 183 184 return false; 185 } 186 187 *sh_psize = p_size; 188 189 return true; 190 } 191 192 /* 193 * Check whether the passed remaining file @buf_size is large enough to contain 194 * a patch of the indicated @sh_psize (and also whether this size does not 195 * exceed the per-family maximum). @sh_psize is the size read from the section 196 * header. 197 */ 198 static unsigned int __verify_patch_size(u8 family, u32 sh_psize, size_t buf_size) 199 { 200 u32 max_size; 201 202 if (family >= 0x15) 203 return min_t(u32, sh_psize, buf_size); 204 205 #define F1XH_MPB_MAX_SIZE 2048 206 #define F14H_MPB_MAX_SIZE 1824 207 208 switch (family) { 209 case 0x10 ... 0x12: 210 max_size = F1XH_MPB_MAX_SIZE; 211 break; 212 case 0x14: 213 max_size = F14H_MPB_MAX_SIZE; 214 break; 215 default: 216 WARN(1, "%s: WTF family: 0x%x\n", __func__, family); 217 return 0; 218 } 219 220 if (sh_psize > min_t(u32, buf_size, max_size)) 221 return 0; 222 223 return sh_psize; 224 } 225 226 /* 227 * Verify the patch in @buf. 228 * 229 * Returns: 230 * negative: on error 231 * positive: patch is not for this family, skip it 232 * 0: success 233 */ 234 static int 235 verify_patch(u8 family, const u8 *buf, size_t buf_size, u32 *patch_size, bool early) 236 { 237 struct microcode_header_amd *mc_hdr; 238 unsigned int ret; 239 u32 sh_psize; 240 u16 proc_id; 241 u8 patch_fam; 242 243 if (!__verify_patch_section(buf, buf_size, &sh_psize, early)) 244 return -1; 245 246 /* 247 * The section header length is not included in this indicated size 248 * but is present in the leftover file length so we need to subtract 249 * it before passing this value to the function below. 250 */ 251 buf_size -= SECTION_HDR_SIZE; 252 253 /* 254 * Check if the remaining buffer is big enough to contain a patch of 255 * size sh_psize, as the section claims. 256 */ 257 if (buf_size < sh_psize) { 258 if (!early) 259 pr_debug("Patch of size %u truncated.\n", sh_psize); 260 261 return -1; 262 } 263 264 ret = __verify_patch_size(family, sh_psize, buf_size); 265 if (!ret) { 266 if (!early) 267 pr_debug("Per-family patch size mismatch.\n"); 268 return -1; 269 } 270 271 *patch_size = sh_psize; 272 273 mc_hdr = (struct microcode_header_amd *)(buf + SECTION_HDR_SIZE); 274 if (mc_hdr->nb_dev_id || mc_hdr->sb_dev_id) { 275 if (!early) 276 pr_err("Patch-ID 0x%08x: chipset-specific code unsupported.\n", mc_hdr->patch_id); 277 return -1; 278 } 279 280 proc_id = mc_hdr->processor_rev_id; 281 patch_fam = 0xf + (proc_id >> 12); 282 if (patch_fam != family) 283 return 1; 284 285 return 0; 286 } 287 288 /* 289 * This scans the ucode blob for the proper container as we can have multiple 290 * containers glued together. Returns the equivalence ID from the equivalence 291 * table or 0 if none found. 292 * Returns the amount of bytes consumed while scanning. @desc contains all the 293 * data we're going to use in later stages of the application. 294 */ 295 static size_t parse_container(u8 *ucode, size_t size, struct cont_desc *desc) 296 { 297 struct equiv_cpu_table table; 298 size_t orig_size = size; 299 u32 *hdr = (u32 *)ucode; 300 u16 eq_id; 301 u8 *buf; 302 303 if (!verify_equivalence_table(ucode, size, true)) 304 return 0; 305 306 buf = ucode; 307 308 table.entry = (struct equiv_cpu_entry *)(buf + CONTAINER_HDR_SZ); 309 table.num_entries = hdr[2] / sizeof(struct equiv_cpu_entry); 310 311 /* 312 * Find the equivalence ID of our CPU in this table. Even if this table 313 * doesn't contain a patch for the CPU, scan through the whole container 314 * so that it can be skipped in case there are other containers appended. 315 */ 316 eq_id = find_equiv_id(&table, desc->cpuid_1_eax); 317 318 buf += hdr[2] + CONTAINER_HDR_SZ; 319 size -= hdr[2] + CONTAINER_HDR_SZ; 320 321 /* 322 * Scan through the rest of the container to find where it ends. We do 323 * some basic sanity-checking too. 324 */ 325 while (size > 0) { 326 struct microcode_amd *mc; 327 u32 patch_size; 328 int ret; 329 330 ret = verify_patch(x86_family(desc->cpuid_1_eax), buf, size, &patch_size, true); 331 if (ret < 0) { 332 /* 333 * Patch verification failed, skip to the next container, if 334 * there is one. Before exit, check whether that container has 335 * found a patch already. If so, use it. 336 */ 337 goto out; 338 } else if (ret > 0) { 339 goto skip; 340 } 341 342 mc = (struct microcode_amd *)(buf + SECTION_HDR_SIZE); 343 if (eq_id == mc->hdr.processor_rev_id) { 344 desc->psize = patch_size; 345 desc->mc = mc; 346 } 347 348 skip: 349 /* Skip patch section header too: */ 350 buf += patch_size + SECTION_HDR_SIZE; 351 size -= patch_size + SECTION_HDR_SIZE; 352 } 353 354 out: 355 /* 356 * If we have found a patch (desc->mc), it means we're looking at the 357 * container which has a patch for this CPU so return 0 to mean, @ucode 358 * already points to the proper container. Otherwise, we return the size 359 * we scanned so that we can advance to the next container in the 360 * buffer. 361 */ 362 if (desc->mc) { 363 desc->data = ucode; 364 desc->size = orig_size - size; 365 366 return 0; 367 } 368 369 return orig_size - size; 370 } 371 372 /* 373 * Scan the ucode blob for the proper container as we can have multiple 374 * containers glued together. 375 */ 376 static void scan_containers(u8 *ucode, size_t size, struct cont_desc *desc) 377 { 378 while (size) { 379 size_t s = parse_container(ucode, size, desc); 380 if (!s) 381 return; 382 383 /* catch wraparound */ 384 if (size >= s) { 385 ucode += s; 386 size -= s; 387 } else { 388 return; 389 } 390 } 391 } 392 393 static int __apply_microcode_amd(struct microcode_amd *mc) 394 { 395 u32 rev, dummy; 396 397 native_wrmsrl(MSR_AMD64_PATCH_LOADER, (u64)(long)&mc->hdr.data_code); 398 399 /* verify patch application was successful */ 400 native_rdmsr(MSR_AMD64_PATCH_LEVEL, rev, dummy); 401 if (rev != mc->hdr.patch_id) 402 return -1; 403 404 return 0; 405 } 406 407 /* 408 * Early load occurs before we can vmalloc(). So we look for the microcode 409 * patch container file in initrd, traverse equivalent cpu table, look for a 410 * matching microcode patch, and update, all in initrd memory in place. 411 * When vmalloc() is available for use later -- on 64-bit during first AP load, 412 * and on 32-bit during save_microcode_in_initrd_amd() -- we can call 413 * load_microcode_amd() to save equivalent cpu table and microcode patches in 414 * kernel heap memory. 415 * 416 * Returns true if container found (sets @desc), false otherwise. 417 */ 418 static bool early_apply_microcode(u32 cpuid_1_eax, void *ucode, size_t size, bool save_patch) 419 { 420 struct cont_desc desc = { 0 }; 421 u8 (*patch)[PATCH_MAX_SIZE]; 422 struct microcode_amd *mc; 423 u32 rev, dummy, *new_rev; 424 bool ret = false; 425 426 #ifdef CONFIG_X86_32 427 new_rev = (u32 *)__pa_nodebug(&ucode_new_rev); 428 patch = (u8 (*)[PATCH_MAX_SIZE])__pa_nodebug(&amd_ucode_patch); 429 #else 430 new_rev = &ucode_new_rev; 431 patch = &amd_ucode_patch[0]; 432 #endif 433 434 desc.cpuid_1_eax = cpuid_1_eax; 435 436 scan_containers(ucode, size, &desc); 437 438 mc = desc.mc; 439 if (!mc) 440 return ret; 441 442 native_rdmsr(MSR_AMD64_PATCH_LEVEL, rev, dummy); 443 444 /* 445 * Allow application of the same revision to pick up SMT-specific 446 * changes even if the revision of the other SMT thread is already 447 * up-to-date. 448 */ 449 if (rev > mc->hdr.patch_id) 450 return ret; 451 452 if (!__apply_microcode_amd(mc)) { 453 *new_rev = mc->hdr.patch_id; 454 ret = true; 455 456 if (save_patch) 457 memcpy(patch, mc, min_t(u32, desc.psize, PATCH_MAX_SIZE)); 458 } 459 460 return ret; 461 } 462 463 static bool get_builtin_microcode(struct cpio_data *cp, unsigned int family) 464 { 465 char fw_name[36] = "amd-ucode/microcode_amd.bin"; 466 struct firmware fw; 467 468 if (IS_ENABLED(CONFIG_X86_32)) 469 return false; 470 471 if (family >= 0x15) 472 snprintf(fw_name, sizeof(fw_name), 473 "amd-ucode/microcode_amd_fam%.2xh.bin", family); 474 475 if (firmware_request_builtin(&fw, fw_name)) { 476 cp->size = fw.size; 477 cp->data = (void *)fw.data; 478 return true; 479 } 480 481 return false; 482 } 483 484 static void find_blobs_in_containers(unsigned int cpuid_1_eax, struct cpio_data *ret) 485 { 486 struct ucode_cpu_info *uci; 487 struct cpio_data cp; 488 const char *path; 489 bool use_pa; 490 491 if (IS_ENABLED(CONFIG_X86_32)) { 492 uci = (struct ucode_cpu_info *)__pa_nodebug(ucode_cpu_info); 493 path = (const char *)__pa_nodebug(ucode_path); 494 use_pa = true; 495 } else { 496 uci = ucode_cpu_info; 497 path = ucode_path; 498 use_pa = false; 499 } 500 501 if (!get_builtin_microcode(&cp, x86_family(cpuid_1_eax))) 502 cp = find_microcode_in_initrd(path, use_pa); 503 504 /* Needed in load_microcode_amd() */ 505 uci->cpu_sig.sig = cpuid_1_eax; 506 507 *ret = cp; 508 } 509 510 void __init load_ucode_amd_bsp(unsigned int cpuid_1_eax) 511 { 512 struct cpio_data cp = { }; 513 514 find_blobs_in_containers(cpuid_1_eax, &cp); 515 if (!(cp.data && cp.size)) 516 return; 517 518 early_apply_microcode(cpuid_1_eax, cp.data, cp.size, true); 519 } 520 521 void load_ucode_amd_ap(unsigned int cpuid_1_eax) 522 { 523 struct microcode_amd *mc; 524 struct cpio_data cp; 525 u32 *new_rev, rev, dummy; 526 527 if (IS_ENABLED(CONFIG_X86_32)) { 528 mc = (struct microcode_amd *)__pa_nodebug(amd_ucode_patch); 529 new_rev = (u32 *)__pa_nodebug(&ucode_new_rev); 530 } else { 531 mc = (struct microcode_amd *)amd_ucode_patch; 532 new_rev = &ucode_new_rev; 533 } 534 535 native_rdmsr(MSR_AMD64_PATCH_LEVEL, rev, dummy); 536 537 /* 538 * Check whether a new patch has been saved already. Also, allow application of 539 * the same revision in order to pick up SMT-thread-specific configuration even 540 * if the sibling SMT thread already has an up-to-date revision. 541 */ 542 if (*new_rev && rev <= mc->hdr.patch_id) { 543 if (!__apply_microcode_amd(mc)) { 544 *new_rev = mc->hdr.patch_id; 545 return; 546 } 547 } 548 549 find_blobs_in_containers(cpuid_1_eax, &cp); 550 if (!(cp.data && cp.size)) 551 return; 552 553 early_apply_microcode(cpuid_1_eax, cp.data, cp.size, false); 554 } 555 556 static enum ucode_state load_microcode_amd(u8 family, const u8 *data, size_t size); 557 558 int __init save_microcode_in_initrd_amd(unsigned int cpuid_1_eax) 559 { 560 struct cont_desc desc = { 0 }; 561 enum ucode_state ret; 562 struct cpio_data cp; 563 564 cp = find_microcode_in_initrd(ucode_path, false); 565 if (!(cp.data && cp.size)) 566 return -EINVAL; 567 568 desc.cpuid_1_eax = cpuid_1_eax; 569 570 scan_containers(cp.data, cp.size, &desc); 571 if (!desc.mc) 572 return -EINVAL; 573 574 ret = load_microcode_amd(x86_family(cpuid_1_eax), desc.data, desc.size); 575 if (ret > UCODE_UPDATED) 576 return -EINVAL; 577 578 return 0; 579 } 580 581 void reload_ucode_amd(unsigned int cpu) 582 { 583 u32 rev, dummy __always_unused; 584 struct microcode_amd *mc; 585 586 mc = (struct microcode_amd *)amd_ucode_patch[cpu_to_node(cpu)]; 587 588 rdmsr(MSR_AMD64_PATCH_LEVEL, rev, dummy); 589 590 if (rev < mc->hdr.patch_id) { 591 if (!__apply_microcode_amd(mc)) { 592 ucode_new_rev = mc->hdr.patch_id; 593 pr_info("reload patch_level=0x%08x\n", ucode_new_rev); 594 } 595 } 596 } 597 598 /* 599 * a small, trivial cache of per-family ucode patches 600 */ 601 static struct ucode_patch *cache_find_patch(u16 equiv_cpu) 602 { 603 struct ucode_patch *p; 604 605 list_for_each_entry(p, µcode_cache, plist) 606 if (p->equiv_cpu == equiv_cpu) 607 return p; 608 return NULL; 609 } 610 611 static void update_cache(struct ucode_patch *new_patch) 612 { 613 struct ucode_patch *p; 614 615 list_for_each_entry(p, µcode_cache, plist) { 616 if (p->equiv_cpu == new_patch->equiv_cpu) { 617 if (p->patch_id >= new_patch->patch_id) { 618 /* we already have the latest patch */ 619 kfree(new_patch->data); 620 kfree(new_patch); 621 return; 622 } 623 624 list_replace(&p->plist, &new_patch->plist); 625 kfree(p->data); 626 kfree(p); 627 return; 628 } 629 } 630 /* no patch found, add it */ 631 list_add_tail(&new_patch->plist, µcode_cache); 632 } 633 634 static void free_cache(void) 635 { 636 struct ucode_patch *p, *tmp; 637 638 list_for_each_entry_safe(p, tmp, µcode_cache, plist) { 639 __list_del(p->plist.prev, p->plist.next); 640 kfree(p->data); 641 kfree(p); 642 } 643 } 644 645 static struct ucode_patch *find_patch(unsigned int cpu) 646 { 647 struct ucode_cpu_info *uci = ucode_cpu_info + cpu; 648 u16 equiv_id; 649 650 651 equiv_id = find_equiv_id(&equiv_table, uci->cpu_sig.sig); 652 if (!equiv_id) 653 return NULL; 654 655 return cache_find_patch(equiv_id); 656 } 657 658 static int collect_cpu_info_amd(int cpu, struct cpu_signature *csig) 659 { 660 struct cpuinfo_x86 *c = &cpu_data(cpu); 661 struct ucode_cpu_info *uci = ucode_cpu_info + cpu; 662 struct ucode_patch *p; 663 664 csig->sig = cpuid_eax(0x00000001); 665 csig->rev = c->microcode; 666 667 /* 668 * a patch could have been loaded early, set uci->mc so that 669 * mc_bp_resume() can call apply_microcode() 670 */ 671 p = find_patch(cpu); 672 if (p && (p->patch_id == csig->rev)) 673 uci->mc = p->data; 674 675 pr_info("CPU%d: patch_level=0x%08x\n", cpu, csig->rev); 676 677 return 0; 678 } 679 680 static enum ucode_state apply_microcode_amd(int cpu) 681 { 682 struct cpuinfo_x86 *c = &cpu_data(cpu); 683 struct microcode_amd *mc_amd; 684 struct ucode_cpu_info *uci; 685 struct ucode_patch *p; 686 enum ucode_state ret; 687 u32 rev, dummy __always_unused; 688 689 BUG_ON(raw_smp_processor_id() != cpu); 690 691 uci = ucode_cpu_info + cpu; 692 693 p = find_patch(cpu); 694 if (!p) 695 return UCODE_NFOUND; 696 697 mc_amd = p->data; 698 uci->mc = p->data; 699 700 rdmsr(MSR_AMD64_PATCH_LEVEL, rev, dummy); 701 702 /* need to apply patch? */ 703 if (rev > mc_amd->hdr.patch_id) { 704 ret = UCODE_OK; 705 goto out; 706 } 707 708 if (__apply_microcode_amd(mc_amd)) { 709 pr_err("CPU%d: update failed for patch_level=0x%08x\n", 710 cpu, mc_amd->hdr.patch_id); 711 return UCODE_ERROR; 712 } 713 714 rev = mc_amd->hdr.patch_id; 715 ret = UCODE_UPDATED; 716 717 pr_info("CPU%d: new patch_level=0x%08x\n", cpu, rev); 718 719 out: 720 uci->cpu_sig.rev = rev; 721 c->microcode = rev; 722 723 /* Update boot_cpu_data's revision too, if we're on the BSP: */ 724 if (c->cpu_index == boot_cpu_data.cpu_index) 725 boot_cpu_data.microcode = rev; 726 727 return ret; 728 } 729 730 static size_t install_equiv_cpu_table(const u8 *buf, size_t buf_size) 731 { 732 u32 equiv_tbl_len; 733 const u32 *hdr; 734 735 if (!verify_equivalence_table(buf, buf_size, false)) 736 return 0; 737 738 hdr = (const u32 *)buf; 739 equiv_tbl_len = hdr[2]; 740 741 equiv_table.entry = vmalloc(equiv_tbl_len); 742 if (!equiv_table.entry) { 743 pr_err("failed to allocate equivalent CPU table\n"); 744 return 0; 745 } 746 747 memcpy(equiv_table.entry, buf + CONTAINER_HDR_SZ, equiv_tbl_len); 748 equiv_table.num_entries = equiv_tbl_len / sizeof(struct equiv_cpu_entry); 749 750 /* add header length */ 751 return equiv_tbl_len + CONTAINER_HDR_SZ; 752 } 753 754 static void free_equiv_cpu_table(void) 755 { 756 vfree(equiv_table.entry); 757 memset(&equiv_table, 0, sizeof(equiv_table)); 758 } 759 760 static void cleanup(void) 761 { 762 free_equiv_cpu_table(); 763 free_cache(); 764 } 765 766 /* 767 * Return a non-negative value even if some of the checks failed so that 768 * we can skip over the next patch. If we return a negative value, we 769 * signal a grave error like a memory allocation has failed and the 770 * driver cannot continue functioning normally. In such cases, we tear 771 * down everything we've used up so far and exit. 772 */ 773 static int verify_and_add_patch(u8 family, u8 *fw, unsigned int leftover, 774 unsigned int *patch_size) 775 { 776 struct microcode_header_amd *mc_hdr; 777 struct ucode_patch *patch; 778 u16 proc_id; 779 int ret; 780 781 ret = verify_patch(family, fw, leftover, patch_size, false); 782 if (ret) 783 return ret; 784 785 patch = kzalloc(sizeof(*patch), GFP_KERNEL); 786 if (!patch) { 787 pr_err("Patch allocation failure.\n"); 788 return -EINVAL; 789 } 790 791 patch->data = kmemdup(fw + SECTION_HDR_SIZE, *patch_size, GFP_KERNEL); 792 if (!patch->data) { 793 pr_err("Patch data allocation failure.\n"); 794 kfree(patch); 795 return -EINVAL; 796 } 797 patch->size = *patch_size; 798 799 mc_hdr = (struct microcode_header_amd *)(fw + SECTION_HDR_SIZE); 800 proc_id = mc_hdr->processor_rev_id; 801 802 INIT_LIST_HEAD(&patch->plist); 803 patch->patch_id = mc_hdr->patch_id; 804 patch->equiv_cpu = proc_id; 805 806 pr_debug("%s: Added patch_id: 0x%08x, proc_id: 0x%04x\n", 807 __func__, patch->patch_id, proc_id); 808 809 /* ... and add to cache. */ 810 update_cache(patch); 811 812 return 0; 813 } 814 815 /* Scan the blob in @data and add microcode patches to the cache. */ 816 static enum ucode_state __load_microcode_amd(u8 family, const u8 *data, 817 size_t size) 818 { 819 u8 *fw = (u8 *)data; 820 size_t offset; 821 822 offset = install_equiv_cpu_table(data, size); 823 if (!offset) 824 return UCODE_ERROR; 825 826 fw += offset; 827 size -= offset; 828 829 if (*(u32 *)fw != UCODE_UCODE_TYPE) { 830 pr_err("invalid type field in container file section header\n"); 831 free_equiv_cpu_table(); 832 return UCODE_ERROR; 833 } 834 835 while (size > 0) { 836 unsigned int crnt_size = 0; 837 int ret; 838 839 ret = verify_and_add_patch(family, fw, size, &crnt_size); 840 if (ret < 0) 841 return UCODE_ERROR; 842 843 fw += crnt_size + SECTION_HDR_SIZE; 844 size -= (crnt_size + SECTION_HDR_SIZE); 845 } 846 847 return UCODE_OK; 848 } 849 850 static enum ucode_state load_microcode_amd(u8 family, const u8 *data, size_t size) 851 { 852 struct cpuinfo_x86 *c; 853 unsigned int nid, cpu; 854 struct ucode_patch *p; 855 enum ucode_state ret; 856 857 /* free old equiv table */ 858 free_equiv_cpu_table(); 859 860 ret = __load_microcode_amd(family, data, size); 861 if (ret != UCODE_OK) { 862 cleanup(); 863 return ret; 864 } 865 866 for_each_node(nid) { 867 cpu = cpumask_first(cpumask_of_node(nid)); 868 c = &cpu_data(cpu); 869 870 p = find_patch(cpu); 871 if (!p) 872 continue; 873 874 if (c->microcode >= p->patch_id) 875 continue; 876 877 ret = UCODE_NEW; 878 879 memset(&amd_ucode_patch[nid], 0, PATCH_MAX_SIZE); 880 memcpy(&amd_ucode_patch[nid], p->data, min_t(u32, p->size, PATCH_MAX_SIZE)); 881 } 882 883 return ret; 884 } 885 886 /* 887 * AMD microcode firmware naming convention, up to family 15h they are in 888 * the legacy file: 889 * 890 * amd-ucode/microcode_amd.bin 891 * 892 * This legacy file is always smaller than 2K in size. 893 * 894 * Beginning with family 15h, they are in family-specific firmware files: 895 * 896 * amd-ucode/microcode_amd_fam15h.bin 897 * amd-ucode/microcode_amd_fam16h.bin 898 * ... 899 * 900 * These might be larger than 2K. 901 */ 902 static enum ucode_state request_microcode_amd(int cpu, struct device *device) 903 { 904 char fw_name[36] = "amd-ucode/microcode_amd.bin"; 905 struct cpuinfo_x86 *c = &cpu_data(cpu); 906 enum ucode_state ret = UCODE_NFOUND; 907 const struct firmware *fw; 908 909 if (c->x86 >= 0x15) 910 snprintf(fw_name, sizeof(fw_name), "amd-ucode/microcode_amd_fam%.2xh.bin", c->x86); 911 912 if (request_firmware_direct(&fw, (const char *)fw_name, device)) { 913 pr_debug("failed to load file %s\n", fw_name); 914 goto out; 915 } 916 917 ret = UCODE_ERROR; 918 if (!verify_container(fw->data, fw->size, false)) 919 goto fw_release; 920 921 ret = load_microcode_amd(c->x86, fw->data, fw->size); 922 923 fw_release: 924 release_firmware(fw); 925 926 out: 927 return ret; 928 } 929 930 static void microcode_fini_cpu_amd(int cpu) 931 { 932 struct ucode_cpu_info *uci = ucode_cpu_info + cpu; 933 934 uci->mc = NULL; 935 } 936 937 static struct microcode_ops microcode_amd_ops = { 938 .request_microcode_fw = request_microcode_amd, 939 .collect_cpu_info = collect_cpu_info_amd, 940 .apply_microcode = apply_microcode_amd, 941 .microcode_fini_cpu = microcode_fini_cpu_amd, 942 }; 943 944 struct microcode_ops * __init init_amd_microcode(void) 945 { 946 struct cpuinfo_x86 *c = &boot_cpu_data; 947 948 if (c->x86_vendor != X86_VENDOR_AMD || c->x86 < 0x10) { 949 pr_warn("AMD CPU family 0x%x not supported\n", c->x86); 950 return NULL; 951 } 952 953 if (ucode_new_rev) 954 pr_info_once("microcode updated early to new patch_level=0x%08x\n", 955 ucode_new_rev); 956 957 return µcode_amd_ops; 958 } 959 960 void __exit exit_amd_microcode(void) 961 { 962 cleanup(); 963 } 964