xref: /openbmc/linux/arch/x86/kernel/cpu/feat_ctl.c (revision 28dce2c4)
1 // SPDX-License-Identifier: GPL-2.0
2 #include <linux/tboot.h>
3 
4 #include <asm/cpufeature.h>
5 #include <asm/msr-index.h>
6 #include <asm/processor.h>
7 #include <asm/vmx.h>
8 #include "cpu.h"
9 
10 #undef pr_fmt
11 #define pr_fmt(fmt)	"x86/cpu: " fmt
12 
13 #ifdef CONFIG_X86_VMX_FEATURE_NAMES
14 enum vmx_feature_leafs {
15 	MISC_FEATURES = 0,
16 	PRIMARY_CTLS,
17 	SECONDARY_CTLS,
18 	NR_VMX_FEATURE_WORDS,
19 };
20 
21 #define VMX_F(x) BIT(VMX_FEATURE_##x & 0x1f)
22 
23 static void init_vmx_capabilities(struct cpuinfo_x86 *c)
24 {
25 	u32 supported, funcs, ept, vpid, ign;
26 
27 	BUILD_BUG_ON(NVMXINTS != NR_VMX_FEATURE_WORDS);
28 
29 	/*
30 	 * The high bits contain the allowed-1 settings, i.e. features that can
31 	 * be turned on.  The low bits contain the allowed-0 settings, i.e.
32 	 * features that can be turned off.  Ignore the allowed-0 settings,
33 	 * if a feature can be turned on then it's supported.
34 	 *
35 	 * Use raw rdmsr() for primary processor controls and pin controls MSRs
36 	 * as they exist on any CPU that supports VMX, i.e. we want the WARN if
37 	 * the RDMSR faults.
38 	 */
39 	rdmsr(MSR_IA32_VMX_PROCBASED_CTLS, ign, supported);
40 	c->vmx_capability[PRIMARY_CTLS] = supported;
41 
42 	rdmsr_safe(MSR_IA32_VMX_PROCBASED_CTLS2, &ign, &supported);
43 	c->vmx_capability[SECONDARY_CTLS] = supported;
44 
45 	rdmsr(MSR_IA32_VMX_PINBASED_CTLS, ign, supported);
46 	rdmsr_safe(MSR_IA32_VMX_VMFUNC, &ign, &funcs);
47 
48 	/*
49 	 * Except for EPT+VPID, which enumerates support for both in a single
50 	 * MSR, low for EPT, high for VPID.
51 	 */
52 	rdmsr_safe(MSR_IA32_VMX_EPT_VPID_CAP, &ept, &vpid);
53 
54 	/* Pin, EPT, VPID and VM-Func are merged into a single word. */
55 	WARN_ON_ONCE(supported >> 16);
56 	WARN_ON_ONCE(funcs >> 4);
57 	c->vmx_capability[MISC_FEATURES] = (supported & 0xffff) |
58 					   ((vpid & 0x1) << 16) |
59 					   ((funcs & 0xf) << 28);
60 
61 	/* EPT bits are full on scattered and must be manually handled. */
62 	if (ept & VMX_EPT_EXECUTE_ONLY_BIT)
63 		c->vmx_capability[MISC_FEATURES] |= VMX_F(EPT_EXECUTE_ONLY);
64 	if (ept & VMX_EPT_AD_BIT)
65 		c->vmx_capability[MISC_FEATURES] |= VMX_F(EPT_AD);
66 	if (ept & VMX_EPT_1GB_PAGE_BIT)
67 		c->vmx_capability[MISC_FEATURES] |= VMX_F(EPT_1GB);
68 
69 	/* Synthetic APIC features that are aggregates of multiple features. */
70 	if ((c->vmx_capability[PRIMARY_CTLS] & VMX_F(VIRTUAL_TPR)) &&
71 	    (c->vmx_capability[SECONDARY_CTLS] & VMX_F(VIRT_APIC_ACCESSES)))
72 		c->vmx_capability[MISC_FEATURES] |= VMX_F(FLEXPRIORITY);
73 
74 	if ((c->vmx_capability[PRIMARY_CTLS] & VMX_F(VIRTUAL_TPR)) &&
75 	    (c->vmx_capability[SECONDARY_CTLS] & VMX_F(APIC_REGISTER_VIRT)) &&
76 	    (c->vmx_capability[SECONDARY_CTLS] & VMX_F(VIRT_INTR_DELIVERY)) &&
77 	    (c->vmx_capability[MISC_FEATURES] & VMX_F(POSTED_INTR)))
78 		c->vmx_capability[MISC_FEATURES] |= VMX_F(APICV);
79 
80 	/* Set the synthetic cpufeatures to preserve /proc/cpuinfo's ABI. */
81 	if (c->vmx_capability[PRIMARY_CTLS] & VMX_F(VIRTUAL_TPR))
82 		set_cpu_cap(c, X86_FEATURE_TPR_SHADOW);
83 	if (c->vmx_capability[MISC_FEATURES] & VMX_F(FLEXPRIORITY))
84 		set_cpu_cap(c, X86_FEATURE_FLEXPRIORITY);
85 	if (c->vmx_capability[MISC_FEATURES] & VMX_F(VIRTUAL_NMIS))
86 		set_cpu_cap(c, X86_FEATURE_VNMI);
87 	if (c->vmx_capability[SECONDARY_CTLS] & VMX_F(EPT))
88 		set_cpu_cap(c, X86_FEATURE_EPT);
89 	if (c->vmx_capability[MISC_FEATURES] & VMX_F(EPT_AD))
90 		set_cpu_cap(c, X86_FEATURE_EPT_AD);
91 	if (c->vmx_capability[MISC_FEATURES] & VMX_F(VPID))
92 		set_cpu_cap(c, X86_FEATURE_VPID);
93 }
94 #endif /* CONFIG_X86_VMX_FEATURE_NAMES */
95 
96 static int __init nosgx(char *str)
97 {
98 	setup_clear_cpu_cap(X86_FEATURE_SGX);
99 
100 	return 0;
101 }
102 
103 early_param("nosgx", nosgx);
104 
105 void init_ia32_feat_ctl(struct cpuinfo_x86 *c)
106 {
107 	bool enable_sgx_kvm = false, enable_sgx_driver = false;
108 	bool tboot = tboot_enabled();
109 	bool enable_vmx;
110 	u64 msr;
111 
112 	if (rdmsrl_safe(MSR_IA32_FEAT_CTL, &msr)) {
113 		clear_cpu_cap(c, X86_FEATURE_VMX);
114 		clear_cpu_cap(c, X86_FEATURE_SGX);
115 		return;
116 	}
117 
118 	enable_vmx = cpu_has(c, X86_FEATURE_VMX) &&
119 		     IS_ENABLED(CONFIG_KVM_INTEL);
120 
121 	if (cpu_has(c, X86_FEATURE_SGX) && IS_ENABLED(CONFIG_X86_SGX)) {
122 		/*
123 		 * Separate out SGX driver enabling from KVM.  This allows KVM
124 		 * guests to use SGX even if the kernel SGX driver refuses to
125 		 * use it.  This happens if flexible Launch Control is not
126 		 * available.
127 		 */
128 		enable_sgx_driver = cpu_has(c, X86_FEATURE_SGX_LC);
129 		enable_sgx_kvm = enable_vmx && IS_ENABLED(CONFIG_X86_SGX_KVM);
130 	}
131 
132 	if (msr & FEAT_CTL_LOCKED)
133 		goto update_caps;
134 
135 	/*
136 	 * Ignore whatever value BIOS left in the MSR to avoid enabling random
137 	 * features or faulting on the WRMSR.
138 	 */
139 	msr = FEAT_CTL_LOCKED;
140 
141 	/*
142 	 * Enable VMX if and only if the kernel may do VMXON at some point,
143 	 * i.e. KVM is enabled, to avoid unnecessarily adding an attack vector
144 	 * for the kernel, e.g. using VMX to hide malicious code.
145 	 */
146 	if (enable_vmx) {
147 		msr |= FEAT_CTL_VMX_ENABLED_OUTSIDE_SMX;
148 
149 		if (tboot)
150 			msr |= FEAT_CTL_VMX_ENABLED_INSIDE_SMX;
151 	}
152 
153 	if (enable_sgx_kvm || enable_sgx_driver) {
154 		msr |= FEAT_CTL_SGX_ENABLED;
155 		if (enable_sgx_driver)
156 			msr |= FEAT_CTL_SGX_LC_ENABLED;
157 	}
158 
159 	wrmsrl(MSR_IA32_FEAT_CTL, msr);
160 
161 update_caps:
162 	set_cpu_cap(c, X86_FEATURE_MSR_IA32_FEAT_CTL);
163 
164 	if (!cpu_has(c, X86_FEATURE_VMX))
165 		goto update_sgx;
166 
167 	if ( (tboot && !(msr & FEAT_CTL_VMX_ENABLED_INSIDE_SMX)) ||
168 	    (!tboot && !(msr & FEAT_CTL_VMX_ENABLED_OUTSIDE_SMX))) {
169 		if (IS_ENABLED(CONFIG_KVM_INTEL))
170 			pr_err_once("VMX (%s TXT) disabled by BIOS\n",
171 				    tboot ? "inside" : "outside");
172 		clear_cpu_cap(c, X86_FEATURE_VMX);
173 	} else {
174 #ifdef CONFIG_X86_VMX_FEATURE_NAMES
175 		init_vmx_capabilities(c);
176 #endif
177 	}
178 
179 update_sgx:
180 	if (!(msr & FEAT_CTL_SGX_ENABLED)) {
181 		if (enable_sgx_kvm || enable_sgx_driver)
182 			pr_err_once("SGX disabled by BIOS.\n");
183 		clear_cpu_cap(c, X86_FEATURE_SGX);
184 		return;
185 	}
186 
187 	/*
188 	 * VMX feature bit may be cleared due to being disabled in BIOS,
189 	 * in which case SGX virtualization cannot be supported either.
190 	 */
191 	if (!cpu_has(c, X86_FEATURE_VMX) && enable_sgx_kvm) {
192 		pr_err_once("SGX virtualization disabled due to lack of VMX.\n");
193 		enable_sgx_kvm = 0;
194 	}
195 
196 	if (!(msr & FEAT_CTL_SGX_LC_ENABLED) && enable_sgx_driver) {
197 		if (!enable_sgx_kvm) {
198 			pr_err_once("SGX Launch Control is locked. Disable SGX.\n");
199 			clear_cpu_cap(c, X86_FEATURE_SGX);
200 		} else {
201 			pr_err_once("SGX Launch Control is locked. Support SGX virtualization only.\n");
202 			clear_cpu_cap(c, X86_FEATURE_SGX_LC);
203 		}
204 	}
205 }
206