1 /* 2 * Copyright (C) 1994 Linus Torvalds 3 * 4 * Cyrix stuff, June 1998 by: 5 * - Rafael R. Reilova (moved everything from head.S), 6 * <rreilova@ececs.uc.edu> 7 * - Channing Corn (tests & fixes), 8 * - Andrew D. Balsa (code cleanup). 9 */ 10 #include <linux/init.h> 11 #include <linux/utsname.h> 12 #include <asm/bugs.h> 13 #include <asm/processor.h> 14 #include <asm/processor-flags.h> 15 #include <asm/i387.h> 16 #include <asm/msr.h> 17 #include <asm/paravirt.h> 18 #include <asm/alternative.h> 19 20 static int __init no_halt(char *s) 21 { 22 boot_cpu_data.hlt_works_ok = 0; 23 return 1; 24 } 25 26 __setup("no-hlt", no_halt); 27 28 static int __init no_387(char *s) 29 { 30 boot_cpu_data.hard_math = 0; 31 write_cr0(X86_CR0_TS | X86_CR0_EM | X86_CR0_MP | read_cr0()); 32 return 1; 33 } 34 35 __setup("no387", no_387); 36 37 static double __initdata x = 4195835.0; 38 static double __initdata y = 3145727.0; 39 40 /* 41 * This used to check for exceptions.. 42 * However, it turns out that to support that, 43 * the XMM trap handlers basically had to 44 * be buggy. So let's have a correct XMM trap 45 * handler, and forget about printing out 46 * some status at boot. 47 * 48 * We should really only care about bugs here 49 * anyway. Not features. 50 */ 51 static void __init check_fpu(void) 52 { 53 if (!boot_cpu_data.hard_math) { 54 #ifndef CONFIG_MATH_EMULATION 55 printk(KERN_EMERG "No coprocessor found and no math emulation present.\n"); 56 printk(KERN_EMERG "Giving up.\n"); 57 for (;;) ; 58 #endif 59 return; 60 } 61 62 /* trap_init() enabled FXSR and company _before_ testing for FP problems here. */ 63 /* Test for the divl bug.. */ 64 __asm__("fninit\n\t" 65 "fldl %1\n\t" 66 "fdivl %2\n\t" 67 "fmull %2\n\t" 68 "fldl %1\n\t" 69 "fsubp %%st,%%st(1)\n\t" 70 "fistpl %0\n\t" 71 "fwait\n\t" 72 "fninit" 73 : "=m" (*&boot_cpu_data.fdiv_bug) 74 : "m" (*&x), "m" (*&y)); 75 if (boot_cpu_data.fdiv_bug) 76 printk("Hmm, FPU with FDIV bug.\n"); 77 } 78 79 static void __init check_hlt(void) 80 { 81 if (paravirt_enabled()) 82 return; 83 84 printk(KERN_INFO "Checking 'hlt' instruction... "); 85 if (!boot_cpu_data.hlt_works_ok) { 86 printk("disabled\n"); 87 return; 88 } 89 halt(); 90 halt(); 91 halt(); 92 halt(); 93 printk("OK.\n"); 94 } 95 96 /* 97 * Most 386 processors have a bug where a POPAD can lock the 98 * machine even from user space. 99 */ 100 101 static void __init check_popad(void) 102 { 103 #ifndef CONFIG_X86_POPAD_OK 104 int res, inp = (int) &res; 105 106 printk(KERN_INFO "Checking for popad bug... "); 107 __asm__ __volatile__( 108 "movl $12345678,%%eax; movl $0,%%edi; pusha; popa; movl (%%edx,%%edi),%%ecx " 109 : "=&a" (res) 110 : "d" (inp) 111 : "ecx", "edi" ); 112 /* If this fails, it means that any user program may lock the CPU hard. Too bad. */ 113 if (res != 12345678) printk( "Buggy.\n" ); 114 else printk( "OK.\n" ); 115 #endif 116 } 117 118 /* 119 * Check whether we are able to run this kernel safely on SMP. 120 * 121 * - In order to run on a i386, we need to be compiled for i386 122 * (for due to lack of "invlpg" and working WP on a i386) 123 * - In order to run on anything without a TSC, we need to be 124 * compiled for a i486. 125 * - In order to support the local APIC on a buggy Pentium machine, 126 * we need to be compiled with CONFIG_X86_GOOD_APIC disabled, 127 * which happens implicitly if compiled for a Pentium or lower 128 * (unless an advanced selection of CPU features is used) as an 129 * otherwise config implies a properly working local APIC without 130 * the need to do extra reads from the APIC. 131 */ 132 133 static void __init check_config(void) 134 { 135 /* 136 * We'd better not be a i386 if we're configured to use some 137 * i486+ only features! (WP works in supervisor mode and the 138 * new "invlpg" and "bswap" instructions) 139 */ 140 #if defined(CONFIG_X86_WP_WORKS_OK) || defined(CONFIG_X86_INVLPG) || defined(CONFIG_X86_BSWAP) 141 if (boot_cpu_data.x86 == 3) 142 panic("Kernel requires i486+ for 'invlpg' and other features"); 143 #endif 144 145 /* 146 * If we were told we had a good local APIC, check for buggy Pentia, 147 * i.e. all B steppings and the C2 stepping of P54C when using their 148 * integrated APIC (see 11AP erratum in "Pentium Processor 149 * Specification Update"). 150 */ 151 #if defined(CONFIG_X86_LOCAL_APIC) && defined(CONFIG_X86_GOOD_APIC) 152 if (boot_cpu_data.x86_vendor == X86_VENDOR_INTEL 153 && cpu_has_apic 154 && boot_cpu_data.x86 == 5 155 && boot_cpu_data.x86_model == 2 156 && (boot_cpu_data.x86_mask < 6 || boot_cpu_data.x86_mask == 11)) 157 panic("Kernel compiled for PMMX+, assumes a local APIC without the read-before-write bug!"); 158 #endif 159 } 160 161 162 void __init check_bugs(void) 163 { 164 identify_boot_cpu(); 165 #ifndef CONFIG_SMP 166 printk("CPU: "); 167 print_cpu_info(&boot_cpu_data); 168 #endif 169 check_config(); 170 check_fpu(); 171 check_hlt(); 172 check_popad(); 173 init_utsname()->machine[1] = '0' + (boot_cpu_data.x86 > 6 ? 6 : boot_cpu_data.x86); 174 alternative_instructions(); 175 } 176