1 #include <linux/threads.h> 2 #include <linux/cpumask.h> 3 #include <linux/string.h> 4 #include <linux/kernel.h> 5 #include <linux/ctype.h> 6 #include <linux/init.h> 7 #include <linux/dmar.h> 8 9 #include <asm/smp.h> 10 #include <asm/x2apic.h> 11 12 int x2apic_phys; 13 14 static struct apic apic_x2apic_phys; 15 16 static int set_x2apic_phys_mode(char *arg) 17 { 18 x2apic_phys = 1; 19 return 0; 20 } 21 early_param("x2apic_phys", set_x2apic_phys_mode); 22 23 static int x2apic_acpi_madt_oem_check(char *oem_id, char *oem_table_id) 24 { 25 if (x2apic_phys) 26 return x2apic_enabled(); 27 else if ((acpi_gbl_FADT.header.revision >= FADT2_REVISION_ID) && 28 (acpi_gbl_FADT.flags & ACPI_FADT_APIC_PHYSICAL) && 29 x2apic_enabled()) { 30 printk(KERN_DEBUG "System requires x2apic physical mode\n"); 31 return 1; 32 } 33 else 34 return 0; 35 } 36 37 static void 38 __x2apic_send_IPI_mask(const struct cpumask *mask, int vector, int apic_dest) 39 { 40 unsigned long query_cpu; 41 unsigned long this_cpu; 42 unsigned long flags; 43 44 x2apic_wrmsr_fence(); 45 46 local_irq_save(flags); 47 48 this_cpu = smp_processor_id(); 49 for_each_cpu(query_cpu, mask) { 50 if (apic_dest == APIC_DEST_ALLBUT && this_cpu == query_cpu) 51 continue; 52 __x2apic_send_IPI_dest(per_cpu(x86_cpu_to_apicid, query_cpu), 53 vector, APIC_DEST_PHYSICAL); 54 } 55 local_irq_restore(flags); 56 } 57 58 static void x2apic_send_IPI_mask(const struct cpumask *mask, int vector) 59 { 60 __x2apic_send_IPI_mask(mask, vector, APIC_DEST_ALLINC); 61 } 62 63 static void 64 x2apic_send_IPI_mask_allbutself(const struct cpumask *mask, int vector) 65 { 66 __x2apic_send_IPI_mask(mask, vector, APIC_DEST_ALLBUT); 67 } 68 69 static void x2apic_send_IPI_allbutself(int vector) 70 { 71 __x2apic_send_IPI_mask(cpu_online_mask, vector, APIC_DEST_ALLBUT); 72 } 73 74 static void x2apic_send_IPI_all(int vector) 75 { 76 __x2apic_send_IPI_mask(cpu_online_mask, vector, APIC_DEST_ALLINC); 77 } 78 79 static void init_x2apic_ldr(void) 80 { 81 } 82 83 static int x2apic_phys_probe(void) 84 { 85 if (x2apic_mode && x2apic_phys) 86 return 1; 87 88 return apic == &apic_x2apic_phys; 89 } 90 91 /* 92 * Each logical cpu is in its own vector allocation domain. 93 */ 94 static void x2apic_vector_allocation_domain(int cpu, struct cpumask *retmask) 95 { 96 cpumask_clear(retmask); 97 cpumask_set_cpu(cpu, retmask); 98 } 99 100 static struct apic apic_x2apic_phys = { 101 102 .name = "physical x2apic", 103 .probe = x2apic_phys_probe, 104 .acpi_madt_oem_check = x2apic_acpi_madt_oem_check, 105 .apic_id_valid = x2apic_apic_id_valid, 106 .apic_id_registered = x2apic_apic_id_registered, 107 108 .irq_delivery_mode = dest_Fixed, 109 .irq_dest_mode = 0, /* physical */ 110 111 .target_cpus = online_target_cpus, 112 .disable_esr = 0, 113 .dest_logical = 0, 114 .check_apicid_used = NULL, 115 .check_apicid_present = NULL, 116 117 .vector_allocation_domain = x2apic_vector_allocation_domain, 118 .init_apic_ldr = init_x2apic_ldr, 119 120 .ioapic_phys_id_map = NULL, 121 .setup_apic_routing = NULL, 122 .multi_timer_check = NULL, 123 .cpu_present_to_apicid = default_cpu_present_to_apicid, 124 .apicid_to_cpu_present = NULL, 125 .setup_portio_remap = NULL, 126 .check_phys_apicid_present = default_check_phys_apicid_present, 127 .enable_apic_mode = NULL, 128 .phys_pkg_id = x2apic_phys_pkg_id, 129 .mps_oem_check = NULL, 130 131 .get_apic_id = x2apic_get_apic_id, 132 .set_apic_id = x2apic_set_apic_id, 133 .apic_id_mask = 0xFFFFFFFFu, 134 135 .cpu_mask_to_apicid = default_cpu_mask_to_apicid, 136 .cpu_mask_to_apicid_and = default_cpu_mask_to_apicid_and, 137 138 .send_IPI_mask = x2apic_send_IPI_mask, 139 .send_IPI_mask_allbutself = x2apic_send_IPI_mask_allbutself, 140 .send_IPI_allbutself = x2apic_send_IPI_allbutself, 141 .send_IPI_all = x2apic_send_IPI_all, 142 .send_IPI_self = x2apic_send_IPI_self, 143 144 .trampoline_phys_low = DEFAULT_TRAMPOLINE_PHYS_LOW, 145 .trampoline_phys_high = DEFAULT_TRAMPOLINE_PHYS_HIGH, 146 .wait_for_init_deassert = NULL, 147 .smp_callin_clear_local_apic = NULL, 148 .inquire_remote_apic = NULL, 149 150 .read = native_apic_msr_read, 151 .write = native_apic_msr_write, 152 .eoi_write = native_apic_msr_eoi_write, 153 .icr_read = native_x2apic_icr_read, 154 .icr_write = native_x2apic_icr_write, 155 .wait_icr_idle = native_x2apic_wait_icr_idle, 156 .safe_wait_icr_idle = native_safe_x2apic_wait_icr_idle, 157 }; 158 159 apic_driver(apic_x2apic_phys); 160