1 /* 2 * APIC driver for "bigsmp" xAPIC machines with more than 8 virtual CPUs. 3 * 4 * Drives the local APIC in "clustered mode". 5 */ 6 #include <linux/threads.h> 7 #include <linux/cpumask.h> 8 #include <linux/kernel.h> 9 #include <linux/init.h> 10 #include <linux/dmi.h> 11 #include <linux/smp.h> 12 13 #include <asm/apicdef.h> 14 #include <asm/fixmap.h> 15 #include <asm/mpspec.h> 16 #include <asm/apic.h> 17 #include <asm/ipi.h> 18 19 static unsigned bigsmp_get_apic_id(unsigned long x) 20 { 21 return (x >> 24) & 0xFF; 22 } 23 24 static int bigsmp_apic_id_registered(void) 25 { 26 return 1; 27 } 28 29 static const struct cpumask *bigsmp_target_cpus(void) 30 { 31 #ifdef CONFIG_SMP 32 return cpu_online_mask; 33 #else 34 return cpumask_of(0); 35 #endif 36 } 37 38 static unsigned long bigsmp_check_apicid_used(physid_mask_t *map, int apicid) 39 { 40 return 0; 41 } 42 43 static unsigned long bigsmp_check_apicid_present(int bit) 44 { 45 return 1; 46 } 47 48 static inline unsigned long calculate_ldr(int cpu) 49 { 50 unsigned long val, id; 51 52 val = apic_read(APIC_LDR) & ~APIC_LDR_MASK; 53 id = per_cpu(x86_bios_cpu_apicid, cpu); 54 val |= SET_APIC_LOGICAL_ID(id); 55 56 return val; 57 } 58 59 /* 60 * Set up the logical destination ID. 61 * 62 * Intel recommends to set DFR, LDR and TPR before enabling 63 * an APIC. See e.g. "AP-388 82489DX User's Manual" (Intel 64 * document number 292116). So here it goes... 65 */ 66 static void bigsmp_init_apic_ldr(void) 67 { 68 unsigned long val; 69 int cpu = smp_processor_id(); 70 71 apic_write(APIC_DFR, APIC_DFR_FLAT); 72 val = calculate_ldr(cpu); 73 apic_write(APIC_LDR, val); 74 } 75 76 static void bigsmp_setup_apic_routing(void) 77 { 78 printk(KERN_INFO 79 "Enabling APIC mode: Physflat. Using %d I/O APICs\n", 80 nr_ioapics); 81 } 82 83 static int bigsmp_apicid_to_node(int logical_apicid) 84 { 85 return apicid_2_node[hard_smp_processor_id()]; 86 } 87 88 static int bigsmp_cpu_present_to_apicid(int mps_cpu) 89 { 90 if (mps_cpu < nr_cpu_ids) 91 return (int) per_cpu(x86_bios_cpu_apicid, mps_cpu); 92 93 return BAD_APICID; 94 } 95 96 static void bigsmp_ioapic_phys_id_map(physid_mask_t *phys_map, physid_mask_t *retmap) 97 { 98 /* For clustered we don't have a good way to do this yet - hack */ 99 physids_promote(0xFFL, retmap); 100 } 101 102 static int bigsmp_check_phys_apicid_present(int phys_apicid) 103 { 104 return 1; 105 } 106 107 /* As we are using single CPU as destination, pick only one CPU here */ 108 static unsigned int bigsmp_cpu_mask_to_apicid(const struct cpumask *cpumask) 109 { 110 int cpu = cpumask_first(cpumask); 111 112 if (cpu < nr_cpu_ids) 113 return cpu_physical_id(cpu); 114 return BAD_APICID; 115 } 116 117 static unsigned int bigsmp_cpu_mask_to_apicid_and(const struct cpumask *cpumask, 118 const struct cpumask *andmask) 119 { 120 int cpu; 121 122 /* 123 * We're using fixed IRQ delivery, can only return one phys APIC ID. 124 * May as well be the first. 125 */ 126 for_each_cpu_and(cpu, cpumask, andmask) { 127 if (cpumask_test_cpu(cpu, cpu_online_mask)) 128 return cpu_physical_id(cpu); 129 } 130 return BAD_APICID; 131 } 132 133 static int bigsmp_phys_pkg_id(int cpuid_apic, int index_msb) 134 { 135 return cpuid_apic >> index_msb; 136 } 137 138 static inline void bigsmp_send_IPI_mask(const struct cpumask *mask, int vector) 139 { 140 default_send_IPI_mask_sequence_phys(mask, vector); 141 } 142 143 static void bigsmp_send_IPI_allbutself(int vector) 144 { 145 default_send_IPI_mask_allbutself_phys(cpu_online_mask, vector); 146 } 147 148 static void bigsmp_send_IPI_all(int vector) 149 { 150 bigsmp_send_IPI_mask(cpu_online_mask, vector); 151 } 152 153 static int dmi_bigsmp; /* can be set by dmi scanners */ 154 155 static int hp_ht_bigsmp(const struct dmi_system_id *d) 156 { 157 printk(KERN_NOTICE "%s detected: force use of apic=bigsmp\n", d->ident); 158 dmi_bigsmp = 1; 159 160 return 0; 161 } 162 163 164 static const struct dmi_system_id bigsmp_dmi_table[] = { 165 { hp_ht_bigsmp, "HP ProLiant DL760 G2", 166 { DMI_MATCH(DMI_BIOS_VENDOR, "HP"), 167 DMI_MATCH(DMI_BIOS_VERSION, "P44-"), 168 } 169 }, 170 171 { hp_ht_bigsmp, "HP ProLiant DL740", 172 { DMI_MATCH(DMI_BIOS_VENDOR, "HP"), 173 DMI_MATCH(DMI_BIOS_VERSION, "P47-"), 174 } 175 }, 176 { } /* NULL entry stops DMI scanning */ 177 }; 178 179 static void bigsmp_vector_allocation_domain(int cpu, struct cpumask *retmask) 180 { 181 cpumask_clear(retmask); 182 cpumask_set_cpu(cpu, retmask); 183 } 184 185 static int probe_bigsmp(void) 186 { 187 if (def_to_bigsmp) 188 dmi_bigsmp = 1; 189 else 190 dmi_check_system(bigsmp_dmi_table); 191 192 return dmi_bigsmp; 193 } 194 195 struct apic apic_bigsmp = { 196 197 .name = "bigsmp", 198 .probe = probe_bigsmp, 199 .acpi_madt_oem_check = NULL, 200 .apic_id_registered = bigsmp_apic_id_registered, 201 202 .irq_delivery_mode = dest_Fixed, 203 /* phys delivery to target CPU: */ 204 .irq_dest_mode = 0, 205 206 .target_cpus = bigsmp_target_cpus, 207 .disable_esr = 1, 208 .dest_logical = 0, 209 .check_apicid_used = bigsmp_check_apicid_used, 210 .check_apicid_present = bigsmp_check_apicid_present, 211 212 .vector_allocation_domain = bigsmp_vector_allocation_domain, 213 .init_apic_ldr = bigsmp_init_apic_ldr, 214 215 .ioapic_phys_id_map = bigsmp_ioapic_phys_id_map, 216 .setup_apic_routing = bigsmp_setup_apic_routing, 217 .multi_timer_check = NULL, 218 .apicid_to_node = bigsmp_apicid_to_node, 219 .cpu_present_to_apicid = bigsmp_cpu_present_to_apicid, 220 .apicid_to_cpu_present = physid_set_mask_of_physid, 221 .setup_portio_remap = NULL, 222 .check_phys_apicid_present = bigsmp_check_phys_apicid_present, 223 .enable_apic_mode = NULL, 224 .phys_pkg_id = bigsmp_phys_pkg_id, 225 .mps_oem_check = NULL, 226 227 .get_apic_id = bigsmp_get_apic_id, 228 .set_apic_id = NULL, 229 .apic_id_mask = 0xFF << 24, 230 231 .cpu_mask_to_apicid = bigsmp_cpu_mask_to_apicid, 232 .cpu_mask_to_apicid_and = bigsmp_cpu_mask_to_apicid_and, 233 234 .send_IPI_mask = bigsmp_send_IPI_mask, 235 .send_IPI_mask_allbutself = NULL, 236 .send_IPI_allbutself = bigsmp_send_IPI_allbutself, 237 .send_IPI_all = bigsmp_send_IPI_all, 238 .send_IPI_self = default_send_IPI_self, 239 240 .trampoline_phys_low = DEFAULT_TRAMPOLINE_PHYS_LOW, 241 .trampoline_phys_high = DEFAULT_TRAMPOLINE_PHYS_HIGH, 242 243 .wait_for_init_deassert = default_wait_for_init_deassert, 244 245 .smp_callin_clear_local_apic = NULL, 246 .inquire_remote_apic = default_inquire_remote_apic, 247 248 .read = native_apic_mem_read, 249 .write = native_apic_mem_write, 250 .icr_read = native_apic_icr_read, 251 .icr_write = native_apic_icr_write, 252 .wait_icr_idle = native_apic_wait_icr_idle, 253 .safe_wait_icr_idle = native_safe_apic_wait_icr_idle, 254 }; 255