xref: /openbmc/linux/arch/x86/kernel/apic/bigsmp_32.c (revision 12bf24a4)
1 /*
2  * APIC driver for "bigsmp" xAPIC machines with more than 8 virtual CPUs.
3  *
4  * Drives the local APIC in "clustered mode".
5  */
6 #include <linux/threads.h>
7 #include <linux/cpumask.h>
8 #include <linux/kernel.h>
9 #include <linux/init.h>
10 #include <linux/dmi.h>
11 #include <linux/smp.h>
12 
13 #include <asm/apicdef.h>
14 #include <asm/fixmap.h>
15 #include <asm/mpspec.h>
16 #include <asm/apic.h>
17 #include <asm/ipi.h>
18 
19 static unsigned bigsmp_get_apic_id(unsigned long x)
20 {
21 	return (x >> 24) & 0xFF;
22 }
23 
24 static int bigsmp_apic_id_registered(void)
25 {
26 	return 1;
27 }
28 
29 static const struct cpumask *bigsmp_target_cpus(void)
30 {
31 #ifdef CONFIG_SMP
32 	return cpu_online_mask;
33 #else
34 	return cpumask_of(0);
35 #endif
36 }
37 
38 static unsigned long bigsmp_check_apicid_used(physid_mask_t *map, int apicid)
39 {
40 	return 0;
41 }
42 
43 static unsigned long bigsmp_check_apicid_present(int bit)
44 {
45 	return 1;
46 }
47 
48 static int bigsmp_early_logical_apicid(int cpu)
49 {
50 	/* on bigsmp, logical apicid is the same as physical */
51 	return early_per_cpu(x86_cpu_to_apicid, cpu);
52 }
53 
54 static inline unsigned long calculate_ldr(int cpu)
55 {
56 	unsigned long val, id;
57 
58 	val = apic_read(APIC_LDR) & ~APIC_LDR_MASK;
59 	id = per_cpu(x86_bios_cpu_apicid, cpu);
60 	val |= SET_APIC_LOGICAL_ID(id);
61 
62 	return val;
63 }
64 
65 /*
66  * Set up the logical destination ID.
67  *
68  * Intel recommends to set DFR, LDR and TPR before enabling
69  * an APIC.  See e.g. "AP-388 82489DX User's Manual" (Intel
70  * document number 292116).  So here it goes...
71  */
72 static void bigsmp_init_apic_ldr(void)
73 {
74 	unsigned long val;
75 	int cpu = smp_processor_id();
76 
77 	apic_write(APIC_DFR, APIC_DFR_FLAT);
78 	val = calculate_ldr(cpu);
79 	apic_write(APIC_LDR, val);
80 }
81 
82 static void bigsmp_setup_apic_routing(void)
83 {
84 	printk(KERN_INFO
85 		"Enabling APIC mode:  Physflat.  Using %d I/O APICs\n",
86 		nr_ioapics);
87 }
88 
89 static int bigsmp_apicid_to_node(int logical_apicid)
90 {
91 	return apicid_2_node[hard_smp_processor_id()];
92 }
93 
94 static int bigsmp_cpu_present_to_apicid(int mps_cpu)
95 {
96 	if (mps_cpu < nr_cpu_ids)
97 		return (int) per_cpu(x86_bios_cpu_apicid, mps_cpu);
98 
99 	return BAD_APICID;
100 }
101 
102 static void bigsmp_ioapic_phys_id_map(physid_mask_t *phys_map, physid_mask_t *retmap)
103 {
104 	/* For clustered we don't have a good way to do this yet - hack */
105 	physids_promote(0xFFL, retmap);
106 }
107 
108 static int bigsmp_check_phys_apicid_present(int phys_apicid)
109 {
110 	return 1;
111 }
112 
113 /* As we are using single CPU as destination, pick only one CPU here */
114 static unsigned int bigsmp_cpu_mask_to_apicid(const struct cpumask *cpumask)
115 {
116 	int cpu = cpumask_first(cpumask);
117 
118 	if (cpu < nr_cpu_ids)
119 		return cpu_physical_id(cpu);
120 	return BAD_APICID;
121 }
122 
123 static unsigned int bigsmp_cpu_mask_to_apicid_and(const struct cpumask *cpumask,
124 			      const struct cpumask *andmask)
125 {
126 	int cpu;
127 
128 	/*
129 	 * We're using fixed IRQ delivery, can only return one phys APIC ID.
130 	 * May as well be the first.
131 	 */
132 	for_each_cpu_and(cpu, cpumask, andmask) {
133 		if (cpumask_test_cpu(cpu, cpu_online_mask))
134 			return cpu_physical_id(cpu);
135 	}
136 	return BAD_APICID;
137 }
138 
139 static int bigsmp_phys_pkg_id(int cpuid_apic, int index_msb)
140 {
141 	return cpuid_apic >> index_msb;
142 }
143 
144 static inline void bigsmp_send_IPI_mask(const struct cpumask *mask, int vector)
145 {
146 	default_send_IPI_mask_sequence_phys(mask, vector);
147 }
148 
149 static void bigsmp_send_IPI_allbutself(int vector)
150 {
151 	default_send_IPI_mask_allbutself_phys(cpu_online_mask, vector);
152 }
153 
154 static void bigsmp_send_IPI_all(int vector)
155 {
156 	bigsmp_send_IPI_mask(cpu_online_mask, vector);
157 }
158 
159 static int dmi_bigsmp; /* can be set by dmi scanners */
160 
161 static int hp_ht_bigsmp(const struct dmi_system_id *d)
162 {
163 	printk(KERN_NOTICE "%s detected: force use of apic=bigsmp\n", d->ident);
164 	dmi_bigsmp = 1;
165 
166 	return 0;
167 }
168 
169 
170 static const struct dmi_system_id bigsmp_dmi_table[] = {
171 	{ hp_ht_bigsmp, "HP ProLiant DL760 G2",
172 		{	DMI_MATCH(DMI_BIOS_VENDOR, "HP"),
173 			DMI_MATCH(DMI_BIOS_VERSION, "P44-"),
174 		}
175 	},
176 
177 	{ hp_ht_bigsmp, "HP ProLiant DL740",
178 		{	DMI_MATCH(DMI_BIOS_VENDOR, "HP"),
179 			DMI_MATCH(DMI_BIOS_VERSION, "P47-"),
180 		}
181 	},
182 	{ } /* NULL entry stops DMI scanning */
183 };
184 
185 static void bigsmp_vector_allocation_domain(int cpu, struct cpumask *retmask)
186 {
187 	cpumask_clear(retmask);
188 	cpumask_set_cpu(cpu, retmask);
189 }
190 
191 static int probe_bigsmp(void)
192 {
193 	if (def_to_bigsmp)
194 		dmi_bigsmp = 1;
195 	else
196 		dmi_check_system(bigsmp_dmi_table);
197 
198 	return dmi_bigsmp;
199 }
200 
201 struct apic apic_bigsmp = {
202 
203 	.name				= "bigsmp",
204 	.probe				= probe_bigsmp,
205 	.acpi_madt_oem_check		= NULL,
206 	.apic_id_registered		= bigsmp_apic_id_registered,
207 
208 	.irq_delivery_mode		= dest_Fixed,
209 	/* phys delivery to target CPU: */
210 	.irq_dest_mode			= 0,
211 
212 	.target_cpus			= bigsmp_target_cpus,
213 	.disable_esr			= 1,
214 	.dest_logical			= 0,
215 	.check_apicid_used		= bigsmp_check_apicid_used,
216 	.check_apicid_present		= bigsmp_check_apicid_present,
217 
218 	.vector_allocation_domain	= bigsmp_vector_allocation_domain,
219 	.init_apic_ldr			= bigsmp_init_apic_ldr,
220 
221 	.ioapic_phys_id_map		= bigsmp_ioapic_phys_id_map,
222 	.setup_apic_routing		= bigsmp_setup_apic_routing,
223 	.multi_timer_check		= NULL,
224 	.apicid_to_node			= bigsmp_apicid_to_node,
225 	.cpu_present_to_apicid		= bigsmp_cpu_present_to_apicid,
226 	.apicid_to_cpu_present		= physid_set_mask_of_physid,
227 	.setup_portio_remap		= NULL,
228 	.check_phys_apicid_present	= bigsmp_check_phys_apicid_present,
229 	.enable_apic_mode		= NULL,
230 	.phys_pkg_id			= bigsmp_phys_pkg_id,
231 	.mps_oem_check			= NULL,
232 
233 	.get_apic_id			= bigsmp_get_apic_id,
234 	.set_apic_id			= NULL,
235 	.apic_id_mask			= 0xFF << 24,
236 
237 	.cpu_mask_to_apicid		= bigsmp_cpu_mask_to_apicid,
238 	.cpu_mask_to_apicid_and		= bigsmp_cpu_mask_to_apicid_and,
239 
240 	.send_IPI_mask			= bigsmp_send_IPI_mask,
241 	.send_IPI_mask_allbutself	= NULL,
242 	.send_IPI_allbutself		= bigsmp_send_IPI_allbutself,
243 	.send_IPI_all			= bigsmp_send_IPI_all,
244 	.send_IPI_self			= default_send_IPI_self,
245 
246 	.trampoline_phys_low		= DEFAULT_TRAMPOLINE_PHYS_LOW,
247 	.trampoline_phys_high		= DEFAULT_TRAMPOLINE_PHYS_HIGH,
248 
249 	.wait_for_init_deassert		= default_wait_for_init_deassert,
250 
251 	.smp_callin_clear_local_apic	= NULL,
252 	.inquire_remote_apic		= default_inquire_remote_apic,
253 
254 	.read				= native_apic_mem_read,
255 	.write				= native_apic_mem_write,
256 	.icr_read			= native_apic_icr_read,
257 	.icr_write			= native_apic_icr_write,
258 	.wait_icr_idle			= native_apic_wait_icr_idle,
259 	.safe_wait_icr_idle		= native_safe_apic_wait_icr_idle,
260 
261 	.x86_32_early_logical_apicid	= bigsmp_early_logical_apicid,
262 };
263