1 // SPDX-License-Identifier: GPL-2.0-or-later 2 /* 3 * boot.c - Architecture-Specific Low-Level ACPI Boot Support 4 * 5 * Copyright (C) 2001, 2002 Paul Diefenbaugh <paul.s.diefenbaugh@intel.com> 6 * Copyright (C) 2001 Jun Nakajima <jun.nakajima@intel.com> 7 */ 8 #define pr_fmt(fmt) "ACPI: " fmt 9 10 #include <linux/init.h> 11 #include <linux/acpi.h> 12 #include <linux/acpi_pmtmr.h> 13 #include <linux/efi.h> 14 #include <linux/cpumask.h> 15 #include <linux/export.h> 16 #include <linux/dmi.h> 17 #include <linux/irq.h> 18 #include <linux/slab.h> 19 #include <linux/memblock.h> 20 #include <linux/ioport.h> 21 #include <linux/pci.h> 22 #include <linux/efi-bgrt.h> 23 #include <linux/serial_core.h> 24 #include <linux/pgtable.h> 25 26 #include <asm/e820/api.h> 27 #include <asm/irqdomain.h> 28 #include <asm/pci_x86.h> 29 #include <asm/io_apic.h> 30 #include <asm/apic.h> 31 #include <asm/io.h> 32 #include <asm/mpspec.h> 33 #include <asm/smp.h> 34 #include <asm/i8259.h> 35 #include <asm/setup.h> 36 37 #include "sleep.h" /* To include x86_acpi_suspend_lowlevel */ 38 static int __initdata acpi_force = 0; 39 int acpi_disabled; 40 EXPORT_SYMBOL(acpi_disabled); 41 42 #ifdef CONFIG_X86_64 43 # include <asm/proto.h> 44 #endif /* X86 */ 45 46 int acpi_noirq; /* skip ACPI IRQ initialization */ 47 static int acpi_nobgrt; /* skip ACPI BGRT */ 48 int acpi_pci_disabled; /* skip ACPI PCI scan and IRQ initialization */ 49 EXPORT_SYMBOL(acpi_pci_disabled); 50 51 int acpi_lapic; 52 int acpi_ioapic; 53 int acpi_strict; 54 int acpi_disable_cmcff; 55 56 /* ACPI SCI override configuration */ 57 u8 acpi_sci_flags __initdata; 58 u32 acpi_sci_override_gsi __initdata = INVALID_ACPI_IRQ; 59 int acpi_skip_timer_override __initdata; 60 int acpi_use_timer_override __initdata; 61 int acpi_fix_pin2_polarity __initdata; 62 63 #ifdef CONFIG_X86_LOCAL_APIC 64 static u64 acpi_lapic_addr __initdata = APIC_DEFAULT_PHYS_BASE; 65 static bool acpi_support_online_capable; 66 #endif 67 68 #ifdef CONFIG_X86_64 69 /* Physical address of the Multiprocessor Wakeup Structure mailbox */ 70 static u64 acpi_mp_wake_mailbox_paddr; 71 /* Virtual address of the Multiprocessor Wakeup Structure mailbox */ 72 static struct acpi_madt_multiproc_wakeup_mailbox *acpi_mp_wake_mailbox; 73 #endif 74 75 #ifdef CONFIG_X86_IO_APIC 76 /* 77 * Locks related to IOAPIC hotplug 78 * Hotplug side: 79 * ->device_hotplug_lock 80 * ->acpi_ioapic_lock 81 * ->ioapic_lock 82 * Interrupt mapping side: 83 * ->acpi_ioapic_lock 84 * ->ioapic_mutex 85 * ->ioapic_lock 86 */ 87 static DEFINE_MUTEX(acpi_ioapic_lock); 88 #endif 89 90 /* -------------------------------------------------------------------------- 91 Boot-time Configuration 92 -------------------------------------------------------------------------- */ 93 94 /* 95 * The default interrupt routing model is PIC (8259). This gets 96 * overridden if IOAPICs are enumerated (below). 97 */ 98 enum acpi_irq_model_id acpi_irq_model = ACPI_IRQ_MODEL_PIC; 99 100 101 /* 102 * ISA irqs by default are the first 16 gsis but can be 103 * any gsi as specified by an interrupt source override. 104 */ 105 static u32 isa_irq_to_gsi[NR_IRQS_LEGACY] __read_mostly = { 106 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15 107 }; 108 109 /* 110 * This is just a simple wrapper around early_memremap(), 111 * with sanity checks for phys == 0 and size == 0. 112 */ 113 void __init __iomem *__acpi_map_table(unsigned long phys, unsigned long size) 114 { 115 116 if (!phys || !size) 117 return NULL; 118 119 return early_memremap(phys, size); 120 } 121 122 void __init __acpi_unmap_table(void __iomem *map, unsigned long size) 123 { 124 if (!map || !size) 125 return; 126 127 early_memunmap(map, size); 128 } 129 130 #ifdef CONFIG_X86_LOCAL_APIC 131 static int __init acpi_parse_madt(struct acpi_table_header *table) 132 { 133 struct acpi_table_madt *madt = NULL; 134 135 if (!boot_cpu_has(X86_FEATURE_APIC)) 136 return -EINVAL; 137 138 madt = (struct acpi_table_madt *)table; 139 if (!madt) { 140 pr_warn("Unable to map MADT\n"); 141 return -ENODEV; 142 } 143 144 if (madt->address) { 145 acpi_lapic_addr = (u64) madt->address; 146 147 pr_debug("Local APIC address 0x%08x\n", madt->address); 148 } 149 if (madt->header.revision >= 5) 150 acpi_support_online_capable = true; 151 152 default_acpi_madt_oem_check(madt->header.oem_id, 153 madt->header.oem_table_id); 154 155 return 0; 156 } 157 158 /** 159 * acpi_register_lapic - register a local apic and generates a logic cpu number 160 * @id: local apic id to register 161 * @acpiid: ACPI id to register 162 * @enabled: this cpu is enabled or not 163 * 164 * Returns the logic cpu number which maps to the local apic 165 */ 166 static int acpi_register_lapic(int id, u32 acpiid, u8 enabled) 167 { 168 unsigned int ver = 0; 169 int cpu; 170 171 if (id >= MAX_LOCAL_APIC) { 172 pr_info("skipped apicid that is too big\n"); 173 return -EINVAL; 174 } 175 176 if (!enabled) { 177 ++disabled_cpus; 178 return -EINVAL; 179 } 180 181 if (boot_cpu_physical_apicid != -1U) 182 ver = boot_cpu_apic_version; 183 184 cpu = generic_processor_info(id, ver); 185 if (cpu >= 0) 186 early_per_cpu(x86_cpu_to_acpiid, cpu) = acpiid; 187 188 return cpu; 189 } 190 191 static bool __init acpi_is_processor_usable(u32 lapic_flags) 192 { 193 if (lapic_flags & ACPI_MADT_ENABLED) 194 return true; 195 196 if (acpi_support_online_capable && (lapic_flags & ACPI_MADT_ONLINE_CAPABLE)) 197 return true; 198 199 return false; 200 } 201 202 static int __init 203 acpi_parse_x2apic(union acpi_subtable_headers *header, const unsigned long end) 204 { 205 struct acpi_madt_local_x2apic *processor = NULL; 206 #ifdef CONFIG_X86_X2APIC 207 u32 apic_id; 208 u8 enabled; 209 #endif 210 211 processor = (struct acpi_madt_local_x2apic *)header; 212 213 if (BAD_MADT_ENTRY(processor, end)) 214 return -EINVAL; 215 216 acpi_table_print_madt_entry(&header->common); 217 218 #ifdef CONFIG_X86_X2APIC 219 apic_id = processor->local_apic_id; 220 enabled = processor->lapic_flags & ACPI_MADT_ENABLED; 221 222 /* Ignore invalid ID */ 223 if (apic_id == 0xffffffff) 224 return 0; 225 226 /* don't register processors that cannot be onlined */ 227 if (!acpi_is_processor_usable(processor->lapic_flags)) 228 return 0; 229 230 /* 231 * We need to register disabled CPU as well to permit 232 * counting disabled CPUs. This allows us to size 233 * cpus_possible_map more accurately, to permit 234 * to not preallocating memory for all NR_CPUS 235 * when we use CPU hotplug. 236 */ 237 if (!apic->apic_id_valid(apic_id)) { 238 if (enabled) 239 pr_warn("x2apic entry ignored\n"); 240 return 0; 241 } 242 243 acpi_register_lapic(apic_id, processor->uid, enabled); 244 #else 245 pr_warn("x2apic entry ignored\n"); 246 #endif 247 248 return 0; 249 } 250 251 static int __init 252 acpi_parse_lapic(union acpi_subtable_headers * header, const unsigned long end) 253 { 254 struct acpi_madt_local_apic *processor = NULL; 255 256 processor = (struct acpi_madt_local_apic *)header; 257 258 if (BAD_MADT_ENTRY(processor, end)) 259 return -EINVAL; 260 261 acpi_table_print_madt_entry(&header->common); 262 263 /* Ignore invalid ID */ 264 if (processor->id == 0xff) 265 return 0; 266 267 /* don't register processors that can not be onlined */ 268 if (!acpi_is_processor_usable(processor->lapic_flags)) 269 return 0; 270 271 /* 272 * We need to register disabled CPU as well to permit 273 * counting disabled CPUs. This allows us to size 274 * cpus_possible_map more accurately, to permit 275 * to not preallocating memory for all NR_CPUS 276 * when we use CPU hotplug. 277 */ 278 acpi_register_lapic(processor->id, /* APIC ID */ 279 processor->processor_id, /* ACPI ID */ 280 processor->lapic_flags & ACPI_MADT_ENABLED); 281 282 return 0; 283 } 284 285 static int __init 286 acpi_parse_sapic(union acpi_subtable_headers *header, const unsigned long end) 287 { 288 struct acpi_madt_local_sapic *processor = NULL; 289 290 processor = (struct acpi_madt_local_sapic *)header; 291 292 if (BAD_MADT_ENTRY(processor, end)) 293 return -EINVAL; 294 295 acpi_table_print_madt_entry(&header->common); 296 297 acpi_register_lapic((processor->id << 8) | processor->eid,/* APIC ID */ 298 processor->processor_id, /* ACPI ID */ 299 processor->lapic_flags & ACPI_MADT_ENABLED); 300 301 return 0; 302 } 303 304 static int __init 305 acpi_parse_lapic_addr_ovr(union acpi_subtable_headers * header, 306 const unsigned long end) 307 { 308 struct acpi_madt_local_apic_override *lapic_addr_ovr = NULL; 309 310 lapic_addr_ovr = (struct acpi_madt_local_apic_override *)header; 311 312 if (BAD_MADT_ENTRY(lapic_addr_ovr, end)) 313 return -EINVAL; 314 315 acpi_table_print_madt_entry(&header->common); 316 317 acpi_lapic_addr = lapic_addr_ovr->address; 318 319 return 0; 320 } 321 322 static int __init 323 acpi_parse_x2apic_nmi(union acpi_subtable_headers *header, 324 const unsigned long end) 325 { 326 struct acpi_madt_local_x2apic_nmi *x2apic_nmi = NULL; 327 328 x2apic_nmi = (struct acpi_madt_local_x2apic_nmi *)header; 329 330 if (BAD_MADT_ENTRY(x2apic_nmi, end)) 331 return -EINVAL; 332 333 acpi_table_print_madt_entry(&header->common); 334 335 if (x2apic_nmi->lint != 1) 336 pr_warn("NMI not connected to LINT 1!\n"); 337 338 return 0; 339 } 340 341 static int __init 342 acpi_parse_lapic_nmi(union acpi_subtable_headers * header, const unsigned long end) 343 { 344 struct acpi_madt_local_apic_nmi *lapic_nmi = NULL; 345 346 lapic_nmi = (struct acpi_madt_local_apic_nmi *)header; 347 348 if (BAD_MADT_ENTRY(lapic_nmi, end)) 349 return -EINVAL; 350 351 acpi_table_print_madt_entry(&header->common); 352 353 if (lapic_nmi->lint != 1) 354 pr_warn("NMI not connected to LINT 1!\n"); 355 356 return 0; 357 } 358 359 #ifdef CONFIG_X86_64 360 static int acpi_wakeup_cpu(int apicid, unsigned long start_ip) 361 { 362 /* 363 * Remap mailbox memory only for the first call to acpi_wakeup_cpu(). 364 * 365 * Wakeup of secondary CPUs is fully serialized in the core code. 366 * No need to protect acpi_mp_wake_mailbox from concurrent accesses. 367 */ 368 if (!acpi_mp_wake_mailbox) { 369 acpi_mp_wake_mailbox = memremap(acpi_mp_wake_mailbox_paddr, 370 sizeof(*acpi_mp_wake_mailbox), 371 MEMREMAP_WB); 372 } 373 374 /* 375 * Mailbox memory is shared between the firmware and OS. Firmware will 376 * listen on mailbox command address, and once it receives the wakeup 377 * command, the CPU associated with the given apicid will be booted. 378 * 379 * The value of 'apic_id' and 'wakeup_vector' must be visible to the 380 * firmware before the wakeup command is visible. smp_store_release() 381 * ensures ordering and visibility. 382 */ 383 acpi_mp_wake_mailbox->apic_id = apicid; 384 acpi_mp_wake_mailbox->wakeup_vector = start_ip; 385 smp_store_release(&acpi_mp_wake_mailbox->command, 386 ACPI_MP_WAKE_COMMAND_WAKEUP); 387 388 /* 389 * Wait for the CPU to wake up. 390 * 391 * The CPU being woken up is essentially in a spin loop waiting to be 392 * woken up. It should not take long for it wake up and acknowledge by 393 * zeroing out ->command. 394 * 395 * ACPI specification doesn't provide any guidance on how long kernel 396 * has to wait for a wake up acknowledgement. It also doesn't provide 397 * a way to cancel a wake up request if it takes too long. 398 * 399 * In TDX environment, the VMM has control over how long it takes to 400 * wake up secondary. It can postpone scheduling secondary vCPU 401 * indefinitely. Giving up on wake up request and reporting error opens 402 * possible attack vector for VMM: it can wake up a secondary CPU when 403 * kernel doesn't expect it. Wait until positive result of the wake up 404 * request. 405 */ 406 while (READ_ONCE(acpi_mp_wake_mailbox->command)) 407 cpu_relax(); 408 409 return 0; 410 } 411 #endif /* CONFIG_X86_64 */ 412 #endif /* CONFIG_X86_LOCAL_APIC */ 413 414 #ifdef CONFIG_X86_IO_APIC 415 #define MP_ISA_BUS 0 416 417 static int __init mp_register_ioapic_irq(u8 bus_irq, u8 polarity, 418 u8 trigger, u32 gsi); 419 420 static void __init mp_override_legacy_irq(u8 bus_irq, u8 polarity, u8 trigger, 421 u32 gsi) 422 { 423 /* 424 * Check bus_irq boundary. 425 */ 426 if (bus_irq >= NR_IRQS_LEGACY) { 427 pr_warn("Invalid bus_irq %u for legacy override\n", bus_irq); 428 return; 429 } 430 431 /* 432 * TBD: This check is for faulty timer entries, where the override 433 * erroneously sets the trigger to level, resulting in a HUGE 434 * increase of timer interrupts! 435 */ 436 if ((bus_irq == 0) && (trigger == 3)) 437 trigger = 1; 438 439 if (mp_register_ioapic_irq(bus_irq, polarity, trigger, gsi) < 0) 440 return; 441 /* 442 * Reset default identity mapping if gsi is also an legacy IRQ, 443 * otherwise there will be more than one entry with the same GSI 444 * and acpi_isa_irq_to_gsi() may give wrong result. 445 */ 446 if (gsi < nr_legacy_irqs() && isa_irq_to_gsi[gsi] == gsi) 447 isa_irq_to_gsi[gsi] = INVALID_ACPI_IRQ; 448 isa_irq_to_gsi[bus_irq] = gsi; 449 } 450 451 static void mp_config_acpi_gsi(struct device *dev, u32 gsi, int trigger, 452 int polarity) 453 { 454 #ifdef CONFIG_X86_MPPARSE 455 struct mpc_intsrc mp_irq; 456 struct pci_dev *pdev; 457 unsigned char number; 458 unsigned int devfn; 459 int ioapic; 460 u8 pin; 461 462 if (!acpi_ioapic) 463 return; 464 if (!dev || !dev_is_pci(dev)) 465 return; 466 467 pdev = to_pci_dev(dev); 468 number = pdev->bus->number; 469 devfn = pdev->devfn; 470 pin = pdev->pin; 471 /* print the entry should happen on mptable identically */ 472 mp_irq.type = MP_INTSRC; 473 mp_irq.irqtype = mp_INT; 474 mp_irq.irqflag = (trigger == ACPI_EDGE_SENSITIVE ? 4 : 0x0c) | 475 (polarity == ACPI_ACTIVE_HIGH ? 1 : 3); 476 mp_irq.srcbus = number; 477 mp_irq.srcbusirq = (((devfn >> 3) & 0x1f) << 2) | ((pin - 1) & 3); 478 ioapic = mp_find_ioapic(gsi); 479 mp_irq.dstapic = mpc_ioapic_id(ioapic); 480 mp_irq.dstirq = mp_find_ioapic_pin(ioapic, gsi); 481 482 mp_save_irq(&mp_irq); 483 #endif 484 } 485 486 static int __init mp_register_ioapic_irq(u8 bus_irq, u8 polarity, 487 u8 trigger, u32 gsi) 488 { 489 struct mpc_intsrc mp_irq; 490 int ioapic, pin; 491 492 /* Convert 'gsi' to 'ioapic.pin'(INTIN#) */ 493 ioapic = mp_find_ioapic(gsi); 494 if (ioapic < 0) { 495 pr_warn("Failed to find ioapic for gsi : %u\n", gsi); 496 return ioapic; 497 } 498 499 pin = mp_find_ioapic_pin(ioapic, gsi); 500 501 mp_irq.type = MP_INTSRC; 502 mp_irq.irqtype = mp_INT; 503 mp_irq.irqflag = (trigger << 2) | polarity; 504 mp_irq.srcbus = MP_ISA_BUS; 505 mp_irq.srcbusirq = bus_irq; 506 mp_irq.dstapic = mpc_ioapic_id(ioapic); 507 mp_irq.dstirq = pin; 508 509 mp_save_irq(&mp_irq); 510 511 return 0; 512 } 513 514 static int __init 515 acpi_parse_ioapic(union acpi_subtable_headers * header, const unsigned long end) 516 { 517 struct acpi_madt_io_apic *ioapic = NULL; 518 struct ioapic_domain_cfg cfg = { 519 .type = IOAPIC_DOMAIN_DYNAMIC, 520 .ops = &mp_ioapic_irqdomain_ops, 521 }; 522 523 ioapic = (struct acpi_madt_io_apic *)header; 524 525 if (BAD_MADT_ENTRY(ioapic, end)) 526 return -EINVAL; 527 528 acpi_table_print_madt_entry(&header->common); 529 530 /* Statically assign IRQ numbers for IOAPICs hosting legacy IRQs */ 531 if (ioapic->global_irq_base < nr_legacy_irqs()) 532 cfg.type = IOAPIC_DOMAIN_LEGACY; 533 534 mp_register_ioapic(ioapic->id, ioapic->address, ioapic->global_irq_base, 535 &cfg); 536 537 return 0; 538 } 539 540 /* 541 * Parse Interrupt Source Override for the ACPI SCI 542 */ 543 static void __init acpi_sci_ioapic_setup(u8 bus_irq, u16 polarity, u16 trigger, u32 gsi) 544 { 545 if (trigger == 0) /* compatible SCI trigger is level */ 546 trigger = 3; 547 548 if (polarity == 0) /* compatible SCI polarity is low */ 549 polarity = 3; 550 551 /* Command-line over-ride via acpi_sci= */ 552 if (acpi_sci_flags & ACPI_MADT_TRIGGER_MASK) 553 trigger = (acpi_sci_flags & ACPI_MADT_TRIGGER_MASK) >> 2; 554 555 if (acpi_sci_flags & ACPI_MADT_POLARITY_MASK) 556 polarity = acpi_sci_flags & ACPI_MADT_POLARITY_MASK; 557 558 if (bus_irq < NR_IRQS_LEGACY) 559 mp_override_legacy_irq(bus_irq, polarity, trigger, gsi); 560 else 561 mp_register_ioapic_irq(bus_irq, polarity, trigger, gsi); 562 563 acpi_penalize_sci_irq(bus_irq, trigger, polarity); 564 565 /* 566 * stash over-ride to indicate we've been here 567 * and for later update of acpi_gbl_FADT 568 */ 569 acpi_sci_override_gsi = gsi; 570 return; 571 } 572 573 static int __init 574 acpi_parse_int_src_ovr(union acpi_subtable_headers * header, 575 const unsigned long end) 576 { 577 struct acpi_madt_interrupt_override *intsrc = NULL; 578 579 intsrc = (struct acpi_madt_interrupt_override *)header; 580 581 if (BAD_MADT_ENTRY(intsrc, end)) 582 return -EINVAL; 583 584 acpi_table_print_madt_entry(&header->common); 585 586 if (intsrc->source_irq == acpi_gbl_FADT.sci_interrupt) { 587 acpi_sci_ioapic_setup(intsrc->source_irq, 588 intsrc->inti_flags & ACPI_MADT_POLARITY_MASK, 589 (intsrc->inti_flags & ACPI_MADT_TRIGGER_MASK) >> 2, 590 intsrc->global_irq); 591 return 0; 592 } 593 594 if (intsrc->source_irq == 0) { 595 if (acpi_skip_timer_override) { 596 pr_warn("BIOS IRQ0 override ignored.\n"); 597 return 0; 598 } 599 600 if ((intsrc->global_irq == 2) && acpi_fix_pin2_polarity 601 && (intsrc->inti_flags & ACPI_MADT_POLARITY_MASK)) { 602 intsrc->inti_flags &= ~ACPI_MADT_POLARITY_MASK; 603 pr_warn("BIOS IRQ0 pin2 override: forcing polarity to high active.\n"); 604 } 605 } 606 607 mp_override_legacy_irq(intsrc->source_irq, 608 intsrc->inti_flags & ACPI_MADT_POLARITY_MASK, 609 (intsrc->inti_flags & ACPI_MADT_TRIGGER_MASK) >> 2, 610 intsrc->global_irq); 611 612 return 0; 613 } 614 615 static int __init 616 acpi_parse_nmi_src(union acpi_subtable_headers * header, const unsigned long end) 617 { 618 struct acpi_madt_nmi_source *nmi_src = NULL; 619 620 nmi_src = (struct acpi_madt_nmi_source *)header; 621 622 if (BAD_MADT_ENTRY(nmi_src, end)) 623 return -EINVAL; 624 625 acpi_table_print_madt_entry(&header->common); 626 627 /* TBD: Support nimsrc entries? */ 628 629 return 0; 630 } 631 632 #endif /* CONFIG_X86_IO_APIC */ 633 634 /* 635 * acpi_pic_sci_set_trigger() 636 * 637 * use ELCR to set PIC-mode trigger type for SCI 638 * 639 * If a PIC-mode SCI is not recognized or gives spurious IRQ7's 640 * it may require Edge Trigger -- use "acpi_sci=edge" 641 * 642 * Port 0x4d0-4d1 are ELCR1 and ELCR2, the Edge/Level Control Registers 643 * for the 8259 PIC. bit[n] = 1 means irq[n] is Level, otherwise Edge. 644 * ELCR1 is IRQs 0-7 (IRQ 0, 1, 2 must be 0) 645 * ELCR2 is IRQs 8-15 (IRQ 8, 13 must be 0) 646 */ 647 648 void __init acpi_pic_sci_set_trigger(unsigned int irq, u16 trigger) 649 { 650 unsigned int mask = 1 << irq; 651 unsigned int old, new; 652 653 /* Real old ELCR mask */ 654 old = inb(PIC_ELCR1) | (inb(PIC_ELCR2) << 8); 655 656 /* 657 * If we use ACPI to set PCI IRQs, then we should clear ELCR 658 * since we will set it correctly as we enable the PCI irq 659 * routing. 660 */ 661 new = acpi_noirq ? old : 0; 662 663 /* 664 * Update SCI information in the ELCR, it isn't in the PCI 665 * routing tables.. 666 */ 667 switch (trigger) { 668 case 1: /* Edge - clear */ 669 new &= ~mask; 670 break; 671 case 3: /* Level - set */ 672 new |= mask; 673 break; 674 } 675 676 if (old == new) 677 return; 678 679 pr_warn("setting ELCR to %04x (from %04x)\n", new, old); 680 outb(new, PIC_ELCR1); 681 outb(new >> 8, PIC_ELCR2); 682 } 683 684 int acpi_gsi_to_irq(u32 gsi, unsigned int *irqp) 685 { 686 int rc, irq, trigger, polarity; 687 688 if (acpi_irq_model == ACPI_IRQ_MODEL_PIC) { 689 *irqp = gsi; 690 return 0; 691 } 692 693 rc = acpi_get_override_irq(gsi, &trigger, &polarity); 694 if (rc) 695 return rc; 696 697 trigger = trigger ? ACPI_LEVEL_SENSITIVE : ACPI_EDGE_SENSITIVE; 698 polarity = polarity ? ACPI_ACTIVE_LOW : ACPI_ACTIVE_HIGH; 699 irq = acpi_register_gsi(NULL, gsi, trigger, polarity); 700 if (irq < 0) 701 return irq; 702 703 *irqp = irq; 704 return 0; 705 } 706 EXPORT_SYMBOL_GPL(acpi_gsi_to_irq); 707 708 int acpi_isa_irq_to_gsi(unsigned isa_irq, u32 *gsi) 709 { 710 if (isa_irq < nr_legacy_irqs() && 711 isa_irq_to_gsi[isa_irq] != INVALID_ACPI_IRQ) { 712 *gsi = isa_irq_to_gsi[isa_irq]; 713 return 0; 714 } 715 716 return -1; 717 } 718 719 static int acpi_register_gsi_pic(struct device *dev, u32 gsi, 720 int trigger, int polarity) 721 { 722 #ifdef CONFIG_PCI 723 /* 724 * Make sure all (legacy) PCI IRQs are set as level-triggered. 725 */ 726 if (trigger == ACPI_LEVEL_SENSITIVE) 727 elcr_set_level_irq(gsi); 728 #endif 729 730 return gsi; 731 } 732 733 #ifdef CONFIG_X86_LOCAL_APIC 734 static int acpi_register_gsi_ioapic(struct device *dev, u32 gsi, 735 int trigger, int polarity) 736 { 737 int irq = gsi; 738 #ifdef CONFIG_X86_IO_APIC 739 int node; 740 struct irq_alloc_info info; 741 742 node = dev ? dev_to_node(dev) : NUMA_NO_NODE; 743 trigger = trigger == ACPI_EDGE_SENSITIVE ? 0 : 1; 744 polarity = polarity == ACPI_ACTIVE_HIGH ? 0 : 1; 745 ioapic_set_alloc_attr(&info, node, trigger, polarity); 746 747 mutex_lock(&acpi_ioapic_lock); 748 irq = mp_map_gsi_to_irq(gsi, IOAPIC_MAP_ALLOC, &info); 749 /* Don't set up the ACPI SCI because it's already set up */ 750 if (irq >= 0 && enable_update_mptable && gsi != acpi_gbl_FADT.sci_interrupt) 751 mp_config_acpi_gsi(dev, gsi, trigger, polarity); 752 mutex_unlock(&acpi_ioapic_lock); 753 #endif 754 755 return irq; 756 } 757 758 static void acpi_unregister_gsi_ioapic(u32 gsi) 759 { 760 #ifdef CONFIG_X86_IO_APIC 761 int irq; 762 763 mutex_lock(&acpi_ioapic_lock); 764 irq = mp_map_gsi_to_irq(gsi, 0, NULL); 765 if (irq > 0) 766 mp_unmap_irq(irq); 767 mutex_unlock(&acpi_ioapic_lock); 768 #endif 769 } 770 #endif 771 772 int (*__acpi_register_gsi)(struct device *dev, u32 gsi, 773 int trigger, int polarity) = acpi_register_gsi_pic; 774 void (*__acpi_unregister_gsi)(u32 gsi) = NULL; 775 776 #ifdef CONFIG_ACPI_SLEEP 777 int (*acpi_suspend_lowlevel)(void) = x86_acpi_suspend_lowlevel; 778 #else 779 int (*acpi_suspend_lowlevel)(void); 780 #endif 781 782 /* 783 * success: return IRQ number (>=0) 784 * failure: return < 0 785 */ 786 int acpi_register_gsi(struct device *dev, u32 gsi, int trigger, int polarity) 787 { 788 return __acpi_register_gsi(dev, gsi, trigger, polarity); 789 } 790 EXPORT_SYMBOL_GPL(acpi_register_gsi); 791 792 void acpi_unregister_gsi(u32 gsi) 793 { 794 if (__acpi_unregister_gsi) 795 __acpi_unregister_gsi(gsi); 796 } 797 EXPORT_SYMBOL_GPL(acpi_unregister_gsi); 798 799 #ifdef CONFIG_X86_LOCAL_APIC 800 static void __init acpi_set_irq_model_ioapic(void) 801 { 802 acpi_irq_model = ACPI_IRQ_MODEL_IOAPIC; 803 __acpi_register_gsi = acpi_register_gsi_ioapic; 804 __acpi_unregister_gsi = acpi_unregister_gsi_ioapic; 805 acpi_ioapic = 1; 806 } 807 #endif 808 809 /* 810 * ACPI based hotplug support for CPU 811 */ 812 #ifdef CONFIG_ACPI_HOTPLUG_CPU 813 #include <acpi/processor.h> 814 815 static int acpi_map_cpu2node(acpi_handle handle, int cpu, int physid) 816 { 817 #ifdef CONFIG_ACPI_NUMA 818 int nid; 819 820 nid = acpi_get_node(handle); 821 if (nid != NUMA_NO_NODE) { 822 set_apicid_to_node(physid, nid); 823 numa_set_node(cpu, nid); 824 } 825 #endif 826 return 0; 827 } 828 829 int acpi_map_cpu(acpi_handle handle, phys_cpuid_t physid, u32 acpi_id, 830 int *pcpu) 831 { 832 int cpu; 833 834 cpu = acpi_register_lapic(physid, acpi_id, ACPI_MADT_ENABLED); 835 if (cpu < 0) { 836 pr_info("Unable to map lapic to logical cpu number\n"); 837 return cpu; 838 } 839 840 acpi_processor_set_pdc(handle); 841 acpi_map_cpu2node(handle, cpu, physid); 842 843 *pcpu = cpu; 844 return 0; 845 } 846 EXPORT_SYMBOL(acpi_map_cpu); 847 848 int acpi_unmap_cpu(int cpu) 849 { 850 #ifdef CONFIG_ACPI_NUMA 851 set_apicid_to_node(per_cpu(x86_cpu_to_apicid, cpu), NUMA_NO_NODE); 852 #endif 853 854 per_cpu(x86_cpu_to_apicid, cpu) = -1; 855 set_cpu_present(cpu, false); 856 num_processors--; 857 858 return (0); 859 } 860 EXPORT_SYMBOL(acpi_unmap_cpu); 861 #endif /* CONFIG_ACPI_HOTPLUG_CPU */ 862 863 int acpi_register_ioapic(acpi_handle handle, u64 phys_addr, u32 gsi_base) 864 { 865 int ret = -ENOSYS; 866 #ifdef CONFIG_ACPI_HOTPLUG_IOAPIC 867 int ioapic_id; 868 u64 addr; 869 struct ioapic_domain_cfg cfg = { 870 .type = IOAPIC_DOMAIN_DYNAMIC, 871 .ops = &mp_ioapic_irqdomain_ops, 872 }; 873 874 ioapic_id = acpi_get_ioapic_id(handle, gsi_base, &addr); 875 if (ioapic_id < 0) { 876 unsigned long long uid; 877 acpi_status status; 878 879 status = acpi_evaluate_integer(handle, METHOD_NAME__UID, 880 NULL, &uid); 881 if (ACPI_FAILURE(status)) { 882 acpi_handle_warn(handle, "failed to get IOAPIC ID.\n"); 883 return -EINVAL; 884 } 885 ioapic_id = (int)uid; 886 } 887 888 mutex_lock(&acpi_ioapic_lock); 889 ret = mp_register_ioapic(ioapic_id, phys_addr, gsi_base, &cfg); 890 mutex_unlock(&acpi_ioapic_lock); 891 #endif 892 893 return ret; 894 } 895 EXPORT_SYMBOL(acpi_register_ioapic); 896 897 int acpi_unregister_ioapic(acpi_handle handle, u32 gsi_base) 898 { 899 int ret = -ENOSYS; 900 901 #ifdef CONFIG_ACPI_HOTPLUG_IOAPIC 902 mutex_lock(&acpi_ioapic_lock); 903 ret = mp_unregister_ioapic(gsi_base); 904 mutex_unlock(&acpi_ioapic_lock); 905 #endif 906 907 return ret; 908 } 909 EXPORT_SYMBOL(acpi_unregister_ioapic); 910 911 /** 912 * acpi_ioapic_registered - Check whether IOAPIC associated with @gsi_base 913 * has been registered 914 * @handle: ACPI handle of the IOAPIC device 915 * @gsi_base: GSI base associated with the IOAPIC 916 * 917 * Assume caller holds some type of lock to serialize acpi_ioapic_registered() 918 * with acpi_register_ioapic()/acpi_unregister_ioapic(). 919 */ 920 int acpi_ioapic_registered(acpi_handle handle, u32 gsi_base) 921 { 922 int ret = 0; 923 924 #ifdef CONFIG_ACPI_HOTPLUG_IOAPIC 925 mutex_lock(&acpi_ioapic_lock); 926 ret = mp_ioapic_registered(gsi_base); 927 mutex_unlock(&acpi_ioapic_lock); 928 #endif 929 930 return ret; 931 } 932 933 static int __init acpi_parse_sbf(struct acpi_table_header *table) 934 { 935 struct acpi_table_boot *sb = (struct acpi_table_boot *)table; 936 937 sbf_port = sb->cmos_index; /* Save CMOS port */ 938 939 return 0; 940 } 941 942 #ifdef CONFIG_HPET_TIMER 943 #include <asm/hpet.h> 944 945 static struct resource *hpet_res __initdata; 946 947 static int __init acpi_parse_hpet(struct acpi_table_header *table) 948 { 949 struct acpi_table_hpet *hpet_tbl = (struct acpi_table_hpet *)table; 950 951 if (hpet_tbl->address.space_id != ACPI_SPACE_MEM) { 952 pr_warn("HPET timers must be located in memory.\n"); 953 return -1; 954 } 955 956 hpet_address = hpet_tbl->address.address; 957 hpet_blockid = hpet_tbl->sequence; 958 959 /* 960 * Some broken BIOSes advertise HPET at 0x0. We really do not 961 * want to allocate a resource there. 962 */ 963 if (!hpet_address) { 964 pr_warn("HPET id: %#x base: %#lx is invalid\n", hpet_tbl->id, hpet_address); 965 return 0; 966 } 967 #ifdef CONFIG_X86_64 968 /* 969 * Some even more broken BIOSes advertise HPET at 970 * 0xfed0000000000000 instead of 0xfed00000. Fix it up and add 971 * some noise: 972 */ 973 if (hpet_address == 0xfed0000000000000UL) { 974 if (!hpet_force_user) { 975 pr_warn("HPET id: %#x base: 0xfed0000000000000 is bogus, try hpet=force on the kernel command line to fix it up to 0xfed00000.\n", 976 hpet_tbl->id); 977 hpet_address = 0; 978 return 0; 979 } 980 pr_warn("HPET id: %#x base: 0xfed0000000000000 fixed up to 0xfed00000.\n", 981 hpet_tbl->id); 982 hpet_address >>= 32; 983 } 984 #endif 985 pr_info("HPET id: %#x base: %#lx\n", hpet_tbl->id, hpet_address); 986 987 /* 988 * Allocate and initialize the HPET firmware resource for adding into 989 * the resource tree during the lateinit timeframe. 990 */ 991 #define HPET_RESOURCE_NAME_SIZE 9 992 hpet_res = memblock_alloc(sizeof(*hpet_res) + HPET_RESOURCE_NAME_SIZE, 993 SMP_CACHE_BYTES); 994 if (!hpet_res) 995 panic("%s: Failed to allocate %zu bytes\n", __func__, 996 sizeof(*hpet_res) + HPET_RESOURCE_NAME_SIZE); 997 998 hpet_res->name = (void *)&hpet_res[1]; 999 hpet_res->flags = IORESOURCE_MEM; 1000 snprintf((char *)hpet_res->name, HPET_RESOURCE_NAME_SIZE, "HPET %u", 1001 hpet_tbl->sequence); 1002 1003 hpet_res->start = hpet_address; 1004 hpet_res->end = hpet_address + (1 * 1024) - 1; 1005 1006 return 0; 1007 } 1008 1009 /* 1010 * hpet_insert_resource inserts the HPET resources used into the resource 1011 * tree. 1012 */ 1013 static __init int hpet_insert_resource(void) 1014 { 1015 if (!hpet_res) 1016 return 1; 1017 1018 return insert_resource(&iomem_resource, hpet_res); 1019 } 1020 1021 late_initcall(hpet_insert_resource); 1022 1023 #else 1024 #define acpi_parse_hpet NULL 1025 #endif 1026 1027 static int __init acpi_parse_fadt(struct acpi_table_header *table) 1028 { 1029 if (!(acpi_gbl_FADT.boot_flags & ACPI_FADT_LEGACY_DEVICES)) { 1030 pr_debug("no legacy devices present\n"); 1031 x86_platform.legacy.devices.pnpbios = 0; 1032 } 1033 1034 if (acpi_gbl_FADT.header.revision >= FADT2_REVISION_ID && 1035 !(acpi_gbl_FADT.boot_flags & ACPI_FADT_8042) && 1036 x86_platform.legacy.i8042 != X86_LEGACY_I8042_PLATFORM_ABSENT) { 1037 pr_debug("i8042 controller is absent\n"); 1038 x86_platform.legacy.i8042 = X86_LEGACY_I8042_FIRMWARE_ABSENT; 1039 } 1040 1041 if (acpi_gbl_FADT.boot_flags & ACPI_FADT_NO_CMOS_RTC) { 1042 pr_debug("not registering RTC platform device\n"); 1043 x86_platform.legacy.rtc = 0; 1044 } 1045 1046 if (acpi_gbl_FADT.boot_flags & ACPI_FADT_NO_VGA) { 1047 pr_debug("probing for VGA not safe\n"); 1048 x86_platform.legacy.no_vga = 1; 1049 } 1050 1051 #ifdef CONFIG_X86_PM_TIMER 1052 /* detect the location of the ACPI PM Timer */ 1053 if (acpi_gbl_FADT.header.revision >= FADT2_REVISION_ID) { 1054 /* FADT rev. 2 */ 1055 if (acpi_gbl_FADT.xpm_timer_block.space_id != 1056 ACPI_ADR_SPACE_SYSTEM_IO) 1057 return 0; 1058 1059 pmtmr_ioport = acpi_gbl_FADT.xpm_timer_block.address; 1060 /* 1061 * "X" fields are optional extensions to the original V1.0 1062 * fields, so we must selectively expand V1.0 fields if the 1063 * corresponding X field is zero. 1064 */ 1065 if (!pmtmr_ioport) 1066 pmtmr_ioport = acpi_gbl_FADT.pm_timer_block; 1067 } else { 1068 /* FADT rev. 1 */ 1069 pmtmr_ioport = acpi_gbl_FADT.pm_timer_block; 1070 } 1071 if (pmtmr_ioport) 1072 pr_info("PM-Timer IO Port: %#x\n", pmtmr_ioport); 1073 #endif 1074 return 0; 1075 } 1076 1077 #ifdef CONFIG_X86_LOCAL_APIC 1078 /* 1079 * Parse LAPIC entries in MADT 1080 * returns 0 on success, < 0 on error 1081 */ 1082 1083 static int __init early_acpi_parse_madt_lapic_addr_ovr(void) 1084 { 1085 int count; 1086 1087 if (!boot_cpu_has(X86_FEATURE_APIC)) 1088 return -ENODEV; 1089 1090 /* 1091 * Note that the LAPIC address is obtained from the MADT (32-bit value) 1092 * and (optionally) overridden by a LAPIC_ADDR_OVR entry (64-bit value). 1093 */ 1094 1095 count = acpi_table_parse_madt(ACPI_MADT_TYPE_LOCAL_APIC_OVERRIDE, 1096 acpi_parse_lapic_addr_ovr, 0); 1097 if (count < 0) { 1098 pr_err("Error parsing LAPIC address override entry\n"); 1099 return count; 1100 } 1101 1102 register_lapic_address(acpi_lapic_addr); 1103 1104 return count; 1105 } 1106 1107 static int __init acpi_parse_madt_lapic_entries(void) 1108 { 1109 int count; 1110 int x2count = 0; 1111 int ret; 1112 struct acpi_subtable_proc madt_proc[2]; 1113 1114 if (!boot_cpu_has(X86_FEATURE_APIC)) 1115 return -ENODEV; 1116 1117 count = acpi_table_parse_madt(ACPI_MADT_TYPE_LOCAL_SAPIC, 1118 acpi_parse_sapic, MAX_LOCAL_APIC); 1119 1120 if (!count) { 1121 memset(madt_proc, 0, sizeof(madt_proc)); 1122 madt_proc[0].id = ACPI_MADT_TYPE_LOCAL_APIC; 1123 madt_proc[0].handler = acpi_parse_lapic; 1124 madt_proc[1].id = ACPI_MADT_TYPE_LOCAL_X2APIC; 1125 madt_proc[1].handler = acpi_parse_x2apic; 1126 ret = acpi_table_parse_entries_array(ACPI_SIG_MADT, 1127 sizeof(struct acpi_table_madt), 1128 madt_proc, ARRAY_SIZE(madt_proc), MAX_LOCAL_APIC); 1129 if (ret < 0) { 1130 pr_err("Error parsing LAPIC/X2APIC entries\n"); 1131 return ret; 1132 } 1133 1134 count = madt_proc[0].count; 1135 x2count = madt_proc[1].count; 1136 } 1137 if (!count && !x2count) { 1138 pr_err("No LAPIC entries present\n"); 1139 /* TBD: Cleanup to allow fallback to MPS */ 1140 return -ENODEV; 1141 } else if (count < 0 || x2count < 0) { 1142 pr_err("Error parsing LAPIC entry\n"); 1143 /* TBD: Cleanup to allow fallback to MPS */ 1144 return count; 1145 } 1146 1147 x2count = acpi_table_parse_madt(ACPI_MADT_TYPE_LOCAL_X2APIC_NMI, 1148 acpi_parse_x2apic_nmi, 0); 1149 count = acpi_table_parse_madt(ACPI_MADT_TYPE_LOCAL_APIC_NMI, 1150 acpi_parse_lapic_nmi, 0); 1151 if (count < 0 || x2count < 0) { 1152 pr_err("Error parsing LAPIC NMI entry\n"); 1153 /* TBD: Cleanup to allow fallback to MPS */ 1154 return count; 1155 } 1156 return 0; 1157 } 1158 1159 #ifdef CONFIG_X86_64 1160 static int __init acpi_parse_mp_wake(union acpi_subtable_headers *header, 1161 const unsigned long end) 1162 { 1163 struct acpi_madt_multiproc_wakeup *mp_wake; 1164 1165 if (!IS_ENABLED(CONFIG_SMP)) 1166 return -ENODEV; 1167 1168 mp_wake = (struct acpi_madt_multiproc_wakeup *)header; 1169 if (BAD_MADT_ENTRY(mp_wake, end)) 1170 return -EINVAL; 1171 1172 acpi_table_print_madt_entry(&header->common); 1173 1174 acpi_mp_wake_mailbox_paddr = mp_wake->base_address; 1175 1176 acpi_wake_cpu_handler_update(acpi_wakeup_cpu); 1177 1178 return 0; 1179 } 1180 #endif /* CONFIG_X86_64 */ 1181 #endif /* CONFIG_X86_LOCAL_APIC */ 1182 1183 #ifdef CONFIG_X86_IO_APIC 1184 static void __init mp_config_acpi_legacy_irqs(void) 1185 { 1186 int i; 1187 struct mpc_intsrc mp_irq; 1188 1189 #ifdef CONFIG_EISA 1190 /* 1191 * Fabricate the legacy ISA bus (bus #31). 1192 */ 1193 mp_bus_id_to_type[MP_ISA_BUS] = MP_BUS_ISA; 1194 #endif 1195 set_bit(MP_ISA_BUS, mp_bus_not_pci); 1196 pr_debug("Bus #%d is ISA (nIRQs: %d)\n", MP_ISA_BUS, nr_legacy_irqs()); 1197 1198 /* 1199 * Use the default configuration for the IRQs 0-15. Unless 1200 * overridden by (MADT) interrupt source override entries. 1201 */ 1202 for (i = 0; i < nr_legacy_irqs(); i++) { 1203 int ioapic, pin; 1204 unsigned int dstapic; 1205 int idx; 1206 u32 gsi; 1207 1208 /* Locate the gsi that irq i maps to. */ 1209 if (acpi_isa_irq_to_gsi(i, &gsi)) 1210 continue; 1211 1212 /* 1213 * Locate the IOAPIC that manages the ISA IRQ. 1214 */ 1215 ioapic = mp_find_ioapic(gsi); 1216 if (ioapic < 0) 1217 continue; 1218 pin = mp_find_ioapic_pin(ioapic, gsi); 1219 dstapic = mpc_ioapic_id(ioapic); 1220 1221 for (idx = 0; idx < mp_irq_entries; idx++) { 1222 struct mpc_intsrc *irq = mp_irqs + idx; 1223 1224 /* Do we already have a mapping for this ISA IRQ? */ 1225 if (irq->srcbus == MP_ISA_BUS && irq->srcbusirq == i) 1226 break; 1227 1228 /* Do we already have a mapping for this IOAPIC pin */ 1229 if (irq->dstapic == dstapic && irq->dstirq == pin) 1230 break; 1231 } 1232 1233 if (idx != mp_irq_entries) { 1234 pr_debug("ACPI: IRQ%d used by override.\n", i); 1235 continue; /* IRQ already used */ 1236 } 1237 1238 mp_irq.type = MP_INTSRC; 1239 mp_irq.irqflag = 0; /* Conforming */ 1240 mp_irq.srcbus = MP_ISA_BUS; 1241 mp_irq.dstapic = dstapic; 1242 mp_irq.irqtype = mp_INT; 1243 mp_irq.srcbusirq = i; /* Identity mapped */ 1244 mp_irq.dstirq = pin; 1245 1246 mp_save_irq(&mp_irq); 1247 } 1248 } 1249 1250 /* 1251 * Parse IOAPIC related entries in MADT 1252 * returns 0 on success, < 0 on error 1253 */ 1254 static int __init acpi_parse_madt_ioapic_entries(void) 1255 { 1256 int count; 1257 1258 /* 1259 * ACPI interpreter is required to complete interrupt setup, 1260 * so if it is off, don't enumerate the io-apics with ACPI. 1261 * If MPS is present, it will handle them, 1262 * otherwise the system will stay in PIC mode 1263 */ 1264 if (acpi_disabled || acpi_noirq) 1265 return -ENODEV; 1266 1267 if (!boot_cpu_has(X86_FEATURE_APIC)) 1268 return -ENODEV; 1269 1270 /* 1271 * if "noapic" boot option, don't look for IO-APICs 1272 */ 1273 if (skip_ioapic_setup) { 1274 pr_info("Skipping IOAPIC probe due to 'noapic' option.\n"); 1275 return -ENODEV; 1276 } 1277 1278 count = acpi_table_parse_madt(ACPI_MADT_TYPE_IO_APIC, acpi_parse_ioapic, 1279 MAX_IO_APICS); 1280 if (!count) { 1281 pr_err("No IOAPIC entries present\n"); 1282 return -ENODEV; 1283 } else if (count < 0) { 1284 pr_err("Error parsing IOAPIC entry\n"); 1285 return count; 1286 } 1287 1288 count = acpi_table_parse_madt(ACPI_MADT_TYPE_INTERRUPT_OVERRIDE, 1289 acpi_parse_int_src_ovr, nr_irqs); 1290 if (count < 0) { 1291 pr_err("Error parsing interrupt source overrides entry\n"); 1292 /* TBD: Cleanup to allow fallback to MPS */ 1293 return count; 1294 } 1295 1296 /* 1297 * If BIOS did not supply an INT_SRC_OVR for the SCI 1298 * pretend we got one so we can set the SCI flags. 1299 * But ignore setting up SCI on hardware reduced platforms. 1300 */ 1301 if (acpi_sci_override_gsi == INVALID_ACPI_IRQ && !acpi_gbl_reduced_hardware) 1302 acpi_sci_ioapic_setup(acpi_gbl_FADT.sci_interrupt, 0, 0, 1303 acpi_gbl_FADT.sci_interrupt); 1304 1305 /* Fill in identity legacy mappings where no override */ 1306 mp_config_acpi_legacy_irqs(); 1307 1308 count = acpi_table_parse_madt(ACPI_MADT_TYPE_NMI_SOURCE, 1309 acpi_parse_nmi_src, nr_irqs); 1310 if (count < 0) { 1311 pr_err("Error parsing NMI SRC entry\n"); 1312 /* TBD: Cleanup to allow fallback to MPS */ 1313 return count; 1314 } 1315 1316 return 0; 1317 } 1318 #else 1319 static inline int acpi_parse_madt_ioapic_entries(void) 1320 { 1321 return -1; 1322 } 1323 #endif /* !CONFIG_X86_IO_APIC */ 1324 1325 static void __init early_acpi_process_madt(void) 1326 { 1327 #ifdef CONFIG_X86_LOCAL_APIC 1328 int error; 1329 1330 if (!acpi_table_parse(ACPI_SIG_MADT, acpi_parse_madt)) { 1331 1332 /* 1333 * Parse MADT LAPIC entries 1334 */ 1335 error = early_acpi_parse_madt_lapic_addr_ovr(); 1336 if (!error) { 1337 acpi_lapic = 1; 1338 smp_found_config = 1; 1339 } 1340 if (error == -EINVAL) { 1341 /* 1342 * Dell Precision Workstation 410, 610 come here. 1343 */ 1344 pr_err("Invalid BIOS MADT, disabling ACPI\n"); 1345 disable_acpi(); 1346 } 1347 } 1348 #endif 1349 } 1350 1351 static void __init acpi_process_madt(void) 1352 { 1353 #ifdef CONFIG_X86_LOCAL_APIC 1354 int error; 1355 1356 if (!acpi_table_parse(ACPI_SIG_MADT, acpi_parse_madt)) { 1357 1358 /* 1359 * Parse MADT LAPIC entries 1360 */ 1361 error = acpi_parse_madt_lapic_entries(); 1362 if (!error) { 1363 acpi_lapic = 1; 1364 1365 /* 1366 * Parse MADT IO-APIC entries 1367 */ 1368 mutex_lock(&acpi_ioapic_lock); 1369 error = acpi_parse_madt_ioapic_entries(); 1370 mutex_unlock(&acpi_ioapic_lock); 1371 if (!error) { 1372 acpi_set_irq_model_ioapic(); 1373 1374 smp_found_config = 1; 1375 } 1376 1377 #ifdef CONFIG_X86_64 1378 /* 1379 * Parse MADT MP Wake entry. 1380 */ 1381 acpi_table_parse_madt(ACPI_MADT_TYPE_MULTIPROC_WAKEUP, 1382 acpi_parse_mp_wake, 1); 1383 #endif 1384 } 1385 if (error == -EINVAL) { 1386 /* 1387 * Dell Precision Workstation 410, 610 come here. 1388 */ 1389 pr_err("Invalid BIOS MADT, disabling ACPI\n"); 1390 disable_acpi(); 1391 } 1392 } else { 1393 /* 1394 * ACPI found no MADT, and so ACPI wants UP PIC mode. 1395 * In the event an MPS table was found, forget it. 1396 * Boot with "acpi=off" to use MPS on such a system. 1397 */ 1398 if (smp_found_config) { 1399 pr_warn("No APIC-table, disabling MPS\n"); 1400 smp_found_config = 0; 1401 } 1402 } 1403 1404 /* 1405 * ACPI supports both logical (e.g. Hyper-Threading) and physical 1406 * processors, where MPS only supports physical. 1407 */ 1408 if (acpi_lapic && acpi_ioapic) 1409 pr_info("Using ACPI (MADT) for SMP configuration information\n"); 1410 else if (acpi_lapic) 1411 pr_info("Using ACPI for processor (LAPIC) configuration information\n"); 1412 #endif 1413 return; 1414 } 1415 1416 static int __init disable_acpi_irq(const struct dmi_system_id *d) 1417 { 1418 if (!acpi_force) { 1419 pr_notice("%s detected: force use of acpi=noirq\n", d->ident); 1420 acpi_noirq_set(); 1421 } 1422 return 0; 1423 } 1424 1425 static int __init disable_acpi_pci(const struct dmi_system_id *d) 1426 { 1427 if (!acpi_force) { 1428 pr_notice("%s detected: force use of pci=noacpi\n", d->ident); 1429 acpi_disable_pci(); 1430 } 1431 return 0; 1432 } 1433 1434 static int __init disable_acpi_xsdt(const struct dmi_system_id *d) 1435 { 1436 if (!acpi_force) { 1437 pr_notice("%s detected: force use of acpi=rsdt\n", d->ident); 1438 acpi_gbl_do_not_use_xsdt = TRUE; 1439 } else { 1440 pr_notice("Warning: DMI blacklist says broken, but acpi XSDT forced\n"); 1441 } 1442 return 0; 1443 } 1444 1445 static int __init dmi_disable_acpi(const struct dmi_system_id *d) 1446 { 1447 if (!acpi_force) { 1448 pr_notice("%s detected: acpi off\n", d->ident); 1449 disable_acpi(); 1450 } else { 1451 pr_notice("Warning: DMI blacklist says broken, but acpi forced\n"); 1452 } 1453 return 0; 1454 } 1455 1456 /* 1457 * Force ignoring BIOS IRQ0 override 1458 */ 1459 static int __init dmi_ignore_irq0_timer_override(const struct dmi_system_id *d) 1460 { 1461 if (!acpi_skip_timer_override) { 1462 pr_notice("%s detected: Ignoring BIOS IRQ0 override\n", 1463 d->ident); 1464 acpi_skip_timer_override = 1; 1465 } 1466 return 0; 1467 } 1468 1469 /* 1470 * ACPI offers an alternative platform interface model that removes 1471 * ACPI hardware requirements for platforms that do not implement 1472 * the PC Architecture. 1473 * 1474 * We initialize the Hardware-reduced ACPI model here: 1475 */ 1476 void __init acpi_generic_reduced_hw_init(void) 1477 { 1478 /* 1479 * Override x86_init functions and bypass legacy PIC in 1480 * hardware reduced ACPI mode. 1481 */ 1482 x86_init.timers.timer_init = x86_init_noop; 1483 x86_init.irqs.pre_vector_init = x86_init_noop; 1484 legacy_pic = &null_legacy_pic; 1485 } 1486 1487 static void __init acpi_reduced_hw_init(void) 1488 { 1489 if (acpi_gbl_reduced_hardware) 1490 x86_init.acpi.reduced_hw_early_init(); 1491 } 1492 1493 /* 1494 * If your system is blacklisted here, but you find that acpi=force 1495 * works for you, please contact linux-acpi@vger.kernel.org 1496 */ 1497 static const struct dmi_system_id acpi_dmi_table[] __initconst = { 1498 /* 1499 * Boxes that need ACPI disabled 1500 */ 1501 { 1502 .callback = dmi_disable_acpi, 1503 .ident = "IBM Thinkpad", 1504 .matches = { 1505 DMI_MATCH(DMI_BOARD_VENDOR, "IBM"), 1506 DMI_MATCH(DMI_BOARD_NAME, "2629H1G"), 1507 }, 1508 }, 1509 1510 /* 1511 * Boxes that need ACPI PCI IRQ routing disabled 1512 */ 1513 { 1514 .callback = disable_acpi_irq, 1515 .ident = "ASUS A7V", 1516 .matches = { 1517 DMI_MATCH(DMI_BOARD_VENDOR, "ASUSTeK Computer INC"), 1518 DMI_MATCH(DMI_BOARD_NAME, "<A7V>"), 1519 /* newer BIOS, Revision 1011, does work */ 1520 DMI_MATCH(DMI_BIOS_VERSION, 1521 "ASUS A7V ACPI BIOS Revision 1007"), 1522 }, 1523 }, 1524 { 1525 /* 1526 * Latest BIOS for IBM 600E (1.16) has bad pcinum 1527 * for LPC bridge, which is needed for the PCI 1528 * interrupt links to work. DSDT fix is in bug 5966. 1529 * 2645, 2646 model numbers are shared with 600/600E/600X 1530 */ 1531 .callback = disable_acpi_irq, 1532 .ident = "IBM Thinkpad 600 Series 2645", 1533 .matches = { 1534 DMI_MATCH(DMI_BOARD_VENDOR, "IBM"), 1535 DMI_MATCH(DMI_BOARD_NAME, "2645"), 1536 }, 1537 }, 1538 { 1539 .callback = disable_acpi_irq, 1540 .ident = "IBM Thinkpad 600 Series 2646", 1541 .matches = { 1542 DMI_MATCH(DMI_BOARD_VENDOR, "IBM"), 1543 DMI_MATCH(DMI_BOARD_NAME, "2646"), 1544 }, 1545 }, 1546 /* 1547 * Boxes that need ACPI PCI IRQ routing and PCI scan disabled 1548 */ 1549 { /* _BBN 0 bug */ 1550 .callback = disable_acpi_pci, 1551 .ident = "ASUS PR-DLS", 1552 .matches = { 1553 DMI_MATCH(DMI_BOARD_VENDOR, "ASUSTeK Computer INC."), 1554 DMI_MATCH(DMI_BOARD_NAME, "PR-DLS"), 1555 DMI_MATCH(DMI_BIOS_VERSION, 1556 "ASUS PR-DLS ACPI BIOS Revision 1010"), 1557 DMI_MATCH(DMI_BIOS_DATE, "03/21/2003") 1558 }, 1559 }, 1560 { 1561 .callback = disable_acpi_pci, 1562 .ident = "Acer TravelMate 36x Laptop", 1563 .matches = { 1564 DMI_MATCH(DMI_SYS_VENDOR, "Acer"), 1565 DMI_MATCH(DMI_PRODUCT_NAME, "TravelMate 360"), 1566 }, 1567 }, 1568 /* 1569 * Boxes that need ACPI XSDT use disabled due to corrupted tables 1570 */ 1571 { 1572 .callback = disable_acpi_xsdt, 1573 .ident = "Advantech DAC-BJ01", 1574 .matches = { 1575 DMI_MATCH(DMI_SYS_VENDOR, "NEC"), 1576 DMI_MATCH(DMI_PRODUCT_NAME, "Bearlake CRB Board"), 1577 DMI_MATCH(DMI_BIOS_VERSION, "V1.12"), 1578 DMI_MATCH(DMI_BIOS_DATE, "02/01/2011"), 1579 }, 1580 }, 1581 {} 1582 }; 1583 1584 /* second table for DMI checks that should run after early-quirks */ 1585 static const struct dmi_system_id acpi_dmi_table_late[] __initconst = { 1586 /* 1587 * HP laptops which use a DSDT reporting as HP/SB400/10000, 1588 * which includes some code which overrides all temperature 1589 * trip points to 16C if the INTIN2 input of the I/O APIC 1590 * is enabled. This input is incorrectly designated the 1591 * ISA IRQ 0 via an interrupt source override even though 1592 * it is wired to the output of the master 8259A and INTIN0 1593 * is not connected at all. Force ignoring BIOS IRQ0 1594 * override in that cases. 1595 */ 1596 { 1597 .callback = dmi_ignore_irq0_timer_override, 1598 .ident = "HP nx6115 laptop", 1599 .matches = { 1600 DMI_MATCH(DMI_SYS_VENDOR, "Hewlett-Packard"), 1601 DMI_MATCH(DMI_PRODUCT_NAME, "HP Compaq nx6115"), 1602 }, 1603 }, 1604 { 1605 .callback = dmi_ignore_irq0_timer_override, 1606 .ident = "HP NX6125 laptop", 1607 .matches = { 1608 DMI_MATCH(DMI_SYS_VENDOR, "Hewlett-Packard"), 1609 DMI_MATCH(DMI_PRODUCT_NAME, "HP Compaq nx6125"), 1610 }, 1611 }, 1612 { 1613 .callback = dmi_ignore_irq0_timer_override, 1614 .ident = "HP NX6325 laptop", 1615 .matches = { 1616 DMI_MATCH(DMI_SYS_VENDOR, "Hewlett-Packard"), 1617 DMI_MATCH(DMI_PRODUCT_NAME, "HP Compaq nx6325"), 1618 }, 1619 }, 1620 { 1621 .callback = dmi_ignore_irq0_timer_override, 1622 .ident = "HP 6715b laptop", 1623 .matches = { 1624 DMI_MATCH(DMI_SYS_VENDOR, "Hewlett-Packard"), 1625 DMI_MATCH(DMI_PRODUCT_NAME, "HP Compaq 6715b"), 1626 }, 1627 }, 1628 { 1629 .callback = dmi_ignore_irq0_timer_override, 1630 .ident = "FUJITSU SIEMENS", 1631 .matches = { 1632 DMI_MATCH(DMI_SYS_VENDOR, "FUJITSU SIEMENS"), 1633 DMI_MATCH(DMI_PRODUCT_NAME, "AMILO PRO V2030"), 1634 }, 1635 }, 1636 {} 1637 }; 1638 1639 /* 1640 * acpi_boot_table_init() and acpi_boot_init() 1641 * called from setup_arch(), always. 1642 * 1. checksums all tables 1643 * 2. enumerates lapics 1644 * 3. enumerates io-apics 1645 * 1646 * acpi_table_init() is separate to allow reading SRAT without 1647 * other side effects. 1648 * 1649 * side effects of acpi_boot_init: 1650 * acpi_lapic = 1 if LAPIC found 1651 * acpi_ioapic = 1 if IOAPIC found 1652 * if (acpi_lapic && acpi_ioapic) smp_found_config = 1; 1653 * if acpi_blacklisted() acpi_disabled = 1; 1654 * acpi_irq_model=... 1655 * ... 1656 */ 1657 1658 void __init acpi_boot_table_init(void) 1659 { 1660 dmi_check_system(acpi_dmi_table); 1661 1662 /* 1663 * If acpi_disabled, bail out 1664 */ 1665 if (acpi_disabled) 1666 return; 1667 1668 /* 1669 * Initialize the ACPI boot-time table parser. 1670 */ 1671 if (acpi_locate_initial_tables()) 1672 disable_acpi(); 1673 else 1674 acpi_reserve_initial_tables(); 1675 } 1676 1677 int __init early_acpi_boot_init(void) 1678 { 1679 if (acpi_disabled) 1680 return 1; 1681 1682 acpi_table_init_complete(); 1683 1684 acpi_table_parse(ACPI_SIG_BOOT, acpi_parse_sbf); 1685 1686 /* 1687 * blacklist may disable ACPI entirely 1688 */ 1689 if (acpi_blacklisted()) { 1690 if (acpi_force) { 1691 pr_warn("acpi=force override\n"); 1692 } else { 1693 pr_warn("Disabling ACPI support\n"); 1694 disable_acpi(); 1695 return 1; 1696 } 1697 } 1698 1699 /* 1700 * Process the Multiple APIC Description Table (MADT), if present 1701 */ 1702 early_acpi_process_madt(); 1703 1704 /* 1705 * Hardware-reduced ACPI mode initialization: 1706 */ 1707 acpi_reduced_hw_init(); 1708 1709 return 0; 1710 } 1711 1712 int __init acpi_boot_init(void) 1713 { 1714 /* those are executed after early-quirks are executed */ 1715 dmi_check_system(acpi_dmi_table_late); 1716 1717 /* 1718 * If acpi_disabled, bail out 1719 */ 1720 if (acpi_disabled) 1721 return 1; 1722 1723 acpi_table_parse(ACPI_SIG_BOOT, acpi_parse_sbf); 1724 1725 /* 1726 * set sci_int and PM timer address 1727 */ 1728 acpi_table_parse(ACPI_SIG_FADT, acpi_parse_fadt); 1729 1730 /* 1731 * Process the Multiple APIC Description Table (MADT), if present 1732 */ 1733 acpi_process_madt(); 1734 1735 acpi_table_parse(ACPI_SIG_HPET, acpi_parse_hpet); 1736 if (IS_ENABLED(CONFIG_ACPI_BGRT) && !acpi_nobgrt) 1737 acpi_table_parse(ACPI_SIG_BGRT, acpi_parse_bgrt); 1738 1739 if (!acpi_noirq) 1740 x86_init.pci.init = pci_acpi_init; 1741 1742 /* Do not enable ACPI SPCR console by default */ 1743 acpi_parse_spcr(earlycon_acpi_spcr_enable, false); 1744 return 0; 1745 } 1746 1747 static int __init parse_acpi(char *arg) 1748 { 1749 if (!arg) 1750 return -EINVAL; 1751 1752 /* "acpi=off" disables both ACPI table parsing and interpreter */ 1753 if (strcmp(arg, "off") == 0) { 1754 disable_acpi(); 1755 } 1756 /* acpi=force to over-ride black-list */ 1757 else if (strcmp(arg, "force") == 0) { 1758 acpi_force = 1; 1759 acpi_disabled = 0; 1760 } 1761 /* acpi=strict disables out-of-spec workarounds */ 1762 else if (strcmp(arg, "strict") == 0) { 1763 acpi_strict = 1; 1764 } 1765 /* acpi=rsdt use RSDT instead of XSDT */ 1766 else if (strcmp(arg, "rsdt") == 0) { 1767 acpi_gbl_do_not_use_xsdt = TRUE; 1768 } 1769 /* "acpi=noirq" disables ACPI interrupt routing */ 1770 else if (strcmp(arg, "noirq") == 0) { 1771 acpi_noirq_set(); 1772 } 1773 /* "acpi=copy_dsdt" copies DSDT */ 1774 else if (strcmp(arg, "copy_dsdt") == 0) { 1775 acpi_gbl_copy_dsdt_locally = 1; 1776 } 1777 /* "acpi=nocmcff" disables FF mode for corrected errors */ 1778 else if (strcmp(arg, "nocmcff") == 0) { 1779 acpi_disable_cmcff = 1; 1780 } else { 1781 /* Core will printk when we return error. */ 1782 return -EINVAL; 1783 } 1784 return 0; 1785 } 1786 early_param("acpi", parse_acpi); 1787 1788 static int __init parse_acpi_bgrt(char *arg) 1789 { 1790 acpi_nobgrt = true; 1791 return 0; 1792 } 1793 early_param("bgrt_disable", parse_acpi_bgrt); 1794 1795 /* FIXME: Using pci= for an ACPI parameter is a travesty. */ 1796 static int __init parse_pci(char *arg) 1797 { 1798 if (arg && strcmp(arg, "noacpi") == 0) 1799 acpi_disable_pci(); 1800 return 0; 1801 } 1802 early_param("pci", parse_pci); 1803 1804 int __init acpi_mps_check(void) 1805 { 1806 #if defined(CONFIG_X86_LOCAL_APIC) && !defined(CONFIG_X86_MPPARSE) 1807 /* mptable code is not built-in*/ 1808 if (acpi_disabled || acpi_noirq) { 1809 pr_warn("MPS support code is not built-in, using acpi=off or acpi=noirq or pci=noacpi may have problem\n"); 1810 return 1; 1811 } 1812 #endif 1813 return 0; 1814 } 1815 1816 #ifdef CONFIG_X86_IO_APIC 1817 static int __init parse_acpi_skip_timer_override(char *arg) 1818 { 1819 acpi_skip_timer_override = 1; 1820 return 0; 1821 } 1822 early_param("acpi_skip_timer_override", parse_acpi_skip_timer_override); 1823 1824 static int __init parse_acpi_use_timer_override(char *arg) 1825 { 1826 acpi_use_timer_override = 1; 1827 return 0; 1828 } 1829 early_param("acpi_use_timer_override", parse_acpi_use_timer_override); 1830 #endif /* CONFIG_X86_IO_APIC */ 1831 1832 static int __init setup_acpi_sci(char *s) 1833 { 1834 if (!s) 1835 return -EINVAL; 1836 if (!strcmp(s, "edge")) 1837 acpi_sci_flags = ACPI_MADT_TRIGGER_EDGE | 1838 (acpi_sci_flags & ~ACPI_MADT_TRIGGER_MASK); 1839 else if (!strcmp(s, "level")) 1840 acpi_sci_flags = ACPI_MADT_TRIGGER_LEVEL | 1841 (acpi_sci_flags & ~ACPI_MADT_TRIGGER_MASK); 1842 else if (!strcmp(s, "high")) 1843 acpi_sci_flags = ACPI_MADT_POLARITY_ACTIVE_HIGH | 1844 (acpi_sci_flags & ~ACPI_MADT_POLARITY_MASK); 1845 else if (!strcmp(s, "low")) 1846 acpi_sci_flags = ACPI_MADT_POLARITY_ACTIVE_LOW | 1847 (acpi_sci_flags & ~ACPI_MADT_POLARITY_MASK); 1848 else 1849 return -EINVAL; 1850 return 0; 1851 } 1852 early_param("acpi_sci", setup_acpi_sci); 1853 1854 int __acpi_acquire_global_lock(unsigned int *lock) 1855 { 1856 unsigned int old, new; 1857 1858 old = READ_ONCE(*lock); 1859 do { 1860 new = (((old & ~0x3) + 2) + ((old >> 1) & 0x1)); 1861 } while (!try_cmpxchg(lock, &old, new)); 1862 return ((new & 0x3) < 3) ? -1 : 0; 1863 } 1864 1865 int __acpi_release_global_lock(unsigned int *lock) 1866 { 1867 unsigned int old, new; 1868 1869 old = READ_ONCE(*lock); 1870 do { 1871 new = old & ~0x3; 1872 } while (!try_cmpxchg(lock, &old, new)); 1873 return old & 0x1; 1874 } 1875 1876 void __init arch_reserve_mem_area(acpi_physical_address addr, size_t size) 1877 { 1878 e820__range_add(addr, size, E820_TYPE_NVS); 1879 e820__update_table_print(); 1880 } 1881 1882 void x86_default_set_root_pointer(u64 addr) 1883 { 1884 boot_params.acpi_rsdp_addr = addr; 1885 } 1886 1887 u64 x86_default_get_root_pointer(void) 1888 { 1889 return boot_params.acpi_rsdp_addr; 1890 } 1891