1 // SPDX-License-Identifier: GPL-2.0-or-later 2 /* 3 * boot.c - Architecture-Specific Low-Level ACPI Boot Support 4 * 5 * Copyright (C) 2001, 2002 Paul Diefenbaugh <paul.s.diefenbaugh@intel.com> 6 * Copyright (C) 2001 Jun Nakajima <jun.nakajima@intel.com> 7 */ 8 #define pr_fmt(fmt) "ACPI: " fmt 9 10 #include <linux/init.h> 11 #include <linux/acpi.h> 12 #include <linux/acpi_pmtmr.h> 13 #include <linux/efi.h> 14 #include <linux/cpumask.h> 15 #include <linux/export.h> 16 #include <linux/dmi.h> 17 #include <linux/irq.h> 18 #include <linux/slab.h> 19 #include <linux/memblock.h> 20 #include <linux/ioport.h> 21 #include <linux/pci.h> 22 #include <linux/efi-bgrt.h> 23 #include <linux/serial_core.h> 24 #include <linux/pgtable.h> 25 26 #include <asm/e820/api.h> 27 #include <asm/irqdomain.h> 28 #include <asm/pci_x86.h> 29 #include <asm/io_apic.h> 30 #include <asm/apic.h> 31 #include <asm/io.h> 32 #include <asm/mpspec.h> 33 #include <asm/smp.h> 34 #include <asm/i8259.h> 35 #include <asm/setup.h> 36 37 #include "sleep.h" /* To include x86_acpi_suspend_lowlevel */ 38 static int __initdata acpi_force = 0; 39 int acpi_disabled; 40 EXPORT_SYMBOL(acpi_disabled); 41 42 #ifdef CONFIG_X86_64 43 # include <asm/proto.h> 44 #endif /* X86 */ 45 46 int acpi_noirq; /* skip ACPI IRQ initialization */ 47 static int acpi_nobgrt; /* skip ACPI BGRT */ 48 int acpi_pci_disabled; /* skip ACPI PCI scan and IRQ initialization */ 49 EXPORT_SYMBOL(acpi_pci_disabled); 50 51 int acpi_lapic; 52 int acpi_ioapic; 53 int acpi_strict; 54 int acpi_disable_cmcff; 55 56 /* ACPI SCI override configuration */ 57 u8 acpi_sci_flags __initdata; 58 u32 acpi_sci_override_gsi __initdata = INVALID_ACPI_IRQ; 59 int acpi_skip_timer_override __initdata; 60 int acpi_use_timer_override __initdata; 61 int acpi_fix_pin2_polarity __initdata; 62 63 #ifdef CONFIG_X86_LOCAL_APIC 64 static u64 acpi_lapic_addr __initdata = APIC_DEFAULT_PHYS_BASE; 65 static bool acpi_support_online_capable; 66 #endif 67 68 #ifdef CONFIG_X86_64 69 /* Physical address of the Multiprocessor Wakeup Structure mailbox */ 70 static u64 acpi_mp_wake_mailbox_paddr; 71 /* Virtual address of the Multiprocessor Wakeup Structure mailbox */ 72 static struct acpi_madt_multiproc_wakeup_mailbox *acpi_mp_wake_mailbox; 73 #endif 74 75 #ifdef CONFIG_X86_IO_APIC 76 /* 77 * Locks related to IOAPIC hotplug 78 * Hotplug side: 79 * ->device_hotplug_lock 80 * ->acpi_ioapic_lock 81 * ->ioapic_lock 82 * Interrupt mapping side: 83 * ->acpi_ioapic_lock 84 * ->ioapic_mutex 85 * ->ioapic_lock 86 */ 87 static DEFINE_MUTEX(acpi_ioapic_lock); 88 #endif 89 90 /* -------------------------------------------------------------------------- 91 Boot-time Configuration 92 -------------------------------------------------------------------------- */ 93 94 /* 95 * The default interrupt routing model is PIC (8259). This gets 96 * overridden if IOAPICs are enumerated (below). 97 */ 98 enum acpi_irq_model_id acpi_irq_model = ACPI_IRQ_MODEL_PIC; 99 100 101 /* 102 * ISA irqs by default are the first 16 gsis but can be 103 * any gsi as specified by an interrupt source override. 104 */ 105 static u32 isa_irq_to_gsi[NR_IRQS_LEGACY] __read_mostly = { 106 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15 107 }; 108 109 /* 110 * This is just a simple wrapper around early_memremap(), 111 * with sanity checks for phys == 0 and size == 0. 112 */ 113 void __init __iomem *__acpi_map_table(unsigned long phys, unsigned long size) 114 { 115 116 if (!phys || !size) 117 return NULL; 118 119 return early_memremap(phys, size); 120 } 121 122 void __init __acpi_unmap_table(void __iomem *map, unsigned long size) 123 { 124 if (!map || !size) 125 return; 126 127 early_memunmap(map, size); 128 } 129 130 #ifdef CONFIG_X86_LOCAL_APIC 131 static int __init acpi_parse_madt(struct acpi_table_header *table) 132 { 133 struct acpi_table_madt *madt = NULL; 134 135 if (!boot_cpu_has(X86_FEATURE_APIC)) 136 return -EINVAL; 137 138 madt = (struct acpi_table_madt *)table; 139 if (!madt) { 140 pr_warn("Unable to map MADT\n"); 141 return -ENODEV; 142 } 143 144 if (madt->address) { 145 acpi_lapic_addr = (u64) madt->address; 146 147 pr_debug("Local APIC address 0x%08x\n", madt->address); 148 } 149 150 /* ACPI 6.3 and newer support the online capable bit. */ 151 if (acpi_gbl_FADT.header.revision > 6 || 152 (acpi_gbl_FADT.header.revision == 6 && 153 acpi_gbl_FADT.minor_revision >= 3)) 154 acpi_support_online_capable = true; 155 156 default_acpi_madt_oem_check(madt->header.oem_id, 157 madt->header.oem_table_id); 158 159 return 0; 160 } 161 162 /** 163 * acpi_register_lapic - register a local apic and generates a logic cpu number 164 * @id: local apic id to register 165 * @acpiid: ACPI id to register 166 * @enabled: this cpu is enabled or not 167 * 168 * Returns the logic cpu number which maps to the local apic 169 */ 170 static int acpi_register_lapic(int id, u32 acpiid, u8 enabled) 171 { 172 int cpu; 173 174 if (id >= MAX_LOCAL_APIC) { 175 pr_info("skipped apicid that is too big\n"); 176 return -EINVAL; 177 } 178 179 if (!enabled) { 180 ++disabled_cpus; 181 return -EINVAL; 182 } 183 184 cpu = generic_processor_info(id); 185 if (cpu >= 0) 186 early_per_cpu(x86_cpu_to_acpiid, cpu) = acpiid; 187 188 return cpu; 189 } 190 191 static bool __init acpi_is_processor_usable(u32 lapic_flags) 192 { 193 if (lapic_flags & ACPI_MADT_ENABLED) 194 return true; 195 196 if (!acpi_support_online_capable || 197 (lapic_flags & ACPI_MADT_ONLINE_CAPABLE)) 198 return true; 199 200 return false; 201 } 202 203 static int __init 204 acpi_parse_x2apic(union acpi_subtable_headers *header, const unsigned long end) 205 { 206 struct acpi_madt_local_x2apic *processor = NULL; 207 #ifdef CONFIG_X86_X2APIC 208 u32 apic_id; 209 u8 enabled; 210 #endif 211 212 processor = (struct acpi_madt_local_x2apic *)header; 213 214 if (BAD_MADT_ENTRY(processor, end)) 215 return -EINVAL; 216 217 acpi_table_print_madt_entry(&header->common); 218 219 #ifdef CONFIG_X86_X2APIC 220 apic_id = processor->local_apic_id; 221 enabled = processor->lapic_flags & ACPI_MADT_ENABLED; 222 223 /* Ignore invalid ID */ 224 if (apic_id == 0xffffffff) 225 return 0; 226 227 /* don't register processors that cannot be onlined */ 228 if (!acpi_is_processor_usable(processor->lapic_flags)) 229 return 0; 230 231 /* 232 * We need to register disabled CPU as well to permit 233 * counting disabled CPUs. This allows us to size 234 * cpus_possible_map more accurately, to permit 235 * to not preallocating memory for all NR_CPUS 236 * when we use CPU hotplug. 237 */ 238 if (!apic_id_valid(apic_id)) { 239 if (enabled) 240 pr_warn("x2apic entry ignored\n"); 241 return 0; 242 } 243 244 acpi_register_lapic(apic_id, processor->uid, enabled); 245 #else 246 pr_warn("x2apic entry ignored\n"); 247 #endif 248 249 return 0; 250 } 251 252 static int __init 253 acpi_parse_lapic(union acpi_subtable_headers * header, const unsigned long end) 254 { 255 struct acpi_madt_local_apic *processor = NULL; 256 257 processor = (struct acpi_madt_local_apic *)header; 258 259 if (BAD_MADT_ENTRY(processor, end)) 260 return -EINVAL; 261 262 acpi_table_print_madt_entry(&header->common); 263 264 /* Ignore invalid ID */ 265 if (processor->id == 0xff) 266 return 0; 267 268 /* don't register processors that can not be onlined */ 269 if (!acpi_is_processor_usable(processor->lapic_flags)) 270 return 0; 271 272 /* 273 * We need to register disabled CPU as well to permit 274 * counting disabled CPUs. This allows us to size 275 * cpus_possible_map more accurately, to permit 276 * to not preallocating memory for all NR_CPUS 277 * when we use CPU hotplug. 278 */ 279 acpi_register_lapic(processor->id, /* APIC ID */ 280 processor->processor_id, /* ACPI ID */ 281 processor->lapic_flags & ACPI_MADT_ENABLED); 282 283 return 0; 284 } 285 286 static int __init 287 acpi_parse_sapic(union acpi_subtable_headers *header, const unsigned long end) 288 { 289 struct acpi_madt_local_sapic *processor = NULL; 290 291 processor = (struct acpi_madt_local_sapic *)header; 292 293 if (BAD_MADT_ENTRY(processor, end)) 294 return -EINVAL; 295 296 acpi_table_print_madt_entry(&header->common); 297 298 acpi_register_lapic((processor->id << 8) | processor->eid,/* APIC ID */ 299 processor->processor_id, /* ACPI ID */ 300 processor->lapic_flags & ACPI_MADT_ENABLED); 301 302 return 0; 303 } 304 305 static int __init 306 acpi_parse_lapic_addr_ovr(union acpi_subtable_headers * header, 307 const unsigned long end) 308 { 309 struct acpi_madt_local_apic_override *lapic_addr_ovr = NULL; 310 311 lapic_addr_ovr = (struct acpi_madt_local_apic_override *)header; 312 313 if (BAD_MADT_ENTRY(lapic_addr_ovr, end)) 314 return -EINVAL; 315 316 acpi_table_print_madt_entry(&header->common); 317 318 acpi_lapic_addr = lapic_addr_ovr->address; 319 320 return 0; 321 } 322 323 static int __init 324 acpi_parse_x2apic_nmi(union acpi_subtable_headers *header, 325 const unsigned long end) 326 { 327 struct acpi_madt_local_x2apic_nmi *x2apic_nmi = NULL; 328 329 x2apic_nmi = (struct acpi_madt_local_x2apic_nmi *)header; 330 331 if (BAD_MADT_ENTRY(x2apic_nmi, end)) 332 return -EINVAL; 333 334 acpi_table_print_madt_entry(&header->common); 335 336 if (x2apic_nmi->lint != 1) 337 pr_warn("NMI not connected to LINT 1!\n"); 338 339 return 0; 340 } 341 342 static int __init 343 acpi_parse_lapic_nmi(union acpi_subtable_headers * header, const unsigned long end) 344 { 345 struct acpi_madt_local_apic_nmi *lapic_nmi = NULL; 346 347 lapic_nmi = (struct acpi_madt_local_apic_nmi *)header; 348 349 if (BAD_MADT_ENTRY(lapic_nmi, end)) 350 return -EINVAL; 351 352 acpi_table_print_madt_entry(&header->common); 353 354 if (lapic_nmi->lint != 1) 355 pr_warn("NMI not connected to LINT 1!\n"); 356 357 return 0; 358 } 359 360 #ifdef CONFIG_X86_64 361 static int acpi_wakeup_cpu(int apicid, unsigned long start_ip) 362 { 363 /* 364 * Remap mailbox memory only for the first call to acpi_wakeup_cpu(). 365 * 366 * Wakeup of secondary CPUs is fully serialized in the core code. 367 * No need to protect acpi_mp_wake_mailbox from concurrent accesses. 368 */ 369 if (!acpi_mp_wake_mailbox) { 370 acpi_mp_wake_mailbox = memremap(acpi_mp_wake_mailbox_paddr, 371 sizeof(*acpi_mp_wake_mailbox), 372 MEMREMAP_WB); 373 } 374 375 /* 376 * Mailbox memory is shared between the firmware and OS. Firmware will 377 * listen on mailbox command address, and once it receives the wakeup 378 * command, the CPU associated with the given apicid will be booted. 379 * 380 * The value of 'apic_id' and 'wakeup_vector' must be visible to the 381 * firmware before the wakeup command is visible. smp_store_release() 382 * ensures ordering and visibility. 383 */ 384 acpi_mp_wake_mailbox->apic_id = apicid; 385 acpi_mp_wake_mailbox->wakeup_vector = start_ip; 386 smp_store_release(&acpi_mp_wake_mailbox->command, 387 ACPI_MP_WAKE_COMMAND_WAKEUP); 388 389 /* 390 * Wait for the CPU to wake up. 391 * 392 * The CPU being woken up is essentially in a spin loop waiting to be 393 * woken up. It should not take long for it wake up and acknowledge by 394 * zeroing out ->command. 395 * 396 * ACPI specification doesn't provide any guidance on how long kernel 397 * has to wait for a wake up acknowledgement. It also doesn't provide 398 * a way to cancel a wake up request if it takes too long. 399 * 400 * In TDX environment, the VMM has control over how long it takes to 401 * wake up secondary. It can postpone scheduling secondary vCPU 402 * indefinitely. Giving up on wake up request and reporting error opens 403 * possible attack vector for VMM: it can wake up a secondary CPU when 404 * kernel doesn't expect it. Wait until positive result of the wake up 405 * request. 406 */ 407 while (READ_ONCE(acpi_mp_wake_mailbox->command)) 408 cpu_relax(); 409 410 return 0; 411 } 412 #endif /* CONFIG_X86_64 */ 413 #endif /* CONFIG_X86_LOCAL_APIC */ 414 415 #ifdef CONFIG_X86_IO_APIC 416 #define MP_ISA_BUS 0 417 418 static int __init mp_register_ioapic_irq(u8 bus_irq, u8 polarity, 419 u8 trigger, u32 gsi); 420 421 static void __init mp_override_legacy_irq(u8 bus_irq, u8 polarity, u8 trigger, 422 u32 gsi) 423 { 424 /* 425 * Check bus_irq boundary. 426 */ 427 if (bus_irq >= NR_IRQS_LEGACY) { 428 pr_warn("Invalid bus_irq %u for legacy override\n", bus_irq); 429 return; 430 } 431 432 /* 433 * TBD: This check is for faulty timer entries, where the override 434 * erroneously sets the trigger to level, resulting in a HUGE 435 * increase of timer interrupts! 436 */ 437 if ((bus_irq == 0) && (trigger == 3)) 438 trigger = 1; 439 440 if (mp_register_ioapic_irq(bus_irq, polarity, trigger, gsi) < 0) 441 return; 442 /* 443 * Reset default identity mapping if gsi is also an legacy IRQ, 444 * otherwise there will be more than one entry with the same GSI 445 * and acpi_isa_irq_to_gsi() may give wrong result. 446 */ 447 if (gsi < nr_legacy_irqs() && isa_irq_to_gsi[gsi] == gsi) 448 isa_irq_to_gsi[gsi] = INVALID_ACPI_IRQ; 449 isa_irq_to_gsi[bus_irq] = gsi; 450 } 451 452 static void mp_config_acpi_gsi(struct device *dev, u32 gsi, int trigger, 453 int polarity) 454 { 455 #ifdef CONFIG_X86_MPPARSE 456 struct mpc_intsrc mp_irq; 457 struct pci_dev *pdev; 458 unsigned char number; 459 unsigned int devfn; 460 int ioapic; 461 u8 pin; 462 463 if (!acpi_ioapic) 464 return; 465 if (!dev || !dev_is_pci(dev)) 466 return; 467 468 pdev = to_pci_dev(dev); 469 number = pdev->bus->number; 470 devfn = pdev->devfn; 471 pin = pdev->pin; 472 /* print the entry should happen on mptable identically */ 473 mp_irq.type = MP_INTSRC; 474 mp_irq.irqtype = mp_INT; 475 mp_irq.irqflag = (trigger == ACPI_EDGE_SENSITIVE ? 4 : 0x0c) | 476 (polarity == ACPI_ACTIVE_HIGH ? 1 : 3); 477 mp_irq.srcbus = number; 478 mp_irq.srcbusirq = (((devfn >> 3) & 0x1f) << 2) | ((pin - 1) & 3); 479 ioapic = mp_find_ioapic(gsi); 480 mp_irq.dstapic = mpc_ioapic_id(ioapic); 481 mp_irq.dstirq = mp_find_ioapic_pin(ioapic, gsi); 482 483 mp_save_irq(&mp_irq); 484 #endif 485 } 486 487 static int __init mp_register_ioapic_irq(u8 bus_irq, u8 polarity, 488 u8 trigger, u32 gsi) 489 { 490 struct mpc_intsrc mp_irq; 491 int ioapic, pin; 492 493 /* Convert 'gsi' to 'ioapic.pin'(INTIN#) */ 494 ioapic = mp_find_ioapic(gsi); 495 if (ioapic < 0) { 496 pr_warn("Failed to find ioapic for gsi : %u\n", gsi); 497 return ioapic; 498 } 499 500 pin = mp_find_ioapic_pin(ioapic, gsi); 501 502 mp_irq.type = MP_INTSRC; 503 mp_irq.irqtype = mp_INT; 504 mp_irq.irqflag = (trigger << 2) | polarity; 505 mp_irq.srcbus = MP_ISA_BUS; 506 mp_irq.srcbusirq = bus_irq; 507 mp_irq.dstapic = mpc_ioapic_id(ioapic); 508 mp_irq.dstirq = pin; 509 510 mp_save_irq(&mp_irq); 511 512 return 0; 513 } 514 515 static int __init 516 acpi_parse_ioapic(union acpi_subtable_headers * header, const unsigned long end) 517 { 518 struct acpi_madt_io_apic *ioapic = NULL; 519 struct ioapic_domain_cfg cfg = { 520 .type = IOAPIC_DOMAIN_DYNAMIC, 521 .ops = &mp_ioapic_irqdomain_ops, 522 }; 523 524 ioapic = (struct acpi_madt_io_apic *)header; 525 526 if (BAD_MADT_ENTRY(ioapic, end)) 527 return -EINVAL; 528 529 acpi_table_print_madt_entry(&header->common); 530 531 /* Statically assign IRQ numbers for IOAPICs hosting legacy IRQs */ 532 if (ioapic->global_irq_base < nr_legacy_irqs()) 533 cfg.type = IOAPIC_DOMAIN_LEGACY; 534 535 mp_register_ioapic(ioapic->id, ioapic->address, ioapic->global_irq_base, 536 &cfg); 537 538 return 0; 539 } 540 541 /* 542 * Parse Interrupt Source Override for the ACPI SCI 543 */ 544 static void __init acpi_sci_ioapic_setup(u8 bus_irq, u16 polarity, u16 trigger, u32 gsi) 545 { 546 if (trigger == 0) /* compatible SCI trigger is level */ 547 trigger = 3; 548 549 if (polarity == 0) /* compatible SCI polarity is low */ 550 polarity = 3; 551 552 /* Command-line over-ride via acpi_sci= */ 553 if (acpi_sci_flags & ACPI_MADT_TRIGGER_MASK) 554 trigger = (acpi_sci_flags & ACPI_MADT_TRIGGER_MASK) >> 2; 555 556 if (acpi_sci_flags & ACPI_MADT_POLARITY_MASK) 557 polarity = acpi_sci_flags & ACPI_MADT_POLARITY_MASK; 558 559 if (bus_irq < NR_IRQS_LEGACY) 560 mp_override_legacy_irq(bus_irq, polarity, trigger, gsi); 561 else 562 mp_register_ioapic_irq(bus_irq, polarity, trigger, gsi); 563 564 acpi_penalize_sci_irq(bus_irq, trigger, polarity); 565 566 /* 567 * stash over-ride to indicate we've been here 568 * and for later update of acpi_gbl_FADT 569 */ 570 acpi_sci_override_gsi = gsi; 571 return; 572 } 573 574 static int __init 575 acpi_parse_int_src_ovr(union acpi_subtable_headers * header, 576 const unsigned long end) 577 { 578 struct acpi_madt_interrupt_override *intsrc = NULL; 579 580 intsrc = (struct acpi_madt_interrupt_override *)header; 581 582 if (BAD_MADT_ENTRY(intsrc, end)) 583 return -EINVAL; 584 585 acpi_table_print_madt_entry(&header->common); 586 587 if (intsrc->source_irq == acpi_gbl_FADT.sci_interrupt) { 588 acpi_sci_ioapic_setup(intsrc->source_irq, 589 intsrc->inti_flags & ACPI_MADT_POLARITY_MASK, 590 (intsrc->inti_flags & ACPI_MADT_TRIGGER_MASK) >> 2, 591 intsrc->global_irq); 592 return 0; 593 } 594 595 if (intsrc->source_irq == 0) { 596 if (acpi_skip_timer_override) { 597 pr_warn("BIOS IRQ0 override ignored.\n"); 598 return 0; 599 } 600 601 if ((intsrc->global_irq == 2) && acpi_fix_pin2_polarity 602 && (intsrc->inti_flags & ACPI_MADT_POLARITY_MASK)) { 603 intsrc->inti_flags &= ~ACPI_MADT_POLARITY_MASK; 604 pr_warn("BIOS IRQ0 pin2 override: forcing polarity to high active.\n"); 605 } 606 } 607 608 mp_override_legacy_irq(intsrc->source_irq, 609 intsrc->inti_flags & ACPI_MADT_POLARITY_MASK, 610 (intsrc->inti_flags & ACPI_MADT_TRIGGER_MASK) >> 2, 611 intsrc->global_irq); 612 613 return 0; 614 } 615 616 static int __init 617 acpi_parse_nmi_src(union acpi_subtable_headers * header, const unsigned long end) 618 { 619 struct acpi_madt_nmi_source *nmi_src = NULL; 620 621 nmi_src = (struct acpi_madt_nmi_source *)header; 622 623 if (BAD_MADT_ENTRY(nmi_src, end)) 624 return -EINVAL; 625 626 acpi_table_print_madt_entry(&header->common); 627 628 /* TBD: Support nimsrc entries? */ 629 630 return 0; 631 } 632 633 #endif /* CONFIG_X86_IO_APIC */ 634 635 /* 636 * acpi_pic_sci_set_trigger() 637 * 638 * use ELCR to set PIC-mode trigger type for SCI 639 * 640 * If a PIC-mode SCI is not recognized or gives spurious IRQ7's 641 * it may require Edge Trigger -- use "acpi_sci=edge" 642 * 643 * Port 0x4d0-4d1 are ELCR1 and ELCR2, the Edge/Level Control Registers 644 * for the 8259 PIC. bit[n] = 1 means irq[n] is Level, otherwise Edge. 645 * ELCR1 is IRQs 0-7 (IRQ 0, 1, 2 must be 0) 646 * ELCR2 is IRQs 8-15 (IRQ 8, 13 must be 0) 647 */ 648 649 void __init acpi_pic_sci_set_trigger(unsigned int irq, u16 trigger) 650 { 651 unsigned int mask = 1 << irq; 652 unsigned int old, new; 653 654 /* Real old ELCR mask */ 655 old = inb(PIC_ELCR1) | (inb(PIC_ELCR2) << 8); 656 657 /* 658 * If we use ACPI to set PCI IRQs, then we should clear ELCR 659 * since we will set it correctly as we enable the PCI irq 660 * routing. 661 */ 662 new = acpi_noirq ? old : 0; 663 664 /* 665 * Update SCI information in the ELCR, it isn't in the PCI 666 * routing tables.. 667 */ 668 switch (trigger) { 669 case 1: /* Edge - clear */ 670 new &= ~mask; 671 break; 672 case 3: /* Level - set */ 673 new |= mask; 674 break; 675 } 676 677 if (old == new) 678 return; 679 680 pr_warn("setting ELCR to %04x (from %04x)\n", new, old); 681 outb(new, PIC_ELCR1); 682 outb(new >> 8, PIC_ELCR2); 683 } 684 685 int acpi_gsi_to_irq(u32 gsi, unsigned int *irqp) 686 { 687 int rc, irq, trigger, polarity; 688 689 if (acpi_irq_model == ACPI_IRQ_MODEL_PIC) { 690 *irqp = gsi; 691 return 0; 692 } 693 694 rc = acpi_get_override_irq(gsi, &trigger, &polarity); 695 if (rc) 696 return rc; 697 698 trigger = trigger ? ACPI_LEVEL_SENSITIVE : ACPI_EDGE_SENSITIVE; 699 polarity = polarity ? ACPI_ACTIVE_LOW : ACPI_ACTIVE_HIGH; 700 irq = acpi_register_gsi(NULL, gsi, trigger, polarity); 701 if (irq < 0) 702 return irq; 703 704 *irqp = irq; 705 return 0; 706 } 707 EXPORT_SYMBOL_GPL(acpi_gsi_to_irq); 708 709 int acpi_isa_irq_to_gsi(unsigned isa_irq, u32 *gsi) 710 { 711 if (isa_irq < nr_legacy_irqs() && 712 isa_irq_to_gsi[isa_irq] != INVALID_ACPI_IRQ) { 713 *gsi = isa_irq_to_gsi[isa_irq]; 714 return 0; 715 } 716 717 return -1; 718 } 719 720 static int acpi_register_gsi_pic(struct device *dev, u32 gsi, 721 int trigger, int polarity) 722 { 723 #ifdef CONFIG_PCI 724 /* 725 * Make sure all (legacy) PCI IRQs are set as level-triggered. 726 */ 727 if (trigger == ACPI_LEVEL_SENSITIVE) 728 elcr_set_level_irq(gsi); 729 #endif 730 731 return gsi; 732 } 733 734 #ifdef CONFIG_X86_LOCAL_APIC 735 static int acpi_register_gsi_ioapic(struct device *dev, u32 gsi, 736 int trigger, int polarity) 737 { 738 int irq = gsi; 739 #ifdef CONFIG_X86_IO_APIC 740 int node; 741 struct irq_alloc_info info; 742 743 node = dev ? dev_to_node(dev) : NUMA_NO_NODE; 744 trigger = trigger == ACPI_EDGE_SENSITIVE ? 0 : 1; 745 polarity = polarity == ACPI_ACTIVE_HIGH ? 0 : 1; 746 ioapic_set_alloc_attr(&info, node, trigger, polarity); 747 748 mutex_lock(&acpi_ioapic_lock); 749 irq = mp_map_gsi_to_irq(gsi, IOAPIC_MAP_ALLOC, &info); 750 /* Don't set up the ACPI SCI because it's already set up */ 751 if (irq >= 0 && enable_update_mptable && gsi != acpi_gbl_FADT.sci_interrupt) 752 mp_config_acpi_gsi(dev, gsi, trigger, polarity); 753 mutex_unlock(&acpi_ioapic_lock); 754 #endif 755 756 return irq; 757 } 758 759 static void acpi_unregister_gsi_ioapic(u32 gsi) 760 { 761 #ifdef CONFIG_X86_IO_APIC 762 int irq; 763 764 mutex_lock(&acpi_ioapic_lock); 765 irq = mp_map_gsi_to_irq(gsi, 0, NULL); 766 if (irq > 0) 767 mp_unmap_irq(irq); 768 mutex_unlock(&acpi_ioapic_lock); 769 #endif 770 } 771 #endif 772 773 int (*__acpi_register_gsi)(struct device *dev, u32 gsi, 774 int trigger, int polarity) = acpi_register_gsi_pic; 775 void (*__acpi_unregister_gsi)(u32 gsi) = NULL; 776 777 #ifdef CONFIG_ACPI_SLEEP 778 int (*acpi_suspend_lowlevel)(void) = x86_acpi_suspend_lowlevel; 779 #else 780 int (*acpi_suspend_lowlevel)(void); 781 #endif 782 783 /* 784 * success: return IRQ number (>=0) 785 * failure: return < 0 786 */ 787 int acpi_register_gsi(struct device *dev, u32 gsi, int trigger, int polarity) 788 { 789 return __acpi_register_gsi(dev, gsi, trigger, polarity); 790 } 791 EXPORT_SYMBOL_GPL(acpi_register_gsi); 792 793 void acpi_unregister_gsi(u32 gsi) 794 { 795 if (__acpi_unregister_gsi) 796 __acpi_unregister_gsi(gsi); 797 } 798 EXPORT_SYMBOL_GPL(acpi_unregister_gsi); 799 800 #ifdef CONFIG_X86_LOCAL_APIC 801 static void __init acpi_set_irq_model_ioapic(void) 802 { 803 acpi_irq_model = ACPI_IRQ_MODEL_IOAPIC; 804 __acpi_register_gsi = acpi_register_gsi_ioapic; 805 __acpi_unregister_gsi = acpi_unregister_gsi_ioapic; 806 acpi_ioapic = 1; 807 } 808 #endif 809 810 /* 811 * ACPI based hotplug support for CPU 812 */ 813 #ifdef CONFIG_ACPI_HOTPLUG_CPU 814 #include <acpi/processor.h> 815 816 static int acpi_map_cpu2node(acpi_handle handle, int cpu, int physid) 817 { 818 #ifdef CONFIG_ACPI_NUMA 819 int nid; 820 821 nid = acpi_get_node(handle); 822 if (nid != NUMA_NO_NODE) { 823 set_apicid_to_node(physid, nid); 824 numa_set_node(cpu, nid); 825 } 826 #endif 827 return 0; 828 } 829 830 int acpi_map_cpu(acpi_handle handle, phys_cpuid_t physid, u32 acpi_id, 831 int *pcpu) 832 { 833 int cpu; 834 835 cpu = acpi_register_lapic(physid, acpi_id, ACPI_MADT_ENABLED); 836 if (cpu < 0) { 837 pr_info("Unable to map lapic to logical cpu number\n"); 838 return cpu; 839 } 840 841 acpi_processor_set_pdc(handle); 842 acpi_map_cpu2node(handle, cpu, physid); 843 844 *pcpu = cpu; 845 return 0; 846 } 847 EXPORT_SYMBOL(acpi_map_cpu); 848 849 int acpi_unmap_cpu(int cpu) 850 { 851 #ifdef CONFIG_ACPI_NUMA 852 set_apicid_to_node(per_cpu(x86_cpu_to_apicid, cpu), NUMA_NO_NODE); 853 #endif 854 855 per_cpu(x86_cpu_to_apicid, cpu) = -1; 856 set_cpu_present(cpu, false); 857 num_processors--; 858 859 return (0); 860 } 861 EXPORT_SYMBOL(acpi_unmap_cpu); 862 #endif /* CONFIG_ACPI_HOTPLUG_CPU */ 863 864 int acpi_register_ioapic(acpi_handle handle, u64 phys_addr, u32 gsi_base) 865 { 866 int ret = -ENOSYS; 867 #ifdef CONFIG_ACPI_HOTPLUG_IOAPIC 868 int ioapic_id; 869 u64 addr; 870 struct ioapic_domain_cfg cfg = { 871 .type = IOAPIC_DOMAIN_DYNAMIC, 872 .ops = &mp_ioapic_irqdomain_ops, 873 }; 874 875 ioapic_id = acpi_get_ioapic_id(handle, gsi_base, &addr); 876 if (ioapic_id < 0) { 877 unsigned long long uid; 878 acpi_status status; 879 880 status = acpi_evaluate_integer(handle, METHOD_NAME__UID, 881 NULL, &uid); 882 if (ACPI_FAILURE(status)) { 883 acpi_handle_warn(handle, "failed to get IOAPIC ID.\n"); 884 return -EINVAL; 885 } 886 ioapic_id = (int)uid; 887 } 888 889 mutex_lock(&acpi_ioapic_lock); 890 ret = mp_register_ioapic(ioapic_id, phys_addr, gsi_base, &cfg); 891 mutex_unlock(&acpi_ioapic_lock); 892 #endif 893 894 return ret; 895 } 896 EXPORT_SYMBOL(acpi_register_ioapic); 897 898 int acpi_unregister_ioapic(acpi_handle handle, u32 gsi_base) 899 { 900 int ret = -ENOSYS; 901 902 #ifdef CONFIG_ACPI_HOTPLUG_IOAPIC 903 mutex_lock(&acpi_ioapic_lock); 904 ret = mp_unregister_ioapic(gsi_base); 905 mutex_unlock(&acpi_ioapic_lock); 906 #endif 907 908 return ret; 909 } 910 EXPORT_SYMBOL(acpi_unregister_ioapic); 911 912 /** 913 * acpi_ioapic_registered - Check whether IOAPIC associated with @gsi_base 914 * has been registered 915 * @handle: ACPI handle of the IOAPIC device 916 * @gsi_base: GSI base associated with the IOAPIC 917 * 918 * Assume caller holds some type of lock to serialize acpi_ioapic_registered() 919 * with acpi_register_ioapic()/acpi_unregister_ioapic(). 920 */ 921 int acpi_ioapic_registered(acpi_handle handle, u32 gsi_base) 922 { 923 int ret = 0; 924 925 #ifdef CONFIG_ACPI_HOTPLUG_IOAPIC 926 mutex_lock(&acpi_ioapic_lock); 927 ret = mp_ioapic_registered(gsi_base); 928 mutex_unlock(&acpi_ioapic_lock); 929 #endif 930 931 return ret; 932 } 933 934 static int __init acpi_parse_sbf(struct acpi_table_header *table) 935 { 936 struct acpi_table_boot *sb = (struct acpi_table_boot *)table; 937 938 sbf_port = sb->cmos_index; /* Save CMOS port */ 939 940 return 0; 941 } 942 943 #ifdef CONFIG_HPET_TIMER 944 #include <asm/hpet.h> 945 946 static struct resource *hpet_res __initdata; 947 948 static int __init acpi_parse_hpet(struct acpi_table_header *table) 949 { 950 struct acpi_table_hpet *hpet_tbl = (struct acpi_table_hpet *)table; 951 952 if (hpet_tbl->address.space_id != ACPI_SPACE_MEM) { 953 pr_warn("HPET timers must be located in memory.\n"); 954 return -1; 955 } 956 957 hpet_address = hpet_tbl->address.address; 958 hpet_blockid = hpet_tbl->sequence; 959 960 /* 961 * Some broken BIOSes advertise HPET at 0x0. We really do not 962 * want to allocate a resource there. 963 */ 964 if (!hpet_address) { 965 pr_warn("HPET id: %#x base: %#lx is invalid\n", hpet_tbl->id, hpet_address); 966 return 0; 967 } 968 #ifdef CONFIG_X86_64 969 /* 970 * Some even more broken BIOSes advertise HPET at 971 * 0xfed0000000000000 instead of 0xfed00000. Fix it up and add 972 * some noise: 973 */ 974 if (hpet_address == 0xfed0000000000000UL) { 975 if (!hpet_force_user) { 976 pr_warn("HPET id: %#x base: 0xfed0000000000000 is bogus, try hpet=force on the kernel command line to fix it up to 0xfed00000.\n", 977 hpet_tbl->id); 978 hpet_address = 0; 979 return 0; 980 } 981 pr_warn("HPET id: %#x base: 0xfed0000000000000 fixed up to 0xfed00000.\n", 982 hpet_tbl->id); 983 hpet_address >>= 32; 984 } 985 #endif 986 pr_info("HPET id: %#x base: %#lx\n", hpet_tbl->id, hpet_address); 987 988 /* 989 * Allocate and initialize the HPET firmware resource for adding into 990 * the resource tree during the lateinit timeframe. 991 */ 992 #define HPET_RESOURCE_NAME_SIZE 9 993 hpet_res = memblock_alloc(sizeof(*hpet_res) + HPET_RESOURCE_NAME_SIZE, 994 SMP_CACHE_BYTES); 995 if (!hpet_res) 996 panic("%s: Failed to allocate %zu bytes\n", __func__, 997 sizeof(*hpet_res) + HPET_RESOURCE_NAME_SIZE); 998 999 hpet_res->name = (void *)&hpet_res[1]; 1000 hpet_res->flags = IORESOURCE_MEM; 1001 snprintf((char *)hpet_res->name, HPET_RESOURCE_NAME_SIZE, "HPET %u", 1002 hpet_tbl->sequence); 1003 1004 hpet_res->start = hpet_address; 1005 hpet_res->end = hpet_address + (1 * 1024) - 1; 1006 1007 return 0; 1008 } 1009 1010 /* 1011 * hpet_insert_resource inserts the HPET resources used into the resource 1012 * tree. 1013 */ 1014 static __init int hpet_insert_resource(void) 1015 { 1016 if (!hpet_res) 1017 return 1; 1018 1019 return insert_resource(&iomem_resource, hpet_res); 1020 } 1021 1022 late_initcall(hpet_insert_resource); 1023 1024 #else 1025 #define acpi_parse_hpet NULL 1026 #endif 1027 1028 static int __init acpi_parse_fadt(struct acpi_table_header *table) 1029 { 1030 if (!(acpi_gbl_FADT.boot_flags & ACPI_FADT_LEGACY_DEVICES)) { 1031 pr_debug("no legacy devices present\n"); 1032 x86_platform.legacy.devices.pnpbios = 0; 1033 } 1034 1035 if (acpi_gbl_FADT.header.revision >= FADT2_REVISION_ID && 1036 !(acpi_gbl_FADT.boot_flags & ACPI_FADT_8042) && 1037 x86_platform.legacy.i8042 != X86_LEGACY_I8042_PLATFORM_ABSENT) { 1038 pr_debug("i8042 controller is absent\n"); 1039 x86_platform.legacy.i8042 = X86_LEGACY_I8042_FIRMWARE_ABSENT; 1040 } 1041 1042 if (acpi_gbl_FADT.boot_flags & ACPI_FADT_NO_CMOS_RTC) { 1043 pr_debug("not registering RTC platform device\n"); 1044 x86_platform.legacy.rtc = 0; 1045 } 1046 1047 if (acpi_gbl_FADT.boot_flags & ACPI_FADT_NO_VGA) { 1048 pr_debug("probing for VGA not safe\n"); 1049 x86_platform.legacy.no_vga = 1; 1050 } 1051 1052 #ifdef CONFIG_X86_PM_TIMER 1053 /* detect the location of the ACPI PM Timer */ 1054 if (acpi_gbl_FADT.header.revision >= FADT2_REVISION_ID) { 1055 /* FADT rev. 2 */ 1056 if (acpi_gbl_FADT.xpm_timer_block.space_id != 1057 ACPI_ADR_SPACE_SYSTEM_IO) 1058 return 0; 1059 1060 pmtmr_ioport = acpi_gbl_FADT.xpm_timer_block.address; 1061 /* 1062 * "X" fields are optional extensions to the original V1.0 1063 * fields, so we must selectively expand V1.0 fields if the 1064 * corresponding X field is zero. 1065 */ 1066 if (!pmtmr_ioport) 1067 pmtmr_ioport = acpi_gbl_FADT.pm_timer_block; 1068 } else { 1069 /* FADT rev. 1 */ 1070 pmtmr_ioport = acpi_gbl_FADT.pm_timer_block; 1071 } 1072 if (pmtmr_ioport) 1073 pr_info("PM-Timer IO Port: %#x\n", pmtmr_ioport); 1074 #endif 1075 return 0; 1076 } 1077 1078 #ifdef CONFIG_X86_LOCAL_APIC 1079 /* 1080 * Parse LAPIC entries in MADT 1081 * returns 0 on success, < 0 on error 1082 */ 1083 1084 static int __init early_acpi_parse_madt_lapic_addr_ovr(void) 1085 { 1086 int count; 1087 1088 if (!boot_cpu_has(X86_FEATURE_APIC)) 1089 return -ENODEV; 1090 1091 /* 1092 * Note that the LAPIC address is obtained from the MADT (32-bit value) 1093 * and (optionally) overridden by a LAPIC_ADDR_OVR entry (64-bit value). 1094 */ 1095 1096 count = acpi_table_parse_madt(ACPI_MADT_TYPE_LOCAL_APIC_OVERRIDE, 1097 acpi_parse_lapic_addr_ovr, 0); 1098 if (count < 0) { 1099 pr_err("Error parsing LAPIC address override entry\n"); 1100 return count; 1101 } 1102 1103 register_lapic_address(acpi_lapic_addr); 1104 1105 return count; 1106 } 1107 1108 static int __init acpi_parse_madt_lapic_entries(void) 1109 { 1110 int count; 1111 int x2count = 0; 1112 int ret; 1113 struct acpi_subtable_proc madt_proc[2]; 1114 1115 if (!boot_cpu_has(X86_FEATURE_APIC)) 1116 return -ENODEV; 1117 1118 count = acpi_table_parse_madt(ACPI_MADT_TYPE_LOCAL_SAPIC, 1119 acpi_parse_sapic, MAX_LOCAL_APIC); 1120 1121 if (!count) { 1122 memset(madt_proc, 0, sizeof(madt_proc)); 1123 madt_proc[0].id = ACPI_MADT_TYPE_LOCAL_APIC; 1124 madt_proc[0].handler = acpi_parse_lapic; 1125 madt_proc[1].id = ACPI_MADT_TYPE_LOCAL_X2APIC; 1126 madt_proc[1].handler = acpi_parse_x2apic; 1127 ret = acpi_table_parse_entries_array(ACPI_SIG_MADT, 1128 sizeof(struct acpi_table_madt), 1129 madt_proc, ARRAY_SIZE(madt_proc), MAX_LOCAL_APIC); 1130 if (ret < 0) { 1131 pr_err("Error parsing LAPIC/X2APIC entries\n"); 1132 return ret; 1133 } 1134 1135 count = madt_proc[0].count; 1136 x2count = madt_proc[1].count; 1137 } 1138 if (!count && !x2count) { 1139 pr_err("No LAPIC entries present\n"); 1140 /* TBD: Cleanup to allow fallback to MPS */ 1141 return -ENODEV; 1142 } else if (count < 0 || x2count < 0) { 1143 pr_err("Error parsing LAPIC entry\n"); 1144 /* TBD: Cleanup to allow fallback to MPS */ 1145 return count; 1146 } 1147 1148 x2count = acpi_table_parse_madt(ACPI_MADT_TYPE_LOCAL_X2APIC_NMI, 1149 acpi_parse_x2apic_nmi, 0); 1150 count = acpi_table_parse_madt(ACPI_MADT_TYPE_LOCAL_APIC_NMI, 1151 acpi_parse_lapic_nmi, 0); 1152 if (count < 0 || x2count < 0) { 1153 pr_err("Error parsing LAPIC NMI entry\n"); 1154 /* TBD: Cleanup to allow fallback to MPS */ 1155 return count; 1156 } 1157 return 0; 1158 } 1159 1160 #ifdef CONFIG_X86_64 1161 static int __init acpi_parse_mp_wake(union acpi_subtable_headers *header, 1162 const unsigned long end) 1163 { 1164 struct acpi_madt_multiproc_wakeup *mp_wake; 1165 1166 if (!IS_ENABLED(CONFIG_SMP)) 1167 return -ENODEV; 1168 1169 mp_wake = (struct acpi_madt_multiproc_wakeup *)header; 1170 if (BAD_MADT_ENTRY(mp_wake, end)) 1171 return -EINVAL; 1172 1173 acpi_table_print_madt_entry(&header->common); 1174 1175 acpi_mp_wake_mailbox_paddr = mp_wake->base_address; 1176 1177 acpi_wake_cpu_handler_update(acpi_wakeup_cpu); 1178 1179 return 0; 1180 } 1181 #endif /* CONFIG_X86_64 */ 1182 #endif /* CONFIG_X86_LOCAL_APIC */ 1183 1184 #ifdef CONFIG_X86_IO_APIC 1185 static void __init mp_config_acpi_legacy_irqs(void) 1186 { 1187 int i; 1188 struct mpc_intsrc mp_irq; 1189 1190 #ifdef CONFIG_EISA 1191 /* 1192 * Fabricate the legacy ISA bus (bus #31). 1193 */ 1194 mp_bus_id_to_type[MP_ISA_BUS] = MP_BUS_ISA; 1195 #endif 1196 set_bit(MP_ISA_BUS, mp_bus_not_pci); 1197 pr_debug("Bus #%d is ISA (nIRQs: %d)\n", MP_ISA_BUS, nr_legacy_irqs()); 1198 1199 /* 1200 * Use the default configuration for the IRQs 0-15. Unless 1201 * overridden by (MADT) interrupt source override entries. 1202 */ 1203 for (i = 0; i < nr_legacy_irqs(); i++) { 1204 int ioapic, pin; 1205 unsigned int dstapic; 1206 int idx; 1207 u32 gsi; 1208 1209 /* Locate the gsi that irq i maps to. */ 1210 if (acpi_isa_irq_to_gsi(i, &gsi)) 1211 continue; 1212 1213 /* 1214 * Locate the IOAPIC that manages the ISA IRQ. 1215 */ 1216 ioapic = mp_find_ioapic(gsi); 1217 if (ioapic < 0) 1218 continue; 1219 pin = mp_find_ioapic_pin(ioapic, gsi); 1220 dstapic = mpc_ioapic_id(ioapic); 1221 1222 for (idx = 0; idx < mp_irq_entries; idx++) { 1223 struct mpc_intsrc *irq = mp_irqs + idx; 1224 1225 /* Do we already have a mapping for this ISA IRQ? */ 1226 if (irq->srcbus == MP_ISA_BUS && irq->srcbusirq == i) 1227 break; 1228 1229 /* Do we already have a mapping for this IOAPIC pin */ 1230 if (irq->dstapic == dstapic && irq->dstirq == pin) 1231 break; 1232 } 1233 1234 if (idx != mp_irq_entries) { 1235 pr_debug("ACPI: IRQ%d used by override.\n", i); 1236 continue; /* IRQ already used */ 1237 } 1238 1239 mp_irq.type = MP_INTSRC; 1240 mp_irq.irqflag = 0; /* Conforming */ 1241 mp_irq.srcbus = MP_ISA_BUS; 1242 mp_irq.dstapic = dstapic; 1243 mp_irq.irqtype = mp_INT; 1244 mp_irq.srcbusirq = i; /* Identity mapped */ 1245 mp_irq.dstirq = pin; 1246 1247 mp_save_irq(&mp_irq); 1248 } 1249 } 1250 1251 /* 1252 * Parse IOAPIC related entries in MADT 1253 * returns 0 on success, < 0 on error 1254 */ 1255 static int __init acpi_parse_madt_ioapic_entries(void) 1256 { 1257 int count; 1258 1259 /* 1260 * ACPI interpreter is required to complete interrupt setup, 1261 * so if it is off, don't enumerate the io-apics with ACPI. 1262 * If MPS is present, it will handle them, 1263 * otherwise the system will stay in PIC mode 1264 */ 1265 if (acpi_disabled || acpi_noirq) 1266 return -ENODEV; 1267 1268 if (!boot_cpu_has(X86_FEATURE_APIC)) 1269 return -ENODEV; 1270 1271 /* 1272 * if "noapic" boot option, don't look for IO-APICs 1273 */ 1274 if (ioapic_is_disabled) { 1275 pr_info("Skipping IOAPIC probe due to 'noapic' option.\n"); 1276 return -ENODEV; 1277 } 1278 1279 count = acpi_table_parse_madt(ACPI_MADT_TYPE_IO_APIC, acpi_parse_ioapic, 1280 MAX_IO_APICS); 1281 if (!count) { 1282 pr_err("No IOAPIC entries present\n"); 1283 return -ENODEV; 1284 } else if (count < 0) { 1285 pr_err("Error parsing IOAPIC entry\n"); 1286 return count; 1287 } 1288 1289 count = acpi_table_parse_madt(ACPI_MADT_TYPE_INTERRUPT_OVERRIDE, 1290 acpi_parse_int_src_ovr, nr_irqs); 1291 if (count < 0) { 1292 pr_err("Error parsing interrupt source overrides entry\n"); 1293 /* TBD: Cleanup to allow fallback to MPS */ 1294 return count; 1295 } 1296 1297 /* 1298 * If BIOS did not supply an INT_SRC_OVR for the SCI 1299 * pretend we got one so we can set the SCI flags. 1300 * But ignore setting up SCI on hardware reduced platforms. 1301 */ 1302 if (acpi_sci_override_gsi == INVALID_ACPI_IRQ && !acpi_gbl_reduced_hardware) 1303 acpi_sci_ioapic_setup(acpi_gbl_FADT.sci_interrupt, 0, 0, 1304 acpi_gbl_FADT.sci_interrupt); 1305 1306 /* Fill in identity legacy mappings where no override */ 1307 mp_config_acpi_legacy_irqs(); 1308 1309 count = acpi_table_parse_madt(ACPI_MADT_TYPE_NMI_SOURCE, 1310 acpi_parse_nmi_src, nr_irqs); 1311 if (count < 0) { 1312 pr_err("Error parsing NMI SRC entry\n"); 1313 /* TBD: Cleanup to allow fallback to MPS */ 1314 return count; 1315 } 1316 1317 return 0; 1318 } 1319 #else 1320 static inline int acpi_parse_madt_ioapic_entries(void) 1321 { 1322 return -1; 1323 } 1324 #endif /* !CONFIG_X86_IO_APIC */ 1325 1326 static void __init early_acpi_process_madt(void) 1327 { 1328 #ifdef CONFIG_X86_LOCAL_APIC 1329 int error; 1330 1331 if (!acpi_table_parse(ACPI_SIG_MADT, acpi_parse_madt)) { 1332 1333 /* 1334 * Parse MADT LAPIC entries 1335 */ 1336 error = early_acpi_parse_madt_lapic_addr_ovr(); 1337 if (!error) { 1338 acpi_lapic = 1; 1339 smp_found_config = 1; 1340 } 1341 if (error == -EINVAL) { 1342 /* 1343 * Dell Precision Workstation 410, 610 come here. 1344 */ 1345 pr_err("Invalid BIOS MADT, disabling ACPI\n"); 1346 disable_acpi(); 1347 } 1348 } 1349 #endif 1350 } 1351 1352 static void __init acpi_process_madt(void) 1353 { 1354 #ifdef CONFIG_X86_LOCAL_APIC 1355 int error; 1356 1357 if (!acpi_table_parse(ACPI_SIG_MADT, acpi_parse_madt)) { 1358 1359 /* 1360 * Parse MADT LAPIC entries 1361 */ 1362 error = acpi_parse_madt_lapic_entries(); 1363 if (!error) { 1364 acpi_lapic = 1; 1365 1366 /* 1367 * Parse MADT IO-APIC entries 1368 */ 1369 mutex_lock(&acpi_ioapic_lock); 1370 error = acpi_parse_madt_ioapic_entries(); 1371 mutex_unlock(&acpi_ioapic_lock); 1372 if (!error) { 1373 acpi_set_irq_model_ioapic(); 1374 1375 smp_found_config = 1; 1376 } 1377 1378 #ifdef CONFIG_X86_64 1379 /* 1380 * Parse MADT MP Wake entry. 1381 */ 1382 acpi_table_parse_madt(ACPI_MADT_TYPE_MULTIPROC_WAKEUP, 1383 acpi_parse_mp_wake, 1); 1384 #endif 1385 } 1386 if (error == -EINVAL) { 1387 /* 1388 * Dell Precision Workstation 410, 610 come here. 1389 */ 1390 pr_err("Invalid BIOS MADT, disabling ACPI\n"); 1391 disable_acpi(); 1392 } 1393 } else { 1394 /* 1395 * ACPI found no MADT, and so ACPI wants UP PIC mode. 1396 * In the event an MPS table was found, forget it. 1397 * Boot with "acpi=off" to use MPS on such a system. 1398 */ 1399 if (smp_found_config) { 1400 pr_warn("No APIC-table, disabling MPS\n"); 1401 smp_found_config = 0; 1402 } 1403 } 1404 1405 /* 1406 * ACPI supports both logical (e.g. Hyper-Threading) and physical 1407 * processors, where MPS only supports physical. 1408 */ 1409 if (acpi_lapic && acpi_ioapic) 1410 pr_info("Using ACPI (MADT) for SMP configuration information\n"); 1411 else if (acpi_lapic) 1412 pr_info("Using ACPI for processor (LAPIC) configuration information\n"); 1413 #endif 1414 return; 1415 } 1416 1417 static int __init disable_acpi_irq(const struct dmi_system_id *d) 1418 { 1419 if (!acpi_force) { 1420 pr_notice("%s detected: force use of acpi=noirq\n", d->ident); 1421 acpi_noirq_set(); 1422 } 1423 return 0; 1424 } 1425 1426 static int __init disable_acpi_pci(const struct dmi_system_id *d) 1427 { 1428 if (!acpi_force) { 1429 pr_notice("%s detected: force use of pci=noacpi\n", d->ident); 1430 acpi_disable_pci(); 1431 } 1432 return 0; 1433 } 1434 1435 static int __init disable_acpi_xsdt(const struct dmi_system_id *d) 1436 { 1437 if (!acpi_force) { 1438 pr_notice("%s detected: force use of acpi=rsdt\n", d->ident); 1439 acpi_gbl_do_not_use_xsdt = TRUE; 1440 } else { 1441 pr_notice("Warning: DMI blacklist says broken, but acpi XSDT forced\n"); 1442 } 1443 return 0; 1444 } 1445 1446 static int __init dmi_disable_acpi(const struct dmi_system_id *d) 1447 { 1448 if (!acpi_force) { 1449 pr_notice("%s detected: acpi off\n", d->ident); 1450 disable_acpi(); 1451 } else { 1452 pr_notice("Warning: DMI blacklist says broken, but acpi forced\n"); 1453 } 1454 return 0; 1455 } 1456 1457 /* 1458 * Force ignoring BIOS IRQ0 override 1459 */ 1460 static int __init dmi_ignore_irq0_timer_override(const struct dmi_system_id *d) 1461 { 1462 if (!acpi_skip_timer_override) { 1463 pr_notice("%s detected: Ignoring BIOS IRQ0 override\n", 1464 d->ident); 1465 acpi_skip_timer_override = 1; 1466 } 1467 return 0; 1468 } 1469 1470 /* 1471 * ACPI offers an alternative platform interface model that removes 1472 * ACPI hardware requirements for platforms that do not implement 1473 * the PC Architecture. 1474 * 1475 * We initialize the Hardware-reduced ACPI model here: 1476 */ 1477 void __init acpi_generic_reduced_hw_init(void) 1478 { 1479 /* 1480 * Override x86_init functions and bypass legacy PIC in 1481 * hardware reduced ACPI mode. 1482 */ 1483 x86_init.timers.timer_init = x86_init_noop; 1484 x86_init.irqs.pre_vector_init = x86_init_noop; 1485 legacy_pic = &null_legacy_pic; 1486 } 1487 1488 static void __init acpi_reduced_hw_init(void) 1489 { 1490 if (acpi_gbl_reduced_hardware) 1491 x86_init.acpi.reduced_hw_early_init(); 1492 } 1493 1494 /* 1495 * If your system is blacklisted here, but you find that acpi=force 1496 * works for you, please contact linux-acpi@vger.kernel.org 1497 */ 1498 static const struct dmi_system_id acpi_dmi_table[] __initconst = { 1499 /* 1500 * Boxes that need ACPI disabled 1501 */ 1502 { 1503 .callback = dmi_disable_acpi, 1504 .ident = "IBM Thinkpad", 1505 .matches = { 1506 DMI_MATCH(DMI_BOARD_VENDOR, "IBM"), 1507 DMI_MATCH(DMI_BOARD_NAME, "2629H1G"), 1508 }, 1509 }, 1510 1511 /* 1512 * Boxes that need ACPI PCI IRQ routing disabled 1513 */ 1514 { 1515 .callback = disable_acpi_irq, 1516 .ident = "ASUS A7V", 1517 .matches = { 1518 DMI_MATCH(DMI_BOARD_VENDOR, "ASUSTeK Computer INC"), 1519 DMI_MATCH(DMI_BOARD_NAME, "<A7V>"), 1520 /* newer BIOS, Revision 1011, does work */ 1521 DMI_MATCH(DMI_BIOS_VERSION, 1522 "ASUS A7V ACPI BIOS Revision 1007"), 1523 }, 1524 }, 1525 { 1526 /* 1527 * Latest BIOS for IBM 600E (1.16) has bad pcinum 1528 * for LPC bridge, which is needed for the PCI 1529 * interrupt links to work. DSDT fix is in bug 5966. 1530 * 2645, 2646 model numbers are shared with 600/600E/600X 1531 */ 1532 .callback = disable_acpi_irq, 1533 .ident = "IBM Thinkpad 600 Series 2645", 1534 .matches = { 1535 DMI_MATCH(DMI_BOARD_VENDOR, "IBM"), 1536 DMI_MATCH(DMI_BOARD_NAME, "2645"), 1537 }, 1538 }, 1539 { 1540 .callback = disable_acpi_irq, 1541 .ident = "IBM Thinkpad 600 Series 2646", 1542 .matches = { 1543 DMI_MATCH(DMI_BOARD_VENDOR, "IBM"), 1544 DMI_MATCH(DMI_BOARD_NAME, "2646"), 1545 }, 1546 }, 1547 /* 1548 * Boxes that need ACPI PCI IRQ routing and PCI scan disabled 1549 */ 1550 { /* _BBN 0 bug */ 1551 .callback = disable_acpi_pci, 1552 .ident = "ASUS PR-DLS", 1553 .matches = { 1554 DMI_MATCH(DMI_BOARD_VENDOR, "ASUSTeK Computer INC."), 1555 DMI_MATCH(DMI_BOARD_NAME, "PR-DLS"), 1556 DMI_MATCH(DMI_BIOS_VERSION, 1557 "ASUS PR-DLS ACPI BIOS Revision 1010"), 1558 DMI_MATCH(DMI_BIOS_DATE, "03/21/2003") 1559 }, 1560 }, 1561 { 1562 .callback = disable_acpi_pci, 1563 .ident = "Acer TravelMate 36x Laptop", 1564 .matches = { 1565 DMI_MATCH(DMI_SYS_VENDOR, "Acer"), 1566 DMI_MATCH(DMI_PRODUCT_NAME, "TravelMate 360"), 1567 }, 1568 }, 1569 /* 1570 * Boxes that need ACPI XSDT use disabled due to corrupted tables 1571 */ 1572 { 1573 .callback = disable_acpi_xsdt, 1574 .ident = "Advantech DAC-BJ01", 1575 .matches = { 1576 DMI_MATCH(DMI_SYS_VENDOR, "NEC"), 1577 DMI_MATCH(DMI_PRODUCT_NAME, "Bearlake CRB Board"), 1578 DMI_MATCH(DMI_BIOS_VERSION, "V1.12"), 1579 DMI_MATCH(DMI_BIOS_DATE, "02/01/2011"), 1580 }, 1581 }, 1582 {} 1583 }; 1584 1585 /* second table for DMI checks that should run after early-quirks */ 1586 static const struct dmi_system_id acpi_dmi_table_late[] __initconst = { 1587 /* 1588 * HP laptops which use a DSDT reporting as HP/SB400/10000, 1589 * which includes some code which overrides all temperature 1590 * trip points to 16C if the INTIN2 input of the I/O APIC 1591 * is enabled. This input is incorrectly designated the 1592 * ISA IRQ 0 via an interrupt source override even though 1593 * it is wired to the output of the master 8259A and INTIN0 1594 * is not connected at all. Force ignoring BIOS IRQ0 1595 * override in that cases. 1596 */ 1597 { 1598 .callback = dmi_ignore_irq0_timer_override, 1599 .ident = "HP nx6115 laptop", 1600 .matches = { 1601 DMI_MATCH(DMI_SYS_VENDOR, "Hewlett-Packard"), 1602 DMI_MATCH(DMI_PRODUCT_NAME, "HP Compaq nx6115"), 1603 }, 1604 }, 1605 { 1606 .callback = dmi_ignore_irq0_timer_override, 1607 .ident = "HP NX6125 laptop", 1608 .matches = { 1609 DMI_MATCH(DMI_SYS_VENDOR, "Hewlett-Packard"), 1610 DMI_MATCH(DMI_PRODUCT_NAME, "HP Compaq nx6125"), 1611 }, 1612 }, 1613 { 1614 .callback = dmi_ignore_irq0_timer_override, 1615 .ident = "HP NX6325 laptop", 1616 .matches = { 1617 DMI_MATCH(DMI_SYS_VENDOR, "Hewlett-Packard"), 1618 DMI_MATCH(DMI_PRODUCT_NAME, "HP Compaq nx6325"), 1619 }, 1620 }, 1621 { 1622 .callback = dmi_ignore_irq0_timer_override, 1623 .ident = "HP 6715b laptop", 1624 .matches = { 1625 DMI_MATCH(DMI_SYS_VENDOR, "Hewlett-Packard"), 1626 DMI_MATCH(DMI_PRODUCT_NAME, "HP Compaq 6715b"), 1627 }, 1628 }, 1629 { 1630 .callback = dmi_ignore_irq0_timer_override, 1631 .ident = "FUJITSU SIEMENS", 1632 .matches = { 1633 DMI_MATCH(DMI_SYS_VENDOR, "FUJITSU SIEMENS"), 1634 DMI_MATCH(DMI_PRODUCT_NAME, "AMILO PRO V2030"), 1635 }, 1636 }, 1637 {} 1638 }; 1639 1640 /* 1641 * acpi_boot_table_init() and acpi_boot_init() 1642 * called from setup_arch(), always. 1643 * 1. checksums all tables 1644 * 2. enumerates lapics 1645 * 3. enumerates io-apics 1646 * 1647 * acpi_table_init() is separate to allow reading SRAT without 1648 * other side effects. 1649 * 1650 * side effects of acpi_boot_init: 1651 * acpi_lapic = 1 if LAPIC found 1652 * acpi_ioapic = 1 if IOAPIC found 1653 * if (acpi_lapic && acpi_ioapic) smp_found_config = 1; 1654 * if acpi_blacklisted() acpi_disabled = 1; 1655 * acpi_irq_model=... 1656 * ... 1657 */ 1658 1659 void __init acpi_boot_table_init(void) 1660 { 1661 dmi_check_system(acpi_dmi_table); 1662 1663 /* 1664 * If acpi_disabled, bail out 1665 */ 1666 if (acpi_disabled) 1667 return; 1668 1669 /* 1670 * Initialize the ACPI boot-time table parser. 1671 */ 1672 if (acpi_locate_initial_tables()) 1673 disable_acpi(); 1674 else 1675 acpi_reserve_initial_tables(); 1676 } 1677 1678 int __init early_acpi_boot_init(void) 1679 { 1680 if (acpi_disabled) 1681 return 1; 1682 1683 acpi_table_init_complete(); 1684 1685 acpi_table_parse(ACPI_SIG_BOOT, acpi_parse_sbf); 1686 1687 /* 1688 * blacklist may disable ACPI entirely 1689 */ 1690 if (acpi_blacklisted()) { 1691 if (acpi_force) { 1692 pr_warn("acpi=force override\n"); 1693 } else { 1694 pr_warn("Disabling ACPI support\n"); 1695 disable_acpi(); 1696 return 1; 1697 } 1698 } 1699 1700 /* 1701 * Process the Multiple APIC Description Table (MADT), if present 1702 */ 1703 early_acpi_process_madt(); 1704 1705 /* 1706 * Hardware-reduced ACPI mode initialization: 1707 */ 1708 acpi_reduced_hw_init(); 1709 1710 return 0; 1711 } 1712 1713 int __init acpi_boot_init(void) 1714 { 1715 /* those are executed after early-quirks are executed */ 1716 dmi_check_system(acpi_dmi_table_late); 1717 1718 /* 1719 * If acpi_disabled, bail out 1720 */ 1721 if (acpi_disabled) 1722 return 1; 1723 1724 acpi_table_parse(ACPI_SIG_BOOT, acpi_parse_sbf); 1725 1726 /* 1727 * set sci_int and PM timer address 1728 */ 1729 acpi_table_parse(ACPI_SIG_FADT, acpi_parse_fadt); 1730 1731 /* 1732 * Process the Multiple APIC Description Table (MADT), if present 1733 */ 1734 acpi_process_madt(); 1735 1736 acpi_table_parse(ACPI_SIG_HPET, acpi_parse_hpet); 1737 if (IS_ENABLED(CONFIG_ACPI_BGRT) && !acpi_nobgrt) 1738 acpi_table_parse(ACPI_SIG_BGRT, acpi_parse_bgrt); 1739 1740 if (!acpi_noirq) 1741 x86_init.pci.init = pci_acpi_init; 1742 1743 /* Do not enable ACPI SPCR console by default */ 1744 acpi_parse_spcr(earlycon_acpi_spcr_enable, false); 1745 return 0; 1746 } 1747 1748 static int __init parse_acpi(char *arg) 1749 { 1750 if (!arg) 1751 return -EINVAL; 1752 1753 /* "acpi=off" disables both ACPI table parsing and interpreter */ 1754 if (strcmp(arg, "off") == 0) { 1755 disable_acpi(); 1756 } 1757 /* acpi=force to over-ride black-list */ 1758 else if (strcmp(arg, "force") == 0) { 1759 acpi_force = 1; 1760 acpi_disabled = 0; 1761 } 1762 /* acpi=strict disables out-of-spec workarounds */ 1763 else if (strcmp(arg, "strict") == 0) { 1764 acpi_strict = 1; 1765 } 1766 /* acpi=rsdt use RSDT instead of XSDT */ 1767 else if (strcmp(arg, "rsdt") == 0) { 1768 acpi_gbl_do_not_use_xsdt = TRUE; 1769 } 1770 /* "acpi=noirq" disables ACPI interrupt routing */ 1771 else if (strcmp(arg, "noirq") == 0) { 1772 acpi_noirq_set(); 1773 } 1774 /* "acpi=copy_dsdt" copies DSDT */ 1775 else if (strcmp(arg, "copy_dsdt") == 0) { 1776 acpi_gbl_copy_dsdt_locally = 1; 1777 } 1778 /* "acpi=nocmcff" disables FF mode for corrected errors */ 1779 else if (strcmp(arg, "nocmcff") == 0) { 1780 acpi_disable_cmcff = 1; 1781 } else { 1782 /* Core will printk when we return error. */ 1783 return -EINVAL; 1784 } 1785 return 0; 1786 } 1787 early_param("acpi", parse_acpi); 1788 1789 static int __init parse_acpi_bgrt(char *arg) 1790 { 1791 acpi_nobgrt = true; 1792 return 0; 1793 } 1794 early_param("bgrt_disable", parse_acpi_bgrt); 1795 1796 /* FIXME: Using pci= for an ACPI parameter is a travesty. */ 1797 static int __init parse_pci(char *arg) 1798 { 1799 if (arg && strcmp(arg, "noacpi") == 0) 1800 acpi_disable_pci(); 1801 return 0; 1802 } 1803 early_param("pci", parse_pci); 1804 1805 int __init acpi_mps_check(void) 1806 { 1807 #if defined(CONFIG_X86_LOCAL_APIC) && !defined(CONFIG_X86_MPPARSE) 1808 /* mptable code is not built-in*/ 1809 if (acpi_disabled || acpi_noirq) { 1810 pr_warn("MPS support code is not built-in, using acpi=off or acpi=noirq or pci=noacpi may have problem\n"); 1811 return 1; 1812 } 1813 #endif 1814 return 0; 1815 } 1816 1817 #ifdef CONFIG_X86_IO_APIC 1818 static int __init parse_acpi_skip_timer_override(char *arg) 1819 { 1820 acpi_skip_timer_override = 1; 1821 return 0; 1822 } 1823 early_param("acpi_skip_timer_override", parse_acpi_skip_timer_override); 1824 1825 static int __init parse_acpi_use_timer_override(char *arg) 1826 { 1827 acpi_use_timer_override = 1; 1828 return 0; 1829 } 1830 early_param("acpi_use_timer_override", parse_acpi_use_timer_override); 1831 #endif /* CONFIG_X86_IO_APIC */ 1832 1833 static int __init setup_acpi_sci(char *s) 1834 { 1835 if (!s) 1836 return -EINVAL; 1837 if (!strcmp(s, "edge")) 1838 acpi_sci_flags = ACPI_MADT_TRIGGER_EDGE | 1839 (acpi_sci_flags & ~ACPI_MADT_TRIGGER_MASK); 1840 else if (!strcmp(s, "level")) 1841 acpi_sci_flags = ACPI_MADT_TRIGGER_LEVEL | 1842 (acpi_sci_flags & ~ACPI_MADT_TRIGGER_MASK); 1843 else if (!strcmp(s, "high")) 1844 acpi_sci_flags = ACPI_MADT_POLARITY_ACTIVE_HIGH | 1845 (acpi_sci_flags & ~ACPI_MADT_POLARITY_MASK); 1846 else if (!strcmp(s, "low")) 1847 acpi_sci_flags = ACPI_MADT_POLARITY_ACTIVE_LOW | 1848 (acpi_sci_flags & ~ACPI_MADT_POLARITY_MASK); 1849 else 1850 return -EINVAL; 1851 return 0; 1852 } 1853 early_param("acpi_sci", setup_acpi_sci); 1854 1855 int __acpi_acquire_global_lock(unsigned int *lock) 1856 { 1857 unsigned int old, new, val; 1858 1859 old = READ_ONCE(*lock); 1860 do { 1861 val = (old >> 1) & 0x1; 1862 new = (old & ~0x3) + 2 + val; 1863 } while (!try_cmpxchg(lock, &old, new)); 1864 1865 if (val) 1866 return 0; 1867 1868 return -1; 1869 } 1870 1871 int __acpi_release_global_lock(unsigned int *lock) 1872 { 1873 unsigned int old, new; 1874 1875 old = READ_ONCE(*lock); 1876 do { 1877 new = old & ~0x3; 1878 } while (!try_cmpxchg(lock, &old, new)); 1879 return old & 0x1; 1880 } 1881 1882 void __init arch_reserve_mem_area(acpi_physical_address addr, size_t size) 1883 { 1884 e820__range_add(addr, size, E820_TYPE_NVS); 1885 e820__update_table_print(); 1886 } 1887 1888 void x86_default_set_root_pointer(u64 addr) 1889 { 1890 boot_params.acpi_rsdp_addr = addr; 1891 } 1892 1893 u64 x86_default_get_root_pointer(void) 1894 { 1895 return boot_params.acpi_rsdp_addr; 1896 } 1897