xref: /openbmc/linux/arch/x86/include/uapi/asm/kvm.h (revision cabce92d)
1 /* SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note */
2 #ifndef _ASM_X86_KVM_H
3 #define _ASM_X86_KVM_H
4 
5 /*
6  * KVM x86 specific structures and definitions
7  *
8  */
9 
10 #include <linux/types.h>
11 #include <linux/ioctl.h>
12 #include <linux/stddef.h>
13 
14 #define KVM_PIO_PAGE_OFFSET 1
15 #define KVM_COALESCED_MMIO_PAGE_OFFSET 2
16 #define KVM_DIRTY_LOG_PAGE_OFFSET 64
17 
18 #define DE_VECTOR 0
19 #define DB_VECTOR 1
20 #define BP_VECTOR 3
21 #define OF_VECTOR 4
22 #define BR_VECTOR 5
23 #define UD_VECTOR 6
24 #define NM_VECTOR 7
25 #define DF_VECTOR 8
26 #define TS_VECTOR 10
27 #define NP_VECTOR 11
28 #define SS_VECTOR 12
29 #define GP_VECTOR 13
30 #define PF_VECTOR 14
31 #define MF_VECTOR 16
32 #define AC_VECTOR 17
33 #define MC_VECTOR 18
34 #define XM_VECTOR 19
35 #define VE_VECTOR 20
36 
37 /* Select x86 specific features in <linux/kvm.h> */
38 #define __KVM_HAVE_PIT
39 #define __KVM_HAVE_IOAPIC
40 #define __KVM_HAVE_IRQ_LINE
41 #define __KVM_HAVE_MSI
42 #define __KVM_HAVE_USER_NMI
43 #define __KVM_HAVE_GUEST_DEBUG
44 #define __KVM_HAVE_MSIX
45 #define __KVM_HAVE_MCE
46 #define __KVM_HAVE_PIT_STATE2
47 #define __KVM_HAVE_XEN_HVM
48 #define __KVM_HAVE_VCPU_EVENTS
49 #define __KVM_HAVE_DEBUGREGS
50 #define __KVM_HAVE_XSAVE
51 #define __KVM_HAVE_XCRS
52 #define __KVM_HAVE_READONLY_MEM
53 
54 /* Architectural interrupt line count. */
55 #define KVM_NR_INTERRUPTS 256
56 
57 /* for KVM_GET_IRQCHIP and KVM_SET_IRQCHIP */
58 struct kvm_pic_state {
59 	__u8 last_irr;	/* edge detection */
60 	__u8 irr;		/* interrupt request register */
61 	__u8 imr;		/* interrupt mask register */
62 	__u8 isr;		/* interrupt service register */
63 	__u8 priority_add;	/* highest irq priority */
64 	__u8 irq_base;
65 	__u8 read_reg_select;
66 	__u8 poll;
67 	__u8 special_mask;
68 	__u8 init_state;
69 	__u8 auto_eoi;
70 	__u8 rotate_on_auto_eoi;
71 	__u8 special_fully_nested_mode;
72 	__u8 init4;		/* true if 4 byte init */
73 	__u8 elcr;		/* PIIX edge/trigger selection */
74 	__u8 elcr_mask;
75 };
76 
77 #define KVM_IOAPIC_NUM_PINS  24
78 struct kvm_ioapic_state {
79 	__u64 base_address;
80 	__u32 ioregsel;
81 	__u32 id;
82 	__u32 irr;
83 	__u32 pad;
84 	union {
85 		__u64 bits;
86 		struct {
87 			__u8 vector;
88 			__u8 delivery_mode:3;
89 			__u8 dest_mode:1;
90 			__u8 delivery_status:1;
91 			__u8 polarity:1;
92 			__u8 remote_irr:1;
93 			__u8 trig_mode:1;
94 			__u8 mask:1;
95 			__u8 reserve:7;
96 			__u8 reserved[4];
97 			__u8 dest_id;
98 		} fields;
99 	} redirtbl[KVM_IOAPIC_NUM_PINS];
100 };
101 
102 #define KVM_IRQCHIP_PIC_MASTER   0
103 #define KVM_IRQCHIP_PIC_SLAVE    1
104 #define KVM_IRQCHIP_IOAPIC       2
105 #define KVM_NR_IRQCHIPS          3
106 
107 #define KVM_RUN_X86_SMM		 (1 << 0)
108 #define KVM_RUN_X86_BUS_LOCK     (1 << 1)
109 
110 /* for KVM_GET_REGS and KVM_SET_REGS */
111 struct kvm_regs {
112 	/* out (KVM_GET_REGS) / in (KVM_SET_REGS) */
113 	__u64 rax, rbx, rcx, rdx;
114 	__u64 rsi, rdi, rsp, rbp;
115 	__u64 r8,  r9,  r10, r11;
116 	__u64 r12, r13, r14, r15;
117 	__u64 rip, rflags;
118 };
119 
120 /* for KVM_GET_LAPIC and KVM_SET_LAPIC */
121 #define KVM_APIC_REG_SIZE 0x400
122 struct kvm_lapic_state {
123 	char regs[KVM_APIC_REG_SIZE];
124 };
125 
126 struct kvm_segment {
127 	__u64 base;
128 	__u32 limit;
129 	__u16 selector;
130 	__u8  type;
131 	__u8  present, dpl, db, s, l, g, avl;
132 	__u8  unusable;
133 	__u8  padding;
134 };
135 
136 struct kvm_dtable {
137 	__u64 base;
138 	__u16 limit;
139 	__u16 padding[3];
140 };
141 
142 
143 /* for KVM_GET_SREGS and KVM_SET_SREGS */
144 struct kvm_sregs {
145 	/* out (KVM_GET_SREGS) / in (KVM_SET_SREGS) */
146 	struct kvm_segment cs, ds, es, fs, gs, ss;
147 	struct kvm_segment tr, ldt;
148 	struct kvm_dtable gdt, idt;
149 	__u64 cr0, cr2, cr3, cr4, cr8;
150 	__u64 efer;
151 	__u64 apic_base;
152 	__u64 interrupt_bitmap[(KVM_NR_INTERRUPTS + 63) / 64];
153 };
154 
155 struct kvm_sregs2 {
156 	/* out (KVM_GET_SREGS2) / in (KVM_SET_SREGS2) */
157 	struct kvm_segment cs, ds, es, fs, gs, ss;
158 	struct kvm_segment tr, ldt;
159 	struct kvm_dtable gdt, idt;
160 	__u64 cr0, cr2, cr3, cr4, cr8;
161 	__u64 efer;
162 	__u64 apic_base;
163 	__u64 flags;
164 	__u64 pdptrs[4];
165 };
166 #define KVM_SREGS2_FLAGS_PDPTRS_VALID 1
167 
168 /* for KVM_GET_FPU and KVM_SET_FPU */
169 struct kvm_fpu {
170 	__u8  fpr[8][16];
171 	__u16 fcw;
172 	__u16 fsw;
173 	__u8  ftwx;  /* in fxsave format */
174 	__u8  pad1;
175 	__u16 last_opcode;
176 	__u64 last_ip;
177 	__u64 last_dp;
178 	__u8  xmm[16][16];
179 	__u32 mxcsr;
180 	__u32 pad2;
181 };
182 
183 struct kvm_msr_entry {
184 	__u32 index;
185 	__u32 reserved;
186 	__u64 data;
187 };
188 
189 /* for KVM_GET_MSRS and KVM_SET_MSRS */
190 struct kvm_msrs {
191 	__u32 nmsrs; /* number of msrs in entries */
192 	__u32 pad;
193 
194 	struct kvm_msr_entry entries[];
195 };
196 
197 /* for KVM_GET_MSR_INDEX_LIST */
198 struct kvm_msr_list {
199 	__u32 nmsrs; /* number of msrs in entries */
200 	__u32 indices[];
201 };
202 
203 /* Maximum size of any access bitmap in bytes */
204 #define KVM_MSR_FILTER_MAX_BITMAP_SIZE 0x600
205 
206 /* for KVM_X86_SET_MSR_FILTER */
207 struct kvm_msr_filter_range {
208 #define KVM_MSR_FILTER_READ  (1 << 0)
209 #define KVM_MSR_FILTER_WRITE (1 << 1)
210 #define KVM_MSR_FILTER_RANGE_VALID_MASK (KVM_MSR_FILTER_READ | \
211 					 KVM_MSR_FILTER_WRITE)
212 	__u32 flags;
213 	__u32 nmsrs; /* number of msrs in bitmap */
214 	__u32 base;  /* MSR index the bitmap starts at */
215 	__u8 *bitmap; /* a 1 bit allows the operations in flags, 0 denies */
216 };
217 
218 #define KVM_MSR_FILTER_MAX_RANGES 16
219 struct kvm_msr_filter {
220 #ifndef __KERNEL__
221 #define KVM_MSR_FILTER_DEFAULT_ALLOW (0 << 0)
222 #endif
223 #define KVM_MSR_FILTER_DEFAULT_DENY  (1 << 0)
224 #define KVM_MSR_FILTER_VALID_MASK (KVM_MSR_FILTER_DEFAULT_DENY)
225 	__u32 flags;
226 	struct kvm_msr_filter_range ranges[KVM_MSR_FILTER_MAX_RANGES];
227 };
228 
229 struct kvm_cpuid_entry {
230 	__u32 function;
231 	__u32 eax;
232 	__u32 ebx;
233 	__u32 ecx;
234 	__u32 edx;
235 	__u32 padding;
236 };
237 
238 /* for KVM_SET_CPUID */
239 struct kvm_cpuid {
240 	__u32 nent;
241 	__u32 padding;
242 	struct kvm_cpuid_entry entries[];
243 };
244 
245 struct kvm_cpuid_entry2 {
246 	__u32 function;
247 	__u32 index;
248 	__u32 flags;
249 	__u32 eax;
250 	__u32 ebx;
251 	__u32 ecx;
252 	__u32 edx;
253 	__u32 padding[3];
254 };
255 
256 #define KVM_CPUID_FLAG_SIGNIFCANT_INDEX		(1 << 0)
257 #define KVM_CPUID_FLAG_STATEFUL_FUNC		(1 << 1)
258 #define KVM_CPUID_FLAG_STATE_READ_NEXT		(1 << 2)
259 
260 /* for KVM_SET_CPUID2 */
261 struct kvm_cpuid2 {
262 	__u32 nent;
263 	__u32 padding;
264 	struct kvm_cpuid_entry2 entries[];
265 };
266 
267 /* for KVM_GET_PIT and KVM_SET_PIT */
268 struct kvm_pit_channel_state {
269 	__u32 count; /* can be 65536 */
270 	__u16 latched_count;
271 	__u8 count_latched;
272 	__u8 status_latched;
273 	__u8 status;
274 	__u8 read_state;
275 	__u8 write_state;
276 	__u8 write_latch;
277 	__u8 rw_mode;
278 	__u8 mode;
279 	__u8 bcd;
280 	__u8 gate;
281 	__s64 count_load_time;
282 };
283 
284 struct kvm_debug_exit_arch {
285 	__u32 exception;
286 	__u32 pad;
287 	__u64 pc;
288 	__u64 dr6;
289 	__u64 dr7;
290 };
291 
292 #define KVM_GUESTDBG_USE_SW_BP		0x00010000
293 #define KVM_GUESTDBG_USE_HW_BP		0x00020000
294 #define KVM_GUESTDBG_INJECT_DB		0x00040000
295 #define KVM_GUESTDBG_INJECT_BP		0x00080000
296 #define KVM_GUESTDBG_BLOCKIRQ		0x00100000
297 
298 /* for KVM_SET_GUEST_DEBUG */
299 struct kvm_guest_debug_arch {
300 	__u64 debugreg[8];
301 };
302 
303 struct kvm_pit_state {
304 	struct kvm_pit_channel_state channels[3];
305 };
306 
307 #define KVM_PIT_FLAGS_HPET_LEGACY     0x00000001
308 #define KVM_PIT_FLAGS_SPEAKER_DATA_ON 0x00000002
309 
310 struct kvm_pit_state2 {
311 	struct kvm_pit_channel_state channels[3];
312 	__u32 flags;
313 	__u32 reserved[9];
314 };
315 
316 struct kvm_reinject_control {
317 	__u8 pit_reinject;
318 	__u8 reserved[31];
319 };
320 
321 /* When set in flags, include corresponding fields on KVM_SET_VCPU_EVENTS */
322 #define KVM_VCPUEVENT_VALID_NMI_PENDING	0x00000001
323 #define KVM_VCPUEVENT_VALID_SIPI_VECTOR	0x00000002
324 #define KVM_VCPUEVENT_VALID_SHADOW	0x00000004
325 #define KVM_VCPUEVENT_VALID_SMM		0x00000008
326 #define KVM_VCPUEVENT_VALID_PAYLOAD	0x00000010
327 #define KVM_VCPUEVENT_VALID_TRIPLE_FAULT	0x00000020
328 
329 /* Interrupt shadow states */
330 #define KVM_X86_SHADOW_INT_MOV_SS	0x01
331 #define KVM_X86_SHADOW_INT_STI		0x02
332 
333 /* for KVM_GET/SET_VCPU_EVENTS */
334 struct kvm_vcpu_events {
335 	struct {
336 		__u8 injected;
337 		__u8 nr;
338 		__u8 has_error_code;
339 		__u8 pending;
340 		__u32 error_code;
341 	} exception;
342 	struct {
343 		__u8 injected;
344 		__u8 nr;
345 		__u8 soft;
346 		__u8 shadow;
347 	} interrupt;
348 	struct {
349 		__u8 injected;
350 		__u8 pending;
351 		__u8 masked;
352 		__u8 pad;
353 	} nmi;
354 	__u32 sipi_vector;
355 	__u32 flags;
356 	struct {
357 		__u8 smm;
358 		__u8 pending;
359 		__u8 smm_inside_nmi;
360 		__u8 latched_init;
361 	} smi;
362 	struct {
363 		__u8 pending;
364 	} triple_fault;
365 	__u8 reserved[26];
366 	__u8 exception_has_payload;
367 	__u64 exception_payload;
368 };
369 
370 /* for KVM_GET/SET_DEBUGREGS */
371 struct kvm_debugregs {
372 	__u64 db[4];
373 	__u64 dr6;
374 	__u64 dr7;
375 	__u64 flags;
376 	__u64 reserved[9];
377 };
378 
379 /* for KVM_CAP_XSAVE and KVM_CAP_XSAVE2 */
380 struct kvm_xsave {
381 	/*
382 	 * KVM_GET_XSAVE2 and KVM_SET_XSAVE write and read as many bytes
383 	 * as are returned by KVM_CHECK_EXTENSION(KVM_CAP_XSAVE2)
384 	 * respectively, when invoked on the vm file descriptor.
385 	 *
386 	 * The size value returned by KVM_CHECK_EXTENSION(KVM_CAP_XSAVE2)
387 	 * will always be at least 4096. Currently, it is only greater
388 	 * than 4096 if a dynamic feature has been enabled with
389 	 * ``arch_prctl()``, but this may change in the future.
390 	 *
391 	 * The offsets of the state save areas in struct kvm_xsave follow
392 	 * the contents of CPUID leaf 0xD on the host.
393 	 */
394 	__u32 region[1024];
395 	__u32 extra[];
396 };
397 
398 #define KVM_MAX_XCRS	16
399 
400 struct kvm_xcr {
401 	__u32 xcr;
402 	__u32 reserved;
403 	__u64 value;
404 };
405 
406 struct kvm_xcrs {
407 	__u32 nr_xcrs;
408 	__u32 flags;
409 	struct kvm_xcr xcrs[KVM_MAX_XCRS];
410 	__u64 padding[16];
411 };
412 
413 #define KVM_SYNC_X86_REGS      (1UL << 0)
414 #define KVM_SYNC_X86_SREGS     (1UL << 1)
415 #define KVM_SYNC_X86_EVENTS    (1UL << 2)
416 
417 #define KVM_SYNC_X86_VALID_FIELDS \
418 	(KVM_SYNC_X86_REGS| \
419 	 KVM_SYNC_X86_SREGS| \
420 	 KVM_SYNC_X86_EVENTS)
421 
422 /* kvm_sync_regs struct included by kvm_run struct */
423 struct kvm_sync_regs {
424 	/* Members of this structure are potentially malicious.
425 	 * Care must be taken by code reading, esp. interpreting,
426 	 * data fields from them inside KVM to prevent TOCTOU and
427 	 * double-fetch types of vulnerabilities.
428 	 */
429 	struct kvm_regs regs;
430 	struct kvm_sregs sregs;
431 	struct kvm_vcpu_events events;
432 };
433 
434 #define KVM_X86_QUIRK_LINT0_REENABLED		(1 << 0)
435 #define KVM_X86_QUIRK_CD_NW_CLEARED		(1 << 1)
436 #define KVM_X86_QUIRK_LAPIC_MMIO_HOLE		(1 << 2)
437 #define KVM_X86_QUIRK_OUT_7E_INC_RIP		(1 << 3)
438 #define KVM_X86_QUIRK_MISC_ENABLE_NO_MWAIT	(1 << 4)
439 #define KVM_X86_QUIRK_FIX_HYPERCALL_INSN	(1 << 5)
440 #define KVM_X86_QUIRK_MWAIT_NEVER_UD_FAULTS	(1 << 6)
441 
442 #define KVM_STATE_NESTED_FORMAT_VMX	0
443 #define KVM_STATE_NESTED_FORMAT_SVM	1
444 
445 #define KVM_STATE_NESTED_GUEST_MODE	0x00000001
446 #define KVM_STATE_NESTED_RUN_PENDING	0x00000002
447 #define KVM_STATE_NESTED_EVMCS		0x00000004
448 #define KVM_STATE_NESTED_MTF_PENDING	0x00000008
449 #define KVM_STATE_NESTED_GIF_SET	0x00000100
450 
451 #define KVM_STATE_NESTED_SMM_GUEST_MODE	0x00000001
452 #define KVM_STATE_NESTED_SMM_VMXON	0x00000002
453 
454 #define KVM_STATE_NESTED_VMX_VMCS_SIZE	0x1000
455 
456 #define KVM_STATE_NESTED_SVM_VMCB_SIZE	0x1000
457 
458 #define KVM_STATE_VMX_PREEMPTION_TIMER_DEADLINE	0x00000001
459 
460 /* attributes for system fd (group 0) */
461 #define KVM_X86_XCOMP_GUEST_SUPP	0
462 
463 struct kvm_vmx_nested_state_data {
464 	__u8 vmcs12[KVM_STATE_NESTED_VMX_VMCS_SIZE];
465 	__u8 shadow_vmcs12[KVM_STATE_NESTED_VMX_VMCS_SIZE];
466 };
467 
468 struct kvm_vmx_nested_state_hdr {
469 	__u64 vmxon_pa;
470 	__u64 vmcs12_pa;
471 
472 	struct {
473 		__u16 flags;
474 	} smm;
475 
476 	__u16 pad;
477 
478 	__u32 flags;
479 	__u64 preemption_timer_deadline;
480 };
481 
482 struct kvm_svm_nested_state_data {
483 	/* Save area only used if KVM_STATE_NESTED_RUN_PENDING.  */
484 	__u8 vmcb12[KVM_STATE_NESTED_SVM_VMCB_SIZE];
485 };
486 
487 struct kvm_svm_nested_state_hdr {
488 	__u64 vmcb_pa;
489 };
490 
491 /* for KVM_CAP_NESTED_STATE */
492 struct kvm_nested_state {
493 	__u16 flags;
494 	__u16 format;
495 	__u32 size;
496 
497 	union {
498 		struct kvm_vmx_nested_state_hdr vmx;
499 		struct kvm_svm_nested_state_hdr svm;
500 
501 		/* Pad the header to 128 bytes.  */
502 		__u8 pad[120];
503 	} hdr;
504 
505 	/*
506 	 * Define data region as 0 bytes to preserve backwards-compatability
507 	 * to old definition of kvm_nested_state in order to avoid changing
508 	 * KVM_{GET,PUT}_NESTED_STATE ioctl values.
509 	 */
510 	union {
511 		__DECLARE_FLEX_ARRAY(struct kvm_vmx_nested_state_data, vmx);
512 		__DECLARE_FLEX_ARRAY(struct kvm_svm_nested_state_data, svm);
513 	} data;
514 };
515 
516 /* for KVM_CAP_PMU_EVENT_FILTER */
517 struct kvm_pmu_event_filter {
518 	__u32 action;
519 	__u32 nevents;
520 	__u32 fixed_counter_bitmap;
521 	__u32 flags;
522 	__u32 pad[4];
523 	__u64 events[];
524 };
525 
526 #define KVM_PMU_EVENT_ALLOW 0
527 #define KVM_PMU_EVENT_DENY 1
528 
529 #define KVM_PMU_EVENT_FLAG_MASKED_EVENTS BIT(0)
530 #define KVM_PMU_EVENT_FLAGS_VALID_MASK (KVM_PMU_EVENT_FLAG_MASKED_EVENTS)
531 
532 /*
533  * Masked event layout.
534  * Bits   Description
535  * ----   -----------
536  * 7:0    event select (low bits)
537  * 15:8   umask match
538  * 31:16  unused
539  * 35:32  event select (high bits)
540  * 36:54  unused
541  * 55     exclude bit
542  * 63:56  umask mask
543  */
544 
545 #define KVM_PMU_ENCODE_MASKED_ENTRY(event_select, mask, match, exclude) \
546 	(((event_select) & 0xFFULL) | (((event_select) & 0XF00ULL) << 24) | \
547 	(((mask) & 0xFFULL) << 56) | \
548 	(((match) & 0xFFULL) << 8) | \
549 	((__u64)(!!(exclude)) << 55))
550 
551 #define KVM_PMU_MASKED_ENTRY_EVENT_SELECT \
552 	(GENMASK_ULL(7, 0) | GENMASK_ULL(35, 32))
553 #define KVM_PMU_MASKED_ENTRY_UMASK_MASK		(GENMASK_ULL(63, 56))
554 #define KVM_PMU_MASKED_ENTRY_UMASK_MATCH	(GENMASK_ULL(15, 8))
555 #define KVM_PMU_MASKED_ENTRY_EXCLUDE		(BIT_ULL(55))
556 #define KVM_PMU_MASKED_ENTRY_UMASK_MASK_SHIFT	(56)
557 
558 /* for KVM_{GET,SET,HAS}_DEVICE_ATTR */
559 #define KVM_VCPU_TSC_CTRL 0 /* control group for the timestamp counter (TSC) */
560 #define   KVM_VCPU_TSC_OFFSET 0 /* attribute for the TSC offset */
561 
562 /* x86-specific KVM_EXIT_HYPERCALL flags. */
563 #define KVM_EXIT_HYPERCALL_LONG_MODE	BIT(0)
564 
565 #endif /* _ASM_X86_KVM_H */
566