1 /* SPDX-License-Identifier: GPL-2.0 */ 2 #ifndef _ASM_X86_PLATFORM_H 3 #define _ASM_X86_PLATFORM_H 4 5 #include <asm/bootparam.h> 6 7 struct ghcb; 8 struct mpc_bus; 9 struct mpc_cpu; 10 struct pt_regs; 11 struct mpc_table; 12 struct cpuinfo_x86; 13 struct irq_domain; 14 15 /** 16 * struct x86_init_mpparse - platform specific mpparse ops 17 * @setup_ioapic_ids: platform specific ioapic id override 18 * @find_smp_config: find the smp configuration 19 * @get_smp_config: get the smp configuration 20 */ 21 struct x86_init_mpparse { 22 void (*setup_ioapic_ids)(void); 23 void (*find_smp_config)(void); 24 void (*get_smp_config)(unsigned int early); 25 }; 26 27 /** 28 * struct x86_init_resources - platform specific resource related ops 29 * @probe_roms: probe BIOS roms 30 * @reserve_resources: reserve the standard resources for the 31 * platform 32 * @memory_setup: platform specific memory setup 33 * 34 */ 35 struct x86_init_resources { 36 void (*probe_roms)(void); 37 void (*reserve_resources)(void); 38 char *(*memory_setup)(void); 39 }; 40 41 /** 42 * struct x86_init_irqs - platform specific interrupt setup 43 * @pre_vector_init: init code to run before interrupt vectors 44 * are set up. 45 * @intr_init: interrupt init code 46 * @intr_mode_select: interrupt delivery mode selection 47 * @intr_mode_init: interrupt delivery mode setup 48 * @create_pci_msi_domain: Create the PCI/MSI interrupt domain 49 */ 50 struct x86_init_irqs { 51 void (*pre_vector_init)(void); 52 void (*intr_init)(void); 53 void (*intr_mode_select)(void); 54 void (*intr_mode_init)(void); 55 struct irq_domain *(*create_pci_msi_domain)(void); 56 }; 57 58 /** 59 * struct x86_init_oem - oem platform specific customizing functions 60 * @arch_setup: platform specific architecture setup 61 * @banner: print a platform specific banner 62 */ 63 struct x86_init_oem { 64 void (*arch_setup)(void); 65 void (*banner)(void); 66 }; 67 68 /** 69 * struct x86_init_paging - platform specific paging functions 70 * @pagetable_init: platform specific paging initialization call to setup 71 * the kernel pagetables and prepare accessors functions. 72 * Callback must call paging_init(). Called once after the 73 * direct mapping for phys memory is available. 74 */ 75 struct x86_init_paging { 76 void (*pagetable_init)(void); 77 }; 78 79 /** 80 * struct x86_init_timers - platform specific timer setup 81 * @setup_perpcu_clockev: set up the per cpu clock event device for the 82 * boot cpu 83 * @timer_init: initialize the platform timer (default PIT/HPET) 84 * @wallclock_init: init the wallclock device 85 */ 86 struct x86_init_timers { 87 void (*setup_percpu_clockev)(void); 88 void (*timer_init)(void); 89 void (*wallclock_init)(void); 90 }; 91 92 /** 93 * struct x86_init_iommu - platform specific iommu setup 94 * @iommu_init: platform specific iommu setup 95 */ 96 struct x86_init_iommu { 97 int (*iommu_init)(void); 98 }; 99 100 /** 101 * struct x86_init_pci - platform specific pci init functions 102 * @arch_init: platform specific pci arch init call 103 * @init: platform specific pci subsystem init 104 * @init_irq: platform specific pci irq init 105 * @fixup_irqs: platform specific pci irq fixup 106 */ 107 struct x86_init_pci { 108 int (*arch_init)(void); 109 int (*init)(void); 110 void (*init_irq)(void); 111 void (*fixup_irqs)(void); 112 }; 113 114 /** 115 * struct x86_hyper_init - x86 hypervisor init functions 116 * @init_platform: platform setup 117 * @guest_late_init: guest late init 118 * @x2apic_available: X2APIC detection 119 * @msi_ext_dest_id: MSI supports 15-bit APIC IDs 120 * @init_mem_mapping: setup early mappings during init_mem_mapping() 121 * @init_after_bootmem: guest init after boot allocator is finished 122 */ 123 struct x86_hyper_init { 124 void (*init_platform)(void); 125 void (*guest_late_init)(void); 126 bool (*x2apic_available)(void); 127 bool (*msi_ext_dest_id)(void); 128 void (*init_mem_mapping)(void); 129 void (*init_after_bootmem)(void); 130 }; 131 132 /** 133 * struct x86_init_acpi - x86 ACPI init functions 134 * @set_root_poitner: set RSDP address 135 * @get_root_pointer: get RSDP address 136 * @reduced_hw_early_init: hardware reduced platform early init 137 */ 138 struct x86_init_acpi { 139 void (*set_root_pointer)(u64 addr); 140 u64 (*get_root_pointer)(void); 141 void (*reduced_hw_early_init)(void); 142 }; 143 144 /** 145 * struct x86_init_ops - functions for platform specific setup 146 * 147 */ 148 struct x86_init_ops { 149 struct x86_init_resources resources; 150 struct x86_init_mpparse mpparse; 151 struct x86_init_irqs irqs; 152 struct x86_init_oem oem; 153 struct x86_init_paging paging; 154 struct x86_init_timers timers; 155 struct x86_init_iommu iommu; 156 struct x86_init_pci pci; 157 struct x86_hyper_init hyper; 158 struct x86_init_acpi acpi; 159 }; 160 161 /** 162 * struct x86_cpuinit_ops - platform specific cpu hotplug setups 163 * @setup_percpu_clockev: set up the per cpu clock event device 164 * @early_percpu_clock_init: early init of the per cpu clock event device 165 */ 166 struct x86_cpuinit_ops { 167 void (*setup_percpu_clockev)(void); 168 void (*early_percpu_clock_init)(void); 169 void (*fixup_cpu_id)(struct cpuinfo_x86 *c, int node); 170 }; 171 172 struct timespec64; 173 174 /** 175 * struct x86_legacy_devices - legacy x86 devices 176 * 177 * @pnpbios: this platform can have a PNPBIOS. If this is disabled the platform 178 * is known to never have a PNPBIOS. 179 * 180 * These are devices known to require LPC or ISA bus. The definition of legacy 181 * devices adheres to the ACPI 5.2.9.3 IA-PC Boot Architecture flag 182 * ACPI_FADT_LEGACY_DEVICES. These devices consist of user visible devices on 183 * the LPC or ISA bus. User visible devices are devices that have end-user 184 * accessible connectors (for example, LPT parallel port). Legacy devices on 185 * the LPC bus consist for example of serial and parallel ports, PS/2 keyboard 186 * / mouse, and the floppy disk controller. A system that lacks all known 187 * legacy devices can assume all devices can be detected exclusively via 188 * standard device enumeration mechanisms including the ACPI namespace. 189 * 190 * A system which has does not have ACPI_FADT_LEGACY_DEVICES enabled must not 191 * have any of the legacy devices enumerated below present. 192 */ 193 struct x86_legacy_devices { 194 int pnpbios; 195 }; 196 197 /** 198 * enum x86_legacy_i8042_state - i8042 keyboard controller state 199 * @X86_LEGACY_I8042_PLATFORM_ABSENT: the controller is always absent on 200 * given platform/subarch. 201 * @X86_LEGACY_I8042_FIRMWARE_ABSENT: firmware reports that the controller 202 * is absent. 203 * @X86_LEGACY_i8042_EXPECTED_PRESENT: the controller is likely to be 204 * present, the i8042 driver should probe for controller existence. 205 */ 206 enum x86_legacy_i8042_state { 207 X86_LEGACY_I8042_PLATFORM_ABSENT, 208 X86_LEGACY_I8042_FIRMWARE_ABSENT, 209 X86_LEGACY_I8042_EXPECTED_PRESENT, 210 }; 211 212 /** 213 * struct x86_legacy_features - legacy x86 features 214 * 215 * @i8042: indicated if we expect the device to have i8042 controller 216 * present. 217 * @rtc: this device has a CMOS real-time clock present 218 * @reserve_bios_regions: boot code will search for the EBDA address and the 219 * start of the 640k - 1M BIOS region. If false, the platform must 220 * ensure that its memory map correctly reserves sub-1MB regions as needed. 221 * @devices: legacy x86 devices, refer to struct x86_legacy_devices 222 * documentation for further details. 223 */ 224 struct x86_legacy_features { 225 enum x86_legacy_i8042_state i8042; 226 int rtc; 227 int warm_reset; 228 int no_vga; 229 int reserve_bios_regions; 230 struct x86_legacy_devices devices; 231 }; 232 233 /** 234 * struct x86_hyper_runtime - x86 hypervisor specific runtime callbacks 235 * 236 * @pin_vcpu: pin current vcpu to specified physical 237 * cpu (run rarely) 238 * @sev_es_hcall_prepare: Load additional hypervisor-specific 239 * state into the GHCB when doing a VMMCALL under 240 * SEV-ES. Called from the #VC exception handler. 241 * @sev_es_hcall_finish: Copies state from the GHCB back into the 242 * processor (or pt_regs). Also runs checks on the 243 * state returned from the hypervisor after a 244 * VMMCALL under SEV-ES. Needs to return 'false' 245 * if the checks fail. Called from the #VC 246 * exception handler. 247 */ 248 struct x86_hyper_runtime { 249 void (*pin_vcpu)(int cpu); 250 void (*sev_es_hcall_prepare)(struct ghcb *ghcb, struct pt_regs *regs); 251 bool (*sev_es_hcall_finish)(struct ghcb *ghcb, struct pt_regs *regs); 252 }; 253 254 /** 255 * struct x86_platform_ops - platform specific runtime functions 256 * @calibrate_cpu: calibrate CPU 257 * @calibrate_tsc: calibrate TSC, if different from CPU 258 * @get_wallclock: get time from HW clock like RTC etc. 259 * @set_wallclock: set time back to HW clock 260 * @is_untracked_pat_range exclude from PAT logic 261 * @nmi_init enable NMI on cpus 262 * @save_sched_clock_state: save state for sched_clock() on suspend 263 * @restore_sched_clock_state: restore state for sched_clock() on resume 264 * @apic_post_init: adjust apic if needed 265 * @legacy: legacy features 266 * @set_legacy_features: override legacy features. Use of this callback 267 * is highly discouraged. You should only need 268 * this if your hardware platform requires further 269 * custom fine tuning far beyond what may be 270 * possible in x86_early_init_platform_quirks() by 271 * only using the current x86_hardware_subarch 272 * semantics. 273 * @hyper: x86 hypervisor specific runtime callbacks 274 */ 275 struct x86_platform_ops { 276 unsigned long (*calibrate_cpu)(void); 277 unsigned long (*calibrate_tsc)(void); 278 void (*get_wallclock)(struct timespec64 *ts); 279 int (*set_wallclock)(const struct timespec64 *ts); 280 void (*iommu_shutdown)(void); 281 bool (*is_untracked_pat_range)(u64 start, u64 end); 282 void (*nmi_init)(void); 283 unsigned char (*get_nmi_reason)(void); 284 void (*save_sched_clock_state)(void); 285 void (*restore_sched_clock_state)(void); 286 void (*apic_post_init)(void); 287 struct x86_legacy_features legacy; 288 void (*set_legacy_features)(void); 289 struct x86_hyper_runtime hyper; 290 }; 291 292 struct pci_dev; 293 294 struct x86_msi_ops { 295 void (*restore_msi_irqs)(struct pci_dev *dev); 296 }; 297 298 struct x86_apic_ops { 299 unsigned int (*io_apic_read) (unsigned int apic, unsigned int reg); 300 void (*restore)(void); 301 }; 302 303 extern struct x86_init_ops x86_init; 304 extern struct x86_cpuinit_ops x86_cpuinit; 305 extern struct x86_platform_ops x86_platform; 306 extern struct x86_msi_ops x86_msi; 307 extern struct x86_apic_ops x86_apic_ops; 308 309 extern void x86_early_init_platform_quirks(void); 310 extern void x86_init_noop(void); 311 extern void x86_init_uint_noop(unsigned int unused); 312 extern bool bool_x86_init_noop(void); 313 extern void x86_op_int_noop(int cpu); 314 extern bool x86_pnpbios_disabled(void); 315 316 #endif 317