1 /* SPDX-License-Identifier: GPL-2.0 */ 2 #ifndef _ASM_X86_PLATFORM_H 3 #define _ASM_X86_PLATFORM_H 4 5 #include <asm/bootparam.h> 6 7 struct mpc_bus; 8 struct mpc_cpu; 9 struct mpc_table; 10 struct cpuinfo_x86; 11 struct irq_domain; 12 13 /** 14 * struct x86_init_mpparse - platform specific mpparse ops 15 * @setup_ioapic_ids: platform specific ioapic id override 16 * @find_smp_config: find the smp configuration 17 * @get_smp_config: get the smp configuration 18 */ 19 struct x86_init_mpparse { 20 void (*setup_ioapic_ids)(void); 21 void (*find_smp_config)(void); 22 void (*get_smp_config)(unsigned int early); 23 }; 24 25 /** 26 * struct x86_init_resources - platform specific resource related ops 27 * @probe_roms: probe BIOS roms 28 * @reserve_resources: reserve the standard resources for the 29 * platform 30 * @memory_setup: platform specific memory setup 31 * 32 */ 33 struct x86_init_resources { 34 void (*probe_roms)(void); 35 void (*reserve_resources)(void); 36 char *(*memory_setup)(void); 37 }; 38 39 /** 40 * struct x86_init_irqs - platform specific interrupt setup 41 * @pre_vector_init: init code to run before interrupt vectors 42 * are set up. 43 * @intr_init: interrupt init code 44 * @intr_mode_select: interrupt delivery mode selection 45 * @intr_mode_init: interrupt delivery mode setup 46 * @create_pci_msi_domain: Create the PCI/MSI interrupt domain 47 */ 48 struct x86_init_irqs { 49 void (*pre_vector_init)(void); 50 void (*intr_init)(void); 51 void (*intr_mode_select)(void); 52 void (*intr_mode_init)(void); 53 struct irq_domain *(*create_pci_msi_domain)(void); 54 }; 55 56 /** 57 * struct x86_init_oem - oem platform specific customizing functions 58 * @arch_setup: platform specific architecture setup 59 * @banner: print a platform specific banner 60 */ 61 struct x86_init_oem { 62 void (*arch_setup)(void); 63 void (*banner)(void); 64 }; 65 66 /** 67 * struct x86_init_paging - platform specific paging functions 68 * @pagetable_init: platform specific paging initialization call to setup 69 * the kernel pagetables and prepare accessors functions. 70 * Callback must call paging_init(). Called once after the 71 * direct mapping for phys memory is available. 72 */ 73 struct x86_init_paging { 74 void (*pagetable_init)(void); 75 }; 76 77 /** 78 * struct x86_init_timers - platform specific timer setup 79 * @setup_perpcu_clockev: set up the per cpu clock event device for the 80 * boot cpu 81 * @timer_init: initialize the platform timer (default PIT/HPET) 82 * @wallclock_init: init the wallclock device 83 */ 84 struct x86_init_timers { 85 void (*setup_percpu_clockev)(void); 86 void (*timer_init)(void); 87 void (*wallclock_init)(void); 88 }; 89 90 /** 91 * struct x86_init_iommu - platform specific iommu setup 92 * @iommu_init: platform specific iommu setup 93 */ 94 struct x86_init_iommu { 95 int (*iommu_init)(void); 96 }; 97 98 /** 99 * struct x86_init_pci - platform specific pci init functions 100 * @arch_init: platform specific pci arch init call 101 * @init: platform specific pci subsystem init 102 * @init_irq: platform specific pci irq init 103 * @fixup_irqs: platform specific pci irq fixup 104 */ 105 struct x86_init_pci { 106 int (*arch_init)(void); 107 int (*init)(void); 108 void (*init_irq)(void); 109 void (*fixup_irqs)(void); 110 }; 111 112 /** 113 * struct x86_hyper_init - x86 hypervisor init functions 114 * @init_platform: platform setup 115 * @guest_late_init: guest late init 116 * @x2apic_available: X2APIC detection 117 * @init_mem_mapping: setup early mappings during init_mem_mapping() 118 * @init_after_bootmem: guest init after boot allocator is finished 119 */ 120 struct x86_hyper_init { 121 void (*init_platform)(void); 122 void (*guest_late_init)(void); 123 bool (*x2apic_available)(void); 124 void (*init_mem_mapping)(void); 125 void (*init_after_bootmem)(void); 126 }; 127 128 /** 129 * struct x86_init_acpi - x86 ACPI init functions 130 * @set_root_poitner: set RSDP address 131 * @get_root_pointer: get RSDP address 132 * @reduced_hw_early_init: hardware reduced platform early init 133 */ 134 struct x86_init_acpi { 135 void (*set_root_pointer)(u64 addr); 136 u64 (*get_root_pointer)(void); 137 void (*reduced_hw_early_init)(void); 138 }; 139 140 /** 141 * struct x86_init_ops - functions for platform specific setup 142 * 143 */ 144 struct x86_init_ops { 145 struct x86_init_resources resources; 146 struct x86_init_mpparse mpparse; 147 struct x86_init_irqs irqs; 148 struct x86_init_oem oem; 149 struct x86_init_paging paging; 150 struct x86_init_timers timers; 151 struct x86_init_iommu iommu; 152 struct x86_init_pci pci; 153 struct x86_hyper_init hyper; 154 struct x86_init_acpi acpi; 155 }; 156 157 /** 158 * struct x86_cpuinit_ops - platform specific cpu hotplug setups 159 * @setup_percpu_clockev: set up the per cpu clock event device 160 * @early_percpu_clock_init: early init of the per cpu clock event device 161 */ 162 struct x86_cpuinit_ops { 163 void (*setup_percpu_clockev)(void); 164 void (*early_percpu_clock_init)(void); 165 void (*fixup_cpu_id)(struct cpuinfo_x86 *c, int node); 166 }; 167 168 struct timespec64; 169 170 /** 171 * struct x86_legacy_devices - legacy x86 devices 172 * 173 * @pnpbios: this platform can have a PNPBIOS. If this is disabled the platform 174 * is known to never have a PNPBIOS. 175 * 176 * These are devices known to require LPC or ISA bus. The definition of legacy 177 * devices adheres to the ACPI 5.2.9.3 IA-PC Boot Architecture flag 178 * ACPI_FADT_LEGACY_DEVICES. These devices consist of user visible devices on 179 * the LPC or ISA bus. User visible devices are devices that have end-user 180 * accessible connectors (for example, LPT parallel port). Legacy devices on 181 * the LPC bus consist for example of serial and parallel ports, PS/2 keyboard 182 * / mouse, and the floppy disk controller. A system that lacks all known 183 * legacy devices can assume all devices can be detected exclusively via 184 * standard device enumeration mechanisms including the ACPI namespace. 185 * 186 * A system which has does not have ACPI_FADT_LEGACY_DEVICES enabled must not 187 * have any of the legacy devices enumerated below present. 188 */ 189 struct x86_legacy_devices { 190 int pnpbios; 191 }; 192 193 /** 194 * enum x86_legacy_i8042_state - i8042 keyboard controller state 195 * @X86_LEGACY_I8042_PLATFORM_ABSENT: the controller is always absent on 196 * given platform/subarch. 197 * @X86_LEGACY_I8042_FIRMWARE_ABSENT: firmware reports that the controller 198 * is absent. 199 * @X86_LEGACY_i8042_EXPECTED_PRESENT: the controller is likely to be 200 * present, the i8042 driver should probe for controller existence. 201 */ 202 enum x86_legacy_i8042_state { 203 X86_LEGACY_I8042_PLATFORM_ABSENT, 204 X86_LEGACY_I8042_FIRMWARE_ABSENT, 205 X86_LEGACY_I8042_EXPECTED_PRESENT, 206 }; 207 208 /** 209 * struct x86_legacy_features - legacy x86 features 210 * 211 * @i8042: indicated if we expect the device to have i8042 controller 212 * present. 213 * @rtc: this device has a CMOS real-time clock present 214 * @reserve_bios_regions: boot code will search for the EBDA address and the 215 * start of the 640k - 1M BIOS region. If false, the platform must 216 * ensure that its memory map correctly reserves sub-1MB regions as needed. 217 * @devices: legacy x86 devices, refer to struct x86_legacy_devices 218 * documentation for further details. 219 */ 220 struct x86_legacy_features { 221 enum x86_legacy_i8042_state i8042; 222 int rtc; 223 int warm_reset; 224 int no_vga; 225 int reserve_bios_regions; 226 struct x86_legacy_devices devices; 227 }; 228 229 /** 230 * struct x86_hyper_runtime - x86 hypervisor specific runtime callbacks 231 * 232 * @pin_vcpu: pin current vcpu to specified physical cpu (run rarely) 233 */ 234 struct x86_hyper_runtime { 235 void (*pin_vcpu)(int cpu); 236 }; 237 238 /** 239 * struct x86_platform_ops - platform specific runtime functions 240 * @calibrate_cpu: calibrate CPU 241 * @calibrate_tsc: calibrate TSC, if different from CPU 242 * @get_wallclock: get time from HW clock like RTC etc. 243 * @set_wallclock: set time back to HW clock 244 * @is_untracked_pat_range exclude from PAT logic 245 * @nmi_init enable NMI on cpus 246 * @save_sched_clock_state: save state for sched_clock() on suspend 247 * @restore_sched_clock_state: restore state for sched_clock() on resume 248 * @apic_post_init: adjust apic if needed 249 * @legacy: legacy features 250 * @set_legacy_features: override legacy features. Use of this callback 251 * is highly discouraged. You should only need 252 * this if your hardware platform requires further 253 * custom fine tuning far beyond what may be 254 * possible in x86_early_init_platform_quirks() by 255 * only using the current x86_hardware_subarch 256 * semantics. 257 * @hyper: x86 hypervisor specific runtime callbacks 258 */ 259 struct x86_platform_ops { 260 unsigned long (*calibrate_cpu)(void); 261 unsigned long (*calibrate_tsc)(void); 262 void (*get_wallclock)(struct timespec64 *ts); 263 int (*set_wallclock)(const struct timespec64 *ts); 264 void (*iommu_shutdown)(void); 265 bool (*is_untracked_pat_range)(u64 start, u64 end); 266 void (*nmi_init)(void); 267 unsigned char (*get_nmi_reason)(void); 268 void (*save_sched_clock_state)(void); 269 void (*restore_sched_clock_state)(void); 270 void (*apic_post_init)(void); 271 struct x86_legacy_features legacy; 272 void (*set_legacy_features)(void); 273 struct x86_hyper_runtime hyper; 274 }; 275 276 struct pci_dev; 277 278 struct x86_msi_ops { 279 int (*setup_msi_irqs)(struct pci_dev *dev, int nvec, int type); 280 void (*teardown_msi_irqs)(struct pci_dev *dev); 281 void (*restore_msi_irqs)(struct pci_dev *dev); 282 }; 283 284 struct x86_apic_ops { 285 unsigned int (*io_apic_read) (unsigned int apic, unsigned int reg); 286 void (*restore)(void); 287 }; 288 289 extern struct x86_init_ops x86_init; 290 extern struct x86_cpuinit_ops x86_cpuinit; 291 extern struct x86_platform_ops x86_platform; 292 extern struct x86_msi_ops x86_msi; 293 extern struct x86_apic_ops x86_apic_ops; 294 295 extern void x86_early_init_platform_quirks(void); 296 extern void x86_init_noop(void); 297 extern void x86_init_uint_noop(unsigned int unused); 298 extern bool bool_x86_init_noop(void); 299 extern void x86_op_int_noop(int cpu); 300 extern bool x86_pnpbios_disabled(void); 301 302 #endif 303