1bb898558SAl Viro /* 2bb898558SAl Viro * This file is subject to the terms and conditions of the GNU General Public 3bb898558SAl Viro * License. See the file "COPYING" in the main directory of this archive 4bb898558SAl Viro * for more details. 5bb898558SAl Viro * 6647128f1SMike Travis * HPE UV MMR definitions 7bb898558SAl Viro * 87a6d94f0SMike Travis * (C) Copyright 2020 Hewlett Packard Enterprise Development LP 90f0d84c0SMike Travis * Copyright (C) 2007-2016 Silicon Graphics, Inc. All rights reserved. 10bb898558SAl Viro */ 11bb898558SAl Viro 1205e4d316SH. Peter Anvin #ifndef _ASM_X86_UV_UV_MMRS_H 1305e4d316SH. Peter Anvin #define _ASM_X86_UV_UV_MMRS_H 14bb898558SAl Viro 152a919596SJack Steiner /* 1660fe7be3SMike Travis * This file contains MMR definitions for all UV hubs types. 172a919596SJack Steiner * 1860fe7be3SMike Travis * To minimize coding differences between hub types, the symbols are 1960fe7be3SMike Travis * grouped by architecture types. 2060fe7be3SMike Travis * 2160fe7be3SMike Travis * UVH - definitions common to all UV hub types. 22647128f1SMike Travis * UVXH - definitions common to UVX class (2, 3, 4). 23647128f1SMike Travis * UVYH - definitions common to UVY class (5). 24647128f1SMike Travis * UV5H - definitions specific to UV type 5 hub. 25647128f1SMike Travis * UV4AH - definitions specific to UV type 4A hub. 26eb1e3461SMike Travis * UV4H - definitions specific to UV type 4 hub. 27647128f1SMike Travis * UV3H - definitions specific to UV type 3 hub. 28647128f1SMike Travis * UV2H - definitions specific to UV type 2 hub. 292a919596SJack Steiner * 300f0d84c0SMike Travis * If the MMR exists on all hub types but have different addresses, 31647128f1SMike Travis * use a conditional operator to define the value at runtime. Any 32647128f1SMike Travis * that are not defined are blank. 33647128f1SMike Travis * (UV4A variations only generated if different from uv4) 34647128f1SMike Travis * #define UVHxxx ( 35647128f1SMike Travis * is_uv(UV5) ? UV5Hxxx value : 36647128f1SMike Travis * is_uv(UV4A) ? UV4AHxxx value : 37647128f1SMike Travis * is_uv(UV4) ? UV4Hxxx value : 38647128f1SMike Travis * is_uv(UV3) ? UV3Hxxx value : 39647128f1SMike Travis * is_uv(UV2) ? UV2Hxxx value : 40647128f1SMike Travis * <ucv> or <undef value>) 41647128f1SMike Travis * 42647128f1SMike Travis * Class UVX has UVs (2|3|4|4A). 43647128f1SMike Travis * Class UVY has UVs (5). 4460fe7be3SMike Travis * 452a919596SJack Steiner * union uvh_xxx { 462a919596SJack Steiner * unsigned long v; 4760fe7be3SMike Travis * struct uvh_xxx_s { # Common fields only 482a919596SJack Steiner * } s; 49647128f1SMike Travis * struct uv5h_xxx_s { # Full UV5 definition (*) 50647128f1SMike Travis * } s5; 51647128f1SMike Travis * struct uv4ah_xxx_s { # Full UV4A definition (*) 52647128f1SMike Travis * } s4a; 53eb1e3461SMike Travis * struct uv4h_xxx_s { # Full UV4 definition (*) 54eb1e3461SMike Travis * } s4; 55647128f1SMike Travis * struct uv3h_xxx_s { # Full UV3 definition (*) 56647128f1SMike Travis * } s3; 57647128f1SMike Travis * struct uv2h_xxx_s { # Full UV2 definition (*) 58647128f1SMike Travis * } s2; 592a919596SJack Steiner * }; 6060fe7be3SMike Travis * (* - if present and different than the common struct) 612a919596SJack Steiner * 6260fe7be3SMike Travis * Only essential differences are enumerated. For example, if the address is 6360fe7be3SMike Travis * the same for all UV's, only a single #define is generated. Likewise, 6460fe7be3SMike Travis * if the contents is the same for all hubs, only the "s" structure is 652a919596SJack Steiner * generated. 662a919596SJack Steiner * 67647128f1SMike Travis * (GEN Flags: undefs=function) 682a919596SJack Steiner */ 692a919596SJack Steiner 70647128f1SMike Travis /* UV bit masks */ 71647128f1SMike Travis #define UV2 (1 << 0) 72647128f1SMike Travis #define UV3 (1 << 1) 73647128f1SMike Travis #define UV4 (1 << 2) 74647128f1SMike Travis #define UV4A (1 << 3) 75647128f1SMike Travis #define UV5 (1 << 4) 76647128f1SMike Travis #define UVX (UV2|UV3|UV4) 77647128f1SMike Travis #define UVY (UV5) 78647128f1SMike Travis #define UV_ANY (~0) 79647128f1SMike Travis 80647128f1SMike Travis 81647128f1SMike Travis 82647128f1SMike Travis 83bb898558SAl Viro #define UV_MMR_ENABLE (1UL << 63) 84bb898558SAl Viro 85647128f1SMike Travis #define UV1_HUB_PART_NUMBER 0x88a5 862a919596SJack Steiner #define UV2_HUB_PART_NUMBER 0x8eb8 87b495e039SJack Steiner #define UV2_HUB_PART_NUMBER_X 0x1111 8860fe7be3SMike Travis #define UV3_HUB_PART_NUMBER 0x9578 8960fe7be3SMike Travis #define UV3_HUB_PART_NUMBER_X 0x4321 90eb1e3461SMike Travis #define UV4_HUB_PART_NUMBER 0x99a1 91647128f1SMike Travis #define UV5_HUB_PART_NUMBER 0xa171 922a919596SJack Steiner 930f0d84c0SMike Travis /* Error function to catch undefined references */ 940f0d84c0SMike Travis extern unsigned long uv_undefined(char *str); 952a919596SJack Steiner 96bb898558SAl Viro /* ========================================================================= */ 97bb898558SAl Viro /* UVH_EVENT_OCCURRED0 */ 98bb898558SAl Viro /* ========================================================================= */ 99bb898558SAl Viro #define UVH_EVENT_OCCURRED0 0x70000UL 10060fe7be3SMike Travis 101647128f1SMike Travis /* UVH common defines*/ 10260fe7be3SMike Travis #define UVH_EVENT_OCCURRED0_LB_HCERR_SHFT 0 10360fe7be3SMike Travis #define UVH_EVENT_OCCURRED0_LB_HCERR_MASK 0x0000000000000001UL 104bb898558SAl Viro 105647128f1SMike Travis /* UVXH common defines */ 10660fe7be3SMike Travis #define UVXH_EVENT_OCCURRED0_RH_HCERR_SHFT 2 10760fe7be3SMike Travis #define UVXH_EVENT_OCCURRED0_RH_HCERR_MASK 0x0000000000000004UL 108647128f1SMike Travis #define UVXH_EVENT_OCCURRED0_LH0_HCERR_SHFT 3 10960fe7be3SMike Travis #define UVXH_EVENT_OCCURRED0_LH0_HCERR_MASK 0x0000000000000008UL 110647128f1SMike Travis #define UVXH_EVENT_OCCURRED0_LH1_HCERR_SHFT 4 11160fe7be3SMike Travis #define UVXH_EVENT_OCCURRED0_LH1_HCERR_MASK 0x0000000000000010UL 112647128f1SMike Travis #define UVXH_EVENT_OCCURRED0_GR0_HCERR_SHFT 5 11360fe7be3SMike Travis #define UVXH_EVENT_OCCURRED0_GR0_HCERR_MASK 0x0000000000000020UL 114647128f1SMike Travis #define UVXH_EVENT_OCCURRED0_GR1_HCERR_SHFT 6 11560fe7be3SMike Travis #define UVXH_EVENT_OCCURRED0_GR1_HCERR_MASK 0x0000000000000040UL 116647128f1SMike Travis #define UVXH_EVENT_OCCURRED0_NI0_HCERR_SHFT 7 11760fe7be3SMike Travis #define UVXH_EVENT_OCCURRED0_NI0_HCERR_MASK 0x0000000000000080UL 118647128f1SMike Travis #define UVXH_EVENT_OCCURRED0_NI1_HCERR_SHFT 8 11960fe7be3SMike Travis #define UVXH_EVENT_OCCURRED0_NI1_HCERR_MASK 0x0000000000000100UL 120647128f1SMike Travis #define UVXH_EVENT_OCCURRED0_LB_AOERR0_SHFT 9 12160fe7be3SMike Travis #define UVXH_EVENT_OCCURRED0_LB_AOERR0_MASK 0x0000000000000200UL 122647128f1SMike Travis #define UVXH_EVENT_OCCURRED0_RH_AOERR0_SHFT 11 123647128f1SMike Travis #define UVXH_EVENT_OCCURRED0_RH_AOERR0_MASK 0x0000000000000800UL 124647128f1SMike Travis #define UVXH_EVENT_OCCURRED0_LH0_AOERR0_SHFT 12 12560fe7be3SMike Travis #define UVXH_EVENT_OCCURRED0_LH0_AOERR0_MASK 0x0000000000001000UL 126647128f1SMike Travis #define UVXH_EVENT_OCCURRED0_LH1_AOERR0_SHFT 13 12760fe7be3SMike Travis #define UVXH_EVENT_OCCURRED0_LH1_AOERR0_MASK 0x0000000000002000UL 128647128f1SMike Travis #define UVXH_EVENT_OCCURRED0_GR0_AOERR0_SHFT 14 12960fe7be3SMike Travis #define UVXH_EVENT_OCCURRED0_GR0_AOERR0_MASK 0x0000000000004000UL 130647128f1SMike Travis #define UVXH_EVENT_OCCURRED0_GR1_AOERR0_SHFT 15 13160fe7be3SMike Travis #define UVXH_EVENT_OCCURRED0_GR1_AOERR0_MASK 0x0000000000008000UL 132647128f1SMike Travis #define UVXH_EVENT_OCCURRED0_XB_AOERR0_SHFT 16 13360fe7be3SMike Travis #define UVXH_EVENT_OCCURRED0_XB_AOERR0_MASK 0x0000000000010000UL 1340f0d84c0SMike Travis 135647128f1SMike Travis /* UVYH common defines */ 136647128f1SMike Travis #define UVYH_EVENT_OCCURRED0_KT_HCERR_SHFT 1 137647128f1SMike Travis #define UVYH_EVENT_OCCURRED0_KT_HCERR_MASK 0x0000000000000002UL 138647128f1SMike Travis #define UVYH_EVENT_OCCURRED0_RH0_HCERR_SHFT 2 139647128f1SMike Travis #define UVYH_EVENT_OCCURRED0_RH0_HCERR_MASK 0x0000000000000004UL 140647128f1SMike Travis #define UVYH_EVENT_OCCURRED0_RH1_HCERR_SHFT 3 141647128f1SMike Travis #define UVYH_EVENT_OCCURRED0_RH1_HCERR_MASK 0x0000000000000008UL 142647128f1SMike Travis #define UVYH_EVENT_OCCURRED0_LH0_HCERR_SHFT 4 143647128f1SMike Travis #define UVYH_EVENT_OCCURRED0_LH0_HCERR_MASK 0x0000000000000010UL 144647128f1SMike Travis #define UVYH_EVENT_OCCURRED0_LH1_HCERR_SHFT 5 145647128f1SMike Travis #define UVYH_EVENT_OCCURRED0_LH1_HCERR_MASK 0x0000000000000020UL 146647128f1SMike Travis #define UVYH_EVENT_OCCURRED0_LH2_HCERR_SHFT 6 147647128f1SMike Travis #define UVYH_EVENT_OCCURRED0_LH2_HCERR_MASK 0x0000000000000040UL 148647128f1SMike Travis #define UVYH_EVENT_OCCURRED0_LH3_HCERR_SHFT 7 149647128f1SMike Travis #define UVYH_EVENT_OCCURRED0_LH3_HCERR_MASK 0x0000000000000080UL 150647128f1SMike Travis #define UVYH_EVENT_OCCURRED0_XB_HCERR_SHFT 8 151647128f1SMike Travis #define UVYH_EVENT_OCCURRED0_XB_HCERR_MASK 0x0000000000000100UL 152647128f1SMike Travis #define UVYH_EVENT_OCCURRED0_RDM_HCERR_SHFT 9 153647128f1SMike Travis #define UVYH_EVENT_OCCURRED0_RDM_HCERR_MASK 0x0000000000000200UL 154647128f1SMike Travis #define UVYH_EVENT_OCCURRED0_NI0_HCERR_SHFT 10 155647128f1SMike Travis #define UVYH_EVENT_OCCURRED0_NI0_HCERR_MASK 0x0000000000000400UL 156647128f1SMike Travis #define UVYH_EVENT_OCCURRED0_NI1_HCERR_SHFT 11 157647128f1SMike Travis #define UVYH_EVENT_OCCURRED0_NI1_HCERR_MASK 0x0000000000000800UL 158647128f1SMike Travis #define UVYH_EVENT_OCCURRED0_LB_AOERR0_SHFT 12 159647128f1SMike Travis #define UVYH_EVENT_OCCURRED0_LB_AOERR0_MASK 0x0000000000001000UL 160647128f1SMike Travis #define UVYH_EVENT_OCCURRED0_KT_AOERR0_SHFT 13 161647128f1SMike Travis #define UVYH_EVENT_OCCURRED0_KT_AOERR0_MASK 0x0000000000002000UL 162647128f1SMike Travis #define UVYH_EVENT_OCCURRED0_RH0_AOERR0_SHFT 14 163647128f1SMike Travis #define UVYH_EVENT_OCCURRED0_RH0_AOERR0_MASK 0x0000000000004000UL 164647128f1SMike Travis #define UVYH_EVENT_OCCURRED0_RH1_AOERR0_SHFT 15 165647128f1SMike Travis #define UVYH_EVENT_OCCURRED0_RH1_AOERR0_MASK 0x0000000000008000UL 166647128f1SMike Travis #define UVYH_EVENT_OCCURRED0_LH0_AOERR0_SHFT 16 167647128f1SMike Travis #define UVYH_EVENT_OCCURRED0_LH0_AOERR0_MASK 0x0000000000010000UL 168647128f1SMike Travis #define UVYH_EVENT_OCCURRED0_LH1_AOERR0_SHFT 17 169647128f1SMike Travis #define UVYH_EVENT_OCCURRED0_LH1_AOERR0_MASK 0x0000000000020000UL 170647128f1SMike Travis #define UVYH_EVENT_OCCURRED0_LH2_AOERR0_SHFT 18 171647128f1SMike Travis #define UVYH_EVENT_OCCURRED0_LH2_AOERR0_MASK 0x0000000000040000UL 172647128f1SMike Travis #define UVYH_EVENT_OCCURRED0_LH3_AOERR0_SHFT 19 173647128f1SMike Travis #define UVYH_EVENT_OCCURRED0_LH3_AOERR0_MASK 0x0000000000080000UL 174647128f1SMike Travis #define UVYH_EVENT_OCCURRED0_XB_AOERR0_SHFT 20 175647128f1SMike Travis #define UVYH_EVENT_OCCURRED0_XB_AOERR0_MASK 0x0000000000100000UL 176647128f1SMike Travis #define UVYH_EVENT_OCCURRED0_RDM_AOERR0_SHFT 21 177647128f1SMike Travis #define UVYH_EVENT_OCCURRED0_RDM_AOERR0_MASK 0x0000000000200000UL 178647128f1SMike Travis #define UVYH_EVENT_OCCURRED0_RT0_AOERR0_SHFT 22 179647128f1SMike Travis #define UVYH_EVENT_OCCURRED0_RT0_AOERR0_MASK 0x0000000000400000UL 180647128f1SMike Travis #define UVYH_EVENT_OCCURRED0_RT1_AOERR0_SHFT 23 181647128f1SMike Travis #define UVYH_EVENT_OCCURRED0_RT1_AOERR0_MASK 0x0000000000800000UL 182647128f1SMike Travis #define UVYH_EVENT_OCCURRED0_NI0_AOERR0_SHFT 24 183647128f1SMike Travis #define UVYH_EVENT_OCCURRED0_NI0_AOERR0_MASK 0x0000000001000000UL 184647128f1SMike Travis #define UVYH_EVENT_OCCURRED0_NI1_AOERR0_SHFT 25 185647128f1SMike Travis #define UVYH_EVENT_OCCURRED0_NI1_AOERR0_MASK 0x0000000002000000UL 186647128f1SMike Travis #define UVYH_EVENT_OCCURRED0_LB_AOERR1_SHFT 26 187647128f1SMike Travis #define UVYH_EVENT_OCCURRED0_LB_AOERR1_MASK 0x0000000004000000UL 188647128f1SMike Travis #define UVYH_EVENT_OCCURRED0_KT_AOERR1_SHFT 27 189647128f1SMike Travis #define UVYH_EVENT_OCCURRED0_KT_AOERR1_MASK 0x0000000008000000UL 190647128f1SMike Travis #define UVYH_EVENT_OCCURRED0_RH0_AOERR1_SHFT 28 191647128f1SMike Travis #define UVYH_EVENT_OCCURRED0_RH0_AOERR1_MASK 0x0000000010000000UL 192647128f1SMike Travis #define UVYH_EVENT_OCCURRED0_RH1_AOERR1_SHFT 29 193647128f1SMike Travis #define UVYH_EVENT_OCCURRED0_RH1_AOERR1_MASK 0x0000000020000000UL 194647128f1SMike Travis #define UVYH_EVENT_OCCURRED0_LH0_AOERR1_SHFT 30 195647128f1SMike Travis #define UVYH_EVENT_OCCURRED0_LH0_AOERR1_MASK 0x0000000040000000UL 196647128f1SMike Travis #define UVYH_EVENT_OCCURRED0_LH1_AOERR1_SHFT 31 197647128f1SMike Travis #define UVYH_EVENT_OCCURRED0_LH1_AOERR1_MASK 0x0000000080000000UL 198647128f1SMike Travis #define UVYH_EVENT_OCCURRED0_LH2_AOERR1_SHFT 32 199647128f1SMike Travis #define UVYH_EVENT_OCCURRED0_LH2_AOERR1_MASK 0x0000000100000000UL 200647128f1SMike Travis #define UVYH_EVENT_OCCURRED0_LH3_AOERR1_SHFT 33 201647128f1SMike Travis #define UVYH_EVENT_OCCURRED0_LH3_AOERR1_MASK 0x0000000200000000UL 202647128f1SMike Travis #define UVYH_EVENT_OCCURRED0_XB_AOERR1_SHFT 34 203647128f1SMike Travis #define UVYH_EVENT_OCCURRED0_XB_AOERR1_MASK 0x0000000400000000UL 204647128f1SMike Travis #define UVYH_EVENT_OCCURRED0_RDM_AOERR1_SHFT 35 205647128f1SMike Travis #define UVYH_EVENT_OCCURRED0_RDM_AOERR1_MASK 0x0000000800000000UL 206647128f1SMike Travis #define UVYH_EVENT_OCCURRED0_RT0_AOERR1_SHFT 36 207647128f1SMike Travis #define UVYH_EVENT_OCCURRED0_RT0_AOERR1_MASK 0x0000001000000000UL 208647128f1SMike Travis #define UVYH_EVENT_OCCURRED0_RT1_AOERR1_SHFT 37 209647128f1SMike Travis #define UVYH_EVENT_OCCURRED0_RT1_AOERR1_MASK 0x0000002000000000UL 210647128f1SMike Travis #define UVYH_EVENT_OCCURRED0_NI0_AOERR1_SHFT 38 211647128f1SMike Travis #define UVYH_EVENT_OCCURRED0_NI0_AOERR1_MASK 0x0000004000000000UL 212647128f1SMike Travis #define UVYH_EVENT_OCCURRED0_NI1_AOERR1_SHFT 39 213647128f1SMike Travis #define UVYH_EVENT_OCCURRED0_NI1_AOERR1_MASK 0x0000008000000000UL 214647128f1SMike Travis #define UVYH_EVENT_OCCURRED0_SYSTEM_SHUTDOWN_INT_SHFT 40 215647128f1SMike Travis #define UVYH_EVENT_OCCURRED0_SYSTEM_SHUTDOWN_INT_MASK 0x0000010000000000UL 216647128f1SMike Travis #define UVYH_EVENT_OCCURRED0_LB_IRQ_INT_0_SHFT 41 217647128f1SMike Travis #define UVYH_EVENT_OCCURRED0_LB_IRQ_INT_0_MASK 0x0000020000000000UL 218647128f1SMike Travis #define UVYH_EVENT_OCCURRED0_LB_IRQ_INT_1_SHFT 42 219647128f1SMike Travis #define UVYH_EVENT_OCCURRED0_LB_IRQ_INT_1_MASK 0x0000040000000000UL 220647128f1SMike Travis #define UVYH_EVENT_OCCURRED0_LB_IRQ_INT_2_SHFT 43 221647128f1SMike Travis #define UVYH_EVENT_OCCURRED0_LB_IRQ_INT_2_MASK 0x0000080000000000UL 222647128f1SMike Travis #define UVYH_EVENT_OCCURRED0_LB_IRQ_INT_3_SHFT 44 223647128f1SMike Travis #define UVYH_EVENT_OCCURRED0_LB_IRQ_INT_3_MASK 0x0000100000000000UL 224647128f1SMike Travis #define UVYH_EVENT_OCCURRED0_LB_IRQ_INT_4_SHFT 45 225647128f1SMike Travis #define UVYH_EVENT_OCCURRED0_LB_IRQ_INT_4_MASK 0x0000200000000000UL 226647128f1SMike Travis #define UVYH_EVENT_OCCURRED0_LB_IRQ_INT_5_SHFT 46 227647128f1SMike Travis #define UVYH_EVENT_OCCURRED0_LB_IRQ_INT_5_MASK 0x0000400000000000UL 228647128f1SMike Travis #define UVYH_EVENT_OCCURRED0_LB_IRQ_INT_6_SHFT 47 229647128f1SMike Travis #define UVYH_EVENT_OCCURRED0_LB_IRQ_INT_6_MASK 0x0000800000000000UL 230647128f1SMike Travis #define UVYH_EVENT_OCCURRED0_LB_IRQ_INT_7_SHFT 48 231647128f1SMike Travis #define UVYH_EVENT_OCCURRED0_LB_IRQ_INT_7_MASK 0x0001000000000000UL 232647128f1SMike Travis #define UVYH_EVENT_OCCURRED0_LB_IRQ_INT_8_SHFT 49 233647128f1SMike Travis #define UVYH_EVENT_OCCURRED0_LB_IRQ_INT_8_MASK 0x0002000000000000UL 234647128f1SMike Travis #define UVYH_EVENT_OCCURRED0_LB_IRQ_INT_9_SHFT 50 235647128f1SMike Travis #define UVYH_EVENT_OCCURRED0_LB_IRQ_INT_9_MASK 0x0004000000000000UL 236647128f1SMike Travis #define UVYH_EVENT_OCCURRED0_LB_IRQ_INT_10_SHFT 51 237647128f1SMike Travis #define UVYH_EVENT_OCCURRED0_LB_IRQ_INT_10_MASK 0x0008000000000000UL 238647128f1SMike Travis #define UVYH_EVENT_OCCURRED0_LB_IRQ_INT_11_SHFT 52 239647128f1SMike Travis #define UVYH_EVENT_OCCURRED0_LB_IRQ_INT_11_MASK 0x0010000000000000UL 240647128f1SMike Travis #define UVYH_EVENT_OCCURRED0_LB_IRQ_INT_12_SHFT 53 241647128f1SMike Travis #define UVYH_EVENT_OCCURRED0_LB_IRQ_INT_12_MASK 0x0020000000000000UL 242647128f1SMike Travis #define UVYH_EVENT_OCCURRED0_LB_IRQ_INT_13_SHFT 54 243647128f1SMike Travis #define UVYH_EVENT_OCCURRED0_LB_IRQ_INT_13_MASK 0x0040000000000000UL 244647128f1SMike Travis #define UVYH_EVENT_OCCURRED0_LB_IRQ_INT_14_SHFT 55 245647128f1SMike Travis #define UVYH_EVENT_OCCURRED0_LB_IRQ_INT_14_MASK 0x0080000000000000UL 246647128f1SMike Travis #define UVYH_EVENT_OCCURRED0_LB_IRQ_INT_15_SHFT 56 247647128f1SMike Travis #define UVYH_EVENT_OCCURRED0_LB_IRQ_INT_15_MASK 0x0100000000000000UL 248647128f1SMike Travis #define UVYH_EVENT_OCCURRED0_L1_NMI_INT_SHFT 57 249647128f1SMike Travis #define UVYH_EVENT_OCCURRED0_L1_NMI_INT_MASK 0x0200000000000000UL 250647128f1SMike Travis #define UVYH_EVENT_OCCURRED0_STOP_CLOCK_SHFT 58 251647128f1SMike Travis #define UVYH_EVENT_OCCURRED0_STOP_CLOCK_MASK 0x0400000000000000UL 252647128f1SMike Travis #define UVYH_EVENT_OCCURRED0_ASIC_TO_L1_SHFT 59 253647128f1SMike Travis #define UVYH_EVENT_OCCURRED0_ASIC_TO_L1_MASK 0x0800000000000000UL 254647128f1SMike Travis #define UVYH_EVENT_OCCURRED0_L1_TO_ASIC_SHFT 60 255647128f1SMike Travis #define UVYH_EVENT_OCCURRED0_L1_TO_ASIC_MASK 0x1000000000000000UL 256647128f1SMike Travis #define UVYH_EVENT_OCCURRED0_LA_SEQ_TRIGGER_SHFT 61 257647128f1SMike Travis #define UVYH_EVENT_OCCURRED0_LA_SEQ_TRIGGER_MASK 0x2000000000000000UL 2580f0d84c0SMike Travis 259647128f1SMike Travis /* UV4 unique defines */ 2600f0d84c0SMike Travis #define UV4H_EVENT_OCCURRED0_KT_HCERR_SHFT 1 2610f0d84c0SMike Travis #define UV4H_EVENT_OCCURRED0_KT_HCERR_MASK 0x0000000000000002UL 262647128f1SMike Travis #define UV4H_EVENT_OCCURRED0_KT_AOERR0_SHFT 10 2630f0d84c0SMike Travis #define UV4H_EVENT_OCCURRED0_KT_AOERR0_MASK 0x0000000000000400UL 264647128f1SMike Travis #define UV4H_EVENT_OCCURRED0_RTQ0_AOERR0_SHFT 17 2650f0d84c0SMike Travis #define UV4H_EVENT_OCCURRED0_RTQ0_AOERR0_MASK 0x0000000000020000UL 266647128f1SMike Travis #define UV4H_EVENT_OCCURRED0_RTQ1_AOERR0_SHFT 18 2670f0d84c0SMike Travis #define UV4H_EVENT_OCCURRED0_RTQ1_AOERR0_MASK 0x0000000000040000UL 268647128f1SMike Travis #define UV4H_EVENT_OCCURRED0_RTQ2_AOERR0_SHFT 19 2690f0d84c0SMike Travis #define UV4H_EVENT_OCCURRED0_RTQ2_AOERR0_MASK 0x0000000000080000UL 270647128f1SMike Travis #define UV4H_EVENT_OCCURRED0_RTQ3_AOERR0_SHFT 20 2710f0d84c0SMike Travis #define UV4H_EVENT_OCCURRED0_RTQ3_AOERR0_MASK 0x0000000000100000UL 272647128f1SMike Travis #define UV4H_EVENT_OCCURRED0_NI0_AOERR0_SHFT 21 2730f0d84c0SMike Travis #define UV4H_EVENT_OCCURRED0_NI0_AOERR0_MASK 0x0000000000200000UL 274647128f1SMike Travis #define UV4H_EVENT_OCCURRED0_NI1_AOERR0_SHFT 22 2750f0d84c0SMike Travis #define UV4H_EVENT_OCCURRED0_NI1_AOERR0_MASK 0x0000000000400000UL 276647128f1SMike Travis #define UV4H_EVENT_OCCURRED0_LB_AOERR1_SHFT 23 2770f0d84c0SMike Travis #define UV4H_EVENT_OCCURRED0_LB_AOERR1_MASK 0x0000000000800000UL 278647128f1SMike Travis #define UV4H_EVENT_OCCURRED0_KT_AOERR1_SHFT 24 2790f0d84c0SMike Travis #define UV4H_EVENT_OCCURRED0_KT_AOERR1_MASK 0x0000000001000000UL 280647128f1SMike Travis #define UV4H_EVENT_OCCURRED0_RH_AOERR1_SHFT 25 2810f0d84c0SMike Travis #define UV4H_EVENT_OCCURRED0_RH_AOERR1_MASK 0x0000000002000000UL 282647128f1SMike Travis #define UV4H_EVENT_OCCURRED0_LH0_AOERR1_SHFT 26 2830f0d84c0SMike Travis #define UV4H_EVENT_OCCURRED0_LH0_AOERR1_MASK 0x0000000004000000UL 284647128f1SMike Travis #define UV4H_EVENT_OCCURRED0_LH1_AOERR1_SHFT 27 2850f0d84c0SMike Travis #define UV4H_EVENT_OCCURRED0_LH1_AOERR1_MASK 0x0000000008000000UL 286647128f1SMike Travis #define UV4H_EVENT_OCCURRED0_GR0_AOERR1_SHFT 28 2870f0d84c0SMike Travis #define UV4H_EVENT_OCCURRED0_GR0_AOERR1_MASK 0x0000000010000000UL 288647128f1SMike Travis #define UV4H_EVENT_OCCURRED0_GR1_AOERR1_SHFT 29 2890f0d84c0SMike Travis #define UV4H_EVENT_OCCURRED0_GR1_AOERR1_MASK 0x0000000020000000UL 290647128f1SMike Travis #define UV4H_EVENT_OCCURRED0_XB_AOERR1_SHFT 30 2910f0d84c0SMike Travis #define UV4H_EVENT_OCCURRED0_XB_AOERR1_MASK 0x0000000040000000UL 292647128f1SMike Travis #define UV4H_EVENT_OCCURRED0_RTQ0_AOERR1_SHFT 31 2930f0d84c0SMike Travis #define UV4H_EVENT_OCCURRED0_RTQ0_AOERR1_MASK 0x0000000080000000UL 294647128f1SMike Travis #define UV4H_EVENT_OCCURRED0_RTQ1_AOERR1_SHFT 32 2950f0d84c0SMike Travis #define UV4H_EVENT_OCCURRED0_RTQ1_AOERR1_MASK 0x0000000100000000UL 296647128f1SMike Travis #define UV4H_EVENT_OCCURRED0_RTQ2_AOERR1_SHFT 33 2970f0d84c0SMike Travis #define UV4H_EVENT_OCCURRED0_RTQ2_AOERR1_MASK 0x0000000200000000UL 298647128f1SMike Travis #define UV4H_EVENT_OCCURRED0_RTQ3_AOERR1_SHFT 34 2990f0d84c0SMike Travis #define UV4H_EVENT_OCCURRED0_RTQ3_AOERR1_MASK 0x0000000400000000UL 300647128f1SMike Travis #define UV4H_EVENT_OCCURRED0_NI0_AOERR1_SHFT 35 3010f0d84c0SMike Travis #define UV4H_EVENT_OCCURRED0_NI0_AOERR1_MASK 0x0000000800000000UL 302647128f1SMike Travis #define UV4H_EVENT_OCCURRED0_NI1_AOERR1_SHFT 36 3030f0d84c0SMike Travis #define UV4H_EVENT_OCCURRED0_NI1_AOERR1_MASK 0x0000001000000000UL 304647128f1SMike Travis #define UV4H_EVENT_OCCURRED0_SYSTEM_SHUTDOWN_INT_SHFT 37 3050f0d84c0SMike Travis #define UV4H_EVENT_OCCURRED0_SYSTEM_SHUTDOWN_INT_MASK 0x0000002000000000UL 306647128f1SMike Travis #define UV4H_EVENT_OCCURRED0_LB_IRQ_INT_0_SHFT 38 3070f0d84c0SMike Travis #define UV4H_EVENT_OCCURRED0_LB_IRQ_INT_0_MASK 0x0000004000000000UL 308647128f1SMike Travis #define UV4H_EVENT_OCCURRED0_LB_IRQ_INT_1_SHFT 39 3090f0d84c0SMike Travis #define UV4H_EVENT_OCCURRED0_LB_IRQ_INT_1_MASK 0x0000008000000000UL 310647128f1SMike Travis #define UV4H_EVENT_OCCURRED0_LB_IRQ_INT_2_SHFT 40 3110f0d84c0SMike Travis #define UV4H_EVENT_OCCURRED0_LB_IRQ_INT_2_MASK 0x0000010000000000UL 312647128f1SMike Travis #define UV4H_EVENT_OCCURRED0_LB_IRQ_INT_3_SHFT 41 3130f0d84c0SMike Travis #define UV4H_EVENT_OCCURRED0_LB_IRQ_INT_3_MASK 0x0000020000000000UL 314647128f1SMike Travis #define UV4H_EVENT_OCCURRED0_LB_IRQ_INT_4_SHFT 42 3150f0d84c0SMike Travis #define UV4H_EVENT_OCCURRED0_LB_IRQ_INT_4_MASK 0x0000040000000000UL 316647128f1SMike Travis #define UV4H_EVENT_OCCURRED0_LB_IRQ_INT_5_SHFT 43 3170f0d84c0SMike Travis #define UV4H_EVENT_OCCURRED0_LB_IRQ_INT_5_MASK 0x0000080000000000UL 318647128f1SMike Travis #define UV4H_EVENT_OCCURRED0_LB_IRQ_INT_6_SHFT 44 3190f0d84c0SMike Travis #define UV4H_EVENT_OCCURRED0_LB_IRQ_INT_6_MASK 0x0000100000000000UL 320647128f1SMike Travis #define UV4H_EVENT_OCCURRED0_LB_IRQ_INT_7_SHFT 45 3210f0d84c0SMike Travis #define UV4H_EVENT_OCCURRED0_LB_IRQ_INT_7_MASK 0x0000200000000000UL 322647128f1SMike Travis #define UV4H_EVENT_OCCURRED0_LB_IRQ_INT_8_SHFT 46 3230f0d84c0SMike Travis #define UV4H_EVENT_OCCURRED0_LB_IRQ_INT_8_MASK 0x0000400000000000UL 324647128f1SMike Travis #define UV4H_EVENT_OCCURRED0_LB_IRQ_INT_9_SHFT 47 3250f0d84c0SMike Travis #define UV4H_EVENT_OCCURRED0_LB_IRQ_INT_9_MASK 0x0000800000000000UL 326647128f1SMike Travis #define UV4H_EVENT_OCCURRED0_LB_IRQ_INT_10_SHFT 48 3270f0d84c0SMike Travis #define UV4H_EVENT_OCCURRED0_LB_IRQ_INT_10_MASK 0x0001000000000000UL 328647128f1SMike Travis #define UV4H_EVENT_OCCURRED0_LB_IRQ_INT_11_SHFT 49 3290f0d84c0SMike Travis #define UV4H_EVENT_OCCURRED0_LB_IRQ_INT_11_MASK 0x0002000000000000UL 330647128f1SMike Travis #define UV4H_EVENT_OCCURRED0_LB_IRQ_INT_12_SHFT 50 3310f0d84c0SMike Travis #define UV4H_EVENT_OCCURRED0_LB_IRQ_INT_12_MASK 0x0004000000000000UL 332647128f1SMike Travis #define UV4H_EVENT_OCCURRED0_LB_IRQ_INT_13_SHFT 51 3330f0d84c0SMike Travis #define UV4H_EVENT_OCCURRED0_LB_IRQ_INT_13_MASK 0x0008000000000000UL 334647128f1SMike Travis #define UV4H_EVENT_OCCURRED0_LB_IRQ_INT_14_SHFT 52 3350f0d84c0SMike Travis #define UV4H_EVENT_OCCURRED0_LB_IRQ_INT_14_MASK 0x0010000000000000UL 336647128f1SMike Travis #define UV4H_EVENT_OCCURRED0_LB_IRQ_INT_15_SHFT 53 3370f0d84c0SMike Travis #define UV4H_EVENT_OCCURRED0_LB_IRQ_INT_15_MASK 0x0020000000000000UL 338647128f1SMike Travis #define UV4H_EVENT_OCCURRED0_L1_NMI_INT_SHFT 54 3390f0d84c0SMike Travis #define UV4H_EVENT_OCCURRED0_L1_NMI_INT_MASK 0x0040000000000000UL 340647128f1SMike Travis #define UV4H_EVENT_OCCURRED0_STOP_CLOCK_SHFT 55 3410f0d84c0SMike Travis #define UV4H_EVENT_OCCURRED0_STOP_CLOCK_MASK 0x0080000000000000UL 342647128f1SMike Travis #define UV4H_EVENT_OCCURRED0_ASIC_TO_L1_SHFT 56 3430f0d84c0SMike Travis #define UV4H_EVENT_OCCURRED0_ASIC_TO_L1_MASK 0x0100000000000000UL 344647128f1SMike Travis #define UV4H_EVENT_OCCURRED0_L1_TO_ASIC_SHFT 57 3450f0d84c0SMike Travis #define UV4H_EVENT_OCCURRED0_L1_TO_ASIC_MASK 0x0200000000000000UL 346647128f1SMike Travis #define UV4H_EVENT_OCCURRED0_LA_SEQ_TRIGGER_SHFT 58 3470f0d84c0SMike Travis #define UV4H_EVENT_OCCURRED0_LA_SEQ_TRIGGER_MASK 0x0400000000000000UL 348647128f1SMike Travis #define UV4H_EVENT_OCCURRED0_IPI_INT_SHFT 59 3490f0d84c0SMike Travis #define UV4H_EVENT_OCCURRED0_IPI_INT_MASK 0x0800000000000000UL 350647128f1SMike Travis #define UV4H_EVENT_OCCURRED0_EXTIO_INT0_SHFT 60 3510f0d84c0SMike Travis #define UV4H_EVENT_OCCURRED0_EXTIO_INT0_MASK 0x1000000000000000UL 352647128f1SMike Travis #define UV4H_EVENT_OCCURRED0_EXTIO_INT1_SHFT 61 3530f0d84c0SMike Travis #define UV4H_EVENT_OCCURRED0_EXTIO_INT1_MASK 0x2000000000000000UL 354647128f1SMike Travis #define UV4H_EVENT_OCCURRED0_EXTIO_INT2_SHFT 62 3550f0d84c0SMike Travis #define UV4H_EVENT_OCCURRED0_EXTIO_INT2_MASK 0x4000000000000000UL 356647128f1SMike Travis #define UV4H_EVENT_OCCURRED0_EXTIO_INT3_SHFT 63 3570f0d84c0SMike Travis #define UV4H_EVENT_OCCURRED0_EXTIO_INT3_MASK 0x8000000000000000UL 3580f0d84c0SMike Travis 359647128f1SMike Travis /* UV3 unique defines */ 360647128f1SMike Travis #define UV3H_EVENT_OCCURRED0_QP_HCERR_SHFT 1 361647128f1SMike Travis #define UV3H_EVENT_OCCURRED0_QP_HCERR_MASK 0x0000000000000002UL 362647128f1SMike Travis #define UV3H_EVENT_OCCURRED0_QP_AOERR0_SHFT 10 363647128f1SMike Travis #define UV3H_EVENT_OCCURRED0_QP_AOERR0_MASK 0x0000000000000400UL 364647128f1SMike Travis #define UV3H_EVENT_OCCURRED0_RT_AOERR0_SHFT 17 365647128f1SMike Travis #define UV3H_EVENT_OCCURRED0_RT_AOERR0_MASK 0x0000000000020000UL 366647128f1SMike Travis #define UV3H_EVENT_OCCURRED0_NI0_AOERR0_SHFT 18 367647128f1SMike Travis #define UV3H_EVENT_OCCURRED0_NI0_AOERR0_MASK 0x0000000000040000UL 368647128f1SMike Travis #define UV3H_EVENT_OCCURRED0_NI1_AOERR0_SHFT 19 369647128f1SMike Travis #define UV3H_EVENT_OCCURRED0_NI1_AOERR0_MASK 0x0000000000080000UL 370647128f1SMike Travis #define UV3H_EVENT_OCCURRED0_LB_AOERR1_SHFT 20 371647128f1SMike Travis #define UV3H_EVENT_OCCURRED0_LB_AOERR1_MASK 0x0000000000100000UL 372647128f1SMike Travis #define UV3H_EVENT_OCCURRED0_QP_AOERR1_SHFT 21 373647128f1SMike Travis #define UV3H_EVENT_OCCURRED0_QP_AOERR1_MASK 0x0000000000200000UL 374647128f1SMike Travis #define UV3H_EVENT_OCCURRED0_RH_AOERR1_SHFT 22 375647128f1SMike Travis #define UV3H_EVENT_OCCURRED0_RH_AOERR1_MASK 0x0000000000400000UL 376647128f1SMike Travis #define UV3H_EVENT_OCCURRED0_LH0_AOERR1_SHFT 23 377647128f1SMike Travis #define UV3H_EVENT_OCCURRED0_LH0_AOERR1_MASK 0x0000000000800000UL 378647128f1SMike Travis #define UV3H_EVENT_OCCURRED0_LH1_AOERR1_SHFT 24 379647128f1SMike Travis #define UV3H_EVENT_OCCURRED0_LH1_AOERR1_MASK 0x0000000001000000UL 380647128f1SMike Travis #define UV3H_EVENT_OCCURRED0_GR0_AOERR1_SHFT 25 381647128f1SMike Travis #define UV3H_EVENT_OCCURRED0_GR0_AOERR1_MASK 0x0000000002000000UL 382647128f1SMike Travis #define UV3H_EVENT_OCCURRED0_GR1_AOERR1_SHFT 26 383647128f1SMike Travis #define UV3H_EVENT_OCCURRED0_GR1_AOERR1_MASK 0x0000000004000000UL 384647128f1SMike Travis #define UV3H_EVENT_OCCURRED0_XB_AOERR1_SHFT 27 385647128f1SMike Travis #define UV3H_EVENT_OCCURRED0_XB_AOERR1_MASK 0x0000000008000000UL 386647128f1SMike Travis #define UV3H_EVENT_OCCURRED0_RT_AOERR1_SHFT 28 387647128f1SMike Travis #define UV3H_EVENT_OCCURRED0_RT_AOERR1_MASK 0x0000000010000000UL 388647128f1SMike Travis #define UV3H_EVENT_OCCURRED0_NI0_AOERR1_SHFT 29 389647128f1SMike Travis #define UV3H_EVENT_OCCURRED0_NI0_AOERR1_MASK 0x0000000020000000UL 390647128f1SMike Travis #define UV3H_EVENT_OCCURRED0_NI1_AOERR1_SHFT 30 391647128f1SMike Travis #define UV3H_EVENT_OCCURRED0_NI1_AOERR1_MASK 0x0000000040000000UL 392647128f1SMike Travis #define UV3H_EVENT_OCCURRED0_SYSTEM_SHUTDOWN_INT_SHFT 31 393647128f1SMike Travis #define UV3H_EVENT_OCCURRED0_SYSTEM_SHUTDOWN_INT_MASK 0x0000000080000000UL 394647128f1SMike Travis #define UV3H_EVENT_OCCURRED0_LB_IRQ_INT_0_SHFT 32 395647128f1SMike Travis #define UV3H_EVENT_OCCURRED0_LB_IRQ_INT_0_MASK 0x0000000100000000UL 396647128f1SMike Travis #define UV3H_EVENT_OCCURRED0_LB_IRQ_INT_1_SHFT 33 397647128f1SMike Travis #define UV3H_EVENT_OCCURRED0_LB_IRQ_INT_1_MASK 0x0000000200000000UL 398647128f1SMike Travis #define UV3H_EVENT_OCCURRED0_LB_IRQ_INT_2_SHFT 34 399647128f1SMike Travis #define UV3H_EVENT_OCCURRED0_LB_IRQ_INT_2_MASK 0x0000000400000000UL 400647128f1SMike Travis #define UV3H_EVENT_OCCURRED0_LB_IRQ_INT_3_SHFT 35 401647128f1SMike Travis #define UV3H_EVENT_OCCURRED0_LB_IRQ_INT_3_MASK 0x0000000800000000UL 402647128f1SMike Travis #define UV3H_EVENT_OCCURRED0_LB_IRQ_INT_4_SHFT 36 403647128f1SMike Travis #define UV3H_EVENT_OCCURRED0_LB_IRQ_INT_4_MASK 0x0000001000000000UL 404647128f1SMike Travis #define UV3H_EVENT_OCCURRED0_LB_IRQ_INT_5_SHFT 37 405647128f1SMike Travis #define UV3H_EVENT_OCCURRED0_LB_IRQ_INT_5_MASK 0x0000002000000000UL 406647128f1SMike Travis #define UV3H_EVENT_OCCURRED0_LB_IRQ_INT_6_SHFT 38 407647128f1SMike Travis #define UV3H_EVENT_OCCURRED0_LB_IRQ_INT_6_MASK 0x0000004000000000UL 408647128f1SMike Travis #define UV3H_EVENT_OCCURRED0_LB_IRQ_INT_7_SHFT 39 409647128f1SMike Travis #define UV3H_EVENT_OCCURRED0_LB_IRQ_INT_7_MASK 0x0000008000000000UL 410647128f1SMike Travis #define UV3H_EVENT_OCCURRED0_LB_IRQ_INT_8_SHFT 40 411647128f1SMike Travis #define UV3H_EVENT_OCCURRED0_LB_IRQ_INT_8_MASK 0x0000010000000000UL 412647128f1SMike Travis #define UV3H_EVENT_OCCURRED0_LB_IRQ_INT_9_SHFT 41 413647128f1SMike Travis #define UV3H_EVENT_OCCURRED0_LB_IRQ_INT_9_MASK 0x0000020000000000UL 414647128f1SMike Travis #define UV3H_EVENT_OCCURRED0_LB_IRQ_INT_10_SHFT 42 415647128f1SMike Travis #define UV3H_EVENT_OCCURRED0_LB_IRQ_INT_10_MASK 0x0000040000000000UL 416647128f1SMike Travis #define UV3H_EVENT_OCCURRED0_LB_IRQ_INT_11_SHFT 43 417647128f1SMike Travis #define UV3H_EVENT_OCCURRED0_LB_IRQ_INT_11_MASK 0x0000080000000000UL 418647128f1SMike Travis #define UV3H_EVENT_OCCURRED0_LB_IRQ_INT_12_SHFT 44 419647128f1SMike Travis #define UV3H_EVENT_OCCURRED0_LB_IRQ_INT_12_MASK 0x0000100000000000UL 420647128f1SMike Travis #define UV3H_EVENT_OCCURRED0_LB_IRQ_INT_13_SHFT 45 421647128f1SMike Travis #define UV3H_EVENT_OCCURRED0_LB_IRQ_INT_13_MASK 0x0000200000000000UL 422647128f1SMike Travis #define UV3H_EVENT_OCCURRED0_LB_IRQ_INT_14_SHFT 46 423647128f1SMike Travis #define UV3H_EVENT_OCCURRED0_LB_IRQ_INT_14_MASK 0x0000400000000000UL 424647128f1SMike Travis #define UV3H_EVENT_OCCURRED0_LB_IRQ_INT_15_SHFT 47 425647128f1SMike Travis #define UV3H_EVENT_OCCURRED0_LB_IRQ_INT_15_MASK 0x0000800000000000UL 426647128f1SMike Travis #define UV3H_EVENT_OCCURRED0_L1_NMI_INT_SHFT 48 427647128f1SMike Travis #define UV3H_EVENT_OCCURRED0_L1_NMI_INT_MASK 0x0001000000000000UL 428647128f1SMike Travis #define UV3H_EVENT_OCCURRED0_STOP_CLOCK_SHFT 49 429647128f1SMike Travis #define UV3H_EVENT_OCCURRED0_STOP_CLOCK_MASK 0x0002000000000000UL 430647128f1SMike Travis #define UV3H_EVENT_OCCURRED0_ASIC_TO_L1_SHFT 50 431647128f1SMike Travis #define UV3H_EVENT_OCCURRED0_ASIC_TO_L1_MASK 0x0004000000000000UL 432647128f1SMike Travis #define UV3H_EVENT_OCCURRED0_L1_TO_ASIC_SHFT 51 433647128f1SMike Travis #define UV3H_EVENT_OCCURRED0_L1_TO_ASIC_MASK 0x0008000000000000UL 434647128f1SMike Travis #define UV3H_EVENT_OCCURRED0_LA_SEQ_TRIGGER_SHFT 52 435647128f1SMike Travis #define UV3H_EVENT_OCCURRED0_LA_SEQ_TRIGGER_MASK 0x0010000000000000UL 436647128f1SMike Travis #define UV3H_EVENT_OCCURRED0_IPI_INT_SHFT 53 437647128f1SMike Travis #define UV3H_EVENT_OCCURRED0_IPI_INT_MASK 0x0020000000000000UL 438647128f1SMike Travis #define UV3H_EVENT_OCCURRED0_EXTIO_INT0_SHFT 54 439647128f1SMike Travis #define UV3H_EVENT_OCCURRED0_EXTIO_INT0_MASK 0x0040000000000000UL 440647128f1SMike Travis #define UV3H_EVENT_OCCURRED0_EXTIO_INT1_SHFT 55 441647128f1SMike Travis #define UV3H_EVENT_OCCURRED0_EXTIO_INT1_MASK 0x0080000000000000UL 442647128f1SMike Travis #define UV3H_EVENT_OCCURRED0_EXTIO_INT2_SHFT 56 443647128f1SMike Travis #define UV3H_EVENT_OCCURRED0_EXTIO_INT2_MASK 0x0100000000000000UL 444647128f1SMike Travis #define UV3H_EVENT_OCCURRED0_EXTIO_INT3_SHFT 57 445647128f1SMike Travis #define UV3H_EVENT_OCCURRED0_EXTIO_INT3_MASK 0x0200000000000000UL 446647128f1SMike Travis #define UV3H_EVENT_OCCURRED0_PROFILE_INT_SHFT 58 447647128f1SMike Travis #define UV3H_EVENT_OCCURRED0_PROFILE_INT_MASK 0x0400000000000000UL 448647128f1SMike Travis 449647128f1SMike Travis /* UV2 unique defines */ 450647128f1SMike Travis #define UV2H_EVENT_OCCURRED0_QP_HCERR_SHFT 1 451647128f1SMike Travis #define UV2H_EVENT_OCCURRED0_QP_HCERR_MASK 0x0000000000000002UL 452647128f1SMike Travis #define UV2H_EVENT_OCCURRED0_QP_AOERR0_SHFT 10 453647128f1SMike Travis #define UV2H_EVENT_OCCURRED0_QP_AOERR0_MASK 0x0000000000000400UL 454647128f1SMike Travis #define UV2H_EVENT_OCCURRED0_RT_AOERR0_SHFT 17 455647128f1SMike Travis #define UV2H_EVENT_OCCURRED0_RT_AOERR0_MASK 0x0000000000020000UL 456647128f1SMike Travis #define UV2H_EVENT_OCCURRED0_NI0_AOERR0_SHFT 18 457647128f1SMike Travis #define UV2H_EVENT_OCCURRED0_NI0_AOERR0_MASK 0x0000000000040000UL 458647128f1SMike Travis #define UV2H_EVENT_OCCURRED0_NI1_AOERR0_SHFT 19 459647128f1SMike Travis #define UV2H_EVENT_OCCURRED0_NI1_AOERR0_MASK 0x0000000000080000UL 460647128f1SMike Travis #define UV2H_EVENT_OCCURRED0_LB_AOERR1_SHFT 20 461647128f1SMike Travis #define UV2H_EVENT_OCCURRED0_LB_AOERR1_MASK 0x0000000000100000UL 462647128f1SMike Travis #define UV2H_EVENT_OCCURRED0_QP_AOERR1_SHFT 21 463647128f1SMike Travis #define UV2H_EVENT_OCCURRED0_QP_AOERR1_MASK 0x0000000000200000UL 464647128f1SMike Travis #define UV2H_EVENT_OCCURRED0_RH_AOERR1_SHFT 22 465647128f1SMike Travis #define UV2H_EVENT_OCCURRED0_RH_AOERR1_MASK 0x0000000000400000UL 466647128f1SMike Travis #define UV2H_EVENT_OCCURRED0_LH0_AOERR1_SHFT 23 467647128f1SMike Travis #define UV2H_EVENT_OCCURRED0_LH0_AOERR1_MASK 0x0000000000800000UL 468647128f1SMike Travis #define UV2H_EVENT_OCCURRED0_LH1_AOERR1_SHFT 24 469647128f1SMike Travis #define UV2H_EVENT_OCCURRED0_LH1_AOERR1_MASK 0x0000000001000000UL 470647128f1SMike Travis #define UV2H_EVENT_OCCURRED0_GR0_AOERR1_SHFT 25 471647128f1SMike Travis #define UV2H_EVENT_OCCURRED0_GR0_AOERR1_MASK 0x0000000002000000UL 472647128f1SMike Travis #define UV2H_EVENT_OCCURRED0_GR1_AOERR1_SHFT 26 473647128f1SMike Travis #define UV2H_EVENT_OCCURRED0_GR1_AOERR1_MASK 0x0000000004000000UL 474647128f1SMike Travis #define UV2H_EVENT_OCCURRED0_XB_AOERR1_SHFT 27 475647128f1SMike Travis #define UV2H_EVENT_OCCURRED0_XB_AOERR1_MASK 0x0000000008000000UL 476647128f1SMike Travis #define UV2H_EVENT_OCCURRED0_RT_AOERR1_SHFT 28 477647128f1SMike Travis #define UV2H_EVENT_OCCURRED0_RT_AOERR1_MASK 0x0000000010000000UL 478647128f1SMike Travis #define UV2H_EVENT_OCCURRED0_NI0_AOERR1_SHFT 29 479647128f1SMike Travis #define UV2H_EVENT_OCCURRED0_NI0_AOERR1_MASK 0x0000000020000000UL 480647128f1SMike Travis #define UV2H_EVENT_OCCURRED0_NI1_AOERR1_SHFT 30 481647128f1SMike Travis #define UV2H_EVENT_OCCURRED0_NI1_AOERR1_MASK 0x0000000040000000UL 482647128f1SMike Travis #define UV2H_EVENT_OCCURRED0_SYSTEM_SHUTDOWN_INT_SHFT 31 483647128f1SMike Travis #define UV2H_EVENT_OCCURRED0_SYSTEM_SHUTDOWN_INT_MASK 0x0000000080000000UL 484647128f1SMike Travis #define UV2H_EVENT_OCCURRED0_LB_IRQ_INT_0_SHFT 32 485647128f1SMike Travis #define UV2H_EVENT_OCCURRED0_LB_IRQ_INT_0_MASK 0x0000000100000000UL 486647128f1SMike Travis #define UV2H_EVENT_OCCURRED0_LB_IRQ_INT_1_SHFT 33 487647128f1SMike Travis #define UV2H_EVENT_OCCURRED0_LB_IRQ_INT_1_MASK 0x0000000200000000UL 488647128f1SMike Travis #define UV2H_EVENT_OCCURRED0_LB_IRQ_INT_2_SHFT 34 489647128f1SMike Travis #define UV2H_EVENT_OCCURRED0_LB_IRQ_INT_2_MASK 0x0000000400000000UL 490647128f1SMike Travis #define UV2H_EVENT_OCCURRED0_LB_IRQ_INT_3_SHFT 35 491647128f1SMike Travis #define UV2H_EVENT_OCCURRED0_LB_IRQ_INT_3_MASK 0x0000000800000000UL 492647128f1SMike Travis #define UV2H_EVENT_OCCURRED0_LB_IRQ_INT_4_SHFT 36 493647128f1SMike Travis #define UV2H_EVENT_OCCURRED0_LB_IRQ_INT_4_MASK 0x0000001000000000UL 494647128f1SMike Travis #define UV2H_EVENT_OCCURRED0_LB_IRQ_INT_5_SHFT 37 495647128f1SMike Travis #define UV2H_EVENT_OCCURRED0_LB_IRQ_INT_5_MASK 0x0000002000000000UL 496647128f1SMike Travis #define UV2H_EVENT_OCCURRED0_LB_IRQ_INT_6_SHFT 38 497647128f1SMike Travis #define UV2H_EVENT_OCCURRED0_LB_IRQ_INT_6_MASK 0x0000004000000000UL 498647128f1SMike Travis #define UV2H_EVENT_OCCURRED0_LB_IRQ_INT_7_SHFT 39 499647128f1SMike Travis #define UV2H_EVENT_OCCURRED0_LB_IRQ_INT_7_MASK 0x0000008000000000UL 500647128f1SMike Travis #define UV2H_EVENT_OCCURRED0_LB_IRQ_INT_8_SHFT 40 501647128f1SMike Travis #define UV2H_EVENT_OCCURRED0_LB_IRQ_INT_8_MASK 0x0000010000000000UL 502647128f1SMike Travis #define UV2H_EVENT_OCCURRED0_LB_IRQ_INT_9_SHFT 41 503647128f1SMike Travis #define UV2H_EVENT_OCCURRED0_LB_IRQ_INT_9_MASK 0x0000020000000000UL 504647128f1SMike Travis #define UV2H_EVENT_OCCURRED0_LB_IRQ_INT_10_SHFT 42 505647128f1SMike Travis #define UV2H_EVENT_OCCURRED0_LB_IRQ_INT_10_MASK 0x0000040000000000UL 506647128f1SMike Travis #define UV2H_EVENT_OCCURRED0_LB_IRQ_INT_11_SHFT 43 507647128f1SMike Travis #define UV2H_EVENT_OCCURRED0_LB_IRQ_INT_11_MASK 0x0000080000000000UL 508647128f1SMike Travis #define UV2H_EVENT_OCCURRED0_LB_IRQ_INT_12_SHFT 44 509647128f1SMike Travis #define UV2H_EVENT_OCCURRED0_LB_IRQ_INT_12_MASK 0x0000100000000000UL 510647128f1SMike Travis #define UV2H_EVENT_OCCURRED0_LB_IRQ_INT_13_SHFT 45 511647128f1SMike Travis #define UV2H_EVENT_OCCURRED0_LB_IRQ_INT_13_MASK 0x0000200000000000UL 512647128f1SMike Travis #define UV2H_EVENT_OCCURRED0_LB_IRQ_INT_14_SHFT 46 513647128f1SMike Travis #define UV2H_EVENT_OCCURRED0_LB_IRQ_INT_14_MASK 0x0000400000000000UL 514647128f1SMike Travis #define UV2H_EVENT_OCCURRED0_LB_IRQ_INT_15_SHFT 47 515647128f1SMike Travis #define UV2H_EVENT_OCCURRED0_LB_IRQ_INT_15_MASK 0x0000800000000000UL 516647128f1SMike Travis #define UV2H_EVENT_OCCURRED0_L1_NMI_INT_SHFT 48 517647128f1SMike Travis #define UV2H_EVENT_OCCURRED0_L1_NMI_INT_MASK 0x0001000000000000UL 518647128f1SMike Travis #define UV2H_EVENT_OCCURRED0_STOP_CLOCK_SHFT 49 519647128f1SMike Travis #define UV2H_EVENT_OCCURRED0_STOP_CLOCK_MASK 0x0002000000000000UL 520647128f1SMike Travis #define UV2H_EVENT_OCCURRED0_ASIC_TO_L1_SHFT 50 521647128f1SMike Travis #define UV2H_EVENT_OCCURRED0_ASIC_TO_L1_MASK 0x0004000000000000UL 522647128f1SMike Travis #define UV2H_EVENT_OCCURRED0_L1_TO_ASIC_SHFT 51 523647128f1SMike Travis #define UV2H_EVENT_OCCURRED0_L1_TO_ASIC_MASK 0x0008000000000000UL 524647128f1SMike Travis #define UV2H_EVENT_OCCURRED0_LA_SEQ_TRIGGER_SHFT 52 525647128f1SMike Travis #define UV2H_EVENT_OCCURRED0_LA_SEQ_TRIGGER_MASK 0x0010000000000000UL 526647128f1SMike Travis #define UV2H_EVENT_OCCURRED0_IPI_INT_SHFT 53 527647128f1SMike Travis #define UV2H_EVENT_OCCURRED0_IPI_INT_MASK 0x0020000000000000UL 528647128f1SMike Travis #define UV2H_EVENT_OCCURRED0_EXTIO_INT0_SHFT 54 529647128f1SMike Travis #define UV2H_EVENT_OCCURRED0_EXTIO_INT0_MASK 0x0040000000000000UL 530647128f1SMike Travis #define UV2H_EVENT_OCCURRED0_EXTIO_INT1_SHFT 55 531647128f1SMike Travis #define UV2H_EVENT_OCCURRED0_EXTIO_INT1_MASK 0x0080000000000000UL 532647128f1SMike Travis #define UV2H_EVENT_OCCURRED0_EXTIO_INT2_SHFT 56 533647128f1SMike Travis #define UV2H_EVENT_OCCURRED0_EXTIO_INT2_MASK 0x0100000000000000UL 534647128f1SMike Travis #define UV2H_EVENT_OCCURRED0_EXTIO_INT3_SHFT 57 535647128f1SMike Travis #define UV2H_EVENT_OCCURRED0_EXTIO_INT3_MASK 0x0200000000000000UL 536647128f1SMike Travis #define UV2H_EVENT_OCCURRED0_PROFILE_INT_SHFT 58 537647128f1SMike Travis #define UV2H_EVENT_OCCURRED0_PROFILE_INT_MASK 0x0400000000000000UL 538647128f1SMike Travis 539647128f1SMike Travis #define UVH_EVENT_OCCURRED0_EXTIO_INT0_MASK ( \ 540647128f1SMike Travis is_uv(UV4) ? 0x1000000000000000UL : \ 541647128f1SMike Travis is_uv(UV3) ? 0x0040000000000000UL : \ 542647128f1SMike Travis is_uv(UV2) ? 0x0040000000000000UL : \ 543647128f1SMike Travis 0) 5440f0d84c0SMike Travis #define UVH_EVENT_OCCURRED0_EXTIO_INT0_SHFT ( \ 545647128f1SMike Travis is_uv(UV4) ? 60 : \ 546647128f1SMike Travis is_uv(UV3) ? 54 : \ 547647128f1SMike Travis is_uv(UV2) ? 54 : \ 548647128f1SMike Travis -1) 54960fe7be3SMike Travis 550bb898558SAl Viro union uvh_event_occurred0_u { 551bb898558SAl Viro unsigned long v; 552647128f1SMike Travis 553647128f1SMike Travis /* UVH common struct */ 55460fe7be3SMike Travis struct uvh_event_occurred0_s { 555647128f1SMike Travis unsigned long lb_hcerr:1; /* RW */ 556647128f1SMike Travis unsigned long rsvd_1_63:63; 55760fe7be3SMike Travis } s; 558647128f1SMike Travis 559647128f1SMike Travis /* UVXH common struct */ 56060fe7be3SMike Travis struct uvxh_event_occurred0_s { 56160fe7be3SMike Travis unsigned long lb_hcerr:1; /* RW */ 5620f0d84c0SMike Travis unsigned long rsvd_1:1; 56360fe7be3SMike Travis unsigned long rh_hcerr:1; /* RW */ 56460fe7be3SMike Travis unsigned long lh0_hcerr:1; /* RW */ 56560fe7be3SMike Travis unsigned long lh1_hcerr:1; /* RW */ 56660fe7be3SMike Travis unsigned long gr0_hcerr:1; /* RW */ 56760fe7be3SMike Travis unsigned long gr1_hcerr:1; /* RW */ 56860fe7be3SMike Travis unsigned long ni0_hcerr:1; /* RW */ 56960fe7be3SMike Travis unsigned long ni1_hcerr:1; /* RW */ 57060fe7be3SMike Travis unsigned long lb_aoerr0:1; /* RW */ 5710f0d84c0SMike Travis unsigned long rsvd_10:1; 57260fe7be3SMike Travis unsigned long rh_aoerr0:1; /* RW */ 57360fe7be3SMike Travis unsigned long lh0_aoerr0:1; /* RW */ 57460fe7be3SMike Travis unsigned long lh1_aoerr0:1; /* RW */ 57560fe7be3SMike Travis unsigned long gr0_aoerr0:1; /* RW */ 57660fe7be3SMike Travis unsigned long gr1_aoerr0:1; /* RW */ 57760fe7be3SMike Travis unsigned long xb_aoerr0:1; /* RW */ 5780f0d84c0SMike Travis unsigned long rsvd_17_63:47; 5790f0d84c0SMike Travis } sx; 580647128f1SMike Travis 581647128f1SMike Travis /* UVYH common struct */ 582647128f1SMike Travis struct uvyh_event_occurred0_s { 583647128f1SMike Travis unsigned long lb_hcerr:1; /* RW */ 584647128f1SMike Travis unsigned long kt_hcerr:1; /* RW */ 585647128f1SMike Travis unsigned long rh0_hcerr:1; /* RW */ 586647128f1SMike Travis unsigned long rh1_hcerr:1; /* RW */ 587647128f1SMike Travis unsigned long lh0_hcerr:1; /* RW */ 588647128f1SMike Travis unsigned long lh1_hcerr:1; /* RW */ 589647128f1SMike Travis unsigned long lh2_hcerr:1; /* RW */ 590647128f1SMike Travis unsigned long lh3_hcerr:1; /* RW */ 591647128f1SMike Travis unsigned long xb_hcerr:1; /* RW */ 592647128f1SMike Travis unsigned long rdm_hcerr:1; /* RW */ 593647128f1SMike Travis unsigned long ni0_hcerr:1; /* RW */ 594647128f1SMike Travis unsigned long ni1_hcerr:1; /* RW */ 595647128f1SMike Travis unsigned long lb_aoerr0:1; /* RW */ 596647128f1SMike Travis unsigned long kt_aoerr0:1; /* RW */ 597647128f1SMike Travis unsigned long rh0_aoerr0:1; /* RW */ 598647128f1SMike Travis unsigned long rh1_aoerr0:1; /* RW */ 599647128f1SMike Travis unsigned long lh0_aoerr0:1; /* RW */ 600647128f1SMike Travis unsigned long lh1_aoerr0:1; /* RW */ 601647128f1SMike Travis unsigned long lh2_aoerr0:1; /* RW */ 602647128f1SMike Travis unsigned long lh3_aoerr0:1; /* RW */ 603647128f1SMike Travis unsigned long xb_aoerr0:1; /* RW */ 604647128f1SMike Travis unsigned long rdm_aoerr0:1; /* RW */ 605647128f1SMike Travis unsigned long rt0_aoerr0:1; /* RW */ 606647128f1SMike Travis unsigned long rt1_aoerr0:1; /* RW */ 607647128f1SMike Travis unsigned long ni0_aoerr0:1; /* RW */ 608647128f1SMike Travis unsigned long ni1_aoerr0:1; /* RW */ 609647128f1SMike Travis unsigned long lb_aoerr1:1; /* RW */ 610647128f1SMike Travis unsigned long kt_aoerr1:1; /* RW */ 611647128f1SMike Travis unsigned long rh0_aoerr1:1; /* RW */ 612647128f1SMike Travis unsigned long rh1_aoerr1:1; /* RW */ 613647128f1SMike Travis unsigned long lh0_aoerr1:1; /* RW */ 614647128f1SMike Travis unsigned long lh1_aoerr1:1; /* RW */ 615647128f1SMike Travis unsigned long lh2_aoerr1:1; /* RW */ 616647128f1SMike Travis unsigned long lh3_aoerr1:1; /* RW */ 617647128f1SMike Travis unsigned long xb_aoerr1:1; /* RW */ 618647128f1SMike Travis unsigned long rdm_aoerr1:1; /* RW */ 619647128f1SMike Travis unsigned long rt0_aoerr1:1; /* RW */ 620647128f1SMike Travis unsigned long rt1_aoerr1:1; /* RW */ 621647128f1SMike Travis unsigned long ni0_aoerr1:1; /* RW */ 622647128f1SMike Travis unsigned long ni1_aoerr1:1; /* RW */ 623647128f1SMike Travis unsigned long system_shutdown_int:1; /* RW */ 624647128f1SMike Travis unsigned long lb_irq_int_0:1; /* RW */ 625647128f1SMike Travis unsigned long lb_irq_int_1:1; /* RW */ 626647128f1SMike Travis unsigned long lb_irq_int_2:1; /* RW */ 627647128f1SMike Travis unsigned long lb_irq_int_3:1; /* RW */ 628647128f1SMike Travis unsigned long lb_irq_int_4:1; /* RW */ 629647128f1SMike Travis unsigned long lb_irq_int_5:1; /* RW */ 630647128f1SMike Travis unsigned long lb_irq_int_6:1; /* RW */ 631647128f1SMike Travis unsigned long lb_irq_int_7:1; /* RW */ 632647128f1SMike Travis unsigned long lb_irq_int_8:1; /* RW */ 633647128f1SMike Travis unsigned long lb_irq_int_9:1; /* RW */ 634647128f1SMike Travis unsigned long lb_irq_int_10:1; /* RW */ 635647128f1SMike Travis unsigned long lb_irq_int_11:1; /* RW */ 636647128f1SMike Travis unsigned long lb_irq_int_12:1; /* RW */ 637647128f1SMike Travis unsigned long lb_irq_int_13:1; /* RW */ 638647128f1SMike Travis unsigned long lb_irq_int_14:1; /* RW */ 639647128f1SMike Travis unsigned long lb_irq_int_15:1; /* RW */ 640647128f1SMike Travis unsigned long l1_nmi_int:1; /* RW */ 641647128f1SMike Travis unsigned long stop_clock:1; /* RW */ 642647128f1SMike Travis unsigned long asic_to_l1:1; /* RW */ 643647128f1SMike Travis unsigned long l1_to_asic:1; /* RW */ 644647128f1SMike Travis unsigned long la_seq_trigger:1; /* RW */ 645647128f1SMike Travis unsigned long rsvd_62_63:2; 646647128f1SMike Travis } sy; 647647128f1SMike Travis 648647128f1SMike Travis /* UV5 unique struct */ 649647128f1SMike Travis struct uv5h_event_occurred0_s { 650647128f1SMike Travis unsigned long lb_hcerr:1; /* RW */ 651647128f1SMike Travis unsigned long kt_hcerr:1; /* RW */ 652647128f1SMike Travis unsigned long rh0_hcerr:1; /* RW */ 653647128f1SMike Travis unsigned long rh1_hcerr:1; /* RW */ 654647128f1SMike Travis unsigned long lh0_hcerr:1; /* RW */ 655647128f1SMike Travis unsigned long lh1_hcerr:1; /* RW */ 656647128f1SMike Travis unsigned long lh2_hcerr:1; /* RW */ 657647128f1SMike Travis unsigned long lh3_hcerr:1; /* RW */ 658647128f1SMike Travis unsigned long xb_hcerr:1; /* RW */ 659647128f1SMike Travis unsigned long rdm_hcerr:1; /* RW */ 660647128f1SMike Travis unsigned long ni0_hcerr:1; /* RW */ 661647128f1SMike Travis unsigned long ni1_hcerr:1; /* RW */ 662647128f1SMike Travis unsigned long lb_aoerr0:1; /* RW */ 663647128f1SMike Travis unsigned long kt_aoerr0:1; /* RW */ 664647128f1SMike Travis unsigned long rh0_aoerr0:1; /* RW */ 665647128f1SMike Travis unsigned long rh1_aoerr0:1; /* RW */ 666647128f1SMike Travis unsigned long lh0_aoerr0:1; /* RW */ 667647128f1SMike Travis unsigned long lh1_aoerr0:1; /* RW */ 668647128f1SMike Travis unsigned long lh2_aoerr0:1; /* RW */ 669647128f1SMike Travis unsigned long lh3_aoerr0:1; /* RW */ 670647128f1SMike Travis unsigned long xb_aoerr0:1; /* RW */ 671647128f1SMike Travis unsigned long rdm_aoerr0:1; /* RW */ 672647128f1SMike Travis unsigned long rt0_aoerr0:1; /* RW */ 673647128f1SMike Travis unsigned long rt1_aoerr0:1; /* RW */ 674647128f1SMike Travis unsigned long ni0_aoerr0:1; /* RW */ 675647128f1SMike Travis unsigned long ni1_aoerr0:1; /* RW */ 676647128f1SMike Travis unsigned long lb_aoerr1:1; /* RW */ 677647128f1SMike Travis unsigned long kt_aoerr1:1; /* RW */ 678647128f1SMike Travis unsigned long rh0_aoerr1:1; /* RW */ 679647128f1SMike Travis unsigned long rh1_aoerr1:1; /* RW */ 680647128f1SMike Travis unsigned long lh0_aoerr1:1; /* RW */ 681647128f1SMike Travis unsigned long lh1_aoerr1:1; /* RW */ 682647128f1SMike Travis unsigned long lh2_aoerr1:1; /* RW */ 683647128f1SMike Travis unsigned long lh3_aoerr1:1; /* RW */ 684647128f1SMike Travis unsigned long xb_aoerr1:1; /* RW */ 685647128f1SMike Travis unsigned long rdm_aoerr1:1; /* RW */ 686647128f1SMike Travis unsigned long rt0_aoerr1:1; /* RW */ 687647128f1SMike Travis unsigned long rt1_aoerr1:1; /* RW */ 688647128f1SMike Travis unsigned long ni0_aoerr1:1; /* RW */ 689647128f1SMike Travis unsigned long ni1_aoerr1:1; /* RW */ 690647128f1SMike Travis unsigned long system_shutdown_int:1; /* RW */ 691647128f1SMike Travis unsigned long lb_irq_int_0:1; /* RW */ 692647128f1SMike Travis unsigned long lb_irq_int_1:1; /* RW */ 693647128f1SMike Travis unsigned long lb_irq_int_2:1; /* RW */ 694647128f1SMike Travis unsigned long lb_irq_int_3:1; /* RW */ 695647128f1SMike Travis unsigned long lb_irq_int_4:1; /* RW */ 696647128f1SMike Travis unsigned long lb_irq_int_5:1; /* RW */ 697647128f1SMike Travis unsigned long lb_irq_int_6:1; /* RW */ 698647128f1SMike Travis unsigned long lb_irq_int_7:1; /* RW */ 699647128f1SMike Travis unsigned long lb_irq_int_8:1; /* RW */ 700647128f1SMike Travis unsigned long lb_irq_int_9:1; /* RW */ 701647128f1SMike Travis unsigned long lb_irq_int_10:1; /* RW */ 702647128f1SMike Travis unsigned long lb_irq_int_11:1; /* RW */ 703647128f1SMike Travis unsigned long lb_irq_int_12:1; /* RW */ 704647128f1SMike Travis unsigned long lb_irq_int_13:1; /* RW */ 705647128f1SMike Travis unsigned long lb_irq_int_14:1; /* RW */ 706647128f1SMike Travis unsigned long lb_irq_int_15:1; /* RW */ 707647128f1SMike Travis unsigned long l1_nmi_int:1; /* RW */ 708647128f1SMike Travis unsigned long stop_clock:1; /* RW */ 709647128f1SMike Travis unsigned long asic_to_l1:1; /* RW */ 710647128f1SMike Travis unsigned long l1_to_asic:1; /* RW */ 711647128f1SMike Travis unsigned long la_seq_trigger:1; /* RW */ 712647128f1SMike Travis unsigned long rsvd_62_63:2; 713647128f1SMike Travis } s5; 714647128f1SMike Travis 715647128f1SMike Travis /* UV4 unique struct */ 7160f0d84c0SMike Travis struct uv4h_event_occurred0_s { 7170f0d84c0SMike Travis unsigned long lb_hcerr:1; /* RW */ 7180f0d84c0SMike Travis unsigned long kt_hcerr:1; /* RW */ 7190f0d84c0SMike Travis unsigned long rh_hcerr:1; /* RW */ 7200f0d84c0SMike Travis unsigned long lh0_hcerr:1; /* RW */ 7210f0d84c0SMike Travis unsigned long lh1_hcerr:1; /* RW */ 7220f0d84c0SMike Travis unsigned long gr0_hcerr:1; /* RW */ 7230f0d84c0SMike Travis unsigned long gr1_hcerr:1; /* RW */ 7240f0d84c0SMike Travis unsigned long ni0_hcerr:1; /* RW */ 7250f0d84c0SMike Travis unsigned long ni1_hcerr:1; /* RW */ 7260f0d84c0SMike Travis unsigned long lb_aoerr0:1; /* RW */ 7270f0d84c0SMike Travis unsigned long kt_aoerr0:1; /* RW */ 7280f0d84c0SMike Travis unsigned long rh_aoerr0:1; /* RW */ 7290f0d84c0SMike Travis unsigned long lh0_aoerr0:1; /* RW */ 7300f0d84c0SMike Travis unsigned long lh1_aoerr0:1; /* RW */ 7310f0d84c0SMike Travis unsigned long gr0_aoerr0:1; /* RW */ 7320f0d84c0SMike Travis unsigned long gr1_aoerr0:1; /* RW */ 7330f0d84c0SMike Travis unsigned long xb_aoerr0:1; /* RW */ 7340f0d84c0SMike Travis unsigned long rtq0_aoerr0:1; /* RW */ 7350f0d84c0SMike Travis unsigned long rtq1_aoerr0:1; /* RW */ 7360f0d84c0SMike Travis unsigned long rtq2_aoerr0:1; /* RW */ 7370f0d84c0SMike Travis unsigned long rtq3_aoerr0:1; /* RW */ 73860fe7be3SMike Travis unsigned long ni0_aoerr0:1; /* RW */ 73960fe7be3SMike Travis unsigned long ni1_aoerr0:1; /* RW */ 74060fe7be3SMike Travis unsigned long lb_aoerr1:1; /* RW */ 7410f0d84c0SMike Travis unsigned long kt_aoerr1:1; /* RW */ 74260fe7be3SMike Travis unsigned long rh_aoerr1:1; /* RW */ 74360fe7be3SMike Travis unsigned long lh0_aoerr1:1; /* RW */ 74460fe7be3SMike Travis unsigned long lh1_aoerr1:1; /* RW */ 74560fe7be3SMike Travis unsigned long gr0_aoerr1:1; /* RW */ 74660fe7be3SMike Travis unsigned long gr1_aoerr1:1; /* RW */ 74760fe7be3SMike Travis unsigned long xb_aoerr1:1; /* RW */ 7480f0d84c0SMike Travis unsigned long rtq0_aoerr1:1; /* RW */ 7490f0d84c0SMike Travis unsigned long rtq1_aoerr1:1; /* RW */ 7500f0d84c0SMike Travis unsigned long rtq2_aoerr1:1; /* RW */ 7510f0d84c0SMike Travis unsigned long rtq3_aoerr1:1; /* RW */ 75260fe7be3SMike Travis unsigned long ni0_aoerr1:1; /* RW */ 75360fe7be3SMike Travis unsigned long ni1_aoerr1:1; /* RW */ 75460fe7be3SMike Travis unsigned long system_shutdown_int:1; /* RW */ 75560fe7be3SMike Travis unsigned long lb_irq_int_0:1; /* RW */ 75660fe7be3SMike Travis unsigned long lb_irq_int_1:1; /* RW */ 75760fe7be3SMike Travis unsigned long lb_irq_int_2:1; /* RW */ 75860fe7be3SMike Travis unsigned long lb_irq_int_3:1; /* RW */ 75960fe7be3SMike Travis unsigned long lb_irq_int_4:1; /* RW */ 76060fe7be3SMike Travis unsigned long lb_irq_int_5:1; /* RW */ 76160fe7be3SMike Travis unsigned long lb_irq_int_6:1; /* RW */ 76260fe7be3SMike Travis unsigned long lb_irq_int_7:1; /* RW */ 76360fe7be3SMike Travis unsigned long lb_irq_int_8:1; /* RW */ 76460fe7be3SMike Travis unsigned long lb_irq_int_9:1; /* RW */ 76560fe7be3SMike Travis unsigned long lb_irq_int_10:1; /* RW */ 76660fe7be3SMike Travis unsigned long lb_irq_int_11:1; /* RW */ 76760fe7be3SMike Travis unsigned long lb_irq_int_12:1; /* RW */ 76860fe7be3SMike Travis unsigned long lb_irq_int_13:1; /* RW */ 76960fe7be3SMike Travis unsigned long lb_irq_int_14:1; /* RW */ 77060fe7be3SMike Travis unsigned long lb_irq_int_15:1; /* RW */ 77160fe7be3SMike Travis unsigned long l1_nmi_int:1; /* RW */ 77260fe7be3SMike Travis unsigned long stop_clock:1; /* RW */ 77360fe7be3SMike Travis unsigned long asic_to_l1:1; /* RW */ 77460fe7be3SMike Travis unsigned long l1_to_asic:1; /* RW */ 77560fe7be3SMike Travis unsigned long la_seq_trigger:1; /* RW */ 77660fe7be3SMike Travis unsigned long ipi_int:1; /* RW */ 77760fe7be3SMike Travis unsigned long extio_int0:1; /* RW */ 77860fe7be3SMike Travis unsigned long extio_int1:1; /* RW */ 77960fe7be3SMike Travis unsigned long extio_int2:1; /* RW */ 78060fe7be3SMike Travis unsigned long extio_int3:1; /* RW */ 7810f0d84c0SMike Travis } s4; 782647128f1SMike Travis 783647128f1SMike Travis /* UV3 unique struct */ 784647128f1SMike Travis struct uv3h_event_occurred0_s { 785647128f1SMike Travis unsigned long lb_hcerr:1; /* RW */ 786647128f1SMike Travis unsigned long qp_hcerr:1; /* RW */ 787647128f1SMike Travis unsigned long rh_hcerr:1; /* RW */ 788647128f1SMike Travis unsigned long lh0_hcerr:1; /* RW */ 789647128f1SMike Travis unsigned long lh1_hcerr:1; /* RW */ 790647128f1SMike Travis unsigned long gr0_hcerr:1; /* RW */ 791647128f1SMike Travis unsigned long gr1_hcerr:1; /* RW */ 792647128f1SMike Travis unsigned long ni0_hcerr:1; /* RW */ 793647128f1SMike Travis unsigned long ni1_hcerr:1; /* RW */ 794647128f1SMike Travis unsigned long lb_aoerr0:1; /* RW */ 795647128f1SMike Travis unsigned long qp_aoerr0:1; /* RW */ 796647128f1SMike Travis unsigned long rh_aoerr0:1; /* RW */ 797647128f1SMike Travis unsigned long lh0_aoerr0:1; /* RW */ 798647128f1SMike Travis unsigned long lh1_aoerr0:1; /* RW */ 799647128f1SMike Travis unsigned long gr0_aoerr0:1; /* RW */ 800647128f1SMike Travis unsigned long gr1_aoerr0:1; /* RW */ 801647128f1SMike Travis unsigned long xb_aoerr0:1; /* RW */ 802647128f1SMike Travis unsigned long rt_aoerr0:1; /* RW */ 803647128f1SMike Travis unsigned long ni0_aoerr0:1; /* RW */ 804647128f1SMike Travis unsigned long ni1_aoerr0:1; /* RW */ 805647128f1SMike Travis unsigned long lb_aoerr1:1; /* RW */ 806647128f1SMike Travis unsigned long qp_aoerr1:1; /* RW */ 807647128f1SMike Travis unsigned long rh_aoerr1:1; /* RW */ 808647128f1SMike Travis unsigned long lh0_aoerr1:1; /* RW */ 809647128f1SMike Travis unsigned long lh1_aoerr1:1; /* RW */ 810647128f1SMike Travis unsigned long gr0_aoerr1:1; /* RW */ 811647128f1SMike Travis unsigned long gr1_aoerr1:1; /* RW */ 812647128f1SMike Travis unsigned long xb_aoerr1:1; /* RW */ 813647128f1SMike Travis unsigned long rt_aoerr1:1; /* RW */ 814647128f1SMike Travis unsigned long ni0_aoerr1:1; /* RW */ 815647128f1SMike Travis unsigned long ni1_aoerr1:1; /* RW */ 816647128f1SMike Travis unsigned long system_shutdown_int:1; /* RW */ 817647128f1SMike Travis unsigned long lb_irq_int_0:1; /* RW */ 818647128f1SMike Travis unsigned long lb_irq_int_1:1; /* RW */ 819647128f1SMike Travis unsigned long lb_irq_int_2:1; /* RW */ 820647128f1SMike Travis unsigned long lb_irq_int_3:1; /* RW */ 821647128f1SMike Travis unsigned long lb_irq_int_4:1; /* RW */ 822647128f1SMike Travis unsigned long lb_irq_int_5:1; /* RW */ 823647128f1SMike Travis unsigned long lb_irq_int_6:1; /* RW */ 824647128f1SMike Travis unsigned long lb_irq_int_7:1; /* RW */ 825647128f1SMike Travis unsigned long lb_irq_int_8:1; /* RW */ 826647128f1SMike Travis unsigned long lb_irq_int_9:1; /* RW */ 827647128f1SMike Travis unsigned long lb_irq_int_10:1; /* RW */ 828647128f1SMike Travis unsigned long lb_irq_int_11:1; /* RW */ 829647128f1SMike Travis unsigned long lb_irq_int_12:1; /* RW */ 830647128f1SMike Travis unsigned long lb_irq_int_13:1; /* RW */ 831647128f1SMike Travis unsigned long lb_irq_int_14:1; /* RW */ 832647128f1SMike Travis unsigned long lb_irq_int_15:1; /* RW */ 833647128f1SMike Travis unsigned long l1_nmi_int:1; /* RW */ 834647128f1SMike Travis unsigned long stop_clock:1; /* RW */ 835647128f1SMike Travis unsigned long asic_to_l1:1; /* RW */ 836647128f1SMike Travis unsigned long l1_to_asic:1; /* RW */ 837647128f1SMike Travis unsigned long la_seq_trigger:1; /* RW */ 838647128f1SMike Travis unsigned long ipi_int:1; /* RW */ 839647128f1SMike Travis unsigned long extio_int0:1; /* RW */ 840647128f1SMike Travis unsigned long extio_int1:1; /* RW */ 841647128f1SMike Travis unsigned long extio_int2:1; /* RW */ 842647128f1SMike Travis unsigned long extio_int3:1; /* RW */ 843647128f1SMike Travis unsigned long profile_int:1; /* RW */ 844647128f1SMike Travis unsigned long rsvd_59_63:5; 845647128f1SMike Travis } s3; 846647128f1SMike Travis 847647128f1SMike Travis /* UV2 unique struct */ 848647128f1SMike Travis struct uv2h_event_occurred0_s { 849647128f1SMike Travis unsigned long lb_hcerr:1; /* RW */ 850647128f1SMike Travis unsigned long qp_hcerr:1; /* RW */ 851647128f1SMike Travis unsigned long rh_hcerr:1; /* RW */ 852647128f1SMike Travis unsigned long lh0_hcerr:1; /* RW */ 853647128f1SMike Travis unsigned long lh1_hcerr:1; /* RW */ 854647128f1SMike Travis unsigned long gr0_hcerr:1; /* RW */ 855647128f1SMike Travis unsigned long gr1_hcerr:1; /* RW */ 856647128f1SMike Travis unsigned long ni0_hcerr:1; /* RW */ 857647128f1SMike Travis unsigned long ni1_hcerr:1; /* RW */ 858647128f1SMike Travis unsigned long lb_aoerr0:1; /* RW */ 859647128f1SMike Travis unsigned long qp_aoerr0:1; /* RW */ 860647128f1SMike Travis unsigned long rh_aoerr0:1; /* RW */ 861647128f1SMike Travis unsigned long lh0_aoerr0:1; /* RW */ 862647128f1SMike Travis unsigned long lh1_aoerr0:1; /* RW */ 863647128f1SMike Travis unsigned long gr0_aoerr0:1; /* RW */ 864647128f1SMike Travis unsigned long gr1_aoerr0:1; /* RW */ 865647128f1SMike Travis unsigned long xb_aoerr0:1; /* RW */ 866647128f1SMike Travis unsigned long rt_aoerr0:1; /* RW */ 867647128f1SMike Travis unsigned long ni0_aoerr0:1; /* RW */ 868647128f1SMike Travis unsigned long ni1_aoerr0:1; /* RW */ 869647128f1SMike Travis unsigned long lb_aoerr1:1; /* RW */ 870647128f1SMike Travis unsigned long qp_aoerr1:1; /* RW */ 871647128f1SMike Travis unsigned long rh_aoerr1:1; /* RW */ 872647128f1SMike Travis unsigned long lh0_aoerr1:1; /* RW */ 873647128f1SMike Travis unsigned long lh1_aoerr1:1; /* RW */ 874647128f1SMike Travis unsigned long gr0_aoerr1:1; /* RW */ 875647128f1SMike Travis unsigned long gr1_aoerr1:1; /* RW */ 876647128f1SMike Travis unsigned long xb_aoerr1:1; /* RW */ 877647128f1SMike Travis unsigned long rt_aoerr1:1; /* RW */ 878647128f1SMike Travis unsigned long ni0_aoerr1:1; /* RW */ 879647128f1SMike Travis unsigned long ni1_aoerr1:1; /* RW */ 880647128f1SMike Travis unsigned long system_shutdown_int:1; /* RW */ 881647128f1SMike Travis unsigned long lb_irq_int_0:1; /* RW */ 882647128f1SMike Travis unsigned long lb_irq_int_1:1; /* RW */ 883647128f1SMike Travis unsigned long lb_irq_int_2:1; /* RW */ 884647128f1SMike Travis unsigned long lb_irq_int_3:1; /* RW */ 885647128f1SMike Travis unsigned long lb_irq_int_4:1; /* RW */ 886647128f1SMike Travis unsigned long lb_irq_int_5:1; /* RW */ 887647128f1SMike Travis unsigned long lb_irq_int_6:1; /* RW */ 888647128f1SMike Travis unsigned long lb_irq_int_7:1; /* RW */ 889647128f1SMike Travis unsigned long lb_irq_int_8:1; /* RW */ 890647128f1SMike Travis unsigned long lb_irq_int_9:1; /* RW */ 891647128f1SMike Travis unsigned long lb_irq_int_10:1; /* RW */ 892647128f1SMike Travis unsigned long lb_irq_int_11:1; /* RW */ 893647128f1SMike Travis unsigned long lb_irq_int_12:1; /* RW */ 894647128f1SMike Travis unsigned long lb_irq_int_13:1; /* RW */ 895647128f1SMike Travis unsigned long lb_irq_int_14:1; /* RW */ 896647128f1SMike Travis unsigned long lb_irq_int_15:1; /* RW */ 897647128f1SMike Travis unsigned long l1_nmi_int:1; /* RW */ 898647128f1SMike Travis unsigned long stop_clock:1; /* RW */ 899647128f1SMike Travis unsigned long asic_to_l1:1; /* RW */ 900647128f1SMike Travis unsigned long l1_to_asic:1; /* RW */ 901647128f1SMike Travis unsigned long la_seq_trigger:1; /* RW */ 902647128f1SMike Travis unsigned long ipi_int:1; /* RW */ 903647128f1SMike Travis unsigned long extio_int0:1; /* RW */ 904647128f1SMike Travis unsigned long extio_int1:1; /* RW */ 905647128f1SMike Travis unsigned long extio_int2:1; /* RW */ 906647128f1SMike Travis unsigned long extio_int3:1; /* RW */ 907647128f1SMike Travis unsigned long profile_int:1; /* RW */ 908647128f1SMike Travis unsigned long rsvd_59_63:5; 909647128f1SMike Travis } s2; 910bb898558SAl Viro }; 911bb898558SAl Viro 912bb898558SAl Viro /* ========================================================================= */ 913bb898558SAl Viro /* UVH_EVENT_OCCURRED0_ALIAS */ 914bb898558SAl Viro /* ========================================================================= */ 91560fe7be3SMike Travis #define UVH_EVENT_OCCURRED0_ALIAS 0x70008UL 91660fe7be3SMike Travis 917bb898558SAl Viro 918bb898558SAl Viro /* ========================================================================= */ 919647128f1SMike Travis /* UVH_EVENT_OCCURRED1 */ 9200d12ef0cSMike Travis /* ========================================================================= */ 921647128f1SMike Travis #define UVH_EVENT_OCCURRED1 0x70080UL 9220d12ef0cSMike Travis 9230f0d84c0SMike Travis 924647128f1SMike Travis 925647128f1SMike Travis /* UVYH common defines */ 926647128f1SMike Travis #define UVYH_EVENT_OCCURRED1_IPI_INT_SHFT 0 927647128f1SMike Travis #define UVYH_EVENT_OCCURRED1_IPI_INT_MASK 0x0000000000000001UL 928647128f1SMike Travis #define UVYH_EVENT_OCCURRED1_EXTIO_INT0_SHFT 1 929647128f1SMike Travis #define UVYH_EVENT_OCCURRED1_EXTIO_INT0_MASK 0x0000000000000002UL 930647128f1SMike Travis #define UVYH_EVENT_OCCURRED1_EXTIO_INT1_SHFT 2 931647128f1SMike Travis #define UVYH_EVENT_OCCURRED1_EXTIO_INT1_MASK 0x0000000000000004UL 932647128f1SMike Travis #define UVYH_EVENT_OCCURRED1_EXTIO_INT2_SHFT 3 933647128f1SMike Travis #define UVYH_EVENT_OCCURRED1_EXTIO_INT2_MASK 0x0000000000000008UL 934647128f1SMike Travis #define UVYH_EVENT_OCCURRED1_EXTIO_INT3_SHFT 4 935647128f1SMike Travis #define UVYH_EVENT_OCCURRED1_EXTIO_INT3_MASK 0x0000000000000010UL 936647128f1SMike Travis #define UVYH_EVENT_OCCURRED1_PROFILE_INT_SHFT 5 937647128f1SMike Travis #define UVYH_EVENT_OCCURRED1_PROFILE_INT_MASK 0x0000000000000020UL 938647128f1SMike Travis #define UVYH_EVENT_OCCURRED1_BAU_DATA_SHFT 6 939647128f1SMike Travis #define UVYH_EVENT_OCCURRED1_BAU_DATA_MASK 0x0000000000000040UL 940647128f1SMike Travis #define UVYH_EVENT_OCCURRED1_PROC_GENERAL_SHFT 7 941647128f1SMike Travis #define UVYH_EVENT_OCCURRED1_PROC_GENERAL_MASK 0x0000000000000080UL 942647128f1SMike Travis #define UVYH_EVENT_OCCURRED1_XH_TLB_INT0_SHFT 8 943647128f1SMike Travis #define UVYH_EVENT_OCCURRED1_XH_TLB_INT0_MASK 0x0000000000000100UL 944647128f1SMike Travis #define UVYH_EVENT_OCCURRED1_XH_TLB_INT1_SHFT 9 945647128f1SMike Travis #define UVYH_EVENT_OCCURRED1_XH_TLB_INT1_MASK 0x0000000000000200UL 946647128f1SMike Travis #define UVYH_EVENT_OCCURRED1_XH_TLB_INT2_SHFT 10 947647128f1SMike Travis #define UVYH_EVENT_OCCURRED1_XH_TLB_INT2_MASK 0x0000000000000400UL 948647128f1SMike Travis #define UVYH_EVENT_OCCURRED1_XH_TLB_INT3_SHFT 11 949647128f1SMike Travis #define UVYH_EVENT_OCCURRED1_XH_TLB_INT3_MASK 0x0000000000000800UL 950647128f1SMike Travis #define UVYH_EVENT_OCCURRED1_XH_TLB_INT4_SHFT 12 951647128f1SMike Travis #define UVYH_EVENT_OCCURRED1_XH_TLB_INT4_MASK 0x0000000000001000UL 952647128f1SMike Travis #define UVYH_EVENT_OCCURRED1_XH_TLB_INT5_SHFT 13 953647128f1SMike Travis #define UVYH_EVENT_OCCURRED1_XH_TLB_INT5_MASK 0x0000000000002000UL 954647128f1SMike Travis #define UVYH_EVENT_OCCURRED1_RDM_TLB_INT0_SHFT 14 955647128f1SMike Travis #define UVYH_EVENT_OCCURRED1_RDM_TLB_INT0_MASK 0x0000000000004000UL 956647128f1SMike Travis #define UVYH_EVENT_OCCURRED1_RDM_TLB_INT1_SHFT 15 957647128f1SMike Travis #define UVYH_EVENT_OCCURRED1_RDM_TLB_INT1_MASK 0x0000000000008000UL 958647128f1SMike Travis #define UVYH_EVENT_OCCURRED1_RDM_TLB_INT2_SHFT 16 959647128f1SMike Travis #define UVYH_EVENT_OCCURRED1_RDM_TLB_INT2_MASK 0x0000000000010000UL 960647128f1SMike Travis #define UVYH_EVENT_OCCURRED1_RDM_TLB_INT3_SHFT 17 961647128f1SMike Travis #define UVYH_EVENT_OCCURRED1_RDM_TLB_INT3_MASK 0x0000000000020000UL 962647128f1SMike Travis #define UVYH_EVENT_OCCURRED1_RDM_TLB_INT4_SHFT 18 963647128f1SMike Travis #define UVYH_EVENT_OCCURRED1_RDM_TLB_INT4_MASK 0x0000000000040000UL 964647128f1SMike Travis #define UVYH_EVENT_OCCURRED1_RDM_TLB_INT5_SHFT 19 965647128f1SMike Travis #define UVYH_EVENT_OCCURRED1_RDM_TLB_INT5_MASK 0x0000000000080000UL 966647128f1SMike Travis #define UVYH_EVENT_OCCURRED1_RDM_TLB_INT6_SHFT 20 967647128f1SMike Travis #define UVYH_EVENT_OCCURRED1_RDM_TLB_INT6_MASK 0x0000000000100000UL 968647128f1SMike Travis #define UVYH_EVENT_OCCURRED1_RDM_TLB_INT7_SHFT 21 969647128f1SMike Travis #define UVYH_EVENT_OCCURRED1_RDM_TLB_INT7_MASK 0x0000000000200000UL 970647128f1SMike Travis #define UVYH_EVENT_OCCURRED1_RDM_TLB_INT8_SHFT 22 971647128f1SMike Travis #define UVYH_EVENT_OCCURRED1_RDM_TLB_INT8_MASK 0x0000000000400000UL 972647128f1SMike Travis #define UVYH_EVENT_OCCURRED1_RDM_TLB_INT9_SHFT 23 973647128f1SMike Travis #define UVYH_EVENT_OCCURRED1_RDM_TLB_INT9_MASK 0x0000000000800000UL 974647128f1SMike Travis #define UVYH_EVENT_OCCURRED1_RDM_TLB_INT10_SHFT 24 975647128f1SMike Travis #define UVYH_EVENT_OCCURRED1_RDM_TLB_INT10_MASK 0x0000000001000000UL 976647128f1SMike Travis #define UVYH_EVENT_OCCURRED1_RDM_TLB_INT11_SHFT 25 977647128f1SMike Travis #define UVYH_EVENT_OCCURRED1_RDM_TLB_INT11_MASK 0x0000000002000000UL 978647128f1SMike Travis #define UVYH_EVENT_OCCURRED1_RDM_TLB_INT12_SHFT 26 979647128f1SMike Travis #define UVYH_EVENT_OCCURRED1_RDM_TLB_INT12_MASK 0x0000000004000000UL 980647128f1SMike Travis #define UVYH_EVENT_OCCURRED1_RDM_TLB_INT13_SHFT 27 981647128f1SMike Travis #define UVYH_EVENT_OCCURRED1_RDM_TLB_INT13_MASK 0x0000000008000000UL 982647128f1SMike Travis #define UVYH_EVENT_OCCURRED1_RDM_TLB_INT14_SHFT 28 983647128f1SMike Travis #define UVYH_EVENT_OCCURRED1_RDM_TLB_INT14_MASK 0x0000000010000000UL 984647128f1SMike Travis #define UVYH_EVENT_OCCURRED1_RDM_TLB_INT15_SHFT 29 985647128f1SMike Travis #define UVYH_EVENT_OCCURRED1_RDM_TLB_INT15_MASK 0x0000000020000000UL 986647128f1SMike Travis #define UVYH_EVENT_OCCURRED1_RDM_TLB_INT16_SHFT 30 987647128f1SMike Travis #define UVYH_EVENT_OCCURRED1_RDM_TLB_INT16_MASK 0x0000000040000000UL 988647128f1SMike Travis #define UVYH_EVENT_OCCURRED1_RDM_TLB_INT17_SHFT 31 989647128f1SMike Travis #define UVYH_EVENT_OCCURRED1_RDM_TLB_INT17_MASK 0x0000000080000000UL 990647128f1SMike Travis #define UVYH_EVENT_OCCURRED1_RDM_TLB_INT18_SHFT 32 991647128f1SMike Travis #define UVYH_EVENT_OCCURRED1_RDM_TLB_INT18_MASK 0x0000000100000000UL 992647128f1SMike Travis #define UVYH_EVENT_OCCURRED1_RDM_TLB_INT19_SHFT 33 993647128f1SMike Travis #define UVYH_EVENT_OCCURRED1_RDM_TLB_INT19_MASK 0x0000000200000000UL 994647128f1SMike Travis #define UVYH_EVENT_OCCURRED1_RDM_TLB_INT20_SHFT 34 995647128f1SMike Travis #define UVYH_EVENT_OCCURRED1_RDM_TLB_INT20_MASK 0x0000000400000000UL 996647128f1SMike Travis #define UVYH_EVENT_OCCURRED1_RDM_TLB_INT21_SHFT 35 997647128f1SMike Travis #define UVYH_EVENT_OCCURRED1_RDM_TLB_INT21_MASK 0x0000000800000000UL 998647128f1SMike Travis #define UVYH_EVENT_OCCURRED1_RDM_TLB_INT22_SHFT 36 999647128f1SMike Travis #define UVYH_EVENT_OCCURRED1_RDM_TLB_INT22_MASK 0x0000001000000000UL 1000647128f1SMike Travis #define UVYH_EVENT_OCCURRED1_RDM_TLB_INT23_SHFT 37 1001647128f1SMike Travis #define UVYH_EVENT_OCCURRED1_RDM_TLB_INT23_MASK 0x0000002000000000UL 1002647128f1SMike Travis 1003647128f1SMike Travis /* UV4 unique defines */ 1004647128f1SMike Travis #define UV4H_EVENT_OCCURRED1_PROFILE_INT_SHFT 0 1005647128f1SMike Travis #define UV4H_EVENT_OCCURRED1_PROFILE_INT_MASK 0x0000000000000001UL 1006647128f1SMike Travis #define UV4H_EVENT_OCCURRED1_BAU_DATA_SHFT 1 1007647128f1SMike Travis #define UV4H_EVENT_OCCURRED1_BAU_DATA_MASK 0x0000000000000002UL 1008647128f1SMike Travis #define UV4H_EVENT_OCCURRED1_PROC_GENERAL_SHFT 2 1009647128f1SMike Travis #define UV4H_EVENT_OCCURRED1_PROC_GENERAL_MASK 0x0000000000000004UL 1010647128f1SMike Travis #define UV4H_EVENT_OCCURRED1_GR0_TLB_INT0_SHFT 3 1011647128f1SMike Travis #define UV4H_EVENT_OCCURRED1_GR0_TLB_INT0_MASK 0x0000000000000008UL 1012647128f1SMike Travis #define UV4H_EVENT_OCCURRED1_GR0_TLB_INT1_SHFT 4 1013647128f1SMike Travis #define UV4H_EVENT_OCCURRED1_GR0_TLB_INT1_MASK 0x0000000000000010UL 1014647128f1SMike Travis #define UV4H_EVENT_OCCURRED1_GR0_TLB_INT2_SHFT 5 1015647128f1SMike Travis #define UV4H_EVENT_OCCURRED1_GR0_TLB_INT2_MASK 0x0000000000000020UL 1016647128f1SMike Travis #define UV4H_EVENT_OCCURRED1_GR0_TLB_INT3_SHFT 6 1017647128f1SMike Travis #define UV4H_EVENT_OCCURRED1_GR0_TLB_INT3_MASK 0x0000000000000040UL 1018647128f1SMike Travis #define UV4H_EVENT_OCCURRED1_GR0_TLB_INT4_SHFT 7 1019647128f1SMike Travis #define UV4H_EVENT_OCCURRED1_GR0_TLB_INT4_MASK 0x0000000000000080UL 1020647128f1SMike Travis #define UV4H_EVENT_OCCURRED1_GR0_TLB_INT5_SHFT 8 1021647128f1SMike Travis #define UV4H_EVENT_OCCURRED1_GR0_TLB_INT5_MASK 0x0000000000000100UL 1022647128f1SMike Travis #define UV4H_EVENT_OCCURRED1_GR0_TLB_INT6_SHFT 9 1023647128f1SMike Travis #define UV4H_EVENT_OCCURRED1_GR0_TLB_INT6_MASK 0x0000000000000200UL 1024647128f1SMike Travis #define UV4H_EVENT_OCCURRED1_GR0_TLB_INT7_SHFT 10 1025647128f1SMike Travis #define UV4H_EVENT_OCCURRED1_GR0_TLB_INT7_MASK 0x0000000000000400UL 1026647128f1SMike Travis #define UV4H_EVENT_OCCURRED1_GR0_TLB_INT8_SHFT 11 1027647128f1SMike Travis #define UV4H_EVENT_OCCURRED1_GR0_TLB_INT8_MASK 0x0000000000000800UL 1028647128f1SMike Travis #define UV4H_EVENT_OCCURRED1_GR0_TLB_INT9_SHFT 12 1029647128f1SMike Travis #define UV4H_EVENT_OCCURRED1_GR0_TLB_INT9_MASK 0x0000000000001000UL 1030647128f1SMike Travis #define UV4H_EVENT_OCCURRED1_GR0_TLB_INT10_SHFT 13 1031647128f1SMike Travis #define UV4H_EVENT_OCCURRED1_GR0_TLB_INT10_MASK 0x0000000000002000UL 1032647128f1SMike Travis #define UV4H_EVENT_OCCURRED1_GR0_TLB_INT11_SHFT 14 1033647128f1SMike Travis #define UV4H_EVENT_OCCURRED1_GR0_TLB_INT11_MASK 0x0000000000004000UL 1034647128f1SMike Travis #define UV4H_EVENT_OCCURRED1_GR0_TLB_INT12_SHFT 15 1035647128f1SMike Travis #define UV4H_EVENT_OCCURRED1_GR0_TLB_INT12_MASK 0x0000000000008000UL 1036647128f1SMike Travis #define UV4H_EVENT_OCCURRED1_GR0_TLB_INT13_SHFT 16 1037647128f1SMike Travis #define UV4H_EVENT_OCCURRED1_GR0_TLB_INT13_MASK 0x0000000000010000UL 1038647128f1SMike Travis #define UV4H_EVENT_OCCURRED1_GR0_TLB_INT14_SHFT 17 1039647128f1SMike Travis #define UV4H_EVENT_OCCURRED1_GR0_TLB_INT14_MASK 0x0000000000020000UL 1040647128f1SMike Travis #define UV4H_EVENT_OCCURRED1_GR0_TLB_INT15_SHFT 18 1041647128f1SMike Travis #define UV4H_EVENT_OCCURRED1_GR0_TLB_INT15_MASK 0x0000000000040000UL 1042647128f1SMike Travis #define UV4H_EVENT_OCCURRED1_GR0_TLB_INT16_SHFT 19 1043647128f1SMike Travis #define UV4H_EVENT_OCCURRED1_GR0_TLB_INT16_MASK 0x0000000000080000UL 1044647128f1SMike Travis #define UV4H_EVENT_OCCURRED1_GR0_TLB_INT17_SHFT 20 1045647128f1SMike Travis #define UV4H_EVENT_OCCURRED1_GR0_TLB_INT17_MASK 0x0000000000100000UL 1046647128f1SMike Travis #define UV4H_EVENT_OCCURRED1_GR0_TLB_INT18_SHFT 21 1047647128f1SMike Travis #define UV4H_EVENT_OCCURRED1_GR0_TLB_INT18_MASK 0x0000000000200000UL 1048647128f1SMike Travis #define UV4H_EVENT_OCCURRED1_GR0_TLB_INT19_SHFT 22 1049647128f1SMike Travis #define UV4H_EVENT_OCCURRED1_GR0_TLB_INT19_MASK 0x0000000000400000UL 1050647128f1SMike Travis #define UV4H_EVENT_OCCURRED1_GR0_TLB_INT20_SHFT 23 1051647128f1SMike Travis #define UV4H_EVENT_OCCURRED1_GR0_TLB_INT20_MASK 0x0000000000800000UL 1052647128f1SMike Travis #define UV4H_EVENT_OCCURRED1_GR0_TLB_INT21_SHFT 24 1053647128f1SMike Travis #define UV4H_EVENT_OCCURRED1_GR0_TLB_INT21_MASK 0x0000000001000000UL 1054647128f1SMike Travis #define UV4H_EVENT_OCCURRED1_GR0_TLB_INT22_SHFT 25 1055647128f1SMike Travis #define UV4H_EVENT_OCCURRED1_GR0_TLB_INT22_MASK 0x0000000002000000UL 1056647128f1SMike Travis #define UV4H_EVENT_OCCURRED1_GR0_TLB_INT23_SHFT 26 1057647128f1SMike Travis #define UV4H_EVENT_OCCURRED1_GR0_TLB_INT23_MASK 0x0000000004000000UL 1058647128f1SMike Travis #define UV4H_EVENT_OCCURRED1_GR1_TLB_INT0_SHFT 27 1059647128f1SMike Travis #define UV4H_EVENT_OCCURRED1_GR1_TLB_INT0_MASK 0x0000000008000000UL 1060647128f1SMike Travis #define UV4H_EVENT_OCCURRED1_GR1_TLB_INT1_SHFT 28 1061647128f1SMike Travis #define UV4H_EVENT_OCCURRED1_GR1_TLB_INT1_MASK 0x0000000010000000UL 1062647128f1SMike Travis #define UV4H_EVENT_OCCURRED1_GR1_TLB_INT2_SHFT 29 1063647128f1SMike Travis #define UV4H_EVENT_OCCURRED1_GR1_TLB_INT2_MASK 0x0000000020000000UL 1064647128f1SMike Travis #define UV4H_EVENT_OCCURRED1_GR1_TLB_INT3_SHFT 30 1065647128f1SMike Travis #define UV4H_EVENT_OCCURRED1_GR1_TLB_INT3_MASK 0x0000000040000000UL 1066647128f1SMike Travis #define UV4H_EVENT_OCCURRED1_GR1_TLB_INT4_SHFT 31 1067647128f1SMike Travis #define UV4H_EVENT_OCCURRED1_GR1_TLB_INT4_MASK 0x0000000080000000UL 1068647128f1SMike Travis #define UV4H_EVENT_OCCURRED1_GR1_TLB_INT5_SHFT 32 1069647128f1SMike Travis #define UV4H_EVENT_OCCURRED1_GR1_TLB_INT5_MASK 0x0000000100000000UL 1070647128f1SMike Travis #define UV4H_EVENT_OCCURRED1_GR1_TLB_INT6_SHFT 33 1071647128f1SMike Travis #define UV4H_EVENT_OCCURRED1_GR1_TLB_INT6_MASK 0x0000000200000000UL 1072647128f1SMike Travis #define UV4H_EVENT_OCCURRED1_GR1_TLB_INT7_SHFT 34 1073647128f1SMike Travis #define UV4H_EVENT_OCCURRED1_GR1_TLB_INT7_MASK 0x0000000400000000UL 1074647128f1SMike Travis #define UV4H_EVENT_OCCURRED1_GR1_TLB_INT8_SHFT 35 1075647128f1SMike Travis #define UV4H_EVENT_OCCURRED1_GR1_TLB_INT8_MASK 0x0000000800000000UL 1076647128f1SMike Travis #define UV4H_EVENT_OCCURRED1_GR1_TLB_INT9_SHFT 36 1077647128f1SMike Travis #define UV4H_EVENT_OCCURRED1_GR1_TLB_INT9_MASK 0x0000001000000000UL 1078647128f1SMike Travis #define UV4H_EVENT_OCCURRED1_GR1_TLB_INT10_SHFT 37 1079647128f1SMike Travis #define UV4H_EVENT_OCCURRED1_GR1_TLB_INT10_MASK 0x0000002000000000UL 1080647128f1SMike Travis #define UV4H_EVENT_OCCURRED1_GR1_TLB_INT11_SHFT 38 1081647128f1SMike Travis #define UV4H_EVENT_OCCURRED1_GR1_TLB_INT11_MASK 0x0000004000000000UL 1082647128f1SMike Travis #define UV4H_EVENT_OCCURRED1_GR1_TLB_INT12_SHFT 39 1083647128f1SMike Travis #define UV4H_EVENT_OCCURRED1_GR1_TLB_INT12_MASK 0x0000008000000000UL 1084647128f1SMike Travis #define UV4H_EVENT_OCCURRED1_GR1_TLB_INT13_SHFT 40 1085647128f1SMike Travis #define UV4H_EVENT_OCCURRED1_GR1_TLB_INT13_MASK 0x0000010000000000UL 1086647128f1SMike Travis #define UV4H_EVENT_OCCURRED1_GR1_TLB_INT14_SHFT 41 1087647128f1SMike Travis #define UV4H_EVENT_OCCURRED1_GR1_TLB_INT14_MASK 0x0000020000000000UL 1088647128f1SMike Travis #define UV4H_EVENT_OCCURRED1_GR1_TLB_INT15_SHFT 42 1089647128f1SMike Travis #define UV4H_EVENT_OCCURRED1_GR1_TLB_INT15_MASK 0x0000040000000000UL 1090647128f1SMike Travis #define UV4H_EVENT_OCCURRED1_GR1_TLB_INT16_SHFT 43 1091647128f1SMike Travis #define UV4H_EVENT_OCCURRED1_GR1_TLB_INT16_MASK 0x0000080000000000UL 1092647128f1SMike Travis #define UV4H_EVENT_OCCURRED1_GR1_TLB_INT17_SHFT 44 1093647128f1SMike Travis #define UV4H_EVENT_OCCURRED1_GR1_TLB_INT17_MASK 0x0000100000000000UL 1094647128f1SMike Travis #define UV4H_EVENT_OCCURRED1_GR1_TLB_INT18_SHFT 45 1095647128f1SMike Travis #define UV4H_EVENT_OCCURRED1_GR1_TLB_INT18_MASK 0x0000200000000000UL 1096647128f1SMike Travis #define UV4H_EVENT_OCCURRED1_GR1_TLB_INT19_SHFT 46 1097647128f1SMike Travis #define UV4H_EVENT_OCCURRED1_GR1_TLB_INT19_MASK 0x0000400000000000UL 1098647128f1SMike Travis #define UV4H_EVENT_OCCURRED1_GR1_TLB_INT20_SHFT 47 1099647128f1SMike Travis #define UV4H_EVENT_OCCURRED1_GR1_TLB_INT20_MASK 0x0000800000000000UL 1100647128f1SMike Travis #define UV4H_EVENT_OCCURRED1_GR1_TLB_INT21_SHFT 48 1101647128f1SMike Travis #define UV4H_EVENT_OCCURRED1_GR1_TLB_INT21_MASK 0x0001000000000000UL 1102647128f1SMike Travis #define UV4H_EVENT_OCCURRED1_GR1_TLB_INT22_SHFT 49 1103647128f1SMike Travis #define UV4H_EVENT_OCCURRED1_GR1_TLB_INT22_MASK 0x0002000000000000UL 1104647128f1SMike Travis #define UV4H_EVENT_OCCURRED1_GR1_TLB_INT23_SHFT 50 1105647128f1SMike Travis #define UV4H_EVENT_OCCURRED1_GR1_TLB_INT23_MASK 0x0004000000000000UL 1106647128f1SMike Travis 1107647128f1SMike Travis /* UV3 unique defines */ 1108647128f1SMike Travis #define UV3H_EVENT_OCCURRED1_BAU_DATA_SHFT 0 1109647128f1SMike Travis #define UV3H_EVENT_OCCURRED1_BAU_DATA_MASK 0x0000000000000001UL 1110647128f1SMike Travis #define UV3H_EVENT_OCCURRED1_POWER_MANAGEMENT_REQ_SHFT 1 1111647128f1SMike Travis #define UV3H_EVENT_OCCURRED1_POWER_MANAGEMENT_REQ_MASK 0x0000000000000002UL 1112647128f1SMike Travis #define UV3H_EVENT_OCCURRED1_MESSAGE_ACCELERATOR_INT0_SHFT 2 1113647128f1SMike Travis #define UV3H_EVENT_OCCURRED1_MESSAGE_ACCELERATOR_INT0_MASK 0x0000000000000004UL 1114647128f1SMike Travis #define UV3H_EVENT_OCCURRED1_MESSAGE_ACCELERATOR_INT1_SHFT 3 1115647128f1SMike Travis #define UV3H_EVENT_OCCURRED1_MESSAGE_ACCELERATOR_INT1_MASK 0x0000000000000008UL 1116647128f1SMike Travis #define UV3H_EVENT_OCCURRED1_MESSAGE_ACCELERATOR_INT2_SHFT 4 1117647128f1SMike Travis #define UV3H_EVENT_OCCURRED1_MESSAGE_ACCELERATOR_INT2_MASK 0x0000000000000010UL 1118647128f1SMike Travis #define UV3H_EVENT_OCCURRED1_MESSAGE_ACCELERATOR_INT3_SHFT 5 1119647128f1SMike Travis #define UV3H_EVENT_OCCURRED1_MESSAGE_ACCELERATOR_INT3_MASK 0x0000000000000020UL 1120647128f1SMike Travis #define UV3H_EVENT_OCCURRED1_MESSAGE_ACCELERATOR_INT4_SHFT 6 1121647128f1SMike Travis #define UV3H_EVENT_OCCURRED1_MESSAGE_ACCELERATOR_INT4_MASK 0x0000000000000040UL 1122647128f1SMike Travis #define UV3H_EVENT_OCCURRED1_MESSAGE_ACCELERATOR_INT5_SHFT 7 1123647128f1SMike Travis #define UV3H_EVENT_OCCURRED1_MESSAGE_ACCELERATOR_INT5_MASK 0x0000000000000080UL 1124647128f1SMike Travis #define UV3H_EVENT_OCCURRED1_MESSAGE_ACCELERATOR_INT6_SHFT 8 1125647128f1SMike Travis #define UV3H_EVENT_OCCURRED1_MESSAGE_ACCELERATOR_INT6_MASK 0x0000000000000100UL 1126647128f1SMike Travis #define UV3H_EVENT_OCCURRED1_MESSAGE_ACCELERATOR_INT7_SHFT 9 1127647128f1SMike Travis #define UV3H_EVENT_OCCURRED1_MESSAGE_ACCELERATOR_INT7_MASK 0x0000000000000200UL 1128647128f1SMike Travis #define UV3H_EVENT_OCCURRED1_MESSAGE_ACCELERATOR_INT8_SHFT 10 1129647128f1SMike Travis #define UV3H_EVENT_OCCURRED1_MESSAGE_ACCELERATOR_INT8_MASK 0x0000000000000400UL 1130647128f1SMike Travis #define UV3H_EVENT_OCCURRED1_MESSAGE_ACCELERATOR_INT9_SHFT 11 1131647128f1SMike Travis #define UV3H_EVENT_OCCURRED1_MESSAGE_ACCELERATOR_INT9_MASK 0x0000000000000800UL 1132647128f1SMike Travis #define UV3H_EVENT_OCCURRED1_MESSAGE_ACCELERATOR_INT10_SHFT 12 1133647128f1SMike Travis #define UV3H_EVENT_OCCURRED1_MESSAGE_ACCELERATOR_INT10_MASK 0x0000000000001000UL 1134647128f1SMike Travis #define UV3H_EVENT_OCCURRED1_MESSAGE_ACCELERATOR_INT11_SHFT 13 1135647128f1SMike Travis #define UV3H_EVENT_OCCURRED1_MESSAGE_ACCELERATOR_INT11_MASK 0x0000000000002000UL 1136647128f1SMike Travis #define UV3H_EVENT_OCCURRED1_MESSAGE_ACCELERATOR_INT12_SHFT 14 1137647128f1SMike Travis #define UV3H_EVENT_OCCURRED1_MESSAGE_ACCELERATOR_INT12_MASK 0x0000000000004000UL 1138647128f1SMike Travis #define UV3H_EVENT_OCCURRED1_MESSAGE_ACCELERATOR_INT13_SHFT 15 1139647128f1SMike Travis #define UV3H_EVENT_OCCURRED1_MESSAGE_ACCELERATOR_INT13_MASK 0x0000000000008000UL 1140647128f1SMike Travis #define UV3H_EVENT_OCCURRED1_MESSAGE_ACCELERATOR_INT14_SHFT 16 1141647128f1SMike Travis #define UV3H_EVENT_OCCURRED1_MESSAGE_ACCELERATOR_INT14_MASK 0x0000000000010000UL 1142647128f1SMike Travis #define UV3H_EVENT_OCCURRED1_MESSAGE_ACCELERATOR_INT15_SHFT 17 1143647128f1SMike Travis #define UV3H_EVENT_OCCURRED1_MESSAGE_ACCELERATOR_INT15_MASK 0x0000000000020000UL 1144647128f1SMike Travis #define UV3H_EVENT_OCCURRED1_GR0_TLB_INT0_SHFT 18 1145647128f1SMike Travis #define UV3H_EVENT_OCCURRED1_GR0_TLB_INT0_MASK 0x0000000000040000UL 1146647128f1SMike Travis #define UV3H_EVENT_OCCURRED1_GR0_TLB_INT1_SHFT 19 1147647128f1SMike Travis #define UV3H_EVENT_OCCURRED1_GR0_TLB_INT1_MASK 0x0000000000080000UL 1148647128f1SMike Travis #define UV3H_EVENT_OCCURRED1_GR0_TLB_INT2_SHFT 20 1149647128f1SMike Travis #define UV3H_EVENT_OCCURRED1_GR0_TLB_INT2_MASK 0x0000000000100000UL 1150647128f1SMike Travis #define UV3H_EVENT_OCCURRED1_GR0_TLB_INT3_SHFT 21 1151647128f1SMike Travis #define UV3H_EVENT_OCCURRED1_GR0_TLB_INT3_MASK 0x0000000000200000UL 1152647128f1SMike Travis #define UV3H_EVENT_OCCURRED1_GR0_TLB_INT4_SHFT 22 1153647128f1SMike Travis #define UV3H_EVENT_OCCURRED1_GR0_TLB_INT4_MASK 0x0000000000400000UL 1154647128f1SMike Travis #define UV3H_EVENT_OCCURRED1_GR0_TLB_INT5_SHFT 23 1155647128f1SMike Travis #define UV3H_EVENT_OCCURRED1_GR0_TLB_INT5_MASK 0x0000000000800000UL 1156647128f1SMike Travis #define UV3H_EVENT_OCCURRED1_GR0_TLB_INT6_SHFT 24 1157647128f1SMike Travis #define UV3H_EVENT_OCCURRED1_GR0_TLB_INT6_MASK 0x0000000001000000UL 1158647128f1SMike Travis #define UV3H_EVENT_OCCURRED1_GR0_TLB_INT7_SHFT 25 1159647128f1SMike Travis #define UV3H_EVENT_OCCURRED1_GR0_TLB_INT7_MASK 0x0000000002000000UL 1160647128f1SMike Travis #define UV3H_EVENT_OCCURRED1_GR0_TLB_INT8_SHFT 26 1161647128f1SMike Travis #define UV3H_EVENT_OCCURRED1_GR0_TLB_INT8_MASK 0x0000000004000000UL 1162647128f1SMike Travis #define UV3H_EVENT_OCCURRED1_GR0_TLB_INT9_SHFT 27 1163647128f1SMike Travis #define UV3H_EVENT_OCCURRED1_GR0_TLB_INT9_MASK 0x0000000008000000UL 1164647128f1SMike Travis #define UV3H_EVENT_OCCURRED1_GR0_TLB_INT10_SHFT 28 1165647128f1SMike Travis #define UV3H_EVENT_OCCURRED1_GR0_TLB_INT10_MASK 0x0000000010000000UL 1166647128f1SMike Travis #define UV3H_EVENT_OCCURRED1_GR0_TLB_INT11_SHFT 29 1167647128f1SMike Travis #define UV3H_EVENT_OCCURRED1_GR0_TLB_INT11_MASK 0x0000000020000000UL 1168647128f1SMike Travis #define UV3H_EVENT_OCCURRED1_GR0_TLB_INT12_SHFT 30 1169647128f1SMike Travis #define UV3H_EVENT_OCCURRED1_GR0_TLB_INT12_MASK 0x0000000040000000UL 1170647128f1SMike Travis #define UV3H_EVENT_OCCURRED1_GR0_TLB_INT13_SHFT 31 1171647128f1SMike Travis #define UV3H_EVENT_OCCURRED1_GR0_TLB_INT13_MASK 0x0000000080000000UL 1172647128f1SMike Travis #define UV3H_EVENT_OCCURRED1_GR0_TLB_INT14_SHFT 32 1173647128f1SMike Travis #define UV3H_EVENT_OCCURRED1_GR0_TLB_INT14_MASK 0x0000000100000000UL 1174647128f1SMike Travis #define UV3H_EVENT_OCCURRED1_GR0_TLB_INT15_SHFT 33 1175647128f1SMike Travis #define UV3H_EVENT_OCCURRED1_GR0_TLB_INT15_MASK 0x0000000200000000UL 1176647128f1SMike Travis #define UV3H_EVENT_OCCURRED1_GR1_TLB_INT0_SHFT 34 1177647128f1SMike Travis #define UV3H_EVENT_OCCURRED1_GR1_TLB_INT0_MASK 0x0000000400000000UL 1178647128f1SMike Travis #define UV3H_EVENT_OCCURRED1_GR1_TLB_INT1_SHFT 35 1179647128f1SMike Travis #define UV3H_EVENT_OCCURRED1_GR1_TLB_INT1_MASK 0x0000000800000000UL 1180647128f1SMike Travis #define UV3H_EVENT_OCCURRED1_GR1_TLB_INT2_SHFT 36 1181647128f1SMike Travis #define UV3H_EVENT_OCCURRED1_GR1_TLB_INT2_MASK 0x0000001000000000UL 1182647128f1SMike Travis #define UV3H_EVENT_OCCURRED1_GR1_TLB_INT3_SHFT 37 1183647128f1SMike Travis #define UV3H_EVENT_OCCURRED1_GR1_TLB_INT3_MASK 0x0000002000000000UL 1184647128f1SMike Travis #define UV3H_EVENT_OCCURRED1_GR1_TLB_INT4_SHFT 38 1185647128f1SMike Travis #define UV3H_EVENT_OCCURRED1_GR1_TLB_INT4_MASK 0x0000004000000000UL 1186647128f1SMike Travis #define UV3H_EVENT_OCCURRED1_GR1_TLB_INT5_SHFT 39 1187647128f1SMike Travis #define UV3H_EVENT_OCCURRED1_GR1_TLB_INT5_MASK 0x0000008000000000UL 1188647128f1SMike Travis #define UV3H_EVENT_OCCURRED1_GR1_TLB_INT6_SHFT 40 1189647128f1SMike Travis #define UV3H_EVENT_OCCURRED1_GR1_TLB_INT6_MASK 0x0000010000000000UL 1190647128f1SMike Travis #define UV3H_EVENT_OCCURRED1_GR1_TLB_INT7_SHFT 41 1191647128f1SMike Travis #define UV3H_EVENT_OCCURRED1_GR1_TLB_INT7_MASK 0x0000020000000000UL 1192647128f1SMike Travis #define UV3H_EVENT_OCCURRED1_GR1_TLB_INT8_SHFT 42 1193647128f1SMike Travis #define UV3H_EVENT_OCCURRED1_GR1_TLB_INT8_MASK 0x0000040000000000UL 1194647128f1SMike Travis #define UV3H_EVENT_OCCURRED1_GR1_TLB_INT9_SHFT 43 1195647128f1SMike Travis #define UV3H_EVENT_OCCURRED1_GR1_TLB_INT9_MASK 0x0000080000000000UL 1196647128f1SMike Travis #define UV3H_EVENT_OCCURRED1_GR1_TLB_INT10_SHFT 44 1197647128f1SMike Travis #define UV3H_EVENT_OCCURRED1_GR1_TLB_INT10_MASK 0x0000100000000000UL 1198647128f1SMike Travis #define UV3H_EVENT_OCCURRED1_GR1_TLB_INT11_SHFT 45 1199647128f1SMike Travis #define UV3H_EVENT_OCCURRED1_GR1_TLB_INT11_MASK 0x0000200000000000UL 1200647128f1SMike Travis #define UV3H_EVENT_OCCURRED1_GR1_TLB_INT12_SHFT 46 1201647128f1SMike Travis #define UV3H_EVENT_OCCURRED1_GR1_TLB_INT12_MASK 0x0000400000000000UL 1202647128f1SMike Travis #define UV3H_EVENT_OCCURRED1_GR1_TLB_INT13_SHFT 47 1203647128f1SMike Travis #define UV3H_EVENT_OCCURRED1_GR1_TLB_INT13_MASK 0x0000800000000000UL 1204647128f1SMike Travis #define UV3H_EVENT_OCCURRED1_GR1_TLB_INT14_SHFT 48 1205647128f1SMike Travis #define UV3H_EVENT_OCCURRED1_GR1_TLB_INT14_MASK 0x0001000000000000UL 1206647128f1SMike Travis #define UV3H_EVENT_OCCURRED1_GR1_TLB_INT15_SHFT 49 1207647128f1SMike Travis #define UV3H_EVENT_OCCURRED1_GR1_TLB_INT15_MASK 0x0002000000000000UL 1208647128f1SMike Travis #define UV3H_EVENT_OCCURRED1_RTC_INTERVAL_INT_SHFT 50 1209647128f1SMike Travis #define UV3H_EVENT_OCCURRED1_RTC_INTERVAL_INT_MASK 0x0004000000000000UL 1210647128f1SMike Travis #define UV3H_EVENT_OCCURRED1_BAU_DASHBOARD_INT_SHFT 51 1211647128f1SMike Travis #define UV3H_EVENT_OCCURRED1_BAU_DASHBOARD_INT_MASK 0x0008000000000000UL 1212647128f1SMike Travis 1213647128f1SMike Travis /* UV2 unique defines */ 1214647128f1SMike Travis #define UV2H_EVENT_OCCURRED1_BAU_DATA_SHFT 0 1215647128f1SMike Travis #define UV2H_EVENT_OCCURRED1_BAU_DATA_MASK 0x0000000000000001UL 1216647128f1SMike Travis #define UV2H_EVENT_OCCURRED1_POWER_MANAGEMENT_REQ_SHFT 1 1217647128f1SMike Travis #define UV2H_EVENT_OCCURRED1_POWER_MANAGEMENT_REQ_MASK 0x0000000000000002UL 1218647128f1SMike Travis #define UV2H_EVENT_OCCURRED1_MESSAGE_ACCELERATOR_INT0_SHFT 2 1219647128f1SMike Travis #define UV2H_EVENT_OCCURRED1_MESSAGE_ACCELERATOR_INT0_MASK 0x0000000000000004UL 1220647128f1SMike Travis #define UV2H_EVENT_OCCURRED1_MESSAGE_ACCELERATOR_INT1_SHFT 3 1221647128f1SMike Travis #define UV2H_EVENT_OCCURRED1_MESSAGE_ACCELERATOR_INT1_MASK 0x0000000000000008UL 1222647128f1SMike Travis #define UV2H_EVENT_OCCURRED1_MESSAGE_ACCELERATOR_INT2_SHFT 4 1223647128f1SMike Travis #define UV2H_EVENT_OCCURRED1_MESSAGE_ACCELERATOR_INT2_MASK 0x0000000000000010UL 1224647128f1SMike Travis #define UV2H_EVENT_OCCURRED1_MESSAGE_ACCELERATOR_INT3_SHFT 5 1225647128f1SMike Travis #define UV2H_EVENT_OCCURRED1_MESSAGE_ACCELERATOR_INT3_MASK 0x0000000000000020UL 1226647128f1SMike Travis #define UV2H_EVENT_OCCURRED1_MESSAGE_ACCELERATOR_INT4_SHFT 6 1227647128f1SMike Travis #define UV2H_EVENT_OCCURRED1_MESSAGE_ACCELERATOR_INT4_MASK 0x0000000000000040UL 1228647128f1SMike Travis #define UV2H_EVENT_OCCURRED1_MESSAGE_ACCELERATOR_INT5_SHFT 7 1229647128f1SMike Travis #define UV2H_EVENT_OCCURRED1_MESSAGE_ACCELERATOR_INT5_MASK 0x0000000000000080UL 1230647128f1SMike Travis #define UV2H_EVENT_OCCURRED1_MESSAGE_ACCELERATOR_INT6_SHFT 8 1231647128f1SMike Travis #define UV2H_EVENT_OCCURRED1_MESSAGE_ACCELERATOR_INT6_MASK 0x0000000000000100UL 1232647128f1SMike Travis #define UV2H_EVENT_OCCURRED1_MESSAGE_ACCELERATOR_INT7_SHFT 9 1233647128f1SMike Travis #define UV2H_EVENT_OCCURRED1_MESSAGE_ACCELERATOR_INT7_MASK 0x0000000000000200UL 1234647128f1SMike Travis #define UV2H_EVENT_OCCURRED1_MESSAGE_ACCELERATOR_INT8_SHFT 10 1235647128f1SMike Travis #define UV2H_EVENT_OCCURRED1_MESSAGE_ACCELERATOR_INT8_MASK 0x0000000000000400UL 1236647128f1SMike Travis #define UV2H_EVENT_OCCURRED1_MESSAGE_ACCELERATOR_INT9_SHFT 11 1237647128f1SMike Travis #define UV2H_EVENT_OCCURRED1_MESSAGE_ACCELERATOR_INT9_MASK 0x0000000000000800UL 1238647128f1SMike Travis #define UV2H_EVENT_OCCURRED1_MESSAGE_ACCELERATOR_INT10_SHFT 12 1239647128f1SMike Travis #define UV2H_EVENT_OCCURRED1_MESSAGE_ACCELERATOR_INT10_MASK 0x0000000000001000UL 1240647128f1SMike Travis #define UV2H_EVENT_OCCURRED1_MESSAGE_ACCELERATOR_INT11_SHFT 13 1241647128f1SMike Travis #define UV2H_EVENT_OCCURRED1_MESSAGE_ACCELERATOR_INT11_MASK 0x0000000000002000UL 1242647128f1SMike Travis #define UV2H_EVENT_OCCURRED1_MESSAGE_ACCELERATOR_INT12_SHFT 14 1243647128f1SMike Travis #define UV2H_EVENT_OCCURRED1_MESSAGE_ACCELERATOR_INT12_MASK 0x0000000000004000UL 1244647128f1SMike Travis #define UV2H_EVENT_OCCURRED1_MESSAGE_ACCELERATOR_INT13_SHFT 15 1245647128f1SMike Travis #define UV2H_EVENT_OCCURRED1_MESSAGE_ACCELERATOR_INT13_MASK 0x0000000000008000UL 1246647128f1SMike Travis #define UV2H_EVENT_OCCURRED1_MESSAGE_ACCELERATOR_INT14_SHFT 16 1247647128f1SMike Travis #define UV2H_EVENT_OCCURRED1_MESSAGE_ACCELERATOR_INT14_MASK 0x0000000000010000UL 1248647128f1SMike Travis #define UV2H_EVENT_OCCURRED1_MESSAGE_ACCELERATOR_INT15_SHFT 17 1249647128f1SMike Travis #define UV2H_EVENT_OCCURRED1_MESSAGE_ACCELERATOR_INT15_MASK 0x0000000000020000UL 1250647128f1SMike Travis #define UV2H_EVENT_OCCURRED1_GR0_TLB_INT0_SHFT 18 1251647128f1SMike Travis #define UV2H_EVENT_OCCURRED1_GR0_TLB_INT0_MASK 0x0000000000040000UL 1252647128f1SMike Travis #define UV2H_EVENT_OCCURRED1_GR0_TLB_INT1_SHFT 19 1253647128f1SMike Travis #define UV2H_EVENT_OCCURRED1_GR0_TLB_INT1_MASK 0x0000000000080000UL 1254647128f1SMike Travis #define UV2H_EVENT_OCCURRED1_GR0_TLB_INT2_SHFT 20 1255647128f1SMike Travis #define UV2H_EVENT_OCCURRED1_GR0_TLB_INT2_MASK 0x0000000000100000UL 1256647128f1SMike Travis #define UV2H_EVENT_OCCURRED1_GR0_TLB_INT3_SHFT 21 1257647128f1SMike Travis #define UV2H_EVENT_OCCURRED1_GR0_TLB_INT3_MASK 0x0000000000200000UL 1258647128f1SMike Travis #define UV2H_EVENT_OCCURRED1_GR0_TLB_INT4_SHFT 22 1259647128f1SMike Travis #define UV2H_EVENT_OCCURRED1_GR0_TLB_INT4_MASK 0x0000000000400000UL 1260647128f1SMike Travis #define UV2H_EVENT_OCCURRED1_GR0_TLB_INT5_SHFT 23 1261647128f1SMike Travis #define UV2H_EVENT_OCCURRED1_GR0_TLB_INT5_MASK 0x0000000000800000UL 1262647128f1SMike Travis #define UV2H_EVENT_OCCURRED1_GR0_TLB_INT6_SHFT 24 1263647128f1SMike Travis #define UV2H_EVENT_OCCURRED1_GR0_TLB_INT6_MASK 0x0000000001000000UL 1264647128f1SMike Travis #define UV2H_EVENT_OCCURRED1_GR0_TLB_INT7_SHFT 25 1265647128f1SMike Travis #define UV2H_EVENT_OCCURRED1_GR0_TLB_INT7_MASK 0x0000000002000000UL 1266647128f1SMike Travis #define UV2H_EVENT_OCCURRED1_GR0_TLB_INT8_SHFT 26 1267647128f1SMike Travis #define UV2H_EVENT_OCCURRED1_GR0_TLB_INT8_MASK 0x0000000004000000UL 1268647128f1SMike Travis #define UV2H_EVENT_OCCURRED1_GR0_TLB_INT9_SHFT 27 1269647128f1SMike Travis #define UV2H_EVENT_OCCURRED1_GR0_TLB_INT9_MASK 0x0000000008000000UL 1270647128f1SMike Travis #define UV2H_EVENT_OCCURRED1_GR0_TLB_INT10_SHFT 28 1271647128f1SMike Travis #define UV2H_EVENT_OCCURRED1_GR0_TLB_INT10_MASK 0x0000000010000000UL 1272647128f1SMike Travis #define UV2H_EVENT_OCCURRED1_GR0_TLB_INT11_SHFT 29 1273647128f1SMike Travis #define UV2H_EVENT_OCCURRED1_GR0_TLB_INT11_MASK 0x0000000020000000UL 1274647128f1SMike Travis #define UV2H_EVENT_OCCURRED1_GR0_TLB_INT12_SHFT 30 1275647128f1SMike Travis #define UV2H_EVENT_OCCURRED1_GR0_TLB_INT12_MASK 0x0000000040000000UL 1276647128f1SMike Travis #define UV2H_EVENT_OCCURRED1_GR0_TLB_INT13_SHFT 31 1277647128f1SMike Travis #define UV2H_EVENT_OCCURRED1_GR0_TLB_INT13_MASK 0x0000000080000000UL 1278647128f1SMike Travis #define UV2H_EVENT_OCCURRED1_GR0_TLB_INT14_SHFT 32 1279647128f1SMike Travis #define UV2H_EVENT_OCCURRED1_GR0_TLB_INT14_MASK 0x0000000100000000UL 1280647128f1SMike Travis #define UV2H_EVENT_OCCURRED1_GR0_TLB_INT15_SHFT 33 1281647128f1SMike Travis #define UV2H_EVENT_OCCURRED1_GR0_TLB_INT15_MASK 0x0000000200000000UL 1282647128f1SMike Travis #define UV2H_EVENT_OCCURRED1_GR1_TLB_INT0_SHFT 34 1283647128f1SMike Travis #define UV2H_EVENT_OCCURRED1_GR1_TLB_INT0_MASK 0x0000000400000000UL 1284647128f1SMike Travis #define UV2H_EVENT_OCCURRED1_GR1_TLB_INT1_SHFT 35 1285647128f1SMike Travis #define UV2H_EVENT_OCCURRED1_GR1_TLB_INT1_MASK 0x0000000800000000UL 1286647128f1SMike Travis #define UV2H_EVENT_OCCURRED1_GR1_TLB_INT2_SHFT 36 1287647128f1SMike Travis #define UV2H_EVENT_OCCURRED1_GR1_TLB_INT2_MASK 0x0000001000000000UL 1288647128f1SMike Travis #define UV2H_EVENT_OCCURRED1_GR1_TLB_INT3_SHFT 37 1289647128f1SMike Travis #define UV2H_EVENT_OCCURRED1_GR1_TLB_INT3_MASK 0x0000002000000000UL 1290647128f1SMike Travis #define UV2H_EVENT_OCCURRED1_GR1_TLB_INT4_SHFT 38 1291647128f1SMike Travis #define UV2H_EVENT_OCCURRED1_GR1_TLB_INT4_MASK 0x0000004000000000UL 1292647128f1SMike Travis #define UV2H_EVENT_OCCURRED1_GR1_TLB_INT5_SHFT 39 1293647128f1SMike Travis #define UV2H_EVENT_OCCURRED1_GR1_TLB_INT5_MASK 0x0000008000000000UL 1294647128f1SMike Travis #define UV2H_EVENT_OCCURRED1_GR1_TLB_INT6_SHFT 40 1295647128f1SMike Travis #define UV2H_EVENT_OCCURRED1_GR1_TLB_INT6_MASK 0x0000010000000000UL 1296647128f1SMike Travis #define UV2H_EVENT_OCCURRED1_GR1_TLB_INT7_SHFT 41 1297647128f1SMike Travis #define UV2H_EVENT_OCCURRED1_GR1_TLB_INT7_MASK 0x0000020000000000UL 1298647128f1SMike Travis #define UV2H_EVENT_OCCURRED1_GR1_TLB_INT8_SHFT 42 1299647128f1SMike Travis #define UV2H_EVENT_OCCURRED1_GR1_TLB_INT8_MASK 0x0000040000000000UL 1300647128f1SMike Travis #define UV2H_EVENT_OCCURRED1_GR1_TLB_INT9_SHFT 43 1301647128f1SMike Travis #define UV2H_EVENT_OCCURRED1_GR1_TLB_INT9_MASK 0x0000080000000000UL 1302647128f1SMike Travis #define UV2H_EVENT_OCCURRED1_GR1_TLB_INT10_SHFT 44 1303647128f1SMike Travis #define UV2H_EVENT_OCCURRED1_GR1_TLB_INT10_MASK 0x0000100000000000UL 1304647128f1SMike Travis #define UV2H_EVENT_OCCURRED1_GR1_TLB_INT11_SHFT 45 1305647128f1SMike Travis #define UV2H_EVENT_OCCURRED1_GR1_TLB_INT11_MASK 0x0000200000000000UL 1306647128f1SMike Travis #define UV2H_EVENT_OCCURRED1_GR1_TLB_INT12_SHFT 46 1307647128f1SMike Travis #define UV2H_EVENT_OCCURRED1_GR1_TLB_INT12_MASK 0x0000400000000000UL 1308647128f1SMike Travis #define UV2H_EVENT_OCCURRED1_GR1_TLB_INT13_SHFT 47 1309647128f1SMike Travis #define UV2H_EVENT_OCCURRED1_GR1_TLB_INT13_MASK 0x0000800000000000UL 1310647128f1SMike Travis #define UV2H_EVENT_OCCURRED1_GR1_TLB_INT14_SHFT 48 1311647128f1SMike Travis #define UV2H_EVENT_OCCURRED1_GR1_TLB_INT14_MASK 0x0001000000000000UL 1312647128f1SMike Travis #define UV2H_EVENT_OCCURRED1_GR1_TLB_INT15_SHFT 49 1313647128f1SMike Travis #define UV2H_EVENT_OCCURRED1_GR1_TLB_INT15_MASK 0x0002000000000000UL 1314647128f1SMike Travis #define UV2H_EVENT_OCCURRED1_RTC_INTERVAL_INT_SHFT 50 1315647128f1SMike Travis #define UV2H_EVENT_OCCURRED1_RTC_INTERVAL_INT_MASK 0x0004000000000000UL 1316647128f1SMike Travis #define UV2H_EVENT_OCCURRED1_BAU_DASHBOARD_INT_SHFT 51 1317647128f1SMike Travis #define UV2H_EVENT_OCCURRED1_BAU_DASHBOARD_INT_MASK 0x0008000000000000UL 1318647128f1SMike Travis 1319647128f1SMike Travis #define UVH_EVENT_OCCURRED1_EXTIO_INT0_MASK ( \ 1320647128f1SMike Travis is_uv(UV5) ? 0x0000000000000002UL : \ 1321647128f1SMike Travis 0) 1322647128f1SMike Travis #define UVH_EVENT_OCCURRED1_EXTIO_INT0_SHFT ( \ 1323647128f1SMike Travis is_uv(UV5) ? 1 : \ 1324647128f1SMike Travis -1) 1325647128f1SMike Travis 1326647128f1SMike Travis union uvyh_event_occurred1_u { 13270d12ef0cSMike Travis unsigned long v; 13280d12ef0cSMike Travis 1329647128f1SMike Travis /* UVYH common struct */ 1330647128f1SMike Travis struct uvyh_event_occurred1_s { 1331647128f1SMike Travis unsigned long ipi_int:1; /* RW */ 1332647128f1SMike Travis unsigned long extio_int0:1; /* RW */ 1333647128f1SMike Travis unsigned long extio_int1:1; /* RW */ 1334647128f1SMike Travis unsigned long extio_int2:1; /* RW */ 1335647128f1SMike Travis unsigned long extio_int3:1; /* RW */ 1336647128f1SMike Travis unsigned long profile_int:1; /* RW */ 1337647128f1SMike Travis unsigned long bau_data:1; /* RW */ 1338647128f1SMike Travis unsigned long proc_general:1; /* RW */ 1339647128f1SMike Travis unsigned long xh_tlb_int0:1; /* RW */ 1340647128f1SMike Travis unsigned long xh_tlb_int1:1; /* RW */ 1341647128f1SMike Travis unsigned long xh_tlb_int2:1; /* RW */ 1342647128f1SMike Travis unsigned long xh_tlb_int3:1; /* RW */ 1343647128f1SMike Travis unsigned long xh_tlb_int4:1; /* RW */ 1344647128f1SMike Travis unsigned long xh_tlb_int5:1; /* RW */ 1345647128f1SMike Travis unsigned long rdm_tlb_int0:1; /* RW */ 1346647128f1SMike Travis unsigned long rdm_tlb_int1:1; /* RW */ 1347647128f1SMike Travis unsigned long rdm_tlb_int2:1; /* RW */ 1348647128f1SMike Travis unsigned long rdm_tlb_int3:1; /* RW */ 1349647128f1SMike Travis unsigned long rdm_tlb_int4:1; /* RW */ 1350647128f1SMike Travis unsigned long rdm_tlb_int5:1; /* RW */ 1351647128f1SMike Travis unsigned long rdm_tlb_int6:1; /* RW */ 1352647128f1SMike Travis unsigned long rdm_tlb_int7:1; /* RW */ 1353647128f1SMike Travis unsigned long rdm_tlb_int8:1; /* RW */ 1354647128f1SMike Travis unsigned long rdm_tlb_int9:1; /* RW */ 1355647128f1SMike Travis unsigned long rdm_tlb_int10:1; /* RW */ 1356647128f1SMike Travis unsigned long rdm_tlb_int11:1; /* RW */ 1357647128f1SMike Travis unsigned long rdm_tlb_int12:1; /* RW */ 1358647128f1SMike Travis unsigned long rdm_tlb_int13:1; /* RW */ 1359647128f1SMike Travis unsigned long rdm_tlb_int14:1; /* RW */ 1360647128f1SMike Travis unsigned long rdm_tlb_int15:1; /* RW */ 1361647128f1SMike Travis unsigned long rdm_tlb_int16:1; /* RW */ 1362647128f1SMike Travis unsigned long rdm_tlb_int17:1; /* RW */ 1363647128f1SMike Travis unsigned long rdm_tlb_int18:1; /* RW */ 1364647128f1SMike Travis unsigned long rdm_tlb_int19:1; /* RW */ 1365647128f1SMike Travis unsigned long rdm_tlb_int20:1; /* RW */ 1366647128f1SMike Travis unsigned long rdm_tlb_int21:1; /* RW */ 1367647128f1SMike Travis unsigned long rdm_tlb_int22:1; /* RW */ 1368647128f1SMike Travis unsigned long rdm_tlb_int23:1; /* RW */ 1369647128f1SMike Travis unsigned long rsvd_38_63:26; 1370647128f1SMike Travis } sy; 1371a4c31557SJack Steiner 1372647128f1SMike Travis /* UV5 unique struct */ 1373647128f1SMike Travis struct uv5h_event_occurred1_s { 1374647128f1SMike Travis unsigned long ipi_int:1; /* RW */ 1375647128f1SMike Travis unsigned long extio_int0:1; /* RW */ 1376647128f1SMike Travis unsigned long extio_int1:1; /* RW */ 1377647128f1SMike Travis unsigned long extio_int2:1; /* RW */ 1378647128f1SMike Travis unsigned long extio_int3:1; /* RW */ 1379647128f1SMike Travis unsigned long profile_int:1; /* RW */ 1380647128f1SMike Travis unsigned long bau_data:1; /* RW */ 1381647128f1SMike Travis unsigned long proc_general:1; /* RW */ 1382647128f1SMike Travis unsigned long xh_tlb_int0:1; /* RW */ 1383647128f1SMike Travis unsigned long xh_tlb_int1:1; /* RW */ 1384647128f1SMike Travis unsigned long xh_tlb_int2:1; /* RW */ 1385647128f1SMike Travis unsigned long xh_tlb_int3:1; /* RW */ 1386647128f1SMike Travis unsigned long xh_tlb_int4:1; /* RW */ 1387647128f1SMike Travis unsigned long xh_tlb_int5:1; /* RW */ 1388647128f1SMike Travis unsigned long rdm_tlb_int0:1; /* RW */ 1389647128f1SMike Travis unsigned long rdm_tlb_int1:1; /* RW */ 1390647128f1SMike Travis unsigned long rdm_tlb_int2:1; /* RW */ 1391647128f1SMike Travis unsigned long rdm_tlb_int3:1; /* RW */ 1392647128f1SMike Travis unsigned long rdm_tlb_int4:1; /* RW */ 1393647128f1SMike Travis unsigned long rdm_tlb_int5:1; /* RW */ 1394647128f1SMike Travis unsigned long rdm_tlb_int6:1; /* RW */ 1395647128f1SMike Travis unsigned long rdm_tlb_int7:1; /* RW */ 1396647128f1SMike Travis unsigned long rdm_tlb_int8:1; /* RW */ 1397647128f1SMike Travis unsigned long rdm_tlb_int9:1; /* RW */ 1398647128f1SMike Travis unsigned long rdm_tlb_int10:1; /* RW */ 1399647128f1SMike Travis unsigned long rdm_tlb_int11:1; /* RW */ 1400647128f1SMike Travis unsigned long rdm_tlb_int12:1; /* RW */ 1401647128f1SMike Travis unsigned long rdm_tlb_int13:1; /* RW */ 1402647128f1SMike Travis unsigned long rdm_tlb_int14:1; /* RW */ 1403647128f1SMike Travis unsigned long rdm_tlb_int15:1; /* RW */ 1404647128f1SMike Travis unsigned long rdm_tlb_int16:1; /* RW */ 1405647128f1SMike Travis unsigned long rdm_tlb_int17:1; /* RW */ 1406647128f1SMike Travis unsigned long rdm_tlb_int18:1; /* RW */ 1407647128f1SMike Travis unsigned long rdm_tlb_int19:1; /* RW */ 1408647128f1SMike Travis unsigned long rdm_tlb_int20:1; /* RW */ 1409647128f1SMike Travis unsigned long rdm_tlb_int21:1; /* RW */ 1410647128f1SMike Travis unsigned long rdm_tlb_int22:1; /* RW */ 1411647128f1SMike Travis unsigned long rdm_tlb_int23:1; /* RW */ 1412647128f1SMike Travis unsigned long rsvd_38_63:26; 1413647128f1SMike Travis } s5; 1414a4c31557SJack Steiner 1415647128f1SMike Travis /* UV4 unique struct */ 1416647128f1SMike Travis struct uv4h_event_occurred1_s { 1417647128f1SMike Travis unsigned long profile_int:1; /* RW */ 1418647128f1SMike Travis unsigned long bau_data:1; /* RW */ 1419647128f1SMike Travis unsigned long proc_general:1; /* RW */ 1420647128f1SMike Travis unsigned long gr0_tlb_int0:1; /* RW */ 1421647128f1SMike Travis unsigned long gr0_tlb_int1:1; /* RW */ 1422647128f1SMike Travis unsigned long gr0_tlb_int2:1; /* RW */ 1423647128f1SMike Travis unsigned long gr0_tlb_int3:1; /* RW */ 1424647128f1SMike Travis unsigned long gr0_tlb_int4:1; /* RW */ 1425647128f1SMike Travis unsigned long gr0_tlb_int5:1; /* RW */ 1426647128f1SMike Travis unsigned long gr0_tlb_int6:1; /* RW */ 1427647128f1SMike Travis unsigned long gr0_tlb_int7:1; /* RW */ 1428647128f1SMike Travis unsigned long gr0_tlb_int8:1; /* RW */ 1429647128f1SMike Travis unsigned long gr0_tlb_int9:1; /* RW */ 1430647128f1SMike Travis unsigned long gr0_tlb_int10:1; /* RW */ 1431647128f1SMike Travis unsigned long gr0_tlb_int11:1; /* RW */ 1432647128f1SMike Travis unsigned long gr0_tlb_int12:1; /* RW */ 1433647128f1SMike Travis unsigned long gr0_tlb_int13:1; /* RW */ 1434647128f1SMike Travis unsigned long gr0_tlb_int14:1; /* RW */ 1435647128f1SMike Travis unsigned long gr0_tlb_int15:1; /* RW */ 1436647128f1SMike Travis unsigned long gr0_tlb_int16:1; /* RW */ 1437647128f1SMike Travis unsigned long gr0_tlb_int17:1; /* RW */ 1438647128f1SMike Travis unsigned long gr0_tlb_int18:1; /* RW */ 1439647128f1SMike Travis unsigned long gr0_tlb_int19:1; /* RW */ 1440647128f1SMike Travis unsigned long gr0_tlb_int20:1; /* RW */ 1441647128f1SMike Travis unsigned long gr0_tlb_int21:1; /* RW */ 1442647128f1SMike Travis unsigned long gr0_tlb_int22:1; /* RW */ 1443647128f1SMike Travis unsigned long gr0_tlb_int23:1; /* RW */ 1444647128f1SMike Travis unsigned long gr1_tlb_int0:1; /* RW */ 1445647128f1SMike Travis unsigned long gr1_tlb_int1:1; /* RW */ 1446647128f1SMike Travis unsigned long gr1_tlb_int2:1; /* RW */ 1447647128f1SMike Travis unsigned long gr1_tlb_int3:1; /* RW */ 1448647128f1SMike Travis unsigned long gr1_tlb_int4:1; /* RW */ 1449647128f1SMike Travis unsigned long gr1_tlb_int5:1; /* RW */ 1450647128f1SMike Travis unsigned long gr1_tlb_int6:1; /* RW */ 1451647128f1SMike Travis unsigned long gr1_tlb_int7:1; /* RW */ 1452647128f1SMike Travis unsigned long gr1_tlb_int8:1; /* RW */ 1453647128f1SMike Travis unsigned long gr1_tlb_int9:1; /* RW */ 1454647128f1SMike Travis unsigned long gr1_tlb_int10:1; /* RW */ 1455647128f1SMike Travis unsigned long gr1_tlb_int11:1; /* RW */ 1456647128f1SMike Travis unsigned long gr1_tlb_int12:1; /* RW */ 1457647128f1SMike Travis unsigned long gr1_tlb_int13:1; /* RW */ 1458647128f1SMike Travis unsigned long gr1_tlb_int14:1; /* RW */ 1459647128f1SMike Travis unsigned long gr1_tlb_int15:1; /* RW */ 1460647128f1SMike Travis unsigned long gr1_tlb_int16:1; /* RW */ 1461647128f1SMike Travis unsigned long gr1_tlb_int17:1; /* RW */ 1462647128f1SMike Travis unsigned long gr1_tlb_int18:1; /* RW */ 1463647128f1SMike Travis unsigned long gr1_tlb_int19:1; /* RW */ 1464647128f1SMike Travis unsigned long gr1_tlb_int20:1; /* RW */ 1465647128f1SMike Travis unsigned long gr1_tlb_int21:1; /* RW */ 1466647128f1SMike Travis unsigned long gr1_tlb_int22:1; /* RW */ 1467647128f1SMike Travis unsigned long gr1_tlb_int23:1; /* RW */ 1468647128f1SMike Travis unsigned long rsvd_51_63:13; 1469647128f1SMike Travis } s4; 14700f0d84c0SMike Travis 1471647128f1SMike Travis /* UV3 unique struct */ 1472647128f1SMike Travis struct uv3h_event_occurred1_s { 1473647128f1SMike Travis unsigned long bau_data:1; /* RW */ 1474647128f1SMike Travis unsigned long power_management_req:1; /* RW */ 1475647128f1SMike Travis unsigned long message_accelerator_int0:1; /* RW */ 1476647128f1SMike Travis unsigned long message_accelerator_int1:1; /* RW */ 1477647128f1SMike Travis unsigned long message_accelerator_int2:1; /* RW */ 1478647128f1SMike Travis unsigned long message_accelerator_int3:1; /* RW */ 1479647128f1SMike Travis unsigned long message_accelerator_int4:1; /* RW */ 1480647128f1SMike Travis unsigned long message_accelerator_int5:1; /* RW */ 1481647128f1SMike Travis unsigned long message_accelerator_int6:1; /* RW */ 1482647128f1SMike Travis unsigned long message_accelerator_int7:1; /* RW */ 1483647128f1SMike Travis unsigned long message_accelerator_int8:1; /* RW */ 1484647128f1SMike Travis unsigned long message_accelerator_int9:1; /* RW */ 1485647128f1SMike Travis unsigned long message_accelerator_int10:1; /* RW */ 1486647128f1SMike Travis unsigned long message_accelerator_int11:1; /* RW */ 1487647128f1SMike Travis unsigned long message_accelerator_int12:1; /* RW */ 1488647128f1SMike Travis unsigned long message_accelerator_int13:1; /* RW */ 1489647128f1SMike Travis unsigned long message_accelerator_int14:1; /* RW */ 1490647128f1SMike Travis unsigned long message_accelerator_int15:1; /* RW */ 1491647128f1SMike Travis unsigned long gr0_tlb_int0:1; /* RW */ 1492647128f1SMike Travis unsigned long gr0_tlb_int1:1; /* RW */ 1493647128f1SMike Travis unsigned long gr0_tlb_int2:1; /* RW */ 1494647128f1SMike Travis unsigned long gr0_tlb_int3:1; /* RW */ 1495647128f1SMike Travis unsigned long gr0_tlb_int4:1; /* RW */ 1496647128f1SMike Travis unsigned long gr0_tlb_int5:1; /* RW */ 1497647128f1SMike Travis unsigned long gr0_tlb_int6:1; /* RW */ 1498647128f1SMike Travis unsigned long gr0_tlb_int7:1; /* RW */ 1499647128f1SMike Travis unsigned long gr0_tlb_int8:1; /* RW */ 1500647128f1SMike Travis unsigned long gr0_tlb_int9:1; /* RW */ 1501647128f1SMike Travis unsigned long gr0_tlb_int10:1; /* RW */ 1502647128f1SMike Travis unsigned long gr0_tlb_int11:1; /* RW */ 1503647128f1SMike Travis unsigned long gr0_tlb_int12:1; /* RW */ 1504647128f1SMike Travis unsigned long gr0_tlb_int13:1; /* RW */ 1505647128f1SMike Travis unsigned long gr0_tlb_int14:1; /* RW */ 1506647128f1SMike Travis unsigned long gr0_tlb_int15:1; /* RW */ 1507647128f1SMike Travis unsigned long gr1_tlb_int0:1; /* RW */ 1508647128f1SMike Travis unsigned long gr1_tlb_int1:1; /* RW */ 1509647128f1SMike Travis unsigned long gr1_tlb_int2:1; /* RW */ 1510647128f1SMike Travis unsigned long gr1_tlb_int3:1; /* RW */ 1511647128f1SMike Travis unsigned long gr1_tlb_int4:1; /* RW */ 1512647128f1SMike Travis unsigned long gr1_tlb_int5:1; /* RW */ 1513647128f1SMike Travis unsigned long gr1_tlb_int6:1; /* RW */ 1514647128f1SMike Travis unsigned long gr1_tlb_int7:1; /* RW */ 1515647128f1SMike Travis unsigned long gr1_tlb_int8:1; /* RW */ 1516647128f1SMike Travis unsigned long gr1_tlb_int9:1; /* RW */ 1517647128f1SMike Travis unsigned long gr1_tlb_int10:1; /* RW */ 1518647128f1SMike Travis unsigned long gr1_tlb_int11:1; /* RW */ 1519647128f1SMike Travis unsigned long gr1_tlb_int12:1; /* RW */ 1520647128f1SMike Travis unsigned long gr1_tlb_int13:1; /* RW */ 1521647128f1SMike Travis unsigned long gr1_tlb_int14:1; /* RW */ 1522647128f1SMike Travis unsigned long gr1_tlb_int15:1; /* RW */ 1523647128f1SMike Travis unsigned long rtc_interval_int:1; /* RW */ 1524647128f1SMike Travis unsigned long bau_dashboard_int:1; /* RW */ 152560fe7be3SMike Travis unsigned long rsvd_52_63:12; 1526647128f1SMike Travis } s3; 1527647128f1SMike Travis 1528647128f1SMike Travis /* UV2 unique struct */ 1529647128f1SMike Travis struct uv2h_event_occurred1_s { 1530647128f1SMike Travis unsigned long bau_data:1; /* RW */ 1531647128f1SMike Travis unsigned long power_management_req:1; /* RW */ 1532647128f1SMike Travis unsigned long message_accelerator_int0:1; /* RW */ 1533647128f1SMike Travis unsigned long message_accelerator_int1:1; /* RW */ 1534647128f1SMike Travis unsigned long message_accelerator_int2:1; /* RW */ 1535647128f1SMike Travis unsigned long message_accelerator_int3:1; /* RW */ 1536647128f1SMike Travis unsigned long message_accelerator_int4:1; /* RW */ 1537647128f1SMike Travis unsigned long message_accelerator_int5:1; /* RW */ 1538647128f1SMike Travis unsigned long message_accelerator_int6:1; /* RW */ 1539647128f1SMike Travis unsigned long message_accelerator_int7:1; /* RW */ 1540647128f1SMike Travis unsigned long message_accelerator_int8:1; /* RW */ 1541647128f1SMike Travis unsigned long message_accelerator_int9:1; /* RW */ 1542647128f1SMike Travis unsigned long message_accelerator_int10:1; /* RW */ 1543647128f1SMike Travis unsigned long message_accelerator_int11:1; /* RW */ 1544647128f1SMike Travis unsigned long message_accelerator_int12:1; /* RW */ 1545647128f1SMike Travis unsigned long message_accelerator_int13:1; /* RW */ 1546647128f1SMike Travis unsigned long message_accelerator_int14:1; /* RW */ 1547647128f1SMike Travis unsigned long message_accelerator_int15:1; /* RW */ 1548647128f1SMike Travis unsigned long gr0_tlb_int0:1; /* RW */ 1549647128f1SMike Travis unsigned long gr0_tlb_int1:1; /* RW */ 1550647128f1SMike Travis unsigned long gr0_tlb_int2:1; /* RW */ 1551647128f1SMike Travis unsigned long gr0_tlb_int3:1; /* RW */ 1552647128f1SMike Travis unsigned long gr0_tlb_int4:1; /* RW */ 1553647128f1SMike Travis unsigned long gr0_tlb_int5:1; /* RW */ 1554647128f1SMike Travis unsigned long gr0_tlb_int6:1; /* RW */ 1555647128f1SMike Travis unsigned long gr0_tlb_int7:1; /* RW */ 1556647128f1SMike Travis unsigned long gr0_tlb_int8:1; /* RW */ 1557647128f1SMike Travis unsigned long gr0_tlb_int9:1; /* RW */ 1558647128f1SMike Travis unsigned long gr0_tlb_int10:1; /* RW */ 1559647128f1SMike Travis unsigned long gr0_tlb_int11:1; /* RW */ 1560647128f1SMike Travis unsigned long gr0_tlb_int12:1; /* RW */ 1561647128f1SMike Travis unsigned long gr0_tlb_int13:1; /* RW */ 1562647128f1SMike Travis unsigned long gr0_tlb_int14:1; /* RW */ 1563647128f1SMike Travis unsigned long gr0_tlb_int15:1; /* RW */ 1564647128f1SMike Travis unsigned long gr1_tlb_int0:1; /* RW */ 1565647128f1SMike Travis unsigned long gr1_tlb_int1:1; /* RW */ 1566647128f1SMike Travis unsigned long gr1_tlb_int2:1; /* RW */ 1567647128f1SMike Travis unsigned long gr1_tlb_int3:1; /* RW */ 1568647128f1SMike Travis unsigned long gr1_tlb_int4:1; /* RW */ 1569647128f1SMike Travis unsigned long gr1_tlb_int5:1; /* RW */ 1570647128f1SMike Travis unsigned long gr1_tlb_int6:1; /* RW */ 1571647128f1SMike Travis unsigned long gr1_tlb_int7:1; /* RW */ 1572647128f1SMike Travis unsigned long gr1_tlb_int8:1; /* RW */ 1573647128f1SMike Travis unsigned long gr1_tlb_int9:1; /* RW */ 1574647128f1SMike Travis unsigned long gr1_tlb_int10:1; /* RW */ 1575647128f1SMike Travis unsigned long gr1_tlb_int11:1; /* RW */ 1576647128f1SMike Travis unsigned long gr1_tlb_int12:1; /* RW */ 1577647128f1SMike Travis unsigned long gr1_tlb_int13:1; /* RW */ 1578647128f1SMike Travis unsigned long gr1_tlb_int14:1; /* RW */ 1579647128f1SMike Travis unsigned long gr1_tlb_int15:1; /* RW */ 1580647128f1SMike Travis unsigned long rtc_interval_int:1; /* RW */ 1581647128f1SMike Travis unsigned long bau_dashboard_int:1; /* RW */ 15820f0d84c0SMike Travis unsigned long rsvd_52_63:12; 15832a919596SJack Steiner } s2; 1584bb898558SAl Viro }; 1585bb898558SAl Viro 1586bb898558SAl Viro /* ========================================================================= */ 1587647128f1SMike Travis /* UVH_EVENT_OCCURRED1_ALIAS */ 1588673aa20cSMike Travis /* ========================================================================= */ 1589647128f1SMike Travis #define UVH_EVENT_OCCURRED1_ALIAS 0x70088UL 15900d12ef0cSMike Travis 15910d12ef0cSMike Travis 15920d12ef0cSMike Travis /* ========================================================================= */ 1593647128f1SMike Travis /* UVH_EVENT_OCCURRED2 */ 15940d12ef0cSMike Travis /* ========================================================================= */ 1595647128f1SMike Travis #define UVH_EVENT_OCCURRED2 0x70100UL 15960d12ef0cSMike Travis 15970d12ef0cSMike Travis 159860fe7be3SMike Travis 1599647128f1SMike Travis /* UVYH common defines */ 1600647128f1SMike Travis #define UVYH_EVENT_OCCURRED2_RTC_INTERVAL_INT_SHFT 0 1601647128f1SMike Travis #define UVYH_EVENT_OCCURRED2_RTC_INTERVAL_INT_MASK 0x0000000000000001UL 1602647128f1SMike Travis #define UVYH_EVENT_OCCURRED2_BAU_DASHBOARD_INT_SHFT 1 1603647128f1SMike Travis #define UVYH_EVENT_OCCURRED2_BAU_DASHBOARD_INT_MASK 0x0000000000000002UL 1604647128f1SMike Travis #define UVYH_EVENT_OCCURRED2_RTC_0_SHFT 2 1605647128f1SMike Travis #define UVYH_EVENT_OCCURRED2_RTC_0_MASK 0x0000000000000004UL 1606647128f1SMike Travis #define UVYH_EVENT_OCCURRED2_RTC_1_SHFT 3 1607647128f1SMike Travis #define UVYH_EVENT_OCCURRED2_RTC_1_MASK 0x0000000000000008UL 1608647128f1SMike Travis #define UVYH_EVENT_OCCURRED2_RTC_2_SHFT 4 1609647128f1SMike Travis #define UVYH_EVENT_OCCURRED2_RTC_2_MASK 0x0000000000000010UL 1610647128f1SMike Travis #define UVYH_EVENT_OCCURRED2_RTC_3_SHFT 5 1611647128f1SMike Travis #define UVYH_EVENT_OCCURRED2_RTC_3_MASK 0x0000000000000020UL 1612647128f1SMike Travis #define UVYH_EVENT_OCCURRED2_RTC_4_SHFT 6 1613647128f1SMike Travis #define UVYH_EVENT_OCCURRED2_RTC_4_MASK 0x0000000000000040UL 1614647128f1SMike Travis #define UVYH_EVENT_OCCURRED2_RTC_5_SHFT 7 1615647128f1SMike Travis #define UVYH_EVENT_OCCURRED2_RTC_5_MASK 0x0000000000000080UL 1616647128f1SMike Travis #define UVYH_EVENT_OCCURRED2_RTC_6_SHFT 8 1617647128f1SMike Travis #define UVYH_EVENT_OCCURRED2_RTC_6_MASK 0x0000000000000100UL 1618647128f1SMike Travis #define UVYH_EVENT_OCCURRED2_RTC_7_SHFT 9 1619647128f1SMike Travis #define UVYH_EVENT_OCCURRED2_RTC_7_MASK 0x0000000000000200UL 1620647128f1SMike Travis #define UVYH_EVENT_OCCURRED2_RTC_8_SHFT 10 1621647128f1SMike Travis #define UVYH_EVENT_OCCURRED2_RTC_8_MASK 0x0000000000000400UL 1622647128f1SMike Travis #define UVYH_EVENT_OCCURRED2_RTC_9_SHFT 11 1623647128f1SMike Travis #define UVYH_EVENT_OCCURRED2_RTC_9_MASK 0x0000000000000800UL 1624647128f1SMike Travis #define UVYH_EVENT_OCCURRED2_RTC_10_SHFT 12 1625647128f1SMike Travis #define UVYH_EVENT_OCCURRED2_RTC_10_MASK 0x0000000000001000UL 1626647128f1SMike Travis #define UVYH_EVENT_OCCURRED2_RTC_11_SHFT 13 1627647128f1SMike Travis #define UVYH_EVENT_OCCURRED2_RTC_11_MASK 0x0000000000002000UL 1628647128f1SMike Travis #define UVYH_EVENT_OCCURRED2_RTC_12_SHFT 14 1629647128f1SMike Travis #define UVYH_EVENT_OCCURRED2_RTC_12_MASK 0x0000000000004000UL 1630647128f1SMike Travis #define UVYH_EVENT_OCCURRED2_RTC_13_SHFT 15 1631647128f1SMike Travis #define UVYH_EVENT_OCCURRED2_RTC_13_MASK 0x0000000000008000UL 1632647128f1SMike Travis #define UVYH_EVENT_OCCURRED2_RTC_14_SHFT 16 1633647128f1SMike Travis #define UVYH_EVENT_OCCURRED2_RTC_14_MASK 0x0000000000010000UL 1634647128f1SMike Travis #define UVYH_EVENT_OCCURRED2_RTC_15_SHFT 17 1635647128f1SMike Travis #define UVYH_EVENT_OCCURRED2_RTC_15_MASK 0x0000000000020000UL 1636647128f1SMike Travis #define UVYH_EVENT_OCCURRED2_RTC_16_SHFT 18 1637647128f1SMike Travis #define UVYH_EVENT_OCCURRED2_RTC_16_MASK 0x0000000000040000UL 1638647128f1SMike Travis #define UVYH_EVENT_OCCURRED2_RTC_17_SHFT 19 1639647128f1SMike Travis #define UVYH_EVENT_OCCURRED2_RTC_17_MASK 0x0000000000080000UL 1640647128f1SMike Travis #define UVYH_EVENT_OCCURRED2_RTC_18_SHFT 20 1641647128f1SMike Travis #define UVYH_EVENT_OCCURRED2_RTC_18_MASK 0x0000000000100000UL 1642647128f1SMike Travis #define UVYH_EVENT_OCCURRED2_RTC_19_SHFT 21 1643647128f1SMike Travis #define UVYH_EVENT_OCCURRED2_RTC_19_MASK 0x0000000000200000UL 1644647128f1SMike Travis #define UVYH_EVENT_OCCURRED2_RTC_20_SHFT 22 1645647128f1SMike Travis #define UVYH_EVENT_OCCURRED2_RTC_20_MASK 0x0000000000400000UL 1646647128f1SMike Travis #define UVYH_EVENT_OCCURRED2_RTC_21_SHFT 23 1647647128f1SMike Travis #define UVYH_EVENT_OCCURRED2_RTC_21_MASK 0x0000000000800000UL 1648647128f1SMike Travis #define UVYH_EVENT_OCCURRED2_RTC_22_SHFT 24 1649647128f1SMike Travis #define UVYH_EVENT_OCCURRED2_RTC_22_MASK 0x0000000001000000UL 1650647128f1SMike Travis #define UVYH_EVENT_OCCURRED2_RTC_23_SHFT 25 1651647128f1SMike Travis #define UVYH_EVENT_OCCURRED2_RTC_23_MASK 0x0000000002000000UL 1652647128f1SMike Travis #define UVYH_EVENT_OCCURRED2_RTC_24_SHFT 26 1653647128f1SMike Travis #define UVYH_EVENT_OCCURRED2_RTC_24_MASK 0x0000000004000000UL 1654647128f1SMike Travis #define UVYH_EVENT_OCCURRED2_RTC_25_SHFT 27 1655647128f1SMike Travis #define UVYH_EVENT_OCCURRED2_RTC_25_MASK 0x0000000008000000UL 1656647128f1SMike Travis #define UVYH_EVENT_OCCURRED2_RTC_26_SHFT 28 1657647128f1SMike Travis #define UVYH_EVENT_OCCURRED2_RTC_26_MASK 0x0000000010000000UL 1658647128f1SMike Travis #define UVYH_EVENT_OCCURRED2_RTC_27_SHFT 29 1659647128f1SMike Travis #define UVYH_EVENT_OCCURRED2_RTC_27_MASK 0x0000000020000000UL 1660647128f1SMike Travis #define UVYH_EVENT_OCCURRED2_RTC_28_SHFT 30 1661647128f1SMike Travis #define UVYH_EVENT_OCCURRED2_RTC_28_MASK 0x0000000040000000UL 1662647128f1SMike Travis #define UVYH_EVENT_OCCURRED2_RTC_29_SHFT 31 1663647128f1SMike Travis #define UVYH_EVENT_OCCURRED2_RTC_29_MASK 0x0000000080000000UL 1664647128f1SMike Travis #define UVYH_EVENT_OCCURRED2_RTC_30_SHFT 32 1665647128f1SMike Travis #define UVYH_EVENT_OCCURRED2_RTC_30_MASK 0x0000000100000000UL 1666647128f1SMike Travis #define UVYH_EVENT_OCCURRED2_RTC_31_SHFT 33 1667647128f1SMike Travis #define UVYH_EVENT_OCCURRED2_RTC_31_MASK 0x0000000200000000UL 16682a919596SJack Steiner 1669647128f1SMike Travis /* UV4 unique defines */ 16700f0d84c0SMike Travis #define UV4H_EVENT_OCCURRED2_MESSAGE_ACCELERATOR_INT0_SHFT 0 16710f0d84c0SMike Travis #define UV4H_EVENT_OCCURRED2_MESSAGE_ACCELERATOR_INT0_MASK 0x0000000000000001UL 1672647128f1SMike Travis #define UV4H_EVENT_OCCURRED2_MESSAGE_ACCELERATOR_INT1_SHFT 1 16730f0d84c0SMike Travis #define UV4H_EVENT_OCCURRED2_MESSAGE_ACCELERATOR_INT1_MASK 0x0000000000000002UL 1674647128f1SMike Travis #define UV4H_EVENT_OCCURRED2_MESSAGE_ACCELERATOR_INT2_SHFT 2 16750f0d84c0SMike Travis #define UV4H_EVENT_OCCURRED2_MESSAGE_ACCELERATOR_INT2_MASK 0x0000000000000004UL 1676647128f1SMike Travis #define UV4H_EVENT_OCCURRED2_MESSAGE_ACCELERATOR_INT3_SHFT 3 16770f0d84c0SMike Travis #define UV4H_EVENT_OCCURRED2_MESSAGE_ACCELERATOR_INT3_MASK 0x0000000000000008UL 1678647128f1SMike Travis #define UV4H_EVENT_OCCURRED2_MESSAGE_ACCELERATOR_INT4_SHFT 4 16790f0d84c0SMike Travis #define UV4H_EVENT_OCCURRED2_MESSAGE_ACCELERATOR_INT4_MASK 0x0000000000000010UL 1680647128f1SMike Travis #define UV4H_EVENT_OCCURRED2_MESSAGE_ACCELERATOR_INT5_SHFT 5 16810f0d84c0SMike Travis #define UV4H_EVENT_OCCURRED2_MESSAGE_ACCELERATOR_INT5_MASK 0x0000000000000020UL 1682647128f1SMike Travis #define UV4H_EVENT_OCCURRED2_MESSAGE_ACCELERATOR_INT6_SHFT 6 16830f0d84c0SMike Travis #define UV4H_EVENT_OCCURRED2_MESSAGE_ACCELERATOR_INT6_MASK 0x0000000000000040UL 1684647128f1SMike Travis #define UV4H_EVENT_OCCURRED2_MESSAGE_ACCELERATOR_INT7_SHFT 7 16850f0d84c0SMike Travis #define UV4H_EVENT_OCCURRED2_MESSAGE_ACCELERATOR_INT7_MASK 0x0000000000000080UL 1686647128f1SMike Travis #define UV4H_EVENT_OCCURRED2_MESSAGE_ACCELERATOR_INT8_SHFT 8 16870f0d84c0SMike Travis #define UV4H_EVENT_OCCURRED2_MESSAGE_ACCELERATOR_INT8_MASK 0x0000000000000100UL 1688647128f1SMike Travis #define UV4H_EVENT_OCCURRED2_MESSAGE_ACCELERATOR_INT9_SHFT 9 16890f0d84c0SMike Travis #define UV4H_EVENT_OCCURRED2_MESSAGE_ACCELERATOR_INT9_MASK 0x0000000000000200UL 1690647128f1SMike Travis #define UV4H_EVENT_OCCURRED2_MESSAGE_ACCELERATOR_INT10_SHFT 10 16910f0d84c0SMike Travis #define UV4H_EVENT_OCCURRED2_MESSAGE_ACCELERATOR_INT10_MASK 0x0000000000000400UL 1692647128f1SMike Travis #define UV4H_EVENT_OCCURRED2_MESSAGE_ACCELERATOR_INT11_SHFT 11 16930f0d84c0SMike Travis #define UV4H_EVENT_OCCURRED2_MESSAGE_ACCELERATOR_INT11_MASK 0x0000000000000800UL 1694647128f1SMike Travis #define UV4H_EVENT_OCCURRED2_MESSAGE_ACCELERATOR_INT12_SHFT 12 16950f0d84c0SMike Travis #define UV4H_EVENT_OCCURRED2_MESSAGE_ACCELERATOR_INT12_MASK 0x0000000000001000UL 1696647128f1SMike Travis #define UV4H_EVENT_OCCURRED2_MESSAGE_ACCELERATOR_INT13_SHFT 13 16970f0d84c0SMike Travis #define UV4H_EVENT_OCCURRED2_MESSAGE_ACCELERATOR_INT13_MASK 0x0000000000002000UL 1698647128f1SMike Travis #define UV4H_EVENT_OCCURRED2_MESSAGE_ACCELERATOR_INT14_SHFT 14 16990f0d84c0SMike Travis #define UV4H_EVENT_OCCURRED2_MESSAGE_ACCELERATOR_INT14_MASK 0x0000000000004000UL 1700647128f1SMike Travis #define UV4H_EVENT_OCCURRED2_MESSAGE_ACCELERATOR_INT15_SHFT 15 17010f0d84c0SMike Travis #define UV4H_EVENT_OCCURRED2_MESSAGE_ACCELERATOR_INT15_MASK 0x0000000000008000UL 1702647128f1SMike Travis #define UV4H_EVENT_OCCURRED2_RTC_INTERVAL_INT_SHFT 16 17030f0d84c0SMike Travis #define UV4H_EVENT_OCCURRED2_RTC_INTERVAL_INT_MASK 0x0000000000010000UL 1704647128f1SMike Travis #define UV4H_EVENT_OCCURRED2_BAU_DASHBOARD_INT_SHFT 17 17050f0d84c0SMike Travis #define UV4H_EVENT_OCCURRED2_BAU_DASHBOARD_INT_MASK 0x0000000000020000UL 1706647128f1SMike Travis #define UV4H_EVENT_OCCURRED2_RTC_0_SHFT 18 17070f0d84c0SMike Travis #define UV4H_EVENT_OCCURRED2_RTC_0_MASK 0x0000000000040000UL 1708647128f1SMike Travis #define UV4H_EVENT_OCCURRED2_RTC_1_SHFT 19 17090f0d84c0SMike Travis #define UV4H_EVENT_OCCURRED2_RTC_1_MASK 0x0000000000080000UL 1710647128f1SMike Travis #define UV4H_EVENT_OCCURRED2_RTC_2_SHFT 20 17110f0d84c0SMike Travis #define UV4H_EVENT_OCCURRED2_RTC_2_MASK 0x0000000000100000UL 1712647128f1SMike Travis #define UV4H_EVENT_OCCURRED2_RTC_3_SHFT 21 17130f0d84c0SMike Travis #define UV4H_EVENT_OCCURRED2_RTC_3_MASK 0x0000000000200000UL 1714647128f1SMike Travis #define UV4H_EVENT_OCCURRED2_RTC_4_SHFT 22 17150f0d84c0SMike Travis #define UV4H_EVENT_OCCURRED2_RTC_4_MASK 0x0000000000400000UL 1716647128f1SMike Travis #define UV4H_EVENT_OCCURRED2_RTC_5_SHFT 23 17170f0d84c0SMike Travis #define UV4H_EVENT_OCCURRED2_RTC_5_MASK 0x0000000000800000UL 1718647128f1SMike Travis #define UV4H_EVENT_OCCURRED2_RTC_6_SHFT 24 17190f0d84c0SMike Travis #define UV4H_EVENT_OCCURRED2_RTC_6_MASK 0x0000000001000000UL 1720647128f1SMike Travis #define UV4H_EVENT_OCCURRED2_RTC_7_SHFT 25 17210f0d84c0SMike Travis #define UV4H_EVENT_OCCURRED2_RTC_7_MASK 0x0000000002000000UL 1722647128f1SMike Travis #define UV4H_EVENT_OCCURRED2_RTC_8_SHFT 26 17230f0d84c0SMike Travis #define UV4H_EVENT_OCCURRED2_RTC_8_MASK 0x0000000004000000UL 1724647128f1SMike Travis #define UV4H_EVENT_OCCURRED2_RTC_9_SHFT 27 17250f0d84c0SMike Travis #define UV4H_EVENT_OCCURRED2_RTC_9_MASK 0x0000000008000000UL 1726647128f1SMike Travis #define UV4H_EVENT_OCCURRED2_RTC_10_SHFT 28 17270f0d84c0SMike Travis #define UV4H_EVENT_OCCURRED2_RTC_10_MASK 0x0000000010000000UL 1728647128f1SMike Travis #define UV4H_EVENT_OCCURRED2_RTC_11_SHFT 29 17290f0d84c0SMike Travis #define UV4H_EVENT_OCCURRED2_RTC_11_MASK 0x0000000020000000UL 1730647128f1SMike Travis #define UV4H_EVENT_OCCURRED2_RTC_12_SHFT 30 17310f0d84c0SMike Travis #define UV4H_EVENT_OCCURRED2_RTC_12_MASK 0x0000000040000000UL 1732647128f1SMike Travis #define UV4H_EVENT_OCCURRED2_RTC_13_SHFT 31 17330f0d84c0SMike Travis #define UV4H_EVENT_OCCURRED2_RTC_13_MASK 0x0000000080000000UL 1734647128f1SMike Travis #define UV4H_EVENT_OCCURRED2_RTC_14_SHFT 32 17350f0d84c0SMike Travis #define UV4H_EVENT_OCCURRED2_RTC_14_MASK 0x0000000100000000UL 1736647128f1SMike Travis #define UV4H_EVENT_OCCURRED2_RTC_15_SHFT 33 17370f0d84c0SMike Travis #define UV4H_EVENT_OCCURRED2_RTC_15_MASK 0x0000000200000000UL 1738647128f1SMike Travis #define UV4H_EVENT_OCCURRED2_RTC_16_SHFT 34 17390f0d84c0SMike Travis #define UV4H_EVENT_OCCURRED2_RTC_16_MASK 0x0000000400000000UL 1740647128f1SMike Travis #define UV4H_EVENT_OCCURRED2_RTC_17_SHFT 35 17410f0d84c0SMike Travis #define UV4H_EVENT_OCCURRED2_RTC_17_MASK 0x0000000800000000UL 1742647128f1SMike Travis #define UV4H_EVENT_OCCURRED2_RTC_18_SHFT 36 17430f0d84c0SMike Travis #define UV4H_EVENT_OCCURRED2_RTC_18_MASK 0x0000001000000000UL 1744647128f1SMike Travis #define UV4H_EVENT_OCCURRED2_RTC_19_SHFT 37 17450f0d84c0SMike Travis #define UV4H_EVENT_OCCURRED2_RTC_19_MASK 0x0000002000000000UL 1746647128f1SMike Travis #define UV4H_EVENT_OCCURRED2_RTC_20_SHFT 38 17470f0d84c0SMike Travis #define UV4H_EVENT_OCCURRED2_RTC_20_MASK 0x0000004000000000UL 1748647128f1SMike Travis #define UV4H_EVENT_OCCURRED2_RTC_21_SHFT 39 17490f0d84c0SMike Travis #define UV4H_EVENT_OCCURRED2_RTC_21_MASK 0x0000008000000000UL 1750647128f1SMike Travis #define UV4H_EVENT_OCCURRED2_RTC_22_SHFT 40 17510f0d84c0SMike Travis #define UV4H_EVENT_OCCURRED2_RTC_22_MASK 0x0000010000000000UL 1752647128f1SMike Travis #define UV4H_EVENT_OCCURRED2_RTC_23_SHFT 41 17530f0d84c0SMike Travis #define UV4H_EVENT_OCCURRED2_RTC_23_MASK 0x0000020000000000UL 1754647128f1SMike Travis #define UV4H_EVENT_OCCURRED2_RTC_24_SHFT 42 17550f0d84c0SMike Travis #define UV4H_EVENT_OCCURRED2_RTC_24_MASK 0x0000040000000000UL 1756647128f1SMike Travis #define UV4H_EVENT_OCCURRED2_RTC_25_SHFT 43 17570f0d84c0SMike Travis #define UV4H_EVENT_OCCURRED2_RTC_25_MASK 0x0000080000000000UL 1758647128f1SMike Travis #define UV4H_EVENT_OCCURRED2_RTC_26_SHFT 44 17590f0d84c0SMike Travis #define UV4H_EVENT_OCCURRED2_RTC_26_MASK 0x0000100000000000UL 1760647128f1SMike Travis #define UV4H_EVENT_OCCURRED2_RTC_27_SHFT 45 17610f0d84c0SMike Travis #define UV4H_EVENT_OCCURRED2_RTC_27_MASK 0x0000200000000000UL 1762647128f1SMike Travis #define UV4H_EVENT_OCCURRED2_RTC_28_SHFT 46 17630f0d84c0SMike Travis #define UV4H_EVENT_OCCURRED2_RTC_28_MASK 0x0000400000000000UL 1764647128f1SMike Travis #define UV4H_EVENT_OCCURRED2_RTC_29_SHFT 47 17650f0d84c0SMike Travis #define UV4H_EVENT_OCCURRED2_RTC_29_MASK 0x0000800000000000UL 1766647128f1SMike Travis #define UV4H_EVENT_OCCURRED2_RTC_30_SHFT 48 17670f0d84c0SMike Travis #define UV4H_EVENT_OCCURRED2_RTC_30_MASK 0x0001000000000000UL 1768647128f1SMike Travis #define UV4H_EVENT_OCCURRED2_RTC_31_SHFT 49 17690f0d84c0SMike Travis #define UV4H_EVENT_OCCURRED2_RTC_31_MASK 0x0002000000000000UL 17700f0d84c0SMike Travis 1771647128f1SMike Travis /* UV3 unique defines */ 1772647128f1SMike Travis #define UV3H_EVENT_OCCURRED2_RTC_0_SHFT 0 1773647128f1SMike Travis #define UV3H_EVENT_OCCURRED2_RTC_0_MASK 0x0000000000000001UL 1774647128f1SMike Travis #define UV3H_EVENT_OCCURRED2_RTC_1_SHFT 1 1775647128f1SMike Travis #define UV3H_EVENT_OCCURRED2_RTC_1_MASK 0x0000000000000002UL 1776647128f1SMike Travis #define UV3H_EVENT_OCCURRED2_RTC_2_SHFT 2 1777647128f1SMike Travis #define UV3H_EVENT_OCCURRED2_RTC_2_MASK 0x0000000000000004UL 1778647128f1SMike Travis #define UV3H_EVENT_OCCURRED2_RTC_3_SHFT 3 1779647128f1SMike Travis #define UV3H_EVENT_OCCURRED2_RTC_3_MASK 0x0000000000000008UL 1780647128f1SMike Travis #define UV3H_EVENT_OCCURRED2_RTC_4_SHFT 4 1781647128f1SMike Travis #define UV3H_EVENT_OCCURRED2_RTC_4_MASK 0x0000000000000010UL 1782647128f1SMike Travis #define UV3H_EVENT_OCCURRED2_RTC_5_SHFT 5 1783647128f1SMike Travis #define UV3H_EVENT_OCCURRED2_RTC_5_MASK 0x0000000000000020UL 1784647128f1SMike Travis #define UV3H_EVENT_OCCURRED2_RTC_6_SHFT 6 1785647128f1SMike Travis #define UV3H_EVENT_OCCURRED2_RTC_6_MASK 0x0000000000000040UL 1786647128f1SMike Travis #define UV3H_EVENT_OCCURRED2_RTC_7_SHFT 7 1787647128f1SMike Travis #define UV3H_EVENT_OCCURRED2_RTC_7_MASK 0x0000000000000080UL 1788647128f1SMike Travis #define UV3H_EVENT_OCCURRED2_RTC_8_SHFT 8 1789647128f1SMike Travis #define UV3H_EVENT_OCCURRED2_RTC_8_MASK 0x0000000000000100UL 1790647128f1SMike Travis #define UV3H_EVENT_OCCURRED2_RTC_9_SHFT 9 1791647128f1SMike Travis #define UV3H_EVENT_OCCURRED2_RTC_9_MASK 0x0000000000000200UL 1792647128f1SMike Travis #define UV3H_EVENT_OCCURRED2_RTC_10_SHFT 10 1793647128f1SMike Travis #define UV3H_EVENT_OCCURRED2_RTC_10_MASK 0x0000000000000400UL 1794647128f1SMike Travis #define UV3H_EVENT_OCCURRED2_RTC_11_SHFT 11 1795647128f1SMike Travis #define UV3H_EVENT_OCCURRED2_RTC_11_MASK 0x0000000000000800UL 1796647128f1SMike Travis #define UV3H_EVENT_OCCURRED2_RTC_12_SHFT 12 1797647128f1SMike Travis #define UV3H_EVENT_OCCURRED2_RTC_12_MASK 0x0000000000001000UL 1798647128f1SMike Travis #define UV3H_EVENT_OCCURRED2_RTC_13_SHFT 13 1799647128f1SMike Travis #define UV3H_EVENT_OCCURRED2_RTC_13_MASK 0x0000000000002000UL 1800647128f1SMike Travis #define UV3H_EVENT_OCCURRED2_RTC_14_SHFT 14 1801647128f1SMike Travis #define UV3H_EVENT_OCCURRED2_RTC_14_MASK 0x0000000000004000UL 1802647128f1SMike Travis #define UV3H_EVENT_OCCURRED2_RTC_15_SHFT 15 1803647128f1SMike Travis #define UV3H_EVENT_OCCURRED2_RTC_15_MASK 0x0000000000008000UL 1804647128f1SMike Travis #define UV3H_EVENT_OCCURRED2_RTC_16_SHFT 16 1805647128f1SMike Travis #define UV3H_EVENT_OCCURRED2_RTC_16_MASK 0x0000000000010000UL 1806647128f1SMike Travis #define UV3H_EVENT_OCCURRED2_RTC_17_SHFT 17 1807647128f1SMike Travis #define UV3H_EVENT_OCCURRED2_RTC_17_MASK 0x0000000000020000UL 1808647128f1SMike Travis #define UV3H_EVENT_OCCURRED2_RTC_18_SHFT 18 1809647128f1SMike Travis #define UV3H_EVENT_OCCURRED2_RTC_18_MASK 0x0000000000040000UL 1810647128f1SMike Travis #define UV3H_EVENT_OCCURRED2_RTC_19_SHFT 19 1811647128f1SMike Travis #define UV3H_EVENT_OCCURRED2_RTC_19_MASK 0x0000000000080000UL 1812647128f1SMike Travis #define UV3H_EVENT_OCCURRED2_RTC_20_SHFT 20 1813647128f1SMike Travis #define UV3H_EVENT_OCCURRED2_RTC_20_MASK 0x0000000000100000UL 1814647128f1SMike Travis #define UV3H_EVENT_OCCURRED2_RTC_21_SHFT 21 1815647128f1SMike Travis #define UV3H_EVENT_OCCURRED2_RTC_21_MASK 0x0000000000200000UL 1816647128f1SMike Travis #define UV3H_EVENT_OCCURRED2_RTC_22_SHFT 22 1817647128f1SMike Travis #define UV3H_EVENT_OCCURRED2_RTC_22_MASK 0x0000000000400000UL 1818647128f1SMike Travis #define UV3H_EVENT_OCCURRED2_RTC_23_SHFT 23 1819647128f1SMike Travis #define UV3H_EVENT_OCCURRED2_RTC_23_MASK 0x0000000000800000UL 1820647128f1SMike Travis #define UV3H_EVENT_OCCURRED2_RTC_24_SHFT 24 1821647128f1SMike Travis #define UV3H_EVENT_OCCURRED2_RTC_24_MASK 0x0000000001000000UL 1822647128f1SMike Travis #define UV3H_EVENT_OCCURRED2_RTC_25_SHFT 25 1823647128f1SMike Travis #define UV3H_EVENT_OCCURRED2_RTC_25_MASK 0x0000000002000000UL 1824647128f1SMike Travis #define UV3H_EVENT_OCCURRED2_RTC_26_SHFT 26 1825647128f1SMike Travis #define UV3H_EVENT_OCCURRED2_RTC_26_MASK 0x0000000004000000UL 1826647128f1SMike Travis #define UV3H_EVENT_OCCURRED2_RTC_27_SHFT 27 1827647128f1SMike Travis #define UV3H_EVENT_OCCURRED2_RTC_27_MASK 0x0000000008000000UL 1828647128f1SMike Travis #define UV3H_EVENT_OCCURRED2_RTC_28_SHFT 28 1829647128f1SMike Travis #define UV3H_EVENT_OCCURRED2_RTC_28_MASK 0x0000000010000000UL 1830647128f1SMike Travis #define UV3H_EVENT_OCCURRED2_RTC_29_SHFT 29 1831647128f1SMike Travis #define UV3H_EVENT_OCCURRED2_RTC_29_MASK 0x0000000020000000UL 1832647128f1SMike Travis #define UV3H_EVENT_OCCURRED2_RTC_30_SHFT 30 1833647128f1SMike Travis #define UV3H_EVENT_OCCURRED2_RTC_30_MASK 0x0000000040000000UL 1834647128f1SMike Travis #define UV3H_EVENT_OCCURRED2_RTC_31_SHFT 31 1835647128f1SMike Travis #define UV3H_EVENT_OCCURRED2_RTC_31_MASK 0x0000000080000000UL 18360f0d84c0SMike Travis 1837647128f1SMike Travis /* UV2 unique defines */ 1838647128f1SMike Travis #define UV2H_EVENT_OCCURRED2_RTC_0_SHFT 0 1839647128f1SMike Travis #define UV2H_EVENT_OCCURRED2_RTC_0_MASK 0x0000000000000001UL 1840647128f1SMike Travis #define UV2H_EVENT_OCCURRED2_RTC_1_SHFT 1 1841647128f1SMike Travis #define UV2H_EVENT_OCCURRED2_RTC_1_MASK 0x0000000000000002UL 1842647128f1SMike Travis #define UV2H_EVENT_OCCURRED2_RTC_2_SHFT 2 1843647128f1SMike Travis #define UV2H_EVENT_OCCURRED2_RTC_2_MASK 0x0000000000000004UL 1844647128f1SMike Travis #define UV2H_EVENT_OCCURRED2_RTC_3_SHFT 3 1845647128f1SMike Travis #define UV2H_EVENT_OCCURRED2_RTC_3_MASK 0x0000000000000008UL 1846647128f1SMike Travis #define UV2H_EVENT_OCCURRED2_RTC_4_SHFT 4 1847647128f1SMike Travis #define UV2H_EVENT_OCCURRED2_RTC_4_MASK 0x0000000000000010UL 1848647128f1SMike Travis #define UV2H_EVENT_OCCURRED2_RTC_5_SHFT 5 1849647128f1SMike Travis #define UV2H_EVENT_OCCURRED2_RTC_5_MASK 0x0000000000000020UL 1850647128f1SMike Travis #define UV2H_EVENT_OCCURRED2_RTC_6_SHFT 6 1851647128f1SMike Travis #define UV2H_EVENT_OCCURRED2_RTC_6_MASK 0x0000000000000040UL 1852647128f1SMike Travis #define UV2H_EVENT_OCCURRED2_RTC_7_SHFT 7 1853647128f1SMike Travis #define UV2H_EVENT_OCCURRED2_RTC_7_MASK 0x0000000000000080UL 1854647128f1SMike Travis #define UV2H_EVENT_OCCURRED2_RTC_8_SHFT 8 1855647128f1SMike Travis #define UV2H_EVENT_OCCURRED2_RTC_8_MASK 0x0000000000000100UL 1856647128f1SMike Travis #define UV2H_EVENT_OCCURRED2_RTC_9_SHFT 9 1857647128f1SMike Travis #define UV2H_EVENT_OCCURRED2_RTC_9_MASK 0x0000000000000200UL 1858647128f1SMike Travis #define UV2H_EVENT_OCCURRED2_RTC_10_SHFT 10 1859647128f1SMike Travis #define UV2H_EVENT_OCCURRED2_RTC_10_MASK 0x0000000000000400UL 1860647128f1SMike Travis #define UV2H_EVENT_OCCURRED2_RTC_11_SHFT 11 1861647128f1SMike Travis #define UV2H_EVENT_OCCURRED2_RTC_11_MASK 0x0000000000000800UL 1862647128f1SMike Travis #define UV2H_EVENT_OCCURRED2_RTC_12_SHFT 12 1863647128f1SMike Travis #define UV2H_EVENT_OCCURRED2_RTC_12_MASK 0x0000000000001000UL 1864647128f1SMike Travis #define UV2H_EVENT_OCCURRED2_RTC_13_SHFT 13 1865647128f1SMike Travis #define UV2H_EVENT_OCCURRED2_RTC_13_MASK 0x0000000000002000UL 1866647128f1SMike Travis #define UV2H_EVENT_OCCURRED2_RTC_14_SHFT 14 1867647128f1SMike Travis #define UV2H_EVENT_OCCURRED2_RTC_14_MASK 0x0000000000004000UL 1868647128f1SMike Travis #define UV2H_EVENT_OCCURRED2_RTC_15_SHFT 15 1869647128f1SMike Travis #define UV2H_EVENT_OCCURRED2_RTC_15_MASK 0x0000000000008000UL 1870647128f1SMike Travis #define UV2H_EVENT_OCCURRED2_RTC_16_SHFT 16 1871647128f1SMike Travis #define UV2H_EVENT_OCCURRED2_RTC_16_MASK 0x0000000000010000UL 1872647128f1SMike Travis #define UV2H_EVENT_OCCURRED2_RTC_17_SHFT 17 1873647128f1SMike Travis #define UV2H_EVENT_OCCURRED2_RTC_17_MASK 0x0000000000020000UL 1874647128f1SMike Travis #define UV2H_EVENT_OCCURRED2_RTC_18_SHFT 18 1875647128f1SMike Travis #define UV2H_EVENT_OCCURRED2_RTC_18_MASK 0x0000000000040000UL 1876647128f1SMike Travis #define UV2H_EVENT_OCCURRED2_RTC_19_SHFT 19 1877647128f1SMike Travis #define UV2H_EVENT_OCCURRED2_RTC_19_MASK 0x0000000000080000UL 1878647128f1SMike Travis #define UV2H_EVENT_OCCURRED2_RTC_20_SHFT 20 1879647128f1SMike Travis #define UV2H_EVENT_OCCURRED2_RTC_20_MASK 0x0000000000100000UL 1880647128f1SMike Travis #define UV2H_EVENT_OCCURRED2_RTC_21_SHFT 21 1881647128f1SMike Travis #define UV2H_EVENT_OCCURRED2_RTC_21_MASK 0x0000000000200000UL 1882647128f1SMike Travis #define UV2H_EVENT_OCCURRED2_RTC_22_SHFT 22 1883647128f1SMike Travis #define UV2H_EVENT_OCCURRED2_RTC_22_MASK 0x0000000000400000UL 1884647128f1SMike Travis #define UV2H_EVENT_OCCURRED2_RTC_23_SHFT 23 1885647128f1SMike Travis #define UV2H_EVENT_OCCURRED2_RTC_23_MASK 0x0000000000800000UL 1886647128f1SMike Travis #define UV2H_EVENT_OCCURRED2_RTC_24_SHFT 24 1887647128f1SMike Travis #define UV2H_EVENT_OCCURRED2_RTC_24_MASK 0x0000000001000000UL 1888647128f1SMike Travis #define UV2H_EVENT_OCCURRED2_RTC_25_SHFT 25 1889647128f1SMike Travis #define UV2H_EVENT_OCCURRED2_RTC_25_MASK 0x0000000002000000UL 1890647128f1SMike Travis #define UV2H_EVENT_OCCURRED2_RTC_26_SHFT 26 1891647128f1SMike Travis #define UV2H_EVENT_OCCURRED2_RTC_26_MASK 0x0000000004000000UL 1892647128f1SMike Travis #define UV2H_EVENT_OCCURRED2_RTC_27_SHFT 27 1893647128f1SMike Travis #define UV2H_EVENT_OCCURRED2_RTC_27_MASK 0x0000000008000000UL 1894647128f1SMike Travis #define UV2H_EVENT_OCCURRED2_RTC_28_SHFT 28 1895647128f1SMike Travis #define UV2H_EVENT_OCCURRED2_RTC_28_MASK 0x0000000010000000UL 1896647128f1SMike Travis #define UV2H_EVENT_OCCURRED2_RTC_29_SHFT 29 1897647128f1SMike Travis #define UV2H_EVENT_OCCURRED2_RTC_29_MASK 0x0000000020000000UL 1898647128f1SMike Travis #define UV2H_EVENT_OCCURRED2_RTC_30_SHFT 30 1899647128f1SMike Travis #define UV2H_EVENT_OCCURRED2_RTC_30_MASK 0x0000000040000000UL 1900647128f1SMike Travis #define UV2H_EVENT_OCCURRED2_RTC_31_SHFT 31 1901647128f1SMike Travis #define UV2H_EVENT_OCCURRED2_RTC_31_MASK 0x0000000080000000UL 1902647128f1SMike Travis 1903647128f1SMike Travis #define UVH_EVENT_OCCURRED2_RTC_1_MASK ( \ 1904647128f1SMike Travis is_uv(UV5) ? 0x0000000000000008UL : \ 1905647128f1SMike Travis is_uv(UV4) ? 0x0000000000080000UL : \ 1906647128f1SMike Travis is_uv(UV3) ? 0x0000000000000002UL : \ 1907647128f1SMike Travis is_uv(UV2) ? 0x0000000000000002UL : \ 1908647128f1SMike Travis 0) 1909647128f1SMike Travis #define UVH_EVENT_OCCURRED2_RTC_1_SHFT ( \ 1910647128f1SMike Travis is_uv(UV5) ? 3 : \ 1911647128f1SMike Travis is_uv(UV4) ? 19 : \ 1912647128f1SMike Travis is_uv(UV3) ? 1 : \ 1913647128f1SMike Travis is_uv(UV2) ? 1 : \ 1914647128f1SMike Travis -1) 1915647128f1SMike Travis 1916647128f1SMike Travis union uvyh_event_occurred2_u { 19172a919596SJack Steiner unsigned long v; 1918647128f1SMike Travis 1919647128f1SMike Travis /* UVYH common struct */ 1920647128f1SMike Travis struct uvyh_event_occurred2_s { 1921647128f1SMike Travis unsigned long rtc_interval_int:1; /* RW */ 1922647128f1SMike Travis unsigned long bau_dashboard_int:1; /* RW */ 192360fe7be3SMike Travis unsigned long rtc_0:1; /* RW */ 192460fe7be3SMike Travis unsigned long rtc_1:1; /* RW */ 192560fe7be3SMike Travis unsigned long rtc_2:1; /* RW */ 192660fe7be3SMike Travis unsigned long rtc_3:1; /* RW */ 192760fe7be3SMike Travis unsigned long rtc_4:1; /* RW */ 192860fe7be3SMike Travis unsigned long rtc_5:1; /* RW */ 192960fe7be3SMike Travis unsigned long rtc_6:1; /* RW */ 193060fe7be3SMike Travis unsigned long rtc_7:1; /* RW */ 193160fe7be3SMike Travis unsigned long rtc_8:1; /* RW */ 193260fe7be3SMike Travis unsigned long rtc_9:1; /* RW */ 193360fe7be3SMike Travis unsigned long rtc_10:1; /* RW */ 193460fe7be3SMike Travis unsigned long rtc_11:1; /* RW */ 193560fe7be3SMike Travis unsigned long rtc_12:1; /* RW */ 193660fe7be3SMike Travis unsigned long rtc_13:1; /* RW */ 193760fe7be3SMike Travis unsigned long rtc_14:1; /* RW */ 193860fe7be3SMike Travis unsigned long rtc_15:1; /* RW */ 193960fe7be3SMike Travis unsigned long rtc_16:1; /* RW */ 194060fe7be3SMike Travis unsigned long rtc_17:1; /* RW */ 194160fe7be3SMike Travis unsigned long rtc_18:1; /* RW */ 194260fe7be3SMike Travis unsigned long rtc_19:1; /* RW */ 194360fe7be3SMike Travis unsigned long rtc_20:1; /* RW */ 194460fe7be3SMike Travis unsigned long rtc_21:1; /* RW */ 194560fe7be3SMike Travis unsigned long rtc_22:1; /* RW */ 194660fe7be3SMike Travis unsigned long rtc_23:1; /* RW */ 194760fe7be3SMike Travis unsigned long rtc_24:1; /* RW */ 194860fe7be3SMike Travis unsigned long rtc_25:1; /* RW */ 194960fe7be3SMike Travis unsigned long rtc_26:1; /* RW */ 195060fe7be3SMike Travis unsigned long rtc_27:1; /* RW */ 195160fe7be3SMike Travis unsigned long rtc_28:1; /* RW */ 195260fe7be3SMike Travis unsigned long rtc_29:1; /* RW */ 195360fe7be3SMike Travis unsigned long rtc_30:1; /* RW */ 195460fe7be3SMike Travis unsigned long rtc_31:1; /* RW */ 1955647128f1SMike Travis unsigned long rsvd_34_63:30; 1956647128f1SMike Travis } sy; 1957647128f1SMike Travis 1958647128f1SMike Travis /* UV5 unique struct */ 1959647128f1SMike Travis struct uv5h_event_occurred2_s { 1960647128f1SMike Travis unsigned long rtc_interval_int:1; /* RW */ 1961647128f1SMike Travis unsigned long bau_dashboard_int:1; /* RW */ 19620f0d84c0SMike Travis unsigned long rtc_0:1; /* RW */ 19630f0d84c0SMike Travis unsigned long rtc_1:1; /* RW */ 19640f0d84c0SMike Travis unsigned long rtc_2:1; /* RW */ 19650f0d84c0SMike Travis unsigned long rtc_3:1; /* RW */ 19660f0d84c0SMike Travis unsigned long rtc_4:1; /* RW */ 19670f0d84c0SMike Travis unsigned long rtc_5:1; /* RW */ 19680f0d84c0SMike Travis unsigned long rtc_6:1; /* RW */ 19690f0d84c0SMike Travis unsigned long rtc_7:1; /* RW */ 19700f0d84c0SMike Travis unsigned long rtc_8:1; /* RW */ 19710f0d84c0SMike Travis unsigned long rtc_9:1; /* RW */ 19720f0d84c0SMike Travis unsigned long rtc_10:1; /* RW */ 19730f0d84c0SMike Travis unsigned long rtc_11:1; /* RW */ 19740f0d84c0SMike Travis unsigned long rtc_12:1; /* RW */ 19750f0d84c0SMike Travis unsigned long rtc_13:1; /* RW */ 19760f0d84c0SMike Travis unsigned long rtc_14:1; /* RW */ 19770f0d84c0SMike Travis unsigned long rtc_15:1; /* RW */ 19780f0d84c0SMike Travis unsigned long rtc_16:1; /* RW */ 19790f0d84c0SMike Travis unsigned long rtc_17:1; /* RW */ 19800f0d84c0SMike Travis unsigned long rtc_18:1; /* RW */ 19810f0d84c0SMike Travis unsigned long rtc_19:1; /* RW */ 19820f0d84c0SMike Travis unsigned long rtc_20:1; /* RW */ 19830f0d84c0SMike Travis unsigned long rtc_21:1; /* RW */ 19840f0d84c0SMike Travis unsigned long rtc_22:1; /* RW */ 19850f0d84c0SMike Travis unsigned long rtc_23:1; /* RW */ 19860f0d84c0SMike Travis unsigned long rtc_24:1; /* RW */ 19870f0d84c0SMike Travis unsigned long rtc_25:1; /* RW */ 19880f0d84c0SMike Travis unsigned long rtc_26:1; /* RW */ 19890f0d84c0SMike Travis unsigned long rtc_27:1; /* RW */ 19900f0d84c0SMike Travis unsigned long rtc_28:1; /* RW */ 19910f0d84c0SMike Travis unsigned long rtc_29:1; /* RW */ 19920f0d84c0SMike Travis unsigned long rtc_30:1; /* RW */ 19930f0d84c0SMike Travis unsigned long rtc_31:1; /* RW */ 1994647128f1SMike Travis unsigned long rsvd_34_63:30; 1995647128f1SMike Travis } s5; 1996647128f1SMike Travis 1997647128f1SMike Travis /* UV4 unique struct */ 19980f0d84c0SMike Travis struct uv4h_event_occurred2_s { 19990f0d84c0SMike Travis unsigned long message_accelerator_int0:1; /* RW */ 20000f0d84c0SMike Travis unsigned long message_accelerator_int1:1; /* RW */ 20010f0d84c0SMike Travis unsigned long message_accelerator_int2:1; /* RW */ 20020f0d84c0SMike Travis unsigned long message_accelerator_int3:1; /* RW */ 20030f0d84c0SMike Travis unsigned long message_accelerator_int4:1; /* RW */ 20040f0d84c0SMike Travis unsigned long message_accelerator_int5:1; /* RW */ 20050f0d84c0SMike Travis unsigned long message_accelerator_int6:1; /* RW */ 20060f0d84c0SMike Travis unsigned long message_accelerator_int7:1; /* RW */ 20070f0d84c0SMike Travis unsigned long message_accelerator_int8:1; /* RW */ 20080f0d84c0SMike Travis unsigned long message_accelerator_int9:1; /* RW */ 20090f0d84c0SMike Travis unsigned long message_accelerator_int10:1; /* RW */ 20100f0d84c0SMike Travis unsigned long message_accelerator_int11:1; /* RW */ 20110f0d84c0SMike Travis unsigned long message_accelerator_int12:1; /* RW */ 20120f0d84c0SMike Travis unsigned long message_accelerator_int13:1; /* RW */ 20130f0d84c0SMike Travis unsigned long message_accelerator_int14:1; /* RW */ 20140f0d84c0SMike Travis unsigned long message_accelerator_int15:1; /* RW */ 20150f0d84c0SMike Travis unsigned long rtc_interval_int:1; /* RW */ 20160f0d84c0SMike Travis unsigned long bau_dashboard_int:1; /* RW */ 20170f0d84c0SMike Travis unsigned long rtc_0:1; /* RW */ 20180f0d84c0SMike Travis unsigned long rtc_1:1; /* RW */ 20190f0d84c0SMike Travis unsigned long rtc_2:1; /* RW */ 20200f0d84c0SMike Travis unsigned long rtc_3:1; /* RW */ 20210f0d84c0SMike Travis unsigned long rtc_4:1; /* RW */ 20220f0d84c0SMike Travis unsigned long rtc_5:1; /* RW */ 20230f0d84c0SMike Travis unsigned long rtc_6:1; /* RW */ 20240f0d84c0SMike Travis unsigned long rtc_7:1; /* RW */ 20250f0d84c0SMike Travis unsigned long rtc_8:1; /* RW */ 20260f0d84c0SMike Travis unsigned long rtc_9:1; /* RW */ 20270f0d84c0SMike Travis unsigned long rtc_10:1; /* RW */ 20280f0d84c0SMike Travis unsigned long rtc_11:1; /* RW */ 20290f0d84c0SMike Travis unsigned long rtc_12:1; /* RW */ 20300f0d84c0SMike Travis unsigned long rtc_13:1; /* RW */ 20310f0d84c0SMike Travis unsigned long rtc_14:1; /* RW */ 20320f0d84c0SMike Travis unsigned long rtc_15:1; /* RW */ 20330f0d84c0SMike Travis unsigned long rtc_16:1; /* RW */ 20340f0d84c0SMike Travis unsigned long rtc_17:1; /* RW */ 20350f0d84c0SMike Travis unsigned long rtc_18:1; /* RW */ 20360f0d84c0SMike Travis unsigned long rtc_19:1; /* RW */ 20370f0d84c0SMike Travis unsigned long rtc_20:1; /* RW */ 20380f0d84c0SMike Travis unsigned long rtc_21:1; /* RW */ 20390f0d84c0SMike Travis unsigned long rtc_22:1; /* RW */ 20400f0d84c0SMike Travis unsigned long rtc_23:1; /* RW */ 20410f0d84c0SMike Travis unsigned long rtc_24:1; /* RW */ 20420f0d84c0SMike Travis unsigned long rtc_25:1; /* RW */ 20430f0d84c0SMike Travis unsigned long rtc_26:1; /* RW */ 20440f0d84c0SMike Travis unsigned long rtc_27:1; /* RW */ 20450f0d84c0SMike Travis unsigned long rtc_28:1; /* RW */ 20460f0d84c0SMike Travis unsigned long rtc_29:1; /* RW */ 20470f0d84c0SMike Travis unsigned long rtc_30:1; /* RW */ 20480f0d84c0SMike Travis unsigned long rtc_31:1; /* RW */ 20490f0d84c0SMike Travis unsigned long rsvd_50_63:14; 20500f0d84c0SMike Travis } s4; 20512a919596SJack Steiner 2052647128f1SMike Travis /* UV3 unique struct */ 2053647128f1SMike Travis struct uv3h_event_occurred2_s { 2054647128f1SMike Travis unsigned long rtc_0:1; /* RW */ 2055647128f1SMike Travis unsigned long rtc_1:1; /* RW */ 2056647128f1SMike Travis unsigned long rtc_2:1; /* RW */ 2057647128f1SMike Travis unsigned long rtc_3:1; /* RW */ 2058647128f1SMike Travis unsigned long rtc_4:1; /* RW */ 2059647128f1SMike Travis unsigned long rtc_5:1; /* RW */ 2060647128f1SMike Travis unsigned long rtc_6:1; /* RW */ 2061647128f1SMike Travis unsigned long rtc_7:1; /* RW */ 2062647128f1SMike Travis unsigned long rtc_8:1; /* RW */ 2063647128f1SMike Travis unsigned long rtc_9:1; /* RW */ 2064647128f1SMike Travis unsigned long rtc_10:1; /* RW */ 2065647128f1SMike Travis unsigned long rtc_11:1; /* RW */ 2066647128f1SMike Travis unsigned long rtc_12:1; /* RW */ 2067647128f1SMike Travis unsigned long rtc_13:1; /* RW */ 2068647128f1SMike Travis unsigned long rtc_14:1; /* RW */ 2069647128f1SMike Travis unsigned long rtc_15:1; /* RW */ 2070647128f1SMike Travis unsigned long rtc_16:1; /* RW */ 2071647128f1SMike Travis unsigned long rtc_17:1; /* RW */ 2072647128f1SMike Travis unsigned long rtc_18:1; /* RW */ 2073647128f1SMike Travis unsigned long rtc_19:1; /* RW */ 2074647128f1SMike Travis unsigned long rtc_20:1; /* RW */ 2075647128f1SMike Travis unsigned long rtc_21:1; /* RW */ 2076647128f1SMike Travis unsigned long rtc_22:1; /* RW */ 2077647128f1SMike Travis unsigned long rtc_23:1; /* RW */ 2078647128f1SMike Travis unsigned long rtc_24:1; /* RW */ 2079647128f1SMike Travis unsigned long rtc_25:1; /* RW */ 2080647128f1SMike Travis unsigned long rtc_26:1; /* RW */ 2081647128f1SMike Travis unsigned long rtc_27:1; /* RW */ 2082647128f1SMike Travis unsigned long rtc_28:1; /* RW */ 2083647128f1SMike Travis unsigned long rtc_29:1; /* RW */ 2084647128f1SMike Travis unsigned long rtc_30:1; /* RW */ 2085647128f1SMike Travis unsigned long rtc_31:1; /* RW */ 2086647128f1SMike Travis unsigned long rsvd_32_63:32; 208760fe7be3SMike Travis } s3; 2088647128f1SMike Travis 2089647128f1SMike Travis /* UV2 unique struct */ 2090647128f1SMike Travis struct uv2h_event_occurred2_s { 2091647128f1SMike Travis unsigned long rtc_0:1; /* RW */ 2092647128f1SMike Travis unsigned long rtc_1:1; /* RW */ 2093647128f1SMike Travis unsigned long rtc_2:1; /* RW */ 2094647128f1SMike Travis unsigned long rtc_3:1; /* RW */ 2095647128f1SMike Travis unsigned long rtc_4:1; /* RW */ 2096647128f1SMike Travis unsigned long rtc_5:1; /* RW */ 2097647128f1SMike Travis unsigned long rtc_6:1; /* RW */ 2098647128f1SMike Travis unsigned long rtc_7:1; /* RW */ 2099647128f1SMike Travis unsigned long rtc_8:1; /* RW */ 2100647128f1SMike Travis unsigned long rtc_9:1; /* RW */ 2101647128f1SMike Travis unsigned long rtc_10:1; /* RW */ 2102647128f1SMike Travis unsigned long rtc_11:1; /* RW */ 2103647128f1SMike Travis unsigned long rtc_12:1; /* RW */ 2104647128f1SMike Travis unsigned long rtc_13:1; /* RW */ 2105647128f1SMike Travis unsigned long rtc_14:1; /* RW */ 2106647128f1SMike Travis unsigned long rtc_15:1; /* RW */ 2107647128f1SMike Travis unsigned long rtc_16:1; /* RW */ 2108647128f1SMike Travis unsigned long rtc_17:1; /* RW */ 2109647128f1SMike Travis unsigned long rtc_18:1; /* RW */ 2110647128f1SMike Travis unsigned long rtc_19:1; /* RW */ 2111647128f1SMike Travis unsigned long rtc_20:1; /* RW */ 2112647128f1SMike Travis unsigned long rtc_21:1; /* RW */ 2113647128f1SMike Travis unsigned long rtc_22:1; /* RW */ 2114647128f1SMike Travis unsigned long rtc_23:1; /* RW */ 2115647128f1SMike Travis unsigned long rtc_24:1; /* RW */ 2116647128f1SMike Travis unsigned long rtc_25:1; /* RW */ 2117647128f1SMike Travis unsigned long rtc_26:1; /* RW */ 2118647128f1SMike Travis unsigned long rtc_27:1; /* RW */ 2119647128f1SMike Travis unsigned long rtc_28:1; /* RW */ 2120647128f1SMike Travis unsigned long rtc_29:1; /* RW */ 2121647128f1SMike Travis unsigned long rtc_30:1; /* RW */ 2122647128f1SMike Travis unsigned long rtc_31:1; /* RW */ 2123647128f1SMike Travis unsigned long rsvd_32_63:32; 2124647128f1SMike Travis } s2; 21252a919596SJack Steiner }; 21262a919596SJack Steiner 21272a919596SJack Steiner /* ========================================================================= */ 2128647128f1SMike Travis /* UVH_EVENT_OCCURRED2_ALIAS */ 21295f40f7d9SDimitri Sivanich /* ========================================================================= */ 2130647128f1SMike Travis #define UVH_EVENT_OCCURRED2_ALIAS 0x70108UL 21315f40f7d9SDimitri Sivanich 2132647128f1SMike Travis 2133647128f1SMike Travis /* ========================================================================= */ 2134647128f1SMike Travis /* UVH_EXTIO_INT0_BROADCAST */ 2135647128f1SMike Travis /* ========================================================================= */ 2136647128f1SMike Travis #define UVH_EXTIO_INT0_BROADCAST 0x61448UL 2137647128f1SMike Travis 2138647128f1SMike Travis /* UVH common defines*/ 2139647128f1SMike Travis #define UVH_EXTIO_INT0_BROADCAST_ENABLE_SHFT 0 2140647128f1SMike Travis #define UVH_EXTIO_INT0_BROADCAST_ENABLE_MASK 0x0000000000000001UL 2141647128f1SMike Travis 2142647128f1SMike Travis 2143647128f1SMike Travis union uvh_extio_int0_broadcast_u { 2144647128f1SMike Travis unsigned long v; 2145647128f1SMike Travis 2146647128f1SMike Travis /* UVH common struct */ 2147647128f1SMike Travis struct uvh_extio_int0_broadcast_s { 2148647128f1SMike Travis unsigned long enable:1; /* RW */ 2149647128f1SMike Travis unsigned long rsvd_1_63:63; 2150647128f1SMike Travis } s; 2151647128f1SMike Travis 2152647128f1SMike Travis /* UV5 unique struct */ 2153647128f1SMike Travis struct uv5h_extio_int0_broadcast_s { 2154647128f1SMike Travis unsigned long enable:1; /* RW */ 2155647128f1SMike Travis unsigned long rsvd_1_63:63; 2156647128f1SMike Travis } s5; 2157647128f1SMike Travis 2158647128f1SMike Travis /* UV4 unique struct */ 2159647128f1SMike Travis struct uv4h_extio_int0_broadcast_s { 2160647128f1SMike Travis unsigned long enable:1; /* RW */ 2161647128f1SMike Travis unsigned long rsvd_1_63:63; 2162647128f1SMike Travis } s4; 2163647128f1SMike Travis 2164647128f1SMike Travis /* UV3 unique struct */ 2165647128f1SMike Travis struct uv3h_extio_int0_broadcast_s { 2166647128f1SMike Travis unsigned long enable:1; /* RW */ 2167647128f1SMike Travis unsigned long rsvd_1_63:63; 2168647128f1SMike Travis } s3; 2169647128f1SMike Travis 2170647128f1SMike Travis /* UV2 unique struct */ 2171647128f1SMike Travis struct uv2h_extio_int0_broadcast_s { 2172647128f1SMike Travis unsigned long enable:1; /* RW */ 2173647128f1SMike Travis unsigned long rsvd_1_63:63; 2174647128f1SMike Travis } s2; 2175647128f1SMike Travis }; 2176647128f1SMike Travis 2177647128f1SMike Travis /* ========================================================================= */ 2178647128f1SMike Travis /* UVH_GR0_GAM_GR_CONFIG */ 2179647128f1SMike Travis /* ========================================================================= */ 2180647128f1SMike Travis #define UVH_GR0_GAM_GR_CONFIG ( \ 2181647128f1SMike Travis is_uv(UV5) ? 0x600028UL : \ 2182647128f1SMike Travis is_uv(UV4) ? 0x600028UL : \ 2183647128f1SMike Travis is_uv(UV3) ? 0xc00028UL : \ 2184647128f1SMike Travis is_uv(UV2) ? 0xc00028UL : \ 2185647128f1SMike Travis 0) 2186647128f1SMike Travis 2187647128f1SMike Travis 2188647128f1SMike Travis 2189647128f1SMike Travis /* UVYH common defines */ 2190647128f1SMike Travis #define UVYH_GR0_GAM_GR_CONFIG_SUBSPACE_SHFT 10 2191647128f1SMike Travis #define UVYH_GR0_GAM_GR_CONFIG_SUBSPACE_MASK 0x0000000000000400UL 2192647128f1SMike Travis 2193647128f1SMike Travis /* UV4 unique defines */ 2194647128f1SMike Travis #define UV4H_GR0_GAM_GR_CONFIG_SUBSPACE_SHFT 10 2195647128f1SMike Travis #define UV4H_GR0_GAM_GR_CONFIG_SUBSPACE_MASK 0x0000000000000400UL 2196647128f1SMike Travis 2197647128f1SMike Travis /* UV3 unique defines */ 21985f40f7d9SDimitri Sivanich #define UV3H_GR0_GAM_GR_CONFIG_M_SKT_SHFT 0 21995f40f7d9SDimitri Sivanich #define UV3H_GR0_GAM_GR_CONFIG_M_SKT_MASK 0x000000000000003fUL 2200647128f1SMike Travis #define UV3H_GR0_GAM_GR_CONFIG_SUBSPACE_SHFT 10 22015f40f7d9SDimitri Sivanich #define UV3H_GR0_GAM_GR_CONFIG_SUBSPACE_MASK 0x0000000000000400UL 22025f40f7d9SDimitri Sivanich 2203647128f1SMike Travis /* UV2 unique defines */ 2204647128f1SMike Travis #define UV2H_GR0_GAM_GR_CONFIG_N_GR_SHFT 0 2205647128f1SMike Travis #define UV2H_GR0_GAM_GR_CONFIG_N_GR_MASK 0x000000000000000fUL 2206647128f1SMike Travis 2207647128f1SMike Travis 2208647128f1SMike Travis union uvyh_gr0_gam_gr_config_u { 22095f40f7d9SDimitri Sivanich unsigned long v; 2210647128f1SMike Travis 2211647128f1SMike Travis /* UVYH common struct */ 2212647128f1SMike Travis struct uvyh_gr0_gam_gr_config_s { 2213647128f1SMike Travis unsigned long rsvd_0_9:10; 2214647128f1SMike Travis unsigned long subspace:1; /* RW */ 2215647128f1SMike Travis unsigned long rsvd_11_63:53; 2216647128f1SMike Travis } sy; 2217647128f1SMike Travis 2218647128f1SMike Travis /* UV5 unique struct */ 2219647128f1SMike Travis struct uv5h_gr0_gam_gr_config_s { 2220647128f1SMike Travis unsigned long rsvd_0_9:10; 2221647128f1SMike Travis unsigned long subspace:1; /* RW */ 2222647128f1SMike Travis unsigned long rsvd_11_63:53; 2223647128f1SMike Travis } s5; 2224647128f1SMike Travis 2225647128f1SMike Travis /* UV4 unique struct */ 2226647128f1SMike Travis struct uv4h_gr0_gam_gr_config_s { 2227647128f1SMike Travis unsigned long rsvd_0_9:10; 2228647128f1SMike Travis unsigned long subspace:1; /* RW */ 2229647128f1SMike Travis unsigned long rsvd_11_63:53; 2230647128f1SMike Travis } s4; 2231647128f1SMike Travis 2232647128f1SMike Travis /* UV3 unique struct */ 22335f40f7d9SDimitri Sivanich struct uv3h_gr0_gam_gr_config_s { 22345f40f7d9SDimitri Sivanich unsigned long m_skt:6; /* RW */ 22355f40f7d9SDimitri Sivanich unsigned long undef_6_9:4; /* Undefined */ 22365f40f7d9SDimitri Sivanich unsigned long subspace:1; /* RW */ 22375f40f7d9SDimitri Sivanich unsigned long reserved:53; 22385f40f7d9SDimitri Sivanich } s3; 2239647128f1SMike Travis 2240647128f1SMike Travis /* UV2 unique struct */ 2241647128f1SMike Travis struct uv2h_gr0_gam_gr_config_s { 2242647128f1SMike Travis unsigned long n_gr:4; /* RW */ 2243647128f1SMike Travis unsigned long reserved:60; 2244647128f1SMike Travis } s2; 22455f40f7d9SDimitri Sivanich }; 22465f40f7d9SDimitri Sivanich 22475f40f7d9SDimitri Sivanich /* ========================================================================= */ 2248647128f1SMike Travis /* UVH_GR0_TLB_INT0_CONFIG */ 22490f0d84c0SMike Travis /* ========================================================================= */ 2250647128f1SMike Travis #define UVH_GR0_TLB_INT0_CONFIG ( \ 2251647128f1SMike Travis is_uv(UV4) ? 0x61b00UL : \ 2252647128f1SMike Travis is_uv(UV3) ? 0x61b00UL : \ 2253647128f1SMike Travis is_uv(UV2) ? 0x61b00UL : \ 2254647128f1SMike Travis uv_undefined("UVH_GR0_TLB_INT0_CONFIG")) 22550f0d84c0SMike Travis 22560f0d84c0SMike Travis 2257647128f1SMike Travis /* UVXH common defines */ 2258647128f1SMike Travis #define UVXH_GR0_TLB_INT0_CONFIG_VECTOR_SHFT 0 2259647128f1SMike Travis #define UVXH_GR0_TLB_INT0_CONFIG_VECTOR_MASK 0x00000000000000ffUL 2260647128f1SMike Travis #define UVXH_GR0_TLB_INT0_CONFIG_DM_SHFT 8 2261647128f1SMike Travis #define UVXH_GR0_TLB_INT0_CONFIG_DM_MASK 0x0000000000000700UL 2262647128f1SMike Travis #define UVXH_GR0_TLB_INT0_CONFIG_DESTMODE_SHFT 11 2263647128f1SMike Travis #define UVXH_GR0_TLB_INT0_CONFIG_DESTMODE_MASK 0x0000000000000800UL 2264647128f1SMike Travis #define UVXH_GR0_TLB_INT0_CONFIG_STATUS_SHFT 12 2265647128f1SMike Travis #define UVXH_GR0_TLB_INT0_CONFIG_STATUS_MASK 0x0000000000001000UL 2266647128f1SMike Travis #define UVXH_GR0_TLB_INT0_CONFIG_P_SHFT 13 2267647128f1SMike Travis #define UVXH_GR0_TLB_INT0_CONFIG_P_MASK 0x0000000000002000UL 2268647128f1SMike Travis #define UVXH_GR0_TLB_INT0_CONFIG_T_SHFT 15 2269647128f1SMike Travis #define UVXH_GR0_TLB_INT0_CONFIG_T_MASK 0x0000000000008000UL 2270647128f1SMike Travis #define UVXH_GR0_TLB_INT0_CONFIG_M_SHFT 16 2271647128f1SMike Travis #define UVXH_GR0_TLB_INT0_CONFIG_M_MASK 0x0000000000010000UL 2272647128f1SMike Travis #define UVXH_GR0_TLB_INT0_CONFIG_APIC_ID_SHFT 32 2273647128f1SMike Travis #define UVXH_GR0_TLB_INT0_CONFIG_APIC_ID_MASK 0xffffffff00000000UL 2274647128f1SMike Travis 2275647128f1SMike Travis 2276647128f1SMike Travis union uvh_gr0_tlb_int0_config_u { 22770f0d84c0SMike Travis unsigned long v; 2278647128f1SMike Travis 2279647128f1SMike Travis /* UVH common struct */ 2280647128f1SMike Travis struct uvh_gr0_tlb_int0_config_s { 2281647128f1SMike Travis unsigned long vector_:8; /* RW */ 2282647128f1SMike Travis unsigned long dm:3; /* RW */ 2283647128f1SMike Travis unsigned long destmode:1; /* RW */ 2284647128f1SMike Travis unsigned long status:1; /* RO */ 2285647128f1SMike Travis unsigned long p:1; /* RO */ 2286647128f1SMike Travis unsigned long rsvd_14:1; 2287647128f1SMike Travis unsigned long t:1; /* RO */ 2288647128f1SMike Travis unsigned long m:1; /* RW */ 2289647128f1SMike Travis unsigned long rsvd_17_31:15; 2290647128f1SMike Travis unsigned long apic_id:32; /* RW */ 2291647128f1SMike Travis } s; 2292647128f1SMike Travis 2293647128f1SMike Travis /* UVXH common struct */ 2294647128f1SMike Travis struct uvxh_gr0_tlb_int0_config_s { 2295647128f1SMike Travis unsigned long vector_:8; /* RW */ 2296647128f1SMike Travis unsigned long dm:3; /* RW */ 2297647128f1SMike Travis unsigned long destmode:1; /* RW */ 2298647128f1SMike Travis unsigned long status:1; /* RO */ 2299647128f1SMike Travis unsigned long p:1; /* RO */ 2300647128f1SMike Travis unsigned long rsvd_14:1; 2301647128f1SMike Travis unsigned long t:1; /* RO */ 2302647128f1SMike Travis unsigned long m:1; /* RW */ 2303647128f1SMike Travis unsigned long rsvd_17_31:15; 2304647128f1SMike Travis unsigned long apic_id:32; /* RW */ 2305647128f1SMike Travis } sx; 2306647128f1SMike Travis 2307647128f1SMike Travis /* UV4 unique struct */ 2308647128f1SMike Travis struct uv4h_gr0_tlb_int0_config_s { 2309647128f1SMike Travis unsigned long vector_:8; /* RW */ 2310647128f1SMike Travis unsigned long dm:3; /* RW */ 2311647128f1SMike Travis unsigned long destmode:1; /* RW */ 2312647128f1SMike Travis unsigned long status:1; /* RO */ 2313647128f1SMike Travis unsigned long p:1; /* RO */ 2314647128f1SMike Travis unsigned long rsvd_14:1; 2315647128f1SMike Travis unsigned long t:1; /* RO */ 2316647128f1SMike Travis unsigned long m:1; /* RW */ 2317647128f1SMike Travis unsigned long rsvd_17_31:15; 2318647128f1SMike Travis unsigned long apic_id:32; /* RW */ 2319647128f1SMike Travis } s4; 2320647128f1SMike Travis 2321647128f1SMike Travis /* UV3 unique struct */ 2322647128f1SMike Travis struct uv3h_gr0_tlb_int0_config_s { 2323647128f1SMike Travis unsigned long vector_:8; /* RW */ 2324647128f1SMike Travis unsigned long dm:3; /* RW */ 2325647128f1SMike Travis unsigned long destmode:1; /* RW */ 2326647128f1SMike Travis unsigned long status:1; /* RO */ 2327647128f1SMike Travis unsigned long p:1; /* RO */ 2328647128f1SMike Travis unsigned long rsvd_14:1; 2329647128f1SMike Travis unsigned long t:1; /* RO */ 2330647128f1SMike Travis unsigned long m:1; /* RW */ 2331647128f1SMike Travis unsigned long rsvd_17_31:15; 2332647128f1SMike Travis unsigned long apic_id:32; /* RW */ 2333647128f1SMike Travis } s3; 2334647128f1SMike Travis 2335647128f1SMike Travis /* UV2 unique struct */ 2336647128f1SMike Travis struct uv2h_gr0_tlb_int0_config_s { 2337647128f1SMike Travis unsigned long vector_:8; /* RW */ 2338647128f1SMike Travis unsigned long dm:3; /* RW */ 2339647128f1SMike Travis unsigned long destmode:1; /* RW */ 2340647128f1SMike Travis unsigned long status:1; /* RO */ 2341647128f1SMike Travis unsigned long p:1; /* RO */ 2342647128f1SMike Travis unsigned long rsvd_14:1; 2343647128f1SMike Travis unsigned long t:1; /* RO */ 2344647128f1SMike Travis unsigned long m:1; /* RW */ 2345647128f1SMike Travis unsigned long rsvd_17_31:15; 2346647128f1SMike Travis unsigned long apic_id:32; /* RW */ 2347647128f1SMike Travis } s2; 2348647128f1SMike Travis }; 2349647128f1SMike Travis 2350647128f1SMike Travis /* ========================================================================= */ 2351647128f1SMike Travis /* UVH_GR0_TLB_INT1_CONFIG */ 2352647128f1SMike Travis /* ========================================================================= */ 2353647128f1SMike Travis #define UVH_GR0_TLB_INT1_CONFIG ( \ 2354647128f1SMike Travis is_uv(UV4) ? 0x61b40UL : \ 2355647128f1SMike Travis is_uv(UV3) ? 0x61b40UL : \ 2356647128f1SMike Travis is_uv(UV2) ? 0x61b40UL : \ 2357647128f1SMike Travis uv_undefined("UVH_GR0_TLB_INT1_CONFIG")) 2358647128f1SMike Travis 2359647128f1SMike Travis 2360647128f1SMike Travis /* UVXH common defines */ 2361647128f1SMike Travis #define UVXH_GR0_TLB_INT1_CONFIG_VECTOR_SHFT 0 2362647128f1SMike Travis #define UVXH_GR0_TLB_INT1_CONFIG_VECTOR_MASK 0x00000000000000ffUL 2363647128f1SMike Travis #define UVXH_GR0_TLB_INT1_CONFIG_DM_SHFT 8 2364647128f1SMike Travis #define UVXH_GR0_TLB_INT1_CONFIG_DM_MASK 0x0000000000000700UL 2365647128f1SMike Travis #define UVXH_GR0_TLB_INT1_CONFIG_DESTMODE_SHFT 11 2366647128f1SMike Travis #define UVXH_GR0_TLB_INT1_CONFIG_DESTMODE_MASK 0x0000000000000800UL 2367647128f1SMike Travis #define UVXH_GR0_TLB_INT1_CONFIG_STATUS_SHFT 12 2368647128f1SMike Travis #define UVXH_GR0_TLB_INT1_CONFIG_STATUS_MASK 0x0000000000001000UL 2369647128f1SMike Travis #define UVXH_GR0_TLB_INT1_CONFIG_P_SHFT 13 2370647128f1SMike Travis #define UVXH_GR0_TLB_INT1_CONFIG_P_MASK 0x0000000000002000UL 2371647128f1SMike Travis #define UVXH_GR0_TLB_INT1_CONFIG_T_SHFT 15 2372647128f1SMike Travis #define UVXH_GR0_TLB_INT1_CONFIG_T_MASK 0x0000000000008000UL 2373647128f1SMike Travis #define UVXH_GR0_TLB_INT1_CONFIG_M_SHFT 16 2374647128f1SMike Travis #define UVXH_GR0_TLB_INT1_CONFIG_M_MASK 0x0000000000010000UL 2375647128f1SMike Travis #define UVXH_GR0_TLB_INT1_CONFIG_APIC_ID_SHFT 32 2376647128f1SMike Travis #define UVXH_GR0_TLB_INT1_CONFIG_APIC_ID_MASK 0xffffffff00000000UL 2377647128f1SMike Travis 2378647128f1SMike Travis 2379647128f1SMike Travis union uvh_gr0_tlb_int1_config_u { 2380647128f1SMike Travis unsigned long v; 2381647128f1SMike Travis 2382647128f1SMike Travis /* UVH common struct */ 2383647128f1SMike Travis struct uvh_gr0_tlb_int1_config_s { 2384647128f1SMike Travis unsigned long vector_:8; /* RW */ 2385647128f1SMike Travis unsigned long dm:3; /* RW */ 2386647128f1SMike Travis unsigned long destmode:1; /* RW */ 2387647128f1SMike Travis unsigned long status:1; /* RO */ 2388647128f1SMike Travis unsigned long p:1; /* RO */ 2389647128f1SMike Travis unsigned long rsvd_14:1; 2390647128f1SMike Travis unsigned long t:1; /* RO */ 2391647128f1SMike Travis unsigned long m:1; /* RW */ 2392647128f1SMike Travis unsigned long rsvd_17_31:15; 2393647128f1SMike Travis unsigned long apic_id:32; /* RW */ 2394647128f1SMike Travis } s; 2395647128f1SMike Travis 2396647128f1SMike Travis /* UVXH common struct */ 2397647128f1SMike Travis struct uvxh_gr0_tlb_int1_config_s { 2398647128f1SMike Travis unsigned long vector_:8; /* RW */ 2399647128f1SMike Travis unsigned long dm:3; /* RW */ 2400647128f1SMike Travis unsigned long destmode:1; /* RW */ 2401647128f1SMike Travis unsigned long status:1; /* RO */ 2402647128f1SMike Travis unsigned long p:1; /* RO */ 2403647128f1SMike Travis unsigned long rsvd_14:1; 2404647128f1SMike Travis unsigned long t:1; /* RO */ 2405647128f1SMike Travis unsigned long m:1; /* RW */ 2406647128f1SMike Travis unsigned long rsvd_17_31:15; 2407647128f1SMike Travis unsigned long apic_id:32; /* RW */ 2408647128f1SMike Travis } sx; 2409647128f1SMike Travis 2410647128f1SMike Travis /* UV4 unique struct */ 2411647128f1SMike Travis struct uv4h_gr0_tlb_int1_config_s { 2412647128f1SMike Travis unsigned long vector_:8; /* RW */ 2413647128f1SMike Travis unsigned long dm:3; /* RW */ 2414647128f1SMike Travis unsigned long destmode:1; /* RW */ 2415647128f1SMike Travis unsigned long status:1; /* RO */ 2416647128f1SMike Travis unsigned long p:1; /* RO */ 2417647128f1SMike Travis unsigned long rsvd_14:1; 2418647128f1SMike Travis unsigned long t:1; /* RO */ 2419647128f1SMike Travis unsigned long m:1; /* RW */ 2420647128f1SMike Travis unsigned long rsvd_17_31:15; 2421647128f1SMike Travis unsigned long apic_id:32; /* RW */ 2422647128f1SMike Travis } s4; 2423647128f1SMike Travis 2424647128f1SMike Travis /* UV3 unique struct */ 2425647128f1SMike Travis struct uv3h_gr0_tlb_int1_config_s { 2426647128f1SMike Travis unsigned long vector_:8; /* RW */ 2427647128f1SMike Travis unsigned long dm:3; /* RW */ 2428647128f1SMike Travis unsigned long destmode:1; /* RW */ 2429647128f1SMike Travis unsigned long status:1; /* RO */ 2430647128f1SMike Travis unsigned long p:1; /* RO */ 2431647128f1SMike Travis unsigned long rsvd_14:1; 2432647128f1SMike Travis unsigned long t:1; /* RO */ 2433647128f1SMike Travis unsigned long m:1; /* RW */ 2434647128f1SMike Travis unsigned long rsvd_17_31:15; 2435647128f1SMike Travis unsigned long apic_id:32; /* RW */ 2436647128f1SMike Travis } s3; 2437647128f1SMike Travis 2438647128f1SMike Travis /* UV2 unique struct */ 2439647128f1SMike Travis struct uv2h_gr0_tlb_int1_config_s { 2440647128f1SMike Travis unsigned long vector_:8; /* RW */ 2441647128f1SMike Travis unsigned long dm:3; /* RW */ 2442647128f1SMike Travis unsigned long destmode:1; /* RW */ 2443647128f1SMike Travis unsigned long status:1; /* RO */ 2444647128f1SMike Travis unsigned long p:1; /* RO */ 2445647128f1SMike Travis unsigned long rsvd_14:1; 2446647128f1SMike Travis unsigned long t:1; /* RO */ 2447647128f1SMike Travis unsigned long m:1; /* RW */ 2448647128f1SMike Travis unsigned long rsvd_17_31:15; 2449647128f1SMike Travis unsigned long apic_id:32; /* RW */ 2450647128f1SMike Travis } s2; 2451647128f1SMike Travis }; 2452647128f1SMike Travis 2453647128f1SMike Travis /* ========================================================================= */ 2454647128f1SMike Travis /* UVH_GR1_TLB_INT0_CONFIG */ 2455647128f1SMike Travis /* ========================================================================= */ 2456647128f1SMike Travis #define UVH_GR1_TLB_INT0_CONFIG ( \ 2457647128f1SMike Travis is_uv(UV4) ? 0x62100UL : \ 2458647128f1SMike Travis is_uv(UV3) ? 0x61f00UL : \ 2459647128f1SMike Travis is_uv(UV2) ? 0x61f00UL : \ 2460647128f1SMike Travis uv_undefined("UVH_GR1_TLB_INT0_CONFIG")) 2461647128f1SMike Travis 2462647128f1SMike Travis 2463647128f1SMike Travis /* UVXH common defines */ 2464647128f1SMike Travis #define UVXH_GR1_TLB_INT0_CONFIG_VECTOR_SHFT 0 2465647128f1SMike Travis #define UVXH_GR1_TLB_INT0_CONFIG_VECTOR_MASK 0x00000000000000ffUL 2466647128f1SMike Travis #define UVXH_GR1_TLB_INT0_CONFIG_DM_SHFT 8 2467647128f1SMike Travis #define UVXH_GR1_TLB_INT0_CONFIG_DM_MASK 0x0000000000000700UL 2468647128f1SMike Travis #define UVXH_GR1_TLB_INT0_CONFIG_DESTMODE_SHFT 11 2469647128f1SMike Travis #define UVXH_GR1_TLB_INT0_CONFIG_DESTMODE_MASK 0x0000000000000800UL 2470647128f1SMike Travis #define UVXH_GR1_TLB_INT0_CONFIG_STATUS_SHFT 12 2471647128f1SMike Travis #define UVXH_GR1_TLB_INT0_CONFIG_STATUS_MASK 0x0000000000001000UL 2472647128f1SMike Travis #define UVXH_GR1_TLB_INT0_CONFIG_P_SHFT 13 2473647128f1SMike Travis #define UVXH_GR1_TLB_INT0_CONFIG_P_MASK 0x0000000000002000UL 2474647128f1SMike Travis #define UVXH_GR1_TLB_INT0_CONFIG_T_SHFT 15 2475647128f1SMike Travis #define UVXH_GR1_TLB_INT0_CONFIG_T_MASK 0x0000000000008000UL 2476647128f1SMike Travis #define UVXH_GR1_TLB_INT0_CONFIG_M_SHFT 16 2477647128f1SMike Travis #define UVXH_GR1_TLB_INT0_CONFIG_M_MASK 0x0000000000010000UL 2478647128f1SMike Travis #define UVXH_GR1_TLB_INT0_CONFIG_APIC_ID_SHFT 32 2479647128f1SMike Travis #define UVXH_GR1_TLB_INT0_CONFIG_APIC_ID_MASK 0xffffffff00000000UL 2480647128f1SMike Travis 2481647128f1SMike Travis 2482647128f1SMike Travis union uvh_gr1_tlb_int0_config_u { 2483647128f1SMike Travis unsigned long v; 2484647128f1SMike Travis 2485647128f1SMike Travis /* UVH common struct */ 2486647128f1SMike Travis struct uvh_gr1_tlb_int0_config_s { 2487647128f1SMike Travis unsigned long vector_:8; /* RW */ 2488647128f1SMike Travis unsigned long dm:3; /* RW */ 2489647128f1SMike Travis unsigned long destmode:1; /* RW */ 2490647128f1SMike Travis unsigned long status:1; /* RO */ 2491647128f1SMike Travis unsigned long p:1; /* RO */ 2492647128f1SMike Travis unsigned long rsvd_14:1; 2493647128f1SMike Travis unsigned long t:1; /* RO */ 2494647128f1SMike Travis unsigned long m:1; /* RW */ 2495647128f1SMike Travis unsigned long rsvd_17_31:15; 2496647128f1SMike Travis unsigned long apic_id:32; /* RW */ 2497647128f1SMike Travis } s; 2498647128f1SMike Travis 2499647128f1SMike Travis /* UVXH common struct */ 2500647128f1SMike Travis struct uvxh_gr1_tlb_int0_config_s { 2501647128f1SMike Travis unsigned long vector_:8; /* RW */ 2502647128f1SMike Travis unsigned long dm:3; /* RW */ 2503647128f1SMike Travis unsigned long destmode:1; /* RW */ 2504647128f1SMike Travis unsigned long status:1; /* RO */ 2505647128f1SMike Travis unsigned long p:1; /* RO */ 2506647128f1SMike Travis unsigned long rsvd_14:1; 2507647128f1SMike Travis unsigned long t:1; /* RO */ 2508647128f1SMike Travis unsigned long m:1; /* RW */ 2509647128f1SMike Travis unsigned long rsvd_17_31:15; 2510647128f1SMike Travis unsigned long apic_id:32; /* RW */ 2511647128f1SMike Travis } sx; 2512647128f1SMike Travis 2513647128f1SMike Travis /* UV4 unique struct */ 2514647128f1SMike Travis struct uv4h_gr1_tlb_int0_config_s { 2515647128f1SMike Travis unsigned long vector_:8; /* RW */ 2516647128f1SMike Travis unsigned long dm:3; /* RW */ 2517647128f1SMike Travis unsigned long destmode:1; /* RW */ 2518647128f1SMike Travis unsigned long status:1; /* RO */ 2519647128f1SMike Travis unsigned long p:1; /* RO */ 2520647128f1SMike Travis unsigned long rsvd_14:1; 2521647128f1SMike Travis unsigned long t:1; /* RO */ 2522647128f1SMike Travis unsigned long m:1; /* RW */ 2523647128f1SMike Travis unsigned long rsvd_17_31:15; 2524647128f1SMike Travis unsigned long apic_id:32; /* RW */ 2525647128f1SMike Travis } s4; 2526647128f1SMike Travis 2527647128f1SMike Travis /* UV3 unique struct */ 2528647128f1SMike Travis struct uv3h_gr1_tlb_int0_config_s { 2529647128f1SMike Travis unsigned long vector_:8; /* RW */ 2530647128f1SMike Travis unsigned long dm:3; /* RW */ 2531647128f1SMike Travis unsigned long destmode:1; /* RW */ 2532647128f1SMike Travis unsigned long status:1; /* RO */ 2533647128f1SMike Travis unsigned long p:1; /* RO */ 2534647128f1SMike Travis unsigned long rsvd_14:1; 2535647128f1SMike Travis unsigned long t:1; /* RO */ 2536647128f1SMike Travis unsigned long m:1; /* RW */ 2537647128f1SMike Travis unsigned long rsvd_17_31:15; 2538647128f1SMike Travis unsigned long apic_id:32; /* RW */ 2539647128f1SMike Travis } s3; 2540647128f1SMike Travis 2541647128f1SMike Travis /* UV2 unique struct */ 2542647128f1SMike Travis struct uv2h_gr1_tlb_int0_config_s { 2543647128f1SMike Travis unsigned long vector_:8; /* RW */ 2544647128f1SMike Travis unsigned long dm:3; /* RW */ 2545647128f1SMike Travis unsigned long destmode:1; /* RW */ 2546647128f1SMike Travis unsigned long status:1; /* RO */ 2547647128f1SMike Travis unsigned long p:1; /* RO */ 2548647128f1SMike Travis unsigned long rsvd_14:1; 2549647128f1SMike Travis unsigned long t:1; /* RO */ 2550647128f1SMike Travis unsigned long m:1; /* RW */ 2551647128f1SMike Travis unsigned long rsvd_17_31:15; 2552647128f1SMike Travis unsigned long apic_id:32; /* RW */ 2553647128f1SMike Travis } s2; 2554647128f1SMike Travis }; 2555647128f1SMike Travis 2556647128f1SMike Travis /* ========================================================================= */ 2557647128f1SMike Travis /* UVH_GR1_TLB_INT1_CONFIG */ 2558647128f1SMike Travis /* ========================================================================= */ 2559647128f1SMike Travis #define UVH_GR1_TLB_INT1_CONFIG ( \ 2560647128f1SMike Travis is_uv(UV4) ? 0x62140UL : \ 2561647128f1SMike Travis is_uv(UV3) ? 0x61f40UL : \ 2562647128f1SMike Travis is_uv(UV2) ? 0x61f40UL : \ 2563647128f1SMike Travis uv_undefined("UVH_GR1_TLB_INT1_CONFIG")) 2564647128f1SMike Travis 2565647128f1SMike Travis 2566647128f1SMike Travis /* UVXH common defines */ 2567647128f1SMike Travis #define UVXH_GR1_TLB_INT1_CONFIG_VECTOR_SHFT 0 2568647128f1SMike Travis #define UVXH_GR1_TLB_INT1_CONFIG_VECTOR_MASK 0x00000000000000ffUL 2569647128f1SMike Travis #define UVXH_GR1_TLB_INT1_CONFIG_DM_SHFT 8 2570647128f1SMike Travis #define UVXH_GR1_TLB_INT1_CONFIG_DM_MASK 0x0000000000000700UL 2571647128f1SMike Travis #define UVXH_GR1_TLB_INT1_CONFIG_DESTMODE_SHFT 11 2572647128f1SMike Travis #define UVXH_GR1_TLB_INT1_CONFIG_DESTMODE_MASK 0x0000000000000800UL 2573647128f1SMike Travis #define UVXH_GR1_TLB_INT1_CONFIG_STATUS_SHFT 12 2574647128f1SMike Travis #define UVXH_GR1_TLB_INT1_CONFIG_STATUS_MASK 0x0000000000001000UL 2575647128f1SMike Travis #define UVXH_GR1_TLB_INT1_CONFIG_P_SHFT 13 2576647128f1SMike Travis #define UVXH_GR1_TLB_INT1_CONFIG_P_MASK 0x0000000000002000UL 2577647128f1SMike Travis #define UVXH_GR1_TLB_INT1_CONFIG_T_SHFT 15 2578647128f1SMike Travis #define UVXH_GR1_TLB_INT1_CONFIG_T_MASK 0x0000000000008000UL 2579647128f1SMike Travis #define UVXH_GR1_TLB_INT1_CONFIG_M_SHFT 16 2580647128f1SMike Travis #define UVXH_GR1_TLB_INT1_CONFIG_M_MASK 0x0000000000010000UL 2581647128f1SMike Travis #define UVXH_GR1_TLB_INT1_CONFIG_APIC_ID_SHFT 32 2582647128f1SMike Travis #define UVXH_GR1_TLB_INT1_CONFIG_APIC_ID_MASK 0xffffffff00000000UL 2583647128f1SMike Travis 2584647128f1SMike Travis 2585647128f1SMike Travis union uvh_gr1_tlb_int1_config_u { 2586647128f1SMike Travis unsigned long v; 2587647128f1SMike Travis 2588647128f1SMike Travis /* UVH common struct */ 2589647128f1SMike Travis struct uvh_gr1_tlb_int1_config_s { 2590647128f1SMike Travis unsigned long vector_:8; /* RW */ 2591647128f1SMike Travis unsigned long dm:3; /* RW */ 2592647128f1SMike Travis unsigned long destmode:1; /* RW */ 2593647128f1SMike Travis unsigned long status:1; /* RO */ 2594647128f1SMike Travis unsigned long p:1; /* RO */ 2595647128f1SMike Travis unsigned long rsvd_14:1; 2596647128f1SMike Travis unsigned long t:1; /* RO */ 2597647128f1SMike Travis unsigned long m:1; /* RW */ 2598647128f1SMike Travis unsigned long rsvd_17_31:15; 2599647128f1SMike Travis unsigned long apic_id:32; /* RW */ 2600647128f1SMike Travis } s; 2601647128f1SMike Travis 2602647128f1SMike Travis /* UVXH common struct */ 2603647128f1SMike Travis struct uvxh_gr1_tlb_int1_config_s { 2604647128f1SMike Travis unsigned long vector_:8; /* RW */ 2605647128f1SMike Travis unsigned long dm:3; /* RW */ 2606647128f1SMike Travis unsigned long destmode:1; /* RW */ 2607647128f1SMike Travis unsigned long status:1; /* RO */ 2608647128f1SMike Travis unsigned long p:1; /* RO */ 2609647128f1SMike Travis unsigned long rsvd_14:1; 2610647128f1SMike Travis unsigned long t:1; /* RO */ 2611647128f1SMike Travis unsigned long m:1; /* RW */ 2612647128f1SMike Travis unsigned long rsvd_17_31:15; 2613647128f1SMike Travis unsigned long apic_id:32; /* RW */ 2614647128f1SMike Travis } sx; 2615647128f1SMike Travis 2616647128f1SMike Travis /* UV4 unique struct */ 2617647128f1SMike Travis struct uv4h_gr1_tlb_int1_config_s { 2618647128f1SMike Travis unsigned long vector_:8; /* RW */ 2619647128f1SMike Travis unsigned long dm:3; /* RW */ 2620647128f1SMike Travis unsigned long destmode:1; /* RW */ 2621647128f1SMike Travis unsigned long status:1; /* RO */ 2622647128f1SMike Travis unsigned long p:1; /* RO */ 2623647128f1SMike Travis unsigned long rsvd_14:1; 2624647128f1SMike Travis unsigned long t:1; /* RO */ 2625647128f1SMike Travis unsigned long m:1; /* RW */ 2626647128f1SMike Travis unsigned long rsvd_17_31:15; 2627647128f1SMike Travis unsigned long apic_id:32; /* RW */ 2628647128f1SMike Travis } s4; 2629647128f1SMike Travis 2630647128f1SMike Travis /* UV3 unique struct */ 2631647128f1SMike Travis struct uv3h_gr1_tlb_int1_config_s { 2632647128f1SMike Travis unsigned long vector_:8; /* RW */ 2633647128f1SMike Travis unsigned long dm:3; /* RW */ 2634647128f1SMike Travis unsigned long destmode:1; /* RW */ 2635647128f1SMike Travis unsigned long status:1; /* RO */ 2636647128f1SMike Travis unsigned long p:1; /* RO */ 2637647128f1SMike Travis unsigned long rsvd_14:1; 2638647128f1SMike Travis unsigned long t:1; /* RO */ 2639647128f1SMike Travis unsigned long m:1; /* RW */ 2640647128f1SMike Travis unsigned long rsvd_17_31:15; 2641647128f1SMike Travis unsigned long apic_id:32; /* RW */ 2642647128f1SMike Travis } s3; 2643647128f1SMike Travis 2644647128f1SMike Travis /* UV2 unique struct */ 2645647128f1SMike Travis struct uv2h_gr1_tlb_int1_config_s { 2646647128f1SMike Travis unsigned long vector_:8; /* RW */ 2647647128f1SMike Travis unsigned long dm:3; /* RW */ 2648647128f1SMike Travis unsigned long destmode:1; /* RW */ 2649647128f1SMike Travis unsigned long status:1; /* RO */ 2650647128f1SMike Travis unsigned long p:1; /* RO */ 2651647128f1SMike Travis unsigned long rsvd_14:1; 2652647128f1SMike Travis unsigned long t:1; /* RO */ 2653647128f1SMike Travis unsigned long m:1; /* RW */ 2654647128f1SMike Travis unsigned long rsvd_17_31:15; 2655647128f1SMike Travis unsigned long apic_id:32; /* RW */ 2656647128f1SMike Travis } s2; 2657647128f1SMike Travis }; 2658647128f1SMike Travis 2659647128f1SMike Travis /* ========================================================================= */ 2660647128f1SMike Travis /* UVH_INT_CMPB */ 2661647128f1SMike Travis /* ========================================================================= */ 2662647128f1SMike Travis #define UVH_INT_CMPB 0x22080UL 2663647128f1SMike Travis 2664647128f1SMike Travis /* UVH common defines*/ 2665647128f1SMike Travis #define UVH_INT_CMPB_REAL_TIME_CMPB_SHFT 0 2666647128f1SMike Travis #define UVH_INT_CMPB_REAL_TIME_CMPB_MASK 0x00ffffffffffffffUL 2667647128f1SMike Travis 2668647128f1SMike Travis 2669647128f1SMike Travis union uvh_int_cmpb_u { 2670647128f1SMike Travis unsigned long v; 2671647128f1SMike Travis 2672647128f1SMike Travis /* UVH common struct */ 2673647128f1SMike Travis struct uvh_int_cmpb_s { 2674647128f1SMike Travis unsigned long real_time_cmpb:56; /* RW */ 2675647128f1SMike Travis unsigned long rsvd_56_63:8; 2676647128f1SMike Travis } s; 2677647128f1SMike Travis 2678647128f1SMike Travis /* UV5 unique struct */ 2679647128f1SMike Travis struct uv5h_int_cmpb_s { 2680647128f1SMike Travis unsigned long real_time_cmpb:56; /* RW */ 2681647128f1SMike Travis unsigned long rsvd_56_63:8; 2682647128f1SMike Travis } s5; 2683647128f1SMike Travis 2684647128f1SMike Travis /* UV4 unique struct */ 2685647128f1SMike Travis struct uv4h_int_cmpb_s { 2686647128f1SMike Travis unsigned long real_time_cmpb:56; /* RW */ 2687647128f1SMike Travis unsigned long rsvd_56_63:8; 2688647128f1SMike Travis } s4; 2689647128f1SMike Travis 2690647128f1SMike Travis /* UV3 unique struct */ 2691647128f1SMike Travis struct uv3h_int_cmpb_s { 2692647128f1SMike Travis unsigned long real_time_cmpb:56; /* RW */ 2693647128f1SMike Travis unsigned long rsvd_56_63:8; 2694647128f1SMike Travis } s3; 2695647128f1SMike Travis 2696647128f1SMike Travis /* UV2 unique struct */ 2697647128f1SMike Travis struct uv2h_int_cmpb_s { 2698647128f1SMike Travis unsigned long real_time_cmpb:56; /* RW */ 2699647128f1SMike Travis unsigned long rsvd_56_63:8; 2700647128f1SMike Travis } s2; 2701647128f1SMike Travis }; 2702647128f1SMike Travis 2703647128f1SMike Travis /* ========================================================================= */ 2704647128f1SMike Travis /* UVH_IPI_INT */ 2705647128f1SMike Travis /* ========================================================================= */ 2706647128f1SMike Travis #define UVH_IPI_INT 0x60500UL 2707647128f1SMike Travis 2708647128f1SMike Travis /* UVH common defines*/ 2709647128f1SMike Travis #define UVH_IPI_INT_VECTOR_SHFT 0 2710647128f1SMike Travis #define UVH_IPI_INT_VECTOR_MASK 0x00000000000000ffUL 2711647128f1SMike Travis #define UVH_IPI_INT_DELIVERY_MODE_SHFT 8 2712647128f1SMike Travis #define UVH_IPI_INT_DELIVERY_MODE_MASK 0x0000000000000700UL 2713647128f1SMike Travis #define UVH_IPI_INT_DESTMODE_SHFT 11 2714647128f1SMike Travis #define UVH_IPI_INT_DESTMODE_MASK 0x0000000000000800UL 2715647128f1SMike Travis #define UVH_IPI_INT_APIC_ID_SHFT 16 2716647128f1SMike Travis #define UVH_IPI_INT_APIC_ID_MASK 0x0000ffffffff0000UL 2717647128f1SMike Travis #define UVH_IPI_INT_SEND_SHFT 63 2718647128f1SMike Travis #define UVH_IPI_INT_SEND_MASK 0x8000000000000000UL 2719647128f1SMike Travis 2720647128f1SMike Travis 2721647128f1SMike Travis union uvh_ipi_int_u { 2722647128f1SMike Travis unsigned long v; 2723647128f1SMike Travis 2724647128f1SMike Travis /* UVH common struct */ 2725647128f1SMike Travis struct uvh_ipi_int_s { 2726647128f1SMike Travis unsigned long vector_:8; /* RW */ 2727647128f1SMike Travis unsigned long delivery_mode:3; /* RW */ 2728647128f1SMike Travis unsigned long destmode:1; /* RW */ 2729647128f1SMike Travis unsigned long rsvd_12_15:4; 2730647128f1SMike Travis unsigned long apic_id:32; /* RW */ 2731647128f1SMike Travis unsigned long rsvd_48_62:15; 2732647128f1SMike Travis unsigned long send:1; /* WP */ 2733647128f1SMike Travis } s; 2734647128f1SMike Travis 2735647128f1SMike Travis /* UV5 unique struct */ 2736647128f1SMike Travis struct uv5h_ipi_int_s { 2737647128f1SMike Travis unsigned long vector_:8; /* RW */ 2738647128f1SMike Travis unsigned long delivery_mode:3; /* RW */ 2739647128f1SMike Travis unsigned long destmode:1; /* RW */ 2740647128f1SMike Travis unsigned long rsvd_12_15:4; 2741647128f1SMike Travis unsigned long apic_id:32; /* RW */ 2742647128f1SMike Travis unsigned long rsvd_48_62:15; 2743647128f1SMike Travis unsigned long send:1; /* WP */ 2744647128f1SMike Travis } s5; 2745647128f1SMike Travis 2746647128f1SMike Travis /* UV4 unique struct */ 2747647128f1SMike Travis struct uv4h_ipi_int_s { 2748647128f1SMike Travis unsigned long vector_:8; /* RW */ 2749647128f1SMike Travis unsigned long delivery_mode:3; /* RW */ 2750647128f1SMike Travis unsigned long destmode:1; /* RW */ 2751647128f1SMike Travis unsigned long rsvd_12_15:4; 2752647128f1SMike Travis unsigned long apic_id:32; /* RW */ 2753647128f1SMike Travis unsigned long rsvd_48_62:15; 2754647128f1SMike Travis unsigned long send:1; /* WP */ 2755647128f1SMike Travis } s4; 2756647128f1SMike Travis 2757647128f1SMike Travis /* UV3 unique struct */ 2758647128f1SMike Travis struct uv3h_ipi_int_s { 2759647128f1SMike Travis unsigned long vector_:8; /* RW */ 2760647128f1SMike Travis unsigned long delivery_mode:3; /* RW */ 2761647128f1SMike Travis unsigned long destmode:1; /* RW */ 2762647128f1SMike Travis unsigned long rsvd_12_15:4; 2763647128f1SMike Travis unsigned long apic_id:32; /* RW */ 2764647128f1SMike Travis unsigned long rsvd_48_62:15; 2765647128f1SMike Travis unsigned long send:1; /* WP */ 2766647128f1SMike Travis } s3; 2767647128f1SMike Travis 2768647128f1SMike Travis /* UV2 unique struct */ 2769647128f1SMike Travis struct uv2h_ipi_int_s { 2770647128f1SMike Travis unsigned long vector_:8; /* RW */ 2771647128f1SMike Travis unsigned long delivery_mode:3; /* RW */ 2772647128f1SMike Travis unsigned long destmode:1; /* RW */ 2773647128f1SMike Travis unsigned long rsvd_12_15:4; 2774647128f1SMike Travis unsigned long apic_id:32; /* RW */ 2775647128f1SMike Travis unsigned long rsvd_48_62:15; 2776647128f1SMike Travis unsigned long send:1; /* WP */ 2777647128f1SMike Travis } s2; 2778647128f1SMike Travis }; 2779647128f1SMike Travis 2780647128f1SMike Travis /* ========================================================================= */ 2781647128f1SMike Travis /* UVH_NODE_ID */ 2782647128f1SMike Travis /* ========================================================================= */ 2783647128f1SMike Travis #define UVH_NODE_ID 0x0UL 2784647128f1SMike Travis 2785647128f1SMike Travis /* UVH common defines*/ 2786647128f1SMike Travis #define UVH_NODE_ID_FORCE1_SHFT 0 2787647128f1SMike Travis #define UVH_NODE_ID_FORCE1_MASK 0x0000000000000001UL 2788647128f1SMike Travis #define UVH_NODE_ID_MANUFACTURER_SHFT 1 2789647128f1SMike Travis #define UVH_NODE_ID_MANUFACTURER_MASK 0x0000000000000ffeUL 2790647128f1SMike Travis #define UVH_NODE_ID_PART_NUMBER_SHFT 12 2791647128f1SMike Travis #define UVH_NODE_ID_PART_NUMBER_MASK 0x000000000ffff000UL 2792647128f1SMike Travis #define UVH_NODE_ID_REVISION_SHFT 28 2793647128f1SMike Travis #define UVH_NODE_ID_REVISION_MASK 0x00000000f0000000UL 2794647128f1SMike Travis #define UVH_NODE_ID_NODE_ID_SHFT 32 2795647128f1SMike Travis #define UVH_NODE_ID_NI_PORT_SHFT 57 2796647128f1SMike Travis 2797647128f1SMike Travis /* UVXH common defines */ 2798647128f1SMike Travis #define UVXH_NODE_ID_NODE_ID_MASK 0x00007fff00000000UL 2799647128f1SMike Travis #define UVXH_NODE_ID_NODES_PER_BIT_SHFT 50 2800647128f1SMike Travis #define UVXH_NODE_ID_NODES_PER_BIT_MASK 0x01fc000000000000UL 2801647128f1SMike Travis #define UVXH_NODE_ID_NI_PORT_MASK 0x3e00000000000000UL 2802647128f1SMike Travis 2803647128f1SMike Travis /* UVYH common defines */ 2804647128f1SMike Travis #define UVYH_NODE_ID_NODE_ID_MASK 0x0000007f00000000UL 2805647128f1SMike Travis #define UVYH_NODE_ID_NI_PORT_MASK 0x7e00000000000000UL 2806647128f1SMike Travis 2807647128f1SMike Travis /* UV4 unique defines */ 2808647128f1SMike Travis #define UV4H_NODE_ID_ROUTER_SELECT_SHFT 48 2809647128f1SMike Travis #define UV4H_NODE_ID_ROUTER_SELECT_MASK 0x0001000000000000UL 2810647128f1SMike Travis #define UV4H_NODE_ID_RESERVED_2_SHFT 49 2811647128f1SMike Travis #define UV4H_NODE_ID_RESERVED_2_MASK 0x0002000000000000UL 2812647128f1SMike Travis 2813647128f1SMike Travis /* UV3 unique defines */ 2814647128f1SMike Travis #define UV3H_NODE_ID_ROUTER_SELECT_SHFT 48 2815647128f1SMike Travis #define UV3H_NODE_ID_ROUTER_SELECT_MASK 0x0001000000000000UL 2816647128f1SMike Travis #define UV3H_NODE_ID_RESERVED_2_SHFT 49 2817647128f1SMike Travis #define UV3H_NODE_ID_RESERVED_2_MASK 0x0002000000000000UL 2818647128f1SMike Travis 2819647128f1SMike Travis 2820647128f1SMike Travis union uvh_node_id_u { 2821647128f1SMike Travis unsigned long v; 2822647128f1SMike Travis 2823647128f1SMike Travis /* UVH common struct */ 2824647128f1SMike Travis struct uvh_node_id_s { 2825647128f1SMike Travis unsigned long force1:1; /* RO */ 2826647128f1SMike Travis unsigned long manufacturer:11; /* RO */ 2827647128f1SMike Travis unsigned long part_number:16; /* RO */ 2828647128f1SMike Travis unsigned long revision:4; /* RO */ 2829647128f1SMike Travis unsigned long rsvd_32_63:32; 2830647128f1SMike Travis } s; 2831647128f1SMike Travis 2832647128f1SMike Travis /* UVXH common struct */ 2833647128f1SMike Travis struct uvxh_node_id_s { 2834647128f1SMike Travis unsigned long force1:1; /* RO */ 2835647128f1SMike Travis unsigned long manufacturer:11; /* RO */ 2836647128f1SMike Travis unsigned long part_number:16; /* RO */ 2837647128f1SMike Travis unsigned long revision:4; /* RO */ 2838647128f1SMike Travis unsigned long node_id:15; /* RW */ 2839647128f1SMike Travis unsigned long rsvd_47_49:3; 2840647128f1SMike Travis unsigned long nodes_per_bit:7; /* RO */ 2841647128f1SMike Travis unsigned long ni_port:5; /* RO */ 2842647128f1SMike Travis unsigned long rsvd_62_63:2; 2843647128f1SMike Travis } sx; 2844647128f1SMike Travis 2845647128f1SMike Travis /* UVYH common struct */ 2846647128f1SMike Travis struct uvyh_node_id_s { 2847647128f1SMike Travis unsigned long force1:1; /* RO */ 2848647128f1SMike Travis unsigned long manufacturer:11; /* RO */ 2849647128f1SMike Travis unsigned long part_number:16; /* RO */ 2850647128f1SMike Travis unsigned long revision:4; /* RO */ 2851647128f1SMike Travis unsigned long node_id:7; /* RW */ 2852647128f1SMike Travis unsigned long rsvd_39_56:18; 2853647128f1SMike Travis unsigned long ni_port:6; /* RO */ 2854647128f1SMike Travis unsigned long rsvd_63:1; 2855647128f1SMike Travis } sy; 2856647128f1SMike Travis 2857647128f1SMike Travis /* UV5 unique struct */ 2858647128f1SMike Travis struct uv5h_node_id_s { 2859647128f1SMike Travis unsigned long force1:1; /* RO */ 2860647128f1SMike Travis unsigned long manufacturer:11; /* RO */ 2861647128f1SMike Travis unsigned long part_number:16; /* RO */ 2862647128f1SMike Travis unsigned long revision:4; /* RO */ 2863647128f1SMike Travis unsigned long node_id:7; /* RW */ 2864647128f1SMike Travis unsigned long rsvd_39_56:18; 2865647128f1SMike Travis unsigned long ni_port:6; /* RO */ 2866647128f1SMike Travis unsigned long rsvd_63:1; 2867647128f1SMike Travis } s5; 2868647128f1SMike Travis 2869647128f1SMike Travis /* UV4 unique struct */ 2870647128f1SMike Travis struct uv4h_node_id_s { 2871647128f1SMike Travis unsigned long force1:1; /* RO */ 2872647128f1SMike Travis unsigned long manufacturer:11; /* RO */ 2873647128f1SMike Travis unsigned long part_number:16; /* RO */ 2874647128f1SMike Travis unsigned long revision:4; /* RO */ 2875647128f1SMike Travis unsigned long node_id:15; /* RW */ 2876647128f1SMike Travis unsigned long rsvd_47:1; 2877647128f1SMike Travis unsigned long router_select:1; /* RO */ 2878647128f1SMike Travis unsigned long rsvd_49:1; 2879647128f1SMike Travis unsigned long nodes_per_bit:7; /* RO */ 2880647128f1SMike Travis unsigned long ni_port:5; /* RO */ 2881647128f1SMike Travis unsigned long rsvd_62_63:2; 2882647128f1SMike Travis } s4; 2883647128f1SMike Travis 2884647128f1SMike Travis /* UV3 unique struct */ 2885647128f1SMike Travis struct uv3h_node_id_s { 2886647128f1SMike Travis unsigned long force1:1; /* RO */ 2887647128f1SMike Travis unsigned long manufacturer:11; /* RO */ 2888647128f1SMike Travis unsigned long part_number:16; /* RO */ 2889647128f1SMike Travis unsigned long revision:4; /* RO */ 2890647128f1SMike Travis unsigned long node_id:15; /* RW */ 2891647128f1SMike Travis unsigned long rsvd_47:1; 2892647128f1SMike Travis unsigned long router_select:1; /* RO */ 2893647128f1SMike Travis unsigned long rsvd_49:1; 2894647128f1SMike Travis unsigned long nodes_per_bit:7; /* RO */ 2895647128f1SMike Travis unsigned long ni_port:5; /* RO */ 2896647128f1SMike Travis unsigned long rsvd_62_63:2; 2897647128f1SMike Travis } s3; 2898647128f1SMike Travis 2899647128f1SMike Travis /* UV2 unique struct */ 2900647128f1SMike Travis struct uv2h_node_id_s { 2901647128f1SMike Travis unsigned long force1:1; /* RO */ 2902647128f1SMike Travis unsigned long manufacturer:11; /* RO */ 2903647128f1SMike Travis unsigned long part_number:16; /* RO */ 2904647128f1SMike Travis unsigned long revision:4; /* RO */ 2905647128f1SMike Travis unsigned long node_id:15; /* RW */ 2906647128f1SMike Travis unsigned long rsvd_47_49:3; 2907647128f1SMike Travis unsigned long nodes_per_bit:7; /* RO */ 2908647128f1SMike Travis unsigned long ni_port:5; /* RO */ 2909647128f1SMike Travis unsigned long rsvd_62_63:2; 2910647128f1SMike Travis } s2; 2911647128f1SMike Travis }; 2912647128f1SMike Travis 2913647128f1SMike Travis /* ========================================================================= */ 2914647128f1SMike Travis /* UVH_NODE_PRESENT_0 */ 2915647128f1SMike Travis /* ========================================================================= */ 2916647128f1SMike Travis #define UVH_NODE_PRESENT_0 ( \ 2917647128f1SMike Travis is_uv(UV5) ? 0x1400UL : \ 2918647128f1SMike Travis 0) 2919647128f1SMike Travis 2920647128f1SMike Travis 2921647128f1SMike Travis /* UVYH common defines */ 2922647128f1SMike Travis #define UVYH_NODE_PRESENT_0_NODES_SHFT 0 2923647128f1SMike Travis #define UVYH_NODE_PRESENT_0_NODES_MASK 0xffffffffffffffffUL 2924647128f1SMike Travis 2925647128f1SMike Travis 2926647128f1SMike Travis union uvh_node_present_0_u { 2927647128f1SMike Travis unsigned long v; 2928647128f1SMike Travis 2929647128f1SMike Travis /* UVH common struct */ 2930647128f1SMike Travis struct uvh_node_present_0_s { 2931647128f1SMike Travis unsigned long nodes:64; /* RW */ 2932647128f1SMike Travis } s; 2933647128f1SMike Travis 2934647128f1SMike Travis /* UVYH common struct */ 2935647128f1SMike Travis struct uvyh_node_present_0_s { 2936647128f1SMike Travis unsigned long nodes:64; /* RW */ 2937647128f1SMike Travis } sy; 2938647128f1SMike Travis 2939647128f1SMike Travis /* UV5 unique struct */ 2940647128f1SMike Travis struct uv5h_node_present_0_s { 2941647128f1SMike Travis unsigned long nodes:64; /* RW */ 2942647128f1SMike Travis } s5; 2943647128f1SMike Travis }; 2944647128f1SMike Travis 2945647128f1SMike Travis /* ========================================================================= */ 2946647128f1SMike Travis /* UVH_NODE_PRESENT_1 */ 2947647128f1SMike Travis /* ========================================================================= */ 2948647128f1SMike Travis #define UVH_NODE_PRESENT_1 ( \ 2949647128f1SMike Travis is_uv(UV5) ? 0x1408UL : \ 2950647128f1SMike Travis 0) 2951647128f1SMike Travis 2952647128f1SMike Travis 2953647128f1SMike Travis /* UVYH common defines */ 2954647128f1SMike Travis #define UVYH_NODE_PRESENT_1_NODES_SHFT 0 2955647128f1SMike Travis #define UVYH_NODE_PRESENT_1_NODES_MASK 0xffffffffffffffffUL 2956647128f1SMike Travis 2957647128f1SMike Travis 2958647128f1SMike Travis union uvh_node_present_1_u { 2959647128f1SMike Travis unsigned long v; 2960647128f1SMike Travis 2961647128f1SMike Travis /* UVH common struct */ 2962647128f1SMike Travis struct uvh_node_present_1_s { 2963647128f1SMike Travis unsigned long nodes:64; /* RW */ 2964647128f1SMike Travis } s; 2965647128f1SMike Travis 2966647128f1SMike Travis /* UVYH common struct */ 2967647128f1SMike Travis struct uvyh_node_present_1_s { 2968647128f1SMike Travis unsigned long nodes:64; /* RW */ 2969647128f1SMike Travis } sy; 2970647128f1SMike Travis 2971647128f1SMike Travis /* UV5 unique struct */ 2972647128f1SMike Travis struct uv5h_node_present_1_s { 2973647128f1SMike Travis unsigned long nodes:64; /* RW */ 2974647128f1SMike Travis } s5; 2975647128f1SMike Travis }; 2976647128f1SMike Travis 2977647128f1SMike Travis /* ========================================================================= */ 2978647128f1SMike Travis /* UVH_NODE_PRESENT_TABLE */ 2979647128f1SMike Travis /* ========================================================================= */ 2980647128f1SMike Travis #define UVH_NODE_PRESENT_TABLE ( \ 2981647128f1SMike Travis is_uv(UV4) ? 0x1400UL : \ 2982647128f1SMike Travis is_uv(UV3) ? 0x1400UL : \ 2983647128f1SMike Travis is_uv(UV2) ? 0x1400UL : \ 2984647128f1SMike Travis 0) 2985647128f1SMike Travis 2986647128f1SMike Travis #define UVH_NODE_PRESENT_TABLE_DEPTH ( \ 2987647128f1SMike Travis is_uv(UV4) ? 4 : \ 2988647128f1SMike Travis is_uv(UV3) ? 16 : \ 2989647128f1SMike Travis is_uv(UV2) ? 16 : \ 2990647128f1SMike Travis 0) 2991647128f1SMike Travis 2992647128f1SMike Travis 2993647128f1SMike Travis /* UVXH common defines */ 2994647128f1SMike Travis #define UVXH_NODE_PRESENT_TABLE_NODES_SHFT 0 2995647128f1SMike Travis #define UVXH_NODE_PRESENT_TABLE_NODES_MASK 0xffffffffffffffffUL 2996647128f1SMike Travis 2997647128f1SMike Travis 2998647128f1SMike Travis union uvh_node_present_table_u { 2999647128f1SMike Travis unsigned long v; 3000647128f1SMike Travis 3001647128f1SMike Travis /* UVH common struct */ 3002647128f1SMike Travis struct uvh_node_present_table_s { 3003647128f1SMike Travis unsigned long nodes:64; /* RW */ 3004647128f1SMike Travis } s; 3005647128f1SMike Travis 3006647128f1SMike Travis /* UVXH common struct */ 3007647128f1SMike Travis struct uvxh_node_present_table_s { 3008647128f1SMike Travis unsigned long nodes:64; /* RW */ 3009647128f1SMike Travis } sx; 3010647128f1SMike Travis 3011647128f1SMike Travis /* UV4 unique struct */ 3012647128f1SMike Travis struct uv4h_node_present_table_s { 3013647128f1SMike Travis unsigned long nodes:64; /* RW */ 3014647128f1SMike Travis } s4; 3015647128f1SMike Travis 3016647128f1SMike Travis /* UV3 unique struct */ 3017647128f1SMike Travis struct uv3h_node_present_table_s { 3018647128f1SMike Travis unsigned long nodes:64; /* RW */ 3019647128f1SMike Travis } s3; 3020647128f1SMike Travis 3021647128f1SMike Travis /* UV2 unique struct */ 3022647128f1SMike Travis struct uv2h_node_present_table_s { 3023647128f1SMike Travis unsigned long nodes:64; /* RW */ 3024647128f1SMike Travis } s2; 3025647128f1SMike Travis }; 3026647128f1SMike Travis 3027647128f1SMike Travis /* ========================================================================= */ 3028647128f1SMike Travis /* UVH_RH10_GAM_ADDR_MAP_CONFIG */ 3029647128f1SMike Travis /* ========================================================================= */ 3030647128f1SMike Travis #define UVH_RH10_GAM_ADDR_MAP_CONFIG ( \ 3031647128f1SMike Travis is_uv(UV5) ? 0x470000UL : \ 3032647128f1SMike Travis 0) 3033647128f1SMike Travis 3034647128f1SMike Travis 3035647128f1SMike Travis /* UVYH common defines */ 3036647128f1SMike Travis #define UVYH_RH10_GAM_ADDR_MAP_CONFIG_N_SKT_SHFT 6 3037647128f1SMike Travis #define UVYH_RH10_GAM_ADDR_MAP_CONFIG_N_SKT_MASK 0x00000000000001c0UL 3038647128f1SMike Travis #define UVYH_RH10_GAM_ADDR_MAP_CONFIG_LS_ENABLE_SHFT 12 3039647128f1SMike Travis #define UVYH_RH10_GAM_ADDR_MAP_CONFIG_LS_ENABLE_MASK 0x0000000000001000UL 3040647128f1SMike Travis #define UVYH_RH10_GAM_ADDR_MAP_CONFIG_MK_TME_KEYID_BITS_SHFT 16 3041647128f1SMike Travis #define UVYH_RH10_GAM_ADDR_MAP_CONFIG_MK_TME_KEYID_BITS_MASK 0x00000000000f0000UL 3042647128f1SMike Travis 3043647128f1SMike Travis 3044647128f1SMike Travis union uvh_rh10_gam_addr_map_config_u { 3045647128f1SMike Travis unsigned long v; 3046647128f1SMike Travis 3047647128f1SMike Travis /* UVH common struct */ 3048647128f1SMike Travis struct uvh_rh10_gam_addr_map_config_s { 30490f0d84c0SMike Travis unsigned long undef_0_5:6; /* Undefined */ 3050647128f1SMike Travis unsigned long n_skt:3; /* RW */ 3051647128f1SMike Travis unsigned long undef_9_11:3; /* Undefined */ 3052647128f1SMike Travis unsigned long ls_enable:1; /* RW */ 3053647128f1SMike Travis unsigned long undef_13_15:3; /* Undefined */ 3054647128f1SMike Travis unsigned long mk_tme_keyid_bits:4; /* RW */ 3055647128f1SMike Travis unsigned long rsvd_20_63:44; 3056647128f1SMike Travis } s; 3057647128f1SMike Travis 3058647128f1SMike Travis /* UVYH common struct */ 3059647128f1SMike Travis struct uvyh_rh10_gam_addr_map_config_s { 3060647128f1SMike Travis unsigned long undef_0_5:6; /* Undefined */ 3061647128f1SMike Travis unsigned long n_skt:3; /* RW */ 3062647128f1SMike Travis unsigned long undef_9_11:3; /* Undefined */ 3063647128f1SMike Travis unsigned long ls_enable:1; /* RW */ 3064647128f1SMike Travis unsigned long undef_13_15:3; /* Undefined */ 3065647128f1SMike Travis unsigned long mk_tme_keyid_bits:4; /* RW */ 3066647128f1SMike Travis unsigned long rsvd_20_63:44; 3067647128f1SMike Travis } sy; 3068647128f1SMike Travis 3069647128f1SMike Travis /* UV5 unique struct */ 3070647128f1SMike Travis struct uv5h_rh10_gam_addr_map_config_s { 3071647128f1SMike Travis unsigned long undef_0_5:6; /* Undefined */ 3072647128f1SMike Travis unsigned long n_skt:3; /* RW */ 3073647128f1SMike Travis unsigned long undef_9_11:3; /* Undefined */ 3074647128f1SMike Travis unsigned long ls_enable:1; /* RW */ 3075647128f1SMike Travis unsigned long undef_13_15:3; /* Undefined */ 3076647128f1SMike Travis unsigned long mk_tme_keyid_bits:4; /* RW */ 3077647128f1SMike Travis } s5; 30780f0d84c0SMike Travis }; 30790f0d84c0SMike Travis 30800f0d84c0SMike Travis /* ========================================================================= */ 3081647128f1SMike Travis /* UVH_RH10_GAM_GRU_OVERLAY_CONFIG */ 30820f0d84c0SMike Travis /* ========================================================================= */ 3083647128f1SMike Travis #define UVH_RH10_GAM_GRU_OVERLAY_CONFIG ( \ 3084647128f1SMike Travis is_uv(UV5) ? 0x4700b0UL : \ 3085647128f1SMike Travis 0) 30860f0d84c0SMike Travis 30870f0d84c0SMike Travis 3088647128f1SMike Travis /* UVYH common defines */ 3089647128f1SMike Travis #define UVYH_RH10_GAM_GRU_OVERLAY_CONFIG_BASE_SHFT 25 3090647128f1SMike Travis #define UVYH_RH10_GAM_GRU_OVERLAY_CONFIG_BASE_MASK 0x000ffffffe000000UL 3091647128f1SMike Travis #define UVYH_RH10_GAM_GRU_OVERLAY_CONFIG_N_GRU_SHFT 52 3092647128f1SMike Travis #define UVYH_RH10_GAM_GRU_OVERLAY_CONFIG_N_GRU_MASK 0x0070000000000000UL 3093647128f1SMike Travis #define UVYH_RH10_GAM_GRU_OVERLAY_CONFIG_ENABLE_SHFT 63 3094647128f1SMike Travis #define UVYH_RH10_GAM_GRU_OVERLAY_CONFIG_ENABLE_MASK 0x8000000000000000UL 3095647128f1SMike Travis 3096647128f1SMike Travis #define UVH_RH10_GAM_GRU_OVERLAY_CONFIG_BASE_MASK ( \ 3097647128f1SMike Travis is_uv(UV5) ? 0x000ffffffe000000UL : \ 3098647128f1SMike Travis 0) 3099647128f1SMike Travis #define UVH_RH10_GAM_GRU_OVERLAY_CONFIG_BASE_SHFT ( \ 3100647128f1SMike Travis is_uv(UV5) ? 25 : \ 3101647128f1SMike Travis -1) 3102647128f1SMike Travis 3103647128f1SMike Travis union uvh_rh10_gam_gru_overlay_config_u { 31040f0d84c0SMike Travis unsigned long v; 3105647128f1SMike Travis 3106647128f1SMike Travis /* UVH common struct */ 3107647128f1SMike Travis struct uvh_rh10_gam_gru_overlay_config_s { 3108647128f1SMike Travis unsigned long undef_0_24:25; /* Undefined */ 3109647128f1SMike Travis unsigned long base:27; /* RW */ 3110647128f1SMike Travis unsigned long n_gru:3; /* RW */ 3111647128f1SMike Travis unsigned long undef_55_62:8; /* Undefined */ 3112647128f1SMike Travis unsigned long enable:1; /* RW */ 3113647128f1SMike Travis } s; 3114647128f1SMike Travis 3115647128f1SMike Travis /* UVYH common struct */ 3116647128f1SMike Travis struct uvyh_rh10_gam_gru_overlay_config_s { 3117647128f1SMike Travis unsigned long undef_0_24:25; /* Undefined */ 3118647128f1SMike Travis unsigned long base:27; /* RW */ 3119647128f1SMike Travis unsigned long n_gru:3; /* RW */ 3120647128f1SMike Travis unsigned long undef_55_62:8; /* Undefined */ 3121647128f1SMike Travis unsigned long enable:1; /* RW */ 3122647128f1SMike Travis } sy; 3123647128f1SMike Travis 3124647128f1SMike Travis /* UV5 unique struct */ 3125647128f1SMike Travis struct uv5h_rh10_gam_gru_overlay_config_s { 3126647128f1SMike Travis unsigned long undef_0_24:25; /* Undefined */ 3127647128f1SMike Travis unsigned long base:27; /* RW */ 3128647128f1SMike Travis unsigned long n_gru:3; /* RW */ 3129647128f1SMike Travis unsigned long undef_55_62:8; /* Undefined */ 3130647128f1SMike Travis unsigned long enable:1; /* RW */ 3131647128f1SMike Travis } s5; 31320f0d84c0SMike Travis }; 31330f0d84c0SMike Travis 31340f0d84c0SMike Travis /* ========================================================================= */ 3135647128f1SMike Travis /* UVH_RH10_GAM_MMIOH_OVERLAY_CONFIG0 */ 31360f0d84c0SMike Travis /* ========================================================================= */ 3137647128f1SMike Travis #define UVH_RH10_GAM_MMIOH_OVERLAY_CONFIG0 ( \ 3138647128f1SMike Travis is_uv(UV5) ? 0x473000UL : \ 3139647128f1SMike Travis 0) 31400f0d84c0SMike Travis 31410f0d84c0SMike Travis 3142647128f1SMike Travis /* UVYH common defines */ 3143647128f1SMike Travis #define UVYH_RH10_GAM_MMIOH_OVERLAY_CONFIG0_BASE_SHFT 26 3144647128f1SMike Travis #define UVYH_RH10_GAM_MMIOH_OVERLAY_CONFIG0_BASE_MASK 0x000ffffffc000000UL 3145647128f1SMike Travis #define UVYH_RH10_GAM_MMIOH_OVERLAY_CONFIG0_M_IO_SHFT 52 3146647128f1SMike Travis #define UVYH_RH10_GAM_MMIOH_OVERLAY_CONFIG0_M_IO_MASK 0x03f0000000000000UL 3147647128f1SMike Travis #define UVYH_RH10_GAM_MMIOH_OVERLAY_CONFIG0_ENABLE_SHFT 63 3148647128f1SMike Travis #define UVYH_RH10_GAM_MMIOH_OVERLAY_CONFIG0_ENABLE_MASK 0x8000000000000000UL 3149647128f1SMike Travis 3150647128f1SMike Travis #define UVH_RH10_GAM_MMIOH_OVERLAY_CONFIG0_BASE_MASK ( \ 3151647128f1SMike Travis is_uv(UV5) ? 0x000ffffffc000000UL : \ 3152647128f1SMike Travis 0) 3153647128f1SMike Travis #define UVH_RH10_GAM_MMIOH_OVERLAY_CONFIG0_BASE_SHFT ( \ 3154647128f1SMike Travis is_uv(UV5) ? 26 : \ 3155647128f1SMike Travis -1) 3156647128f1SMike Travis 3157647128f1SMike Travis union uvh_rh10_gam_mmioh_overlay_config0_u { 31580f0d84c0SMike Travis unsigned long v; 3159647128f1SMike Travis 3160647128f1SMike Travis /* UVH common struct */ 3161647128f1SMike Travis struct uvh_rh10_gam_mmioh_overlay_config0_s { 3162647128f1SMike Travis unsigned long rsvd_0_25:26; 3163647128f1SMike Travis unsigned long base:26; /* RW */ 3164647128f1SMike Travis unsigned long m_io:6; /* RW */ 3165647128f1SMike Travis unsigned long n_io:4; 3166647128f1SMike Travis unsigned long undef_62:1; /* Undefined */ 3167647128f1SMike Travis unsigned long enable:1; /* RW */ 3168647128f1SMike Travis } s; 3169647128f1SMike Travis 3170647128f1SMike Travis /* UVYH common struct */ 3171647128f1SMike Travis struct uvyh_rh10_gam_mmioh_overlay_config0_s { 3172647128f1SMike Travis unsigned long rsvd_0_25:26; 3173647128f1SMike Travis unsigned long base:26; /* RW */ 3174647128f1SMike Travis unsigned long m_io:6; /* RW */ 3175647128f1SMike Travis unsigned long n_io:4; 3176647128f1SMike Travis unsigned long undef_62:1; /* Undefined */ 3177647128f1SMike Travis unsigned long enable:1; /* RW */ 3178647128f1SMike Travis } sy; 3179647128f1SMike Travis 3180647128f1SMike Travis /* UV5 unique struct */ 3181647128f1SMike Travis struct uv5h_rh10_gam_mmioh_overlay_config0_s { 3182647128f1SMike Travis unsigned long rsvd_0_25:26; 3183647128f1SMike Travis unsigned long base:26; /* RW */ 3184647128f1SMike Travis unsigned long m_io:6; /* RW */ 3185647128f1SMike Travis unsigned long n_io:4; 3186647128f1SMike Travis unsigned long undef_62:1; /* Undefined */ 3187647128f1SMike Travis unsigned long enable:1; /* RW */ 3188647128f1SMike Travis } s5; 31890f0d84c0SMike Travis }; 31900f0d84c0SMike Travis 31910f0d84c0SMike Travis /* ========================================================================= */ 3192647128f1SMike Travis /* UVH_RH10_GAM_MMIOH_OVERLAY_CONFIG1 */ 31930f0d84c0SMike Travis /* ========================================================================= */ 3194647128f1SMike Travis #define UVH_RH10_GAM_MMIOH_OVERLAY_CONFIG1 ( \ 3195647128f1SMike Travis is_uv(UV5) ? 0x474000UL : \ 3196647128f1SMike Travis 0) 31970f0d84c0SMike Travis 31980f0d84c0SMike Travis 3199647128f1SMike Travis /* UVYH common defines */ 3200647128f1SMike Travis #define UVYH_RH10_GAM_MMIOH_OVERLAY_CONFIG1_BASE_SHFT 26 3201647128f1SMike Travis #define UVYH_RH10_GAM_MMIOH_OVERLAY_CONFIG1_BASE_MASK 0x000ffffffc000000UL 3202647128f1SMike Travis #define UVYH_RH10_GAM_MMIOH_OVERLAY_CONFIG1_M_IO_SHFT 52 3203647128f1SMike Travis #define UVYH_RH10_GAM_MMIOH_OVERLAY_CONFIG1_M_IO_MASK 0x03f0000000000000UL 3204647128f1SMike Travis #define UVYH_RH10_GAM_MMIOH_OVERLAY_CONFIG1_ENABLE_SHFT 63 3205647128f1SMike Travis #define UVYH_RH10_GAM_MMIOH_OVERLAY_CONFIG1_ENABLE_MASK 0x8000000000000000UL 3206647128f1SMike Travis 3207647128f1SMike Travis #define UVH_RH10_GAM_MMIOH_OVERLAY_CONFIG1_BASE_MASK ( \ 3208647128f1SMike Travis is_uv(UV5) ? 0x000ffffffc000000UL : \ 3209647128f1SMike Travis 0) 3210647128f1SMike Travis #define UVH_RH10_GAM_MMIOH_OVERLAY_CONFIG1_BASE_SHFT ( \ 3211647128f1SMike Travis is_uv(UV5) ? 26 : \ 3212647128f1SMike Travis -1) 3213647128f1SMike Travis 3214647128f1SMike Travis union uvh_rh10_gam_mmioh_overlay_config1_u { 32150f0d84c0SMike Travis unsigned long v; 3216647128f1SMike Travis 3217647128f1SMike Travis /* UVH common struct */ 3218647128f1SMike Travis struct uvh_rh10_gam_mmioh_overlay_config1_s { 3219647128f1SMike Travis unsigned long rsvd_0_25:26; 3220647128f1SMike Travis unsigned long base:26; /* RW */ 3221647128f1SMike Travis unsigned long m_io:6; /* RW */ 3222647128f1SMike Travis unsigned long n_io:4; 3223647128f1SMike Travis unsigned long undef_62:1; /* Undefined */ 3224647128f1SMike Travis unsigned long enable:1; /* RW */ 3225647128f1SMike Travis } s; 3226647128f1SMike Travis 3227647128f1SMike Travis /* UVYH common struct */ 3228647128f1SMike Travis struct uvyh_rh10_gam_mmioh_overlay_config1_s { 3229647128f1SMike Travis unsigned long rsvd_0_25:26; 3230647128f1SMike Travis unsigned long base:26; /* RW */ 3231647128f1SMike Travis unsigned long m_io:6; /* RW */ 3232647128f1SMike Travis unsigned long n_io:4; 3233647128f1SMike Travis unsigned long undef_62:1; /* Undefined */ 3234647128f1SMike Travis unsigned long enable:1; /* RW */ 3235647128f1SMike Travis } sy; 3236647128f1SMike Travis 3237647128f1SMike Travis /* UV5 unique struct */ 3238647128f1SMike Travis struct uv5h_rh10_gam_mmioh_overlay_config1_s { 3239647128f1SMike Travis unsigned long rsvd_0_25:26; 3240647128f1SMike Travis unsigned long base:26; /* RW */ 3241647128f1SMike Travis unsigned long m_io:6; /* RW */ 3242647128f1SMike Travis unsigned long n_io:4; 3243647128f1SMike Travis unsigned long undef_62:1; /* Undefined */ 3244647128f1SMike Travis unsigned long enable:1; /* RW */ 3245647128f1SMike Travis } s5; 32460f0d84c0SMike Travis }; 32470f0d84c0SMike Travis 3248647128f1SMike Travis /* ========================================================================= */ 3249647128f1SMike Travis /* UVH_RH10_GAM_MMIOH_REDIRECT_CONFIG0 */ 3250647128f1SMike Travis /* ========================================================================= */ 3251647128f1SMike Travis #define UVH_RH10_GAM_MMIOH_REDIRECT_CONFIG0 ( \ 3252647128f1SMike Travis is_uv(UV5) ? 0x473800UL : \ 3253647128f1SMike Travis 0) 3254647128f1SMike Travis 3255647128f1SMike Travis #define UVH_RH10_GAM_MMIOH_REDIRECT_CONFIG0_DEPTH ( \ 3256647128f1SMike Travis is_uv(UV5) ? 128 : \ 3257647128f1SMike Travis 0) 3258647128f1SMike Travis 3259647128f1SMike Travis 3260647128f1SMike Travis /* UVYH common defines */ 3261647128f1SMike Travis #define UVYH_RH10_GAM_MMIOH_REDIRECT_CONFIG0_NASID_SHFT 0 3262647128f1SMike Travis #define UVYH_RH10_GAM_MMIOH_REDIRECT_CONFIG0_NASID_MASK 0x000000000000007fUL 3263647128f1SMike Travis 3264647128f1SMike Travis 3265647128f1SMike Travis union uvh_rh10_gam_mmioh_redirect_config0_u { 3266647128f1SMike Travis unsigned long v; 3267647128f1SMike Travis 3268647128f1SMike Travis /* UVH common struct */ 3269647128f1SMike Travis struct uvh_rh10_gam_mmioh_redirect_config0_s { 3270647128f1SMike Travis unsigned long nasid:7; /* RW */ 3271647128f1SMike Travis unsigned long rsvd_7_63:57; 3272647128f1SMike Travis } s; 3273647128f1SMike Travis 3274647128f1SMike Travis /* UVYH common struct */ 3275647128f1SMike Travis struct uvyh_rh10_gam_mmioh_redirect_config0_s { 3276647128f1SMike Travis unsigned long nasid:7; /* RW */ 3277647128f1SMike Travis unsigned long rsvd_7_63:57; 3278647128f1SMike Travis } sy; 3279647128f1SMike Travis 3280647128f1SMike Travis /* UV5 unique struct */ 3281647128f1SMike Travis struct uv5h_rh10_gam_mmioh_redirect_config0_s { 3282647128f1SMike Travis unsigned long nasid:7; /* RW */ 3283647128f1SMike Travis unsigned long rsvd_7_63:57; 3284647128f1SMike Travis } s5; 3285647128f1SMike Travis }; 3286647128f1SMike Travis 3287647128f1SMike Travis /* ========================================================================= */ 3288647128f1SMike Travis /* UVH_RH10_GAM_MMIOH_REDIRECT_CONFIG1 */ 3289647128f1SMike Travis /* ========================================================================= */ 3290647128f1SMike Travis #define UVH_RH10_GAM_MMIOH_REDIRECT_CONFIG1 ( \ 3291647128f1SMike Travis is_uv(UV5) ? 0x474800UL : \ 3292647128f1SMike Travis 0) 3293647128f1SMike Travis 3294647128f1SMike Travis #define UVH_RH10_GAM_MMIOH_REDIRECT_CONFIG1_DEPTH ( \ 3295647128f1SMike Travis is_uv(UV5) ? 128 : \ 3296647128f1SMike Travis 0) 3297647128f1SMike Travis 3298647128f1SMike Travis 3299647128f1SMike Travis /* UVYH common defines */ 3300647128f1SMike Travis #define UVYH_RH10_GAM_MMIOH_REDIRECT_CONFIG1_NASID_SHFT 0 3301647128f1SMike Travis #define UVYH_RH10_GAM_MMIOH_REDIRECT_CONFIG1_NASID_MASK 0x000000000000007fUL 3302647128f1SMike Travis 3303647128f1SMike Travis 3304647128f1SMike Travis union uvh_rh10_gam_mmioh_redirect_config1_u { 3305647128f1SMike Travis unsigned long v; 3306647128f1SMike Travis 3307647128f1SMike Travis /* UVH common struct */ 3308647128f1SMike Travis struct uvh_rh10_gam_mmioh_redirect_config1_s { 3309647128f1SMike Travis unsigned long nasid:7; /* RW */ 3310647128f1SMike Travis unsigned long rsvd_7_63:57; 3311647128f1SMike Travis } s; 3312647128f1SMike Travis 3313647128f1SMike Travis /* UVYH common struct */ 3314647128f1SMike Travis struct uvyh_rh10_gam_mmioh_redirect_config1_s { 3315647128f1SMike Travis unsigned long nasid:7; /* RW */ 3316647128f1SMike Travis unsigned long rsvd_7_63:57; 3317647128f1SMike Travis } sy; 3318647128f1SMike Travis 3319647128f1SMike Travis /* UV5 unique struct */ 3320647128f1SMike Travis struct uv5h_rh10_gam_mmioh_redirect_config1_s { 3321647128f1SMike Travis unsigned long nasid:7; /* RW */ 3322647128f1SMike Travis unsigned long rsvd_7_63:57; 3323647128f1SMike Travis } s5; 3324647128f1SMike Travis }; 3325647128f1SMike Travis 3326647128f1SMike Travis /* ========================================================================= */ 3327647128f1SMike Travis /* UVH_RH10_GAM_MMR_OVERLAY_CONFIG */ 3328647128f1SMike Travis /* ========================================================================= */ 3329647128f1SMike Travis #define UVH_RH10_GAM_MMR_OVERLAY_CONFIG ( \ 3330647128f1SMike Travis is_uv(UV5) ? 0x470090UL : \ 3331647128f1SMike Travis 0) 3332647128f1SMike Travis 3333647128f1SMike Travis 3334647128f1SMike Travis /* UVYH common defines */ 3335647128f1SMike Travis #define UVYH_RH10_GAM_MMR_OVERLAY_CONFIG_BASE_SHFT 25 3336647128f1SMike Travis #define UVYH_RH10_GAM_MMR_OVERLAY_CONFIG_BASE_MASK 0x000ffffffe000000UL 3337647128f1SMike Travis #define UVYH_RH10_GAM_MMR_OVERLAY_CONFIG_ENABLE_SHFT 63 3338647128f1SMike Travis #define UVYH_RH10_GAM_MMR_OVERLAY_CONFIG_ENABLE_MASK 0x8000000000000000UL 3339647128f1SMike Travis 3340647128f1SMike Travis #define UVH_RH10_GAM_MMR_OVERLAY_CONFIG_BASE_MASK ( \ 3341647128f1SMike Travis is_uv(UV5) ? 0x000ffffffe000000UL : \ 3342647128f1SMike Travis 0) 3343647128f1SMike Travis #define UVH_RH10_GAM_MMR_OVERLAY_CONFIG_BASE_SHFT ( \ 3344647128f1SMike Travis is_uv(UV5) ? 25 : \ 3345647128f1SMike Travis -1) 3346647128f1SMike Travis 3347647128f1SMike Travis union uvh_rh10_gam_mmr_overlay_config_u { 3348647128f1SMike Travis unsigned long v; 3349647128f1SMike Travis 3350647128f1SMike Travis /* UVH common struct */ 3351647128f1SMike Travis struct uvh_rh10_gam_mmr_overlay_config_s { 3352647128f1SMike Travis unsigned long undef_0_24:25; /* Undefined */ 3353647128f1SMike Travis unsigned long base:27; /* RW */ 3354647128f1SMike Travis unsigned long undef_52_62:11; /* Undefined */ 3355647128f1SMike Travis unsigned long enable:1; /* RW */ 3356647128f1SMike Travis } s; 3357647128f1SMike Travis 3358647128f1SMike Travis /* UVYH common struct */ 3359647128f1SMike Travis struct uvyh_rh10_gam_mmr_overlay_config_s { 3360647128f1SMike Travis unsigned long undef_0_24:25; /* Undefined */ 3361647128f1SMike Travis unsigned long base:27; /* RW */ 3362647128f1SMike Travis unsigned long undef_52_62:11; /* Undefined */ 3363647128f1SMike Travis unsigned long enable:1; /* RW */ 3364647128f1SMike Travis } sy; 3365647128f1SMike Travis 3366647128f1SMike Travis /* UV5 unique struct */ 3367647128f1SMike Travis struct uv5h_rh10_gam_mmr_overlay_config_s { 3368647128f1SMike Travis unsigned long undef_0_24:25; /* Undefined */ 3369647128f1SMike Travis unsigned long base:27; /* RW */ 3370647128f1SMike Travis unsigned long undef_52_62:11; /* Undefined */ 3371647128f1SMike Travis unsigned long enable:1; /* RW */ 3372647128f1SMike Travis } s5; 3373647128f1SMike Travis }; 3374647128f1SMike Travis 3375647128f1SMike Travis /* ========================================================================= */ 3376647128f1SMike Travis /* UVH_RH_GAM_ADDR_MAP_CONFIG */ 3377647128f1SMike Travis /* ========================================================================= */ 3378647128f1SMike Travis #define UVH_RH_GAM_ADDR_MAP_CONFIG ( \ 3379647128f1SMike Travis is_uv(UV4) ? 0x480000UL : \ 3380647128f1SMike Travis is_uv(UV3) ? 0x1600000UL : \ 3381647128f1SMike Travis is_uv(UV2) ? 0x1600000UL : \ 3382647128f1SMike Travis 0) 3383647128f1SMike Travis 3384647128f1SMike Travis 3385647128f1SMike Travis /* UVXH common defines */ 3386647128f1SMike Travis #define UVXH_RH_GAM_ADDR_MAP_CONFIG_N_SKT_SHFT 6 3387647128f1SMike Travis #define UVXH_RH_GAM_ADDR_MAP_CONFIG_N_SKT_MASK 0x00000000000003c0UL 3388647128f1SMike Travis 3389647128f1SMike Travis /* UV3 unique defines */ 3390647128f1SMike Travis #define UV3H_RH_GAM_ADDR_MAP_CONFIG_M_SKT_SHFT 0 3391647128f1SMike Travis #define UV3H_RH_GAM_ADDR_MAP_CONFIG_M_SKT_MASK 0x000000000000003fUL 3392647128f1SMike Travis 3393647128f1SMike Travis /* UV2 unique defines */ 3394647128f1SMike Travis #define UV2H_RH_GAM_ADDR_MAP_CONFIG_M_SKT_SHFT 0 3395647128f1SMike Travis #define UV2H_RH_GAM_ADDR_MAP_CONFIG_M_SKT_MASK 0x000000000000003fUL 3396647128f1SMike Travis 3397647128f1SMike Travis 3398647128f1SMike Travis union uvh_rh_gam_addr_map_config_u { 3399647128f1SMike Travis unsigned long v; 3400647128f1SMike Travis 3401647128f1SMike Travis /* UVH common struct */ 3402647128f1SMike Travis struct uvh_rh_gam_addr_map_config_s { 3403647128f1SMike Travis unsigned long rsvd_0_5:6; 3404647128f1SMike Travis unsigned long n_skt:4; /* RW */ 3405647128f1SMike Travis unsigned long rsvd_10_63:54; 3406647128f1SMike Travis } s; 3407647128f1SMike Travis 3408647128f1SMike Travis /* UVXH common struct */ 3409647128f1SMike Travis struct uvxh_rh_gam_addr_map_config_s { 3410647128f1SMike Travis unsigned long rsvd_0_5:6; 3411647128f1SMike Travis unsigned long n_skt:4; /* RW */ 3412647128f1SMike Travis unsigned long rsvd_10_63:54; 3413647128f1SMike Travis } sx; 3414647128f1SMike Travis 3415647128f1SMike Travis /* UV4 unique struct */ 3416647128f1SMike Travis struct uv4h_rh_gam_addr_map_config_s { 3417647128f1SMike Travis unsigned long rsvd_0_5:6; 3418647128f1SMike Travis unsigned long n_skt:4; /* RW */ 3419647128f1SMike Travis unsigned long rsvd_10_63:54; 3420647128f1SMike Travis } s4; 3421647128f1SMike Travis 3422647128f1SMike Travis /* UV3 unique struct */ 3423647128f1SMike Travis struct uv3h_rh_gam_addr_map_config_s { 3424647128f1SMike Travis unsigned long m_skt:6; /* RW */ 3425647128f1SMike Travis unsigned long n_skt:4; /* RW */ 3426647128f1SMike Travis unsigned long rsvd_10_63:54; 3427647128f1SMike Travis } s3; 3428647128f1SMike Travis 3429647128f1SMike Travis /* UV2 unique struct */ 3430647128f1SMike Travis struct uv2h_rh_gam_addr_map_config_s { 3431647128f1SMike Travis unsigned long m_skt:6; /* RW */ 3432647128f1SMike Travis unsigned long n_skt:4; /* RW */ 3433647128f1SMike Travis unsigned long rsvd_10_63:54; 3434647128f1SMike Travis } s2; 3435647128f1SMike Travis }; 3436647128f1SMike Travis 3437647128f1SMike Travis /* ========================================================================= */ 3438647128f1SMike Travis /* UVH_RH_GAM_ALIAS_0_OVERLAY_CONFIG */ 3439647128f1SMike Travis /* ========================================================================= */ 3440647128f1SMike Travis #define UVH_RH_GAM_ALIAS_0_OVERLAY_CONFIG ( \ 3441647128f1SMike Travis is_uv(UV4) ? 0x4800c8UL : \ 3442647128f1SMike Travis is_uv(UV3) ? 0x16000c8UL : \ 3443647128f1SMike Travis is_uv(UV2) ? 0x16000c8UL : \ 3444647128f1SMike Travis 0) 3445647128f1SMike Travis 3446647128f1SMike Travis 3447647128f1SMike Travis /* UVXH common defines */ 3448647128f1SMike Travis #define UVXH_RH_GAM_ALIAS_0_OVERLAY_CONFIG_BASE_SHFT 24 3449647128f1SMike Travis #define UVXH_RH_GAM_ALIAS_0_OVERLAY_CONFIG_BASE_MASK 0x00000000ff000000UL 3450647128f1SMike Travis #define UVXH_RH_GAM_ALIAS_0_OVERLAY_CONFIG_M_ALIAS_SHFT 48 3451647128f1SMike Travis #define UVXH_RH_GAM_ALIAS_0_OVERLAY_CONFIG_M_ALIAS_MASK 0x001f000000000000UL 3452647128f1SMike Travis #define UVXH_RH_GAM_ALIAS_0_OVERLAY_CONFIG_ENABLE_SHFT 63 3453647128f1SMike Travis #define UVXH_RH_GAM_ALIAS_0_OVERLAY_CONFIG_ENABLE_MASK 0x8000000000000000UL 3454647128f1SMike Travis 3455647128f1SMike Travis 3456647128f1SMike Travis union uvh_rh_gam_alias_0_overlay_config_u { 3457647128f1SMike Travis unsigned long v; 3458647128f1SMike Travis 3459647128f1SMike Travis /* UVH common struct */ 3460647128f1SMike Travis struct uvh_rh_gam_alias_0_overlay_config_s { 3461647128f1SMike Travis unsigned long rsvd_0_23:24; 3462647128f1SMike Travis unsigned long base:8; /* RW */ 3463647128f1SMike Travis unsigned long rsvd_32_47:16; 3464647128f1SMike Travis unsigned long m_alias:5; /* RW */ 3465647128f1SMike Travis unsigned long rsvd_53_62:10; 3466647128f1SMike Travis unsigned long enable:1; /* RW */ 3467647128f1SMike Travis } s; 3468647128f1SMike Travis 3469647128f1SMike Travis /* UVXH common struct */ 3470647128f1SMike Travis struct uvxh_rh_gam_alias_0_overlay_config_s { 3471647128f1SMike Travis unsigned long rsvd_0_23:24; 3472647128f1SMike Travis unsigned long base:8; /* RW */ 3473647128f1SMike Travis unsigned long rsvd_32_47:16; 3474647128f1SMike Travis unsigned long m_alias:5; /* RW */ 3475647128f1SMike Travis unsigned long rsvd_53_62:10; 3476647128f1SMike Travis unsigned long enable:1; /* RW */ 3477647128f1SMike Travis } sx; 3478647128f1SMike Travis 3479647128f1SMike Travis /* UV4 unique struct */ 3480647128f1SMike Travis struct uv4h_rh_gam_alias_0_overlay_config_s { 3481647128f1SMike Travis unsigned long rsvd_0_23:24; 3482647128f1SMike Travis unsigned long base:8; /* RW */ 3483647128f1SMike Travis unsigned long rsvd_32_47:16; 3484647128f1SMike Travis unsigned long m_alias:5; /* RW */ 3485647128f1SMike Travis unsigned long rsvd_53_62:10; 3486647128f1SMike Travis unsigned long enable:1; /* RW */ 3487647128f1SMike Travis } s4; 3488647128f1SMike Travis 3489647128f1SMike Travis /* UV3 unique struct */ 3490647128f1SMike Travis struct uv3h_rh_gam_alias_0_overlay_config_s { 3491647128f1SMike Travis unsigned long rsvd_0_23:24; 3492647128f1SMike Travis unsigned long base:8; /* RW */ 3493647128f1SMike Travis unsigned long rsvd_32_47:16; 3494647128f1SMike Travis unsigned long m_alias:5; /* RW */ 3495647128f1SMike Travis unsigned long rsvd_53_62:10; 3496647128f1SMike Travis unsigned long enable:1; /* RW */ 3497647128f1SMike Travis } s3; 3498647128f1SMike Travis 3499647128f1SMike Travis /* UV2 unique struct */ 3500647128f1SMike Travis struct uv2h_rh_gam_alias_0_overlay_config_s { 3501647128f1SMike Travis unsigned long rsvd_0_23:24; 3502647128f1SMike Travis unsigned long base:8; /* RW */ 3503647128f1SMike Travis unsigned long rsvd_32_47:16; 3504647128f1SMike Travis unsigned long m_alias:5; /* RW */ 3505647128f1SMike Travis unsigned long rsvd_53_62:10; 3506647128f1SMike Travis unsigned long enable:1; /* RW */ 3507647128f1SMike Travis } s2; 3508647128f1SMike Travis }; 3509647128f1SMike Travis 3510647128f1SMike Travis /* ========================================================================= */ 3511647128f1SMike Travis /* UVH_RH_GAM_ALIAS_0_REDIRECT_CONFIG */ 3512647128f1SMike Travis /* ========================================================================= */ 3513647128f1SMike Travis #define UVH_RH_GAM_ALIAS_0_REDIRECT_CONFIG ( \ 3514647128f1SMike Travis is_uv(UV4) ? 0x4800d0UL : \ 3515647128f1SMike Travis is_uv(UV3) ? 0x16000d0UL : \ 3516647128f1SMike Travis is_uv(UV2) ? 0x16000d0UL : \ 3517647128f1SMike Travis 0) 3518647128f1SMike Travis 3519647128f1SMike Travis 3520647128f1SMike Travis /* UVXH common defines */ 3521647128f1SMike Travis #define UVXH_RH_GAM_ALIAS_0_REDIRECT_CONFIG_DEST_BASE_SHFT 24 3522647128f1SMike Travis #define UVXH_RH_GAM_ALIAS_0_REDIRECT_CONFIG_DEST_BASE_MASK 0x00003fffff000000UL 3523647128f1SMike Travis 3524647128f1SMike Travis 3525647128f1SMike Travis union uvh_rh_gam_alias_0_redirect_config_u { 3526647128f1SMike Travis unsigned long v; 3527647128f1SMike Travis 3528647128f1SMike Travis /* UVH common struct */ 3529647128f1SMike Travis struct uvh_rh_gam_alias_0_redirect_config_s { 3530647128f1SMike Travis unsigned long rsvd_0_23:24; 3531647128f1SMike Travis unsigned long dest_base:22; /* RW */ 3532647128f1SMike Travis unsigned long rsvd_46_63:18; 3533647128f1SMike Travis } s; 3534647128f1SMike Travis 3535647128f1SMike Travis /* UVXH common struct */ 3536647128f1SMike Travis struct uvxh_rh_gam_alias_0_redirect_config_s { 3537647128f1SMike Travis unsigned long rsvd_0_23:24; 3538647128f1SMike Travis unsigned long dest_base:22; /* RW */ 3539647128f1SMike Travis unsigned long rsvd_46_63:18; 3540647128f1SMike Travis } sx; 3541647128f1SMike Travis 3542647128f1SMike Travis /* UV4 unique struct */ 3543647128f1SMike Travis struct uv4h_rh_gam_alias_0_redirect_config_s { 3544647128f1SMike Travis unsigned long rsvd_0_23:24; 3545647128f1SMike Travis unsigned long dest_base:22; /* RW */ 3546647128f1SMike Travis unsigned long rsvd_46_63:18; 3547647128f1SMike Travis } s4; 3548647128f1SMike Travis 3549647128f1SMike Travis /* UV3 unique struct */ 3550647128f1SMike Travis struct uv3h_rh_gam_alias_0_redirect_config_s { 3551647128f1SMike Travis unsigned long rsvd_0_23:24; 3552647128f1SMike Travis unsigned long dest_base:22; /* RW */ 3553647128f1SMike Travis unsigned long rsvd_46_63:18; 3554647128f1SMike Travis } s3; 3555647128f1SMike Travis 3556647128f1SMike Travis /* UV2 unique struct */ 3557647128f1SMike Travis struct uv2h_rh_gam_alias_0_redirect_config_s { 3558647128f1SMike Travis unsigned long rsvd_0_23:24; 3559647128f1SMike Travis unsigned long dest_base:22; /* RW */ 3560647128f1SMike Travis unsigned long rsvd_46_63:18; 3561647128f1SMike Travis } s2; 3562647128f1SMike Travis }; 3563647128f1SMike Travis 3564647128f1SMike Travis /* ========================================================================= */ 3565647128f1SMike Travis /* UVH_RH_GAM_ALIAS_1_OVERLAY_CONFIG */ 3566647128f1SMike Travis /* ========================================================================= */ 3567647128f1SMike Travis #define UVH_RH_GAM_ALIAS_1_OVERLAY_CONFIG ( \ 3568647128f1SMike Travis is_uv(UV4) ? 0x4800d8UL : \ 3569647128f1SMike Travis is_uv(UV3) ? 0x16000d8UL : \ 3570647128f1SMike Travis is_uv(UV2) ? 0x16000d8UL : \ 3571647128f1SMike Travis 0) 3572647128f1SMike Travis 3573647128f1SMike Travis 3574647128f1SMike Travis /* UVXH common defines */ 3575647128f1SMike Travis #define UVXH_RH_GAM_ALIAS_1_OVERLAY_CONFIG_BASE_SHFT 24 3576647128f1SMike Travis #define UVXH_RH_GAM_ALIAS_1_OVERLAY_CONFIG_BASE_MASK 0x00000000ff000000UL 3577647128f1SMike Travis #define UVXH_RH_GAM_ALIAS_1_OVERLAY_CONFIG_M_ALIAS_SHFT 48 3578647128f1SMike Travis #define UVXH_RH_GAM_ALIAS_1_OVERLAY_CONFIG_M_ALIAS_MASK 0x001f000000000000UL 3579647128f1SMike Travis #define UVXH_RH_GAM_ALIAS_1_OVERLAY_CONFIG_ENABLE_SHFT 63 3580647128f1SMike Travis #define UVXH_RH_GAM_ALIAS_1_OVERLAY_CONFIG_ENABLE_MASK 0x8000000000000000UL 3581647128f1SMike Travis 3582647128f1SMike Travis 3583647128f1SMike Travis union uvh_rh_gam_alias_1_overlay_config_u { 3584647128f1SMike Travis unsigned long v; 3585647128f1SMike Travis 3586647128f1SMike Travis /* UVH common struct */ 3587647128f1SMike Travis struct uvh_rh_gam_alias_1_overlay_config_s { 3588647128f1SMike Travis unsigned long rsvd_0_23:24; 3589647128f1SMike Travis unsigned long base:8; /* RW */ 3590647128f1SMike Travis unsigned long rsvd_32_47:16; 3591647128f1SMike Travis unsigned long m_alias:5; /* RW */ 3592647128f1SMike Travis unsigned long rsvd_53_62:10; 3593647128f1SMike Travis unsigned long enable:1; /* RW */ 3594647128f1SMike Travis } s; 3595647128f1SMike Travis 3596647128f1SMike Travis /* UVXH common struct */ 3597647128f1SMike Travis struct uvxh_rh_gam_alias_1_overlay_config_s { 3598647128f1SMike Travis unsigned long rsvd_0_23:24; 3599647128f1SMike Travis unsigned long base:8; /* RW */ 3600647128f1SMike Travis unsigned long rsvd_32_47:16; 3601647128f1SMike Travis unsigned long m_alias:5; /* RW */ 3602647128f1SMike Travis unsigned long rsvd_53_62:10; 3603647128f1SMike Travis unsigned long enable:1; /* RW */ 3604647128f1SMike Travis } sx; 3605647128f1SMike Travis 3606647128f1SMike Travis /* UV4 unique struct */ 3607647128f1SMike Travis struct uv4h_rh_gam_alias_1_overlay_config_s { 3608647128f1SMike Travis unsigned long rsvd_0_23:24; 3609647128f1SMike Travis unsigned long base:8; /* RW */ 3610647128f1SMike Travis unsigned long rsvd_32_47:16; 3611647128f1SMike Travis unsigned long m_alias:5; /* RW */ 3612647128f1SMike Travis unsigned long rsvd_53_62:10; 3613647128f1SMike Travis unsigned long enable:1; /* RW */ 3614647128f1SMike Travis } s4; 3615647128f1SMike Travis 3616647128f1SMike Travis /* UV3 unique struct */ 3617647128f1SMike Travis struct uv3h_rh_gam_alias_1_overlay_config_s { 3618647128f1SMike Travis unsigned long rsvd_0_23:24; 3619647128f1SMike Travis unsigned long base:8; /* RW */ 3620647128f1SMike Travis unsigned long rsvd_32_47:16; 3621647128f1SMike Travis unsigned long m_alias:5; /* RW */ 3622647128f1SMike Travis unsigned long rsvd_53_62:10; 3623647128f1SMike Travis unsigned long enable:1; /* RW */ 3624647128f1SMike Travis } s3; 3625647128f1SMike Travis 3626647128f1SMike Travis /* UV2 unique struct */ 3627647128f1SMike Travis struct uv2h_rh_gam_alias_1_overlay_config_s { 3628647128f1SMike Travis unsigned long rsvd_0_23:24; 3629647128f1SMike Travis unsigned long base:8; /* RW */ 3630647128f1SMike Travis unsigned long rsvd_32_47:16; 3631647128f1SMike Travis unsigned long m_alias:5; /* RW */ 3632647128f1SMike Travis unsigned long rsvd_53_62:10; 3633647128f1SMike Travis unsigned long enable:1; /* RW */ 3634647128f1SMike Travis } s2; 3635647128f1SMike Travis }; 3636647128f1SMike Travis 3637647128f1SMike Travis /* ========================================================================= */ 3638647128f1SMike Travis /* UVH_RH_GAM_ALIAS_1_REDIRECT_CONFIG */ 3639647128f1SMike Travis /* ========================================================================= */ 3640647128f1SMike Travis #define UVH_RH_GAM_ALIAS_1_REDIRECT_CONFIG ( \ 3641647128f1SMike Travis is_uv(UV4) ? 0x4800e0UL : \ 3642647128f1SMike Travis is_uv(UV3) ? 0x16000e0UL : \ 3643647128f1SMike Travis is_uv(UV2) ? 0x16000e0UL : \ 3644647128f1SMike Travis 0) 3645647128f1SMike Travis 3646647128f1SMike Travis 3647647128f1SMike Travis /* UVXH common defines */ 3648647128f1SMike Travis #define UVXH_RH_GAM_ALIAS_1_REDIRECT_CONFIG_DEST_BASE_SHFT 24 3649647128f1SMike Travis #define UVXH_RH_GAM_ALIAS_1_REDIRECT_CONFIG_DEST_BASE_MASK 0x00003fffff000000UL 3650647128f1SMike Travis 3651647128f1SMike Travis 3652647128f1SMike Travis union uvh_rh_gam_alias_1_redirect_config_u { 3653647128f1SMike Travis unsigned long v; 3654647128f1SMike Travis 3655647128f1SMike Travis /* UVH common struct */ 3656647128f1SMike Travis struct uvh_rh_gam_alias_1_redirect_config_s { 3657647128f1SMike Travis unsigned long rsvd_0_23:24; 3658647128f1SMike Travis unsigned long dest_base:22; /* RW */ 3659647128f1SMike Travis unsigned long rsvd_46_63:18; 3660647128f1SMike Travis } s; 3661647128f1SMike Travis 3662647128f1SMike Travis /* UVXH common struct */ 3663647128f1SMike Travis struct uvxh_rh_gam_alias_1_redirect_config_s { 3664647128f1SMike Travis unsigned long rsvd_0_23:24; 3665647128f1SMike Travis unsigned long dest_base:22; /* RW */ 3666647128f1SMike Travis unsigned long rsvd_46_63:18; 3667647128f1SMike Travis } sx; 3668647128f1SMike Travis 3669647128f1SMike Travis /* UV4 unique struct */ 3670647128f1SMike Travis struct uv4h_rh_gam_alias_1_redirect_config_s { 3671647128f1SMike Travis unsigned long rsvd_0_23:24; 3672647128f1SMike Travis unsigned long dest_base:22; /* RW */ 3673647128f1SMike Travis unsigned long rsvd_46_63:18; 3674647128f1SMike Travis } s4; 3675647128f1SMike Travis 3676647128f1SMike Travis /* UV3 unique struct */ 3677647128f1SMike Travis struct uv3h_rh_gam_alias_1_redirect_config_s { 3678647128f1SMike Travis unsigned long rsvd_0_23:24; 3679647128f1SMike Travis unsigned long dest_base:22; /* RW */ 3680647128f1SMike Travis unsigned long rsvd_46_63:18; 3681647128f1SMike Travis } s3; 3682647128f1SMike Travis 3683647128f1SMike Travis /* UV2 unique struct */ 3684647128f1SMike Travis struct uv2h_rh_gam_alias_1_redirect_config_s { 3685647128f1SMike Travis unsigned long rsvd_0_23:24; 3686647128f1SMike Travis unsigned long dest_base:22; /* RW */ 3687647128f1SMike Travis unsigned long rsvd_46_63:18; 3688647128f1SMike Travis } s2; 3689647128f1SMike Travis }; 3690647128f1SMike Travis 3691647128f1SMike Travis /* ========================================================================= */ 3692647128f1SMike Travis /* UVH_RH_GAM_ALIAS_2_OVERLAY_CONFIG */ 3693647128f1SMike Travis /* ========================================================================= */ 3694647128f1SMike Travis #define UVH_RH_GAM_ALIAS_2_OVERLAY_CONFIG ( \ 3695647128f1SMike Travis is_uv(UV4) ? 0x4800e8UL : \ 3696647128f1SMike Travis is_uv(UV3) ? 0x16000e8UL : \ 3697647128f1SMike Travis is_uv(UV2) ? 0x16000e8UL : \ 3698647128f1SMike Travis 0) 3699647128f1SMike Travis 3700647128f1SMike Travis 3701647128f1SMike Travis /* UVXH common defines */ 3702647128f1SMike Travis #define UVXH_RH_GAM_ALIAS_2_OVERLAY_CONFIG_BASE_SHFT 24 3703647128f1SMike Travis #define UVXH_RH_GAM_ALIAS_2_OVERLAY_CONFIG_BASE_MASK 0x00000000ff000000UL 3704647128f1SMike Travis #define UVXH_RH_GAM_ALIAS_2_OVERLAY_CONFIG_M_ALIAS_SHFT 48 3705647128f1SMike Travis #define UVXH_RH_GAM_ALIAS_2_OVERLAY_CONFIG_M_ALIAS_MASK 0x001f000000000000UL 3706647128f1SMike Travis #define UVXH_RH_GAM_ALIAS_2_OVERLAY_CONFIG_ENABLE_SHFT 63 3707647128f1SMike Travis #define UVXH_RH_GAM_ALIAS_2_OVERLAY_CONFIG_ENABLE_MASK 0x8000000000000000UL 3708647128f1SMike Travis 3709647128f1SMike Travis 3710647128f1SMike Travis union uvh_rh_gam_alias_2_overlay_config_u { 3711647128f1SMike Travis unsigned long v; 3712647128f1SMike Travis 3713647128f1SMike Travis /* UVH common struct */ 3714647128f1SMike Travis struct uvh_rh_gam_alias_2_overlay_config_s { 3715647128f1SMike Travis unsigned long rsvd_0_23:24; 3716647128f1SMike Travis unsigned long base:8; /* RW */ 3717647128f1SMike Travis unsigned long rsvd_32_47:16; 3718647128f1SMike Travis unsigned long m_alias:5; /* RW */ 3719647128f1SMike Travis unsigned long rsvd_53_62:10; 3720647128f1SMike Travis unsigned long enable:1; /* RW */ 3721647128f1SMike Travis } s; 3722647128f1SMike Travis 3723647128f1SMike Travis /* UVXH common struct */ 3724647128f1SMike Travis struct uvxh_rh_gam_alias_2_overlay_config_s { 3725647128f1SMike Travis unsigned long rsvd_0_23:24; 3726647128f1SMike Travis unsigned long base:8; /* RW */ 3727647128f1SMike Travis unsigned long rsvd_32_47:16; 3728647128f1SMike Travis unsigned long m_alias:5; /* RW */ 3729647128f1SMike Travis unsigned long rsvd_53_62:10; 3730647128f1SMike Travis unsigned long enable:1; /* RW */ 3731647128f1SMike Travis } sx; 3732647128f1SMike Travis 3733647128f1SMike Travis /* UV4 unique struct */ 3734647128f1SMike Travis struct uv4h_rh_gam_alias_2_overlay_config_s { 3735647128f1SMike Travis unsigned long rsvd_0_23:24; 3736647128f1SMike Travis unsigned long base:8; /* RW */ 3737647128f1SMike Travis unsigned long rsvd_32_47:16; 3738647128f1SMike Travis unsigned long m_alias:5; /* RW */ 3739647128f1SMike Travis unsigned long rsvd_53_62:10; 3740647128f1SMike Travis unsigned long enable:1; /* RW */ 3741647128f1SMike Travis } s4; 3742647128f1SMike Travis 3743647128f1SMike Travis /* UV3 unique struct */ 3744647128f1SMike Travis struct uv3h_rh_gam_alias_2_overlay_config_s { 3745647128f1SMike Travis unsigned long rsvd_0_23:24; 3746647128f1SMike Travis unsigned long base:8; /* RW */ 3747647128f1SMike Travis unsigned long rsvd_32_47:16; 3748647128f1SMike Travis unsigned long m_alias:5; /* RW */ 3749647128f1SMike Travis unsigned long rsvd_53_62:10; 3750647128f1SMike Travis unsigned long enable:1; /* RW */ 3751647128f1SMike Travis } s3; 3752647128f1SMike Travis 3753647128f1SMike Travis /* UV2 unique struct */ 3754647128f1SMike Travis struct uv2h_rh_gam_alias_2_overlay_config_s { 3755647128f1SMike Travis unsigned long rsvd_0_23:24; 3756647128f1SMike Travis unsigned long base:8; /* RW */ 3757647128f1SMike Travis unsigned long rsvd_32_47:16; 3758647128f1SMike Travis unsigned long m_alias:5; /* RW */ 3759647128f1SMike Travis unsigned long rsvd_53_62:10; 3760647128f1SMike Travis unsigned long enable:1; /* RW */ 3761647128f1SMike Travis } s2; 3762647128f1SMike Travis }; 3763647128f1SMike Travis 3764647128f1SMike Travis /* ========================================================================= */ 3765647128f1SMike Travis /* UVH_RH_GAM_ALIAS_2_REDIRECT_CONFIG */ 3766647128f1SMike Travis /* ========================================================================= */ 3767647128f1SMike Travis #define UVH_RH_GAM_ALIAS_2_REDIRECT_CONFIG ( \ 3768647128f1SMike Travis is_uv(UV4) ? 0x4800f0UL : \ 3769647128f1SMike Travis is_uv(UV3) ? 0x16000f0UL : \ 3770647128f1SMike Travis is_uv(UV2) ? 0x16000f0UL : \ 3771647128f1SMike Travis 0) 3772647128f1SMike Travis 3773647128f1SMike Travis 3774647128f1SMike Travis /* UVXH common defines */ 3775647128f1SMike Travis #define UVXH_RH_GAM_ALIAS_2_REDIRECT_CONFIG_DEST_BASE_SHFT 24 3776647128f1SMike Travis #define UVXH_RH_GAM_ALIAS_2_REDIRECT_CONFIG_DEST_BASE_MASK 0x00003fffff000000UL 3777647128f1SMike Travis 3778647128f1SMike Travis 3779647128f1SMike Travis union uvh_rh_gam_alias_2_redirect_config_u { 3780647128f1SMike Travis unsigned long v; 3781647128f1SMike Travis 3782647128f1SMike Travis /* UVH common struct */ 3783647128f1SMike Travis struct uvh_rh_gam_alias_2_redirect_config_s { 3784647128f1SMike Travis unsigned long rsvd_0_23:24; 3785647128f1SMike Travis unsigned long dest_base:22; /* RW */ 3786647128f1SMike Travis unsigned long rsvd_46_63:18; 3787647128f1SMike Travis } s; 3788647128f1SMike Travis 3789647128f1SMike Travis /* UVXH common struct */ 3790647128f1SMike Travis struct uvxh_rh_gam_alias_2_redirect_config_s { 3791647128f1SMike Travis unsigned long rsvd_0_23:24; 3792647128f1SMike Travis unsigned long dest_base:22; /* RW */ 3793647128f1SMike Travis unsigned long rsvd_46_63:18; 3794647128f1SMike Travis } sx; 3795647128f1SMike Travis 3796647128f1SMike Travis /* UV4 unique struct */ 3797647128f1SMike Travis struct uv4h_rh_gam_alias_2_redirect_config_s { 3798647128f1SMike Travis unsigned long rsvd_0_23:24; 3799647128f1SMike Travis unsigned long dest_base:22; /* RW */ 3800647128f1SMike Travis unsigned long rsvd_46_63:18; 3801647128f1SMike Travis } s4; 3802647128f1SMike Travis 3803647128f1SMike Travis /* UV3 unique struct */ 3804647128f1SMike Travis struct uv3h_rh_gam_alias_2_redirect_config_s { 3805647128f1SMike Travis unsigned long rsvd_0_23:24; 3806647128f1SMike Travis unsigned long dest_base:22; /* RW */ 3807647128f1SMike Travis unsigned long rsvd_46_63:18; 3808647128f1SMike Travis } s3; 3809647128f1SMike Travis 3810647128f1SMike Travis /* UV2 unique struct */ 3811647128f1SMike Travis struct uv2h_rh_gam_alias_2_redirect_config_s { 3812647128f1SMike Travis unsigned long rsvd_0_23:24; 3813647128f1SMike Travis unsigned long dest_base:22; /* RW */ 3814647128f1SMike Travis unsigned long rsvd_46_63:18; 3815647128f1SMike Travis } s2; 3816647128f1SMike Travis }; 3817647128f1SMike Travis 3818647128f1SMike Travis /* ========================================================================= */ 3819647128f1SMike Travis /* UVH_RH_GAM_GRU_OVERLAY_CONFIG */ 3820647128f1SMike Travis /* ========================================================================= */ 3821647128f1SMike Travis #define UVH_RH_GAM_GRU_OVERLAY_CONFIG ( \ 3822647128f1SMike Travis is_uv(UV4) ? 0x480010UL : \ 3823647128f1SMike Travis is_uv(UV3) ? 0x1600010UL : \ 3824647128f1SMike Travis is_uv(UV2) ? 0x1600010UL : \ 3825647128f1SMike Travis 0) 3826647128f1SMike Travis 3827647128f1SMike Travis 3828647128f1SMike Travis /* UVXH common defines */ 3829647128f1SMike Travis #define UVXH_RH_GAM_GRU_OVERLAY_CONFIG_N_GRU_SHFT 52 3830647128f1SMike Travis #define UVXH_RH_GAM_GRU_OVERLAY_CONFIG_N_GRU_MASK 0x00f0000000000000UL 3831647128f1SMike Travis #define UVXH_RH_GAM_GRU_OVERLAY_CONFIG_ENABLE_SHFT 63 3832647128f1SMike Travis #define UVXH_RH_GAM_GRU_OVERLAY_CONFIG_ENABLE_MASK 0x8000000000000000UL 3833647128f1SMike Travis 3834647128f1SMike Travis /* UV4A unique defines */ 3835647128f1SMike Travis #define UV4AH_RH_GAM_GRU_OVERLAY_CONFIG_BASE_SHFT 26 3836647128f1SMike Travis #define UV4AH_RH_GAM_GRU_OVERLAY_CONFIG_BASE_MASK 0x000ffffffc000000UL 3837647128f1SMike Travis 3838647128f1SMike Travis /* UV4 unique defines */ 3839647128f1SMike Travis #define UV4H_RH_GAM_GRU_OVERLAY_CONFIG_BASE_SHFT 26 3840647128f1SMike Travis #define UV4H_RH_GAM_GRU_OVERLAY_CONFIG_BASE_MASK 0x00003ffffc000000UL 3841647128f1SMike Travis 3842647128f1SMike Travis /* UV3 unique defines */ 3843647128f1SMike Travis #define UV3H_RH_GAM_GRU_OVERLAY_CONFIG_BASE_SHFT 28 3844647128f1SMike Travis #define UV3H_RH_GAM_GRU_OVERLAY_CONFIG_BASE_MASK 0x00003ffff0000000UL 3845647128f1SMike Travis #define UV3H_RH_GAM_GRU_OVERLAY_CONFIG_MODE_SHFT 62 3846647128f1SMike Travis #define UV3H_RH_GAM_GRU_OVERLAY_CONFIG_MODE_MASK 0x4000000000000000UL 3847647128f1SMike Travis 3848647128f1SMike Travis /* UV2 unique defines */ 3849647128f1SMike Travis #define UV2H_RH_GAM_GRU_OVERLAY_CONFIG_BASE_SHFT 28 3850647128f1SMike Travis #define UV2H_RH_GAM_GRU_OVERLAY_CONFIG_BASE_MASK 0x00003ffff0000000UL 3851647128f1SMike Travis 3852647128f1SMike Travis #define UVH_RH_GAM_GRU_OVERLAY_CONFIG_BASE_MASK ( \ 3853647128f1SMike Travis is_uv(UV4A) ? 0x000ffffffc000000UL : \ 3854647128f1SMike Travis is_uv(UV4) ? 0x00003ffffc000000UL : \ 3855647128f1SMike Travis is_uv(UV3) ? 0x00003ffff0000000UL : \ 3856647128f1SMike Travis is_uv(UV2) ? 0x00003ffff0000000UL : \ 3857647128f1SMike Travis 0) 3858647128f1SMike Travis #define UVH_RH_GAM_GRU_OVERLAY_CONFIG_BASE_SHFT ( \ 3859647128f1SMike Travis is_uv(UV4) ? 26 : \ 3860647128f1SMike Travis is_uv(UV3) ? 28 : \ 3861647128f1SMike Travis is_uv(UV2) ? 28 : \ 3862647128f1SMike Travis -1) 3863647128f1SMike Travis 3864647128f1SMike Travis union uvh_rh_gam_gru_overlay_config_u { 3865647128f1SMike Travis unsigned long v; 3866647128f1SMike Travis 3867647128f1SMike Travis /* UVH common struct */ 3868647128f1SMike Travis struct uvh_rh_gam_gru_overlay_config_s { 3869647128f1SMike Travis unsigned long rsvd_0_45:46; 3870647128f1SMike Travis unsigned long rsvd_46_51:6; 3871647128f1SMike Travis unsigned long n_gru:4; /* RW */ 3872647128f1SMike Travis unsigned long rsvd_56_62:7; 3873647128f1SMike Travis unsigned long enable:1; /* RW */ 3874647128f1SMike Travis } s; 3875647128f1SMike Travis 3876647128f1SMike Travis /* UVXH common struct */ 3877647128f1SMike Travis struct uvxh_rh_gam_gru_overlay_config_s { 3878647128f1SMike Travis unsigned long rsvd_0_45:46; 3879647128f1SMike Travis unsigned long rsvd_46_51:6; 3880647128f1SMike Travis unsigned long n_gru:4; /* RW */ 3881647128f1SMike Travis unsigned long rsvd_56_62:7; 3882647128f1SMike Travis unsigned long enable:1; /* RW */ 3883647128f1SMike Travis } sx; 3884647128f1SMike Travis 3885647128f1SMike Travis /* UV4A unique struct */ 3886647128f1SMike Travis struct uv4ah_rh_gam_gru_overlay_config_s { 3887647128f1SMike Travis unsigned long rsvd_0_24:25; 3888647128f1SMike Travis unsigned long undef_25:1; /* Undefined */ 3889647128f1SMike Travis unsigned long base:26; /* RW */ 3890647128f1SMike Travis unsigned long n_gru:4; /* RW */ 3891647128f1SMike Travis unsigned long rsvd_56_62:7; 3892647128f1SMike Travis unsigned long enable:1; /* RW */ 3893647128f1SMike Travis } s4a; 3894647128f1SMike Travis 3895647128f1SMike Travis /* UV4 unique struct */ 3896647128f1SMike Travis struct uv4h_rh_gam_gru_overlay_config_s { 3897647128f1SMike Travis unsigned long rsvd_0_24:25; 3898647128f1SMike Travis unsigned long undef_25:1; /* Undefined */ 3899647128f1SMike Travis unsigned long base:20; /* RW */ 3900647128f1SMike Travis unsigned long rsvd_46_51:6; 3901647128f1SMike Travis unsigned long n_gru:4; /* RW */ 3902647128f1SMike Travis unsigned long rsvd_56_62:7; 3903647128f1SMike Travis unsigned long enable:1; /* RW */ 3904647128f1SMike Travis } s4; 3905647128f1SMike Travis 3906647128f1SMike Travis /* UV3 unique struct */ 3907647128f1SMike Travis struct uv3h_rh_gam_gru_overlay_config_s { 3908647128f1SMike Travis unsigned long rsvd_0_27:28; 3909647128f1SMike Travis unsigned long base:18; /* RW */ 3910647128f1SMike Travis unsigned long rsvd_46_51:6; 3911647128f1SMike Travis unsigned long n_gru:4; /* RW */ 3912647128f1SMike Travis unsigned long rsvd_56_61:6; 3913647128f1SMike Travis unsigned long mode:1; /* RW */ 3914647128f1SMike Travis unsigned long enable:1; /* RW */ 3915647128f1SMike Travis } s3; 3916647128f1SMike Travis 3917647128f1SMike Travis /* UV2 unique struct */ 3918647128f1SMike Travis struct uv2h_rh_gam_gru_overlay_config_s { 3919647128f1SMike Travis unsigned long rsvd_0_27:28; 3920647128f1SMike Travis unsigned long base:18; /* RW */ 3921647128f1SMike Travis unsigned long rsvd_46_51:6; 3922647128f1SMike Travis unsigned long n_gru:4; /* RW */ 3923647128f1SMike Travis unsigned long rsvd_56_62:7; 3924647128f1SMike Travis unsigned long enable:1; /* RW */ 3925647128f1SMike Travis } s2; 3926647128f1SMike Travis }; 3927647128f1SMike Travis 3928647128f1SMike Travis /* ========================================================================= */ 3929647128f1SMike Travis /* UVH_RH_GAM_MMIOH_OVERLAY_CONFIG */ 3930647128f1SMike Travis /* ========================================================================= */ 3931647128f1SMike Travis #define UVH_RH_GAM_MMIOH_OVERLAY_CONFIG ( \ 3932647128f1SMike Travis is_uv(UV2) ? 0x1600030UL : \ 3933647128f1SMike Travis 0) 3934647128f1SMike Travis 3935647128f1SMike Travis 3936647128f1SMike Travis 3937647128f1SMike Travis /* UV2 unique defines */ 3938647128f1SMike Travis #define UV2H_RH_GAM_MMIOH_OVERLAY_CONFIG_BASE_SHFT 27 3939647128f1SMike Travis #define UV2H_RH_GAM_MMIOH_OVERLAY_CONFIG_BASE_MASK 0x00003ffff8000000UL 3940647128f1SMike Travis #define UV2H_RH_GAM_MMIOH_OVERLAY_CONFIG_M_IO_SHFT 46 3941647128f1SMike Travis #define UV2H_RH_GAM_MMIOH_OVERLAY_CONFIG_M_IO_MASK 0x000fc00000000000UL 3942647128f1SMike Travis #define UV2H_RH_GAM_MMIOH_OVERLAY_CONFIG_N_IO_SHFT 52 3943647128f1SMike Travis #define UV2H_RH_GAM_MMIOH_OVERLAY_CONFIG_N_IO_MASK 0x00f0000000000000UL 3944647128f1SMike Travis #define UV2H_RH_GAM_MMIOH_OVERLAY_CONFIG_ENABLE_SHFT 63 3945647128f1SMike Travis #define UV2H_RH_GAM_MMIOH_OVERLAY_CONFIG_ENABLE_MASK 0x8000000000000000UL 3946647128f1SMike Travis 3947647128f1SMike Travis #define UVH_RH_GAM_MMIOH_OVERLAY_CONFIG_BASE_SHFT ( \ 3948647128f1SMike Travis is_uv(UV2) ? 27 : \ 3949647128f1SMike Travis uv_undefined("UVH_RH_GAM_MMIOH_OVERLAY_CONFIG_BASE_SHFT")) 3950647128f1SMike Travis 3951647128f1SMike Travis union uvh_rh_gam_mmioh_overlay_config_u { 3952647128f1SMike Travis unsigned long v; 3953647128f1SMike Travis 3954647128f1SMike Travis /* UVH common struct */ 3955647128f1SMike Travis struct uvh_rh_gam_mmioh_overlay_config_s { 3956647128f1SMike Travis unsigned long rsvd_0_26:27; 3957647128f1SMike Travis unsigned long base:19; /* RW */ 3958647128f1SMike Travis unsigned long m_io:6; /* RW */ 3959647128f1SMike Travis unsigned long n_io:4; /* RW */ 3960647128f1SMike Travis unsigned long rsvd_56_62:7; 3961647128f1SMike Travis unsigned long enable:1; /* RW */ 3962647128f1SMike Travis } s; 3963647128f1SMike Travis 3964647128f1SMike Travis /* UVXH common struct */ 3965647128f1SMike Travis struct uvxh_rh_gam_mmioh_overlay_config_s { 3966647128f1SMike Travis unsigned long rsvd_0_26:27; 3967647128f1SMike Travis unsigned long base:19; /* RW */ 3968647128f1SMike Travis unsigned long m_io:6; /* RW */ 3969647128f1SMike Travis unsigned long n_io:4; /* RW */ 3970647128f1SMike Travis unsigned long rsvd_56_62:7; 3971647128f1SMike Travis unsigned long enable:1; /* RW */ 3972647128f1SMike Travis } sx; 3973647128f1SMike Travis 3974647128f1SMike Travis /* UV2 unique struct */ 3975647128f1SMike Travis struct uv2h_rh_gam_mmioh_overlay_config_s { 3976647128f1SMike Travis unsigned long rsvd_0_26:27; 3977647128f1SMike Travis unsigned long base:19; /* RW */ 3978647128f1SMike Travis unsigned long m_io:6; /* RW */ 3979647128f1SMike Travis unsigned long n_io:4; /* RW */ 3980647128f1SMike Travis unsigned long rsvd_56_62:7; 3981647128f1SMike Travis unsigned long enable:1; /* RW */ 3982647128f1SMike Travis } s2; 3983647128f1SMike Travis }; 3984647128f1SMike Travis 3985647128f1SMike Travis /* ========================================================================= */ 3986647128f1SMike Travis /* UVH_RH_GAM_MMIOH_OVERLAY_CONFIG0 */ 3987647128f1SMike Travis /* ========================================================================= */ 3988647128f1SMike Travis #define UVH_RH_GAM_MMIOH_OVERLAY_CONFIG0 ( \ 3989647128f1SMike Travis is_uv(UV4) ? 0x483000UL : \ 3990647128f1SMike Travis is_uv(UV3) ? 0x1603000UL : \ 3991647128f1SMike Travis 0) 3992647128f1SMike Travis 3993647128f1SMike Travis /* UV4A unique defines */ 3994647128f1SMike Travis #define UV4AH_RH_GAM_MMIOH_OVERLAY_CONFIG0_BASE_SHFT 26 3995647128f1SMike Travis #define UV4AH_RH_GAM_MMIOH_OVERLAY_CONFIG0_BASE_MASK 0x000ffffffc000000UL 3996647128f1SMike Travis #define UV4AH_RH_GAM_MMIOH_OVERLAY_CONFIG0_M_IO_SHFT 52 3997647128f1SMike Travis #define UV4AH_RH_GAM_MMIOH_OVERLAY_CONFIG0_M_IO_MASK 0x03f0000000000000UL 3998647128f1SMike Travis #define UV4AH_RH_GAM_MMIOH_OVERLAY_CONFIG0_ENABLE_SHFT 63 3999647128f1SMike Travis #define UV4AH_RH_GAM_MMIOH_OVERLAY_CONFIG0_ENABLE_MASK 0x8000000000000000UL 4000647128f1SMike Travis 4001647128f1SMike Travis /* UV4 unique defines */ 4002647128f1SMike Travis #define UV4H_RH_GAM_MMIOH_OVERLAY_CONFIG0_BASE_SHFT 26 4003647128f1SMike Travis #define UV4H_RH_GAM_MMIOH_OVERLAY_CONFIG0_BASE_MASK 0x00003ffffc000000UL 4004647128f1SMike Travis #define UV4H_RH_GAM_MMIOH_OVERLAY_CONFIG0_M_IO_SHFT 46 4005647128f1SMike Travis #define UV4H_RH_GAM_MMIOH_OVERLAY_CONFIG0_M_IO_MASK 0x000fc00000000000UL 4006647128f1SMike Travis #define UV4H_RH_GAM_MMIOH_OVERLAY_CONFIG0_ENABLE_SHFT 63 4007647128f1SMike Travis #define UV4H_RH_GAM_MMIOH_OVERLAY_CONFIG0_ENABLE_MASK 0x8000000000000000UL 4008647128f1SMike Travis 4009647128f1SMike Travis /* UV3 unique defines */ 4010647128f1SMike Travis #define UV3H_RH_GAM_MMIOH_OVERLAY_CONFIG0_BASE_SHFT 26 4011647128f1SMike Travis #define UV3H_RH_GAM_MMIOH_OVERLAY_CONFIG0_BASE_MASK 0x00003ffffc000000UL 4012647128f1SMike Travis #define UV3H_RH_GAM_MMIOH_OVERLAY_CONFIG0_M_IO_SHFT 46 4013647128f1SMike Travis #define UV3H_RH_GAM_MMIOH_OVERLAY_CONFIG0_M_IO_MASK 0x000fc00000000000UL 4014647128f1SMike Travis #define UV3H_RH_GAM_MMIOH_OVERLAY_CONFIG0_ENABLE_SHFT 63 4015647128f1SMike Travis #define UV3H_RH_GAM_MMIOH_OVERLAY_CONFIG0_ENABLE_MASK 0x8000000000000000UL 4016647128f1SMike Travis 4017647128f1SMike Travis #define UVH_RH_GAM_MMIOH_OVERLAY_CONFIG0_BASE_MASK ( \ 4018647128f1SMike Travis is_uv(UV4A) ? 0x000ffffffc000000UL : \ 4019647128f1SMike Travis is_uv(UV4) ? 0x00003ffffc000000UL : \ 4020647128f1SMike Travis is_uv(UV3) ? 0x00003ffffc000000UL : \ 4021647128f1SMike Travis 0) 4022647128f1SMike Travis #define UVH_RH_GAM_MMIOH_OVERLAY_CONFIG0_BASE_SHFT ( \ 4023647128f1SMike Travis is_uv(UV4) ? 26 : \ 4024647128f1SMike Travis is_uv(UV3) ? 26 : \ 4025647128f1SMike Travis -1) 4026647128f1SMike Travis 4027647128f1SMike Travis union uvh_rh_gam_mmioh_overlay_config0_u { 4028647128f1SMike Travis unsigned long v; 4029647128f1SMike Travis 4030647128f1SMike Travis /* UVH common struct */ 4031647128f1SMike Travis struct uvh_rh_gam_mmioh_overlay_config0_s { 4032647128f1SMike Travis unsigned long rsvd_0_25:26; 4033647128f1SMike Travis unsigned long base:20; /* RW */ 4034647128f1SMike Travis unsigned long m_io:6; /* RW */ 4035647128f1SMike Travis unsigned long n_io:4; 4036647128f1SMike Travis unsigned long rsvd_56_62:7; 4037647128f1SMike Travis unsigned long enable:1; /* RW */ 4038647128f1SMike Travis } s; 4039647128f1SMike Travis 4040647128f1SMike Travis /* UVXH common struct */ 4041647128f1SMike Travis struct uvxh_rh_gam_mmioh_overlay_config0_s { 4042647128f1SMike Travis unsigned long rsvd_0_25:26; 4043647128f1SMike Travis unsigned long base:20; /* RW */ 4044647128f1SMike Travis unsigned long m_io:6; /* RW */ 4045647128f1SMike Travis unsigned long n_io:4; 4046647128f1SMike Travis unsigned long rsvd_56_62:7; 4047647128f1SMike Travis unsigned long enable:1; /* RW */ 4048647128f1SMike Travis } sx; 4049647128f1SMike Travis 4050647128f1SMike Travis /* UV4A unique struct */ 4051647128f1SMike Travis struct uv4ah_rh_gam_mmioh_overlay_config0_mmr_s { 4052647128f1SMike Travis unsigned long rsvd_0_25:26; 4053647128f1SMike Travis unsigned long base:26; /* RW */ 4054647128f1SMike Travis unsigned long m_io:6; /* RW */ 4055647128f1SMike Travis unsigned long n_io:4; 4056647128f1SMike Travis unsigned long undef_62:1; /* Undefined */ 4057647128f1SMike Travis unsigned long enable:1; /* RW */ 4058647128f1SMike Travis } s4a; 4059647128f1SMike Travis 4060647128f1SMike Travis /* UV4 unique struct */ 4061647128f1SMike Travis struct uv4h_rh_gam_mmioh_overlay_config0_s { 4062647128f1SMike Travis unsigned long rsvd_0_25:26; 4063647128f1SMike Travis unsigned long base:20; /* RW */ 4064647128f1SMike Travis unsigned long m_io:6; /* RW */ 4065647128f1SMike Travis unsigned long n_io:4; 4066647128f1SMike Travis unsigned long rsvd_56_62:7; 4067647128f1SMike Travis unsigned long enable:1; /* RW */ 4068647128f1SMike Travis } s4; 4069647128f1SMike Travis 4070647128f1SMike Travis /* UV3 unique struct */ 4071647128f1SMike Travis struct uv3h_rh_gam_mmioh_overlay_config0_s { 4072647128f1SMike Travis unsigned long rsvd_0_25:26; 4073647128f1SMike Travis unsigned long base:20; /* RW */ 4074647128f1SMike Travis unsigned long m_io:6; /* RW */ 4075647128f1SMike Travis unsigned long n_io:4; 4076647128f1SMike Travis unsigned long rsvd_56_62:7; 4077647128f1SMike Travis unsigned long enable:1; /* RW */ 4078647128f1SMike Travis } s3; 4079647128f1SMike Travis }; 4080647128f1SMike Travis 4081647128f1SMike Travis /* ========================================================================= */ 4082647128f1SMike Travis /* UVH_RH_GAM_MMIOH_OVERLAY_CONFIG1 */ 4083647128f1SMike Travis /* ========================================================================= */ 4084647128f1SMike Travis #define UVH_RH_GAM_MMIOH_OVERLAY_CONFIG1 ( \ 4085647128f1SMike Travis is_uv(UV4) ? 0x484000UL : \ 4086647128f1SMike Travis is_uv(UV3) ? 0x1604000UL : \ 4087647128f1SMike Travis 0) 4088647128f1SMike Travis 4089647128f1SMike Travis /* UV4A unique defines */ 4090647128f1SMike Travis #define UV4AH_RH_GAM_MMIOH_OVERLAY_CONFIG1_BASE_SHFT 26 4091647128f1SMike Travis #define UV4AH_RH_GAM_MMIOH_OVERLAY_CONFIG1_BASE_MASK 0x000ffffffc000000UL 4092647128f1SMike Travis #define UV4AH_RH_GAM_MMIOH_OVERLAY_CONFIG1_M_IO_SHFT 52 4093647128f1SMike Travis #define UV4AH_RH_GAM_MMIOH_OVERLAY_CONFIG1_M_IO_MASK 0x03f0000000000000UL 4094647128f1SMike Travis #define UV4AH_RH_GAM_MMIOH_OVERLAY_CONFIG1_ENABLE_SHFT 63 4095647128f1SMike Travis #define UV4AH_RH_GAM_MMIOH_OVERLAY_CONFIG1_ENABLE_MASK 0x8000000000000000UL 4096647128f1SMike Travis 4097647128f1SMike Travis /* UV4 unique defines */ 4098647128f1SMike Travis #define UV4H_RH_GAM_MMIOH_OVERLAY_CONFIG1_BASE_SHFT 26 4099647128f1SMike Travis #define UV4H_RH_GAM_MMIOH_OVERLAY_CONFIG1_BASE_MASK 0x00003ffffc000000UL 4100647128f1SMike Travis #define UV4H_RH_GAM_MMIOH_OVERLAY_CONFIG1_M_IO_SHFT 46 4101647128f1SMike Travis #define UV4H_RH_GAM_MMIOH_OVERLAY_CONFIG1_M_IO_MASK 0x000fc00000000000UL 4102647128f1SMike Travis #define UV4H_RH_GAM_MMIOH_OVERLAY_CONFIG1_ENABLE_SHFT 63 4103647128f1SMike Travis #define UV4H_RH_GAM_MMIOH_OVERLAY_CONFIG1_ENABLE_MASK 0x8000000000000000UL 4104647128f1SMike Travis 4105647128f1SMike Travis /* UV3 unique defines */ 4106647128f1SMike Travis #define UV3H_RH_GAM_MMIOH_OVERLAY_CONFIG1_BASE_SHFT 26 4107647128f1SMike Travis #define UV3H_RH_GAM_MMIOH_OVERLAY_CONFIG1_BASE_MASK 0x00003ffffc000000UL 4108647128f1SMike Travis #define UV3H_RH_GAM_MMIOH_OVERLAY_CONFIG1_M_IO_SHFT 46 4109647128f1SMike Travis #define UV3H_RH_GAM_MMIOH_OVERLAY_CONFIG1_M_IO_MASK 0x000fc00000000000UL 4110647128f1SMike Travis #define UV3H_RH_GAM_MMIOH_OVERLAY_CONFIG1_ENABLE_SHFT 63 4111647128f1SMike Travis #define UV3H_RH_GAM_MMIOH_OVERLAY_CONFIG1_ENABLE_MASK 0x8000000000000000UL 4112647128f1SMike Travis 4113647128f1SMike Travis #define UVH_RH_GAM_MMIOH_OVERLAY_CONFIG1_BASE_MASK ( \ 4114647128f1SMike Travis is_uv(UV4A) ? 0x000ffffffc000000UL : \ 4115647128f1SMike Travis is_uv(UV4) ? 0x00003ffffc000000UL : \ 4116647128f1SMike Travis is_uv(UV3) ? 0x00003ffffc000000UL : \ 4117647128f1SMike Travis 0) 4118647128f1SMike Travis #define UVH_RH_GAM_MMIOH_OVERLAY_CONFIG1_BASE_SHFT ( \ 4119647128f1SMike Travis is_uv(UV4) ? 26 : \ 4120647128f1SMike Travis is_uv(UV3) ? 26 : \ 4121647128f1SMike Travis -1) 4122647128f1SMike Travis 4123647128f1SMike Travis union uvh_rh_gam_mmioh_overlay_config1_u { 4124647128f1SMike Travis unsigned long v; 4125647128f1SMike Travis 4126647128f1SMike Travis /* UVH common struct */ 4127647128f1SMike Travis struct uvh_rh_gam_mmioh_overlay_config1_s { 4128647128f1SMike Travis unsigned long rsvd_0_25:26; 4129647128f1SMike Travis unsigned long base:20; /* RW */ 4130647128f1SMike Travis unsigned long m_io:6; /* RW */ 4131647128f1SMike Travis unsigned long n_io:4; 4132647128f1SMike Travis unsigned long rsvd_56_62:7; 4133647128f1SMike Travis unsigned long enable:1; /* RW */ 4134647128f1SMike Travis } s; 4135647128f1SMike Travis 4136647128f1SMike Travis /* UVXH common struct */ 4137647128f1SMike Travis struct uvxh_rh_gam_mmioh_overlay_config1_s { 4138647128f1SMike Travis unsigned long rsvd_0_25:26; 4139647128f1SMike Travis unsigned long base:20; /* RW */ 4140647128f1SMike Travis unsigned long m_io:6; /* RW */ 4141647128f1SMike Travis unsigned long n_io:4; 4142647128f1SMike Travis unsigned long rsvd_56_62:7; 4143647128f1SMike Travis unsigned long enable:1; /* RW */ 4144647128f1SMike Travis } sx; 4145647128f1SMike Travis 4146647128f1SMike Travis /* UV4A unique struct */ 4147647128f1SMike Travis struct uv4ah_rh_gam_mmioh_overlay_config1_mmr_s { 4148647128f1SMike Travis unsigned long rsvd_0_25:26; 4149647128f1SMike Travis unsigned long base:26; /* RW */ 4150647128f1SMike Travis unsigned long m_io:6; /* RW */ 4151647128f1SMike Travis unsigned long n_io:4; 4152647128f1SMike Travis unsigned long undef_62:1; /* Undefined */ 4153647128f1SMike Travis unsigned long enable:1; /* RW */ 4154647128f1SMike Travis } s4a; 4155647128f1SMike Travis 4156647128f1SMike Travis /* UV4 unique struct */ 4157647128f1SMike Travis struct uv4h_rh_gam_mmioh_overlay_config1_s { 4158647128f1SMike Travis unsigned long rsvd_0_25:26; 4159647128f1SMike Travis unsigned long base:20; /* RW */ 4160647128f1SMike Travis unsigned long m_io:6; /* RW */ 4161647128f1SMike Travis unsigned long n_io:4; 4162647128f1SMike Travis unsigned long rsvd_56_62:7; 4163647128f1SMike Travis unsigned long enable:1; /* RW */ 4164647128f1SMike Travis } s4; 4165647128f1SMike Travis 4166647128f1SMike Travis /* UV3 unique struct */ 4167647128f1SMike Travis struct uv3h_rh_gam_mmioh_overlay_config1_s { 4168647128f1SMike Travis unsigned long rsvd_0_25:26; 4169647128f1SMike Travis unsigned long base:20; /* RW */ 4170647128f1SMike Travis unsigned long m_io:6; /* RW */ 4171647128f1SMike Travis unsigned long n_io:4; 4172647128f1SMike Travis unsigned long rsvd_56_62:7; 4173647128f1SMike Travis unsigned long enable:1; /* RW */ 4174647128f1SMike Travis } s3; 4175647128f1SMike Travis }; 4176647128f1SMike Travis 4177647128f1SMike Travis /* ========================================================================= */ 4178647128f1SMike Travis /* UVH_RH_GAM_MMIOH_REDIRECT_CONFIG0 */ 4179647128f1SMike Travis /* ========================================================================= */ 4180647128f1SMike Travis #define UVH_RH_GAM_MMIOH_REDIRECT_CONFIG0 ( \ 4181647128f1SMike Travis is_uv(UV4) ? 0x483800UL : \ 4182647128f1SMike Travis is_uv(UV3) ? 0x1603800UL : \ 4183647128f1SMike Travis 0) 4184647128f1SMike Travis 4185647128f1SMike Travis #define UVH_RH_GAM_MMIOH_REDIRECT_CONFIG0_DEPTH ( \ 4186647128f1SMike Travis is_uv(UV4) ? 128 : \ 4187647128f1SMike Travis is_uv(UV3) ? 128 : \ 4188647128f1SMike Travis 0) 4189647128f1SMike Travis 4190647128f1SMike Travis /* UV4A unique defines */ 4191647128f1SMike Travis #define UV4AH_RH_GAM_MMIOH_REDIRECT_CONFIG0_NASID_SHFT 0 4192647128f1SMike Travis #define UV4AH_RH_GAM_MMIOH_REDIRECT_CONFIG0_NASID_MASK 0x0000000000000fffUL 4193647128f1SMike Travis 4194647128f1SMike Travis /* UV4 unique defines */ 4195647128f1SMike Travis #define UV4H_RH_GAM_MMIOH_REDIRECT_CONFIG0_NASID_SHFT 0 4196647128f1SMike Travis #define UV4H_RH_GAM_MMIOH_REDIRECT_CONFIG0_NASID_MASK 0x0000000000007fffUL 4197647128f1SMike Travis 4198647128f1SMike Travis /* UV3 unique defines */ 4199647128f1SMike Travis #define UV3H_RH_GAM_MMIOH_REDIRECT_CONFIG0_NASID_SHFT 0 4200647128f1SMike Travis #define UV3H_RH_GAM_MMIOH_REDIRECT_CONFIG0_NASID_MASK 0x0000000000007fffUL 4201647128f1SMike Travis 4202*fd27bea3SSteve Wahl /* UVH common defines */ 4203*fd27bea3SSteve Wahl #define UVH_RH_GAM_MMIOH_REDIRECT_CONFIG0_NASID_MASK ( \ 4204*fd27bea3SSteve Wahl is_uv(UV4A) ? UV4AH_RH_GAM_MMIOH_REDIRECT_CONFIG0_NASID_MASK : \ 4205*fd27bea3SSteve Wahl is_uv(UV4) ? UV4H_RH_GAM_MMIOH_REDIRECT_CONFIG0_NASID_MASK : \ 4206*fd27bea3SSteve Wahl is_uv(UV3) ? UV3H_RH_GAM_MMIOH_REDIRECT_CONFIG0_NASID_MASK : \ 4207*fd27bea3SSteve Wahl 0) 4208*fd27bea3SSteve Wahl 4209647128f1SMike Travis 4210647128f1SMike Travis union uvh_rh_gam_mmioh_redirect_config0_u { 4211647128f1SMike Travis unsigned long v; 4212647128f1SMike Travis 4213647128f1SMike Travis /* UVH common struct */ 4214647128f1SMike Travis struct uvh_rh_gam_mmioh_redirect_config0_s { 4215647128f1SMike Travis unsigned long nasid:15; /* RW */ 4216647128f1SMike Travis unsigned long rsvd_15_63:49; 4217647128f1SMike Travis } s; 4218647128f1SMike Travis 4219647128f1SMike Travis /* UVXH common struct */ 4220647128f1SMike Travis struct uvxh_rh_gam_mmioh_redirect_config0_s { 4221647128f1SMike Travis unsigned long nasid:15; /* RW */ 4222647128f1SMike Travis unsigned long rsvd_15_63:49; 4223647128f1SMike Travis } sx; 4224647128f1SMike Travis 4225647128f1SMike Travis struct uv4ah_rh_gam_mmioh_redirect_config0_s { 4226647128f1SMike Travis unsigned long nasid:12; /* RW */ 4227647128f1SMike Travis unsigned long rsvd_12_63:52; 4228647128f1SMike Travis } s4a; 4229647128f1SMike Travis 4230647128f1SMike Travis /* UV4 unique struct */ 4231647128f1SMike Travis struct uv4h_rh_gam_mmioh_redirect_config0_s { 4232647128f1SMike Travis unsigned long nasid:15; /* RW */ 4233647128f1SMike Travis unsigned long rsvd_15_63:49; 4234647128f1SMike Travis } s4; 4235647128f1SMike Travis 4236647128f1SMike Travis /* UV3 unique struct */ 4237647128f1SMike Travis struct uv3h_rh_gam_mmioh_redirect_config0_s { 4238647128f1SMike Travis unsigned long nasid:15; /* RW */ 4239647128f1SMike Travis unsigned long rsvd_15_63:49; 4240647128f1SMike Travis } s3; 4241647128f1SMike Travis }; 4242647128f1SMike Travis 4243647128f1SMike Travis /* ========================================================================= */ 4244647128f1SMike Travis /* UVH_RH_GAM_MMIOH_REDIRECT_CONFIG1 */ 4245647128f1SMike Travis /* ========================================================================= */ 4246647128f1SMike Travis #define UVH_RH_GAM_MMIOH_REDIRECT_CONFIG1 ( \ 4247647128f1SMike Travis is_uv(UV4) ? 0x484800UL : \ 4248647128f1SMike Travis is_uv(UV3) ? 0x1604800UL : \ 4249647128f1SMike Travis 0) 4250647128f1SMike Travis 4251647128f1SMike Travis #define UVH_RH_GAM_MMIOH_REDIRECT_CONFIG1_DEPTH ( \ 4252647128f1SMike Travis is_uv(UV4) ? 128 : \ 4253647128f1SMike Travis is_uv(UV3) ? 128 : \ 4254647128f1SMike Travis 0) 4255647128f1SMike Travis 4256647128f1SMike Travis /* UV4A unique defines */ 4257*fd27bea3SSteve Wahl #define UV4AH_RH_GAM_MMIOH_REDIRECT_CONFIG1_NASID_SHFT 0 4258*fd27bea3SSteve Wahl #define UV4AH_RH_GAM_MMIOH_REDIRECT_CONFIG1_NASID_MASK 0x0000000000000fffUL 4259647128f1SMike Travis 4260647128f1SMike Travis /* UV4 unique defines */ 4261647128f1SMike Travis #define UV4H_RH_GAM_MMIOH_REDIRECT_CONFIG1_NASID_SHFT 0 4262647128f1SMike Travis #define UV4H_RH_GAM_MMIOH_REDIRECT_CONFIG1_NASID_MASK 0x0000000000007fffUL 4263647128f1SMike Travis 4264647128f1SMike Travis /* UV3 unique defines */ 4265647128f1SMike Travis #define UV3H_RH_GAM_MMIOH_REDIRECT_CONFIG1_NASID_SHFT 0 4266647128f1SMike Travis #define UV3H_RH_GAM_MMIOH_REDIRECT_CONFIG1_NASID_MASK 0x0000000000007fffUL 4267647128f1SMike Travis 4268*fd27bea3SSteve Wahl /* UVH common defines */ 4269*fd27bea3SSteve Wahl #define UVH_RH_GAM_MMIOH_REDIRECT_CONFIG1_NASID_MASK ( \ 4270*fd27bea3SSteve Wahl is_uv(UV4A) ? UV4AH_RH_GAM_MMIOH_REDIRECT_CONFIG1_NASID_MASK : \ 4271*fd27bea3SSteve Wahl is_uv(UV4) ? UV4H_RH_GAM_MMIOH_REDIRECT_CONFIG1_NASID_MASK : \ 4272*fd27bea3SSteve Wahl is_uv(UV3) ? UV3H_RH_GAM_MMIOH_REDIRECT_CONFIG1_NASID_MASK : \ 4273*fd27bea3SSteve Wahl 0) 4274*fd27bea3SSteve Wahl 4275647128f1SMike Travis 4276647128f1SMike Travis union uvh_rh_gam_mmioh_redirect_config1_u { 4277647128f1SMike Travis unsigned long v; 4278647128f1SMike Travis 4279647128f1SMike Travis /* UVH common struct */ 4280647128f1SMike Travis struct uvh_rh_gam_mmioh_redirect_config1_s { 4281647128f1SMike Travis unsigned long nasid:15; /* RW */ 4282647128f1SMike Travis unsigned long rsvd_15_63:49; 4283647128f1SMike Travis } s; 4284647128f1SMike Travis 4285647128f1SMike Travis /* UVXH common struct */ 4286647128f1SMike Travis struct uvxh_rh_gam_mmioh_redirect_config1_s { 4287647128f1SMike Travis unsigned long nasid:15; /* RW */ 4288647128f1SMike Travis unsigned long rsvd_15_63:49; 4289647128f1SMike Travis } sx; 4290647128f1SMike Travis 4291647128f1SMike Travis struct uv4ah_rh_gam_mmioh_redirect_config1_s { 4292647128f1SMike Travis unsigned long nasid:12; /* RW */ 4293647128f1SMike Travis unsigned long rsvd_12_63:52; 4294647128f1SMike Travis } s4a; 4295647128f1SMike Travis 4296647128f1SMike Travis /* UV4 unique struct */ 4297647128f1SMike Travis struct uv4h_rh_gam_mmioh_redirect_config1_s { 4298647128f1SMike Travis unsigned long nasid:15; /* RW */ 4299647128f1SMike Travis unsigned long rsvd_15_63:49; 4300647128f1SMike Travis } s4; 4301647128f1SMike Travis 4302647128f1SMike Travis /* UV3 unique struct */ 4303647128f1SMike Travis struct uv3h_rh_gam_mmioh_redirect_config1_s { 4304647128f1SMike Travis unsigned long nasid:15; /* RW */ 4305647128f1SMike Travis unsigned long rsvd_15_63:49; 4306647128f1SMike Travis } s3; 4307647128f1SMike Travis }; 4308647128f1SMike Travis 4309647128f1SMike Travis /* ========================================================================= */ 4310647128f1SMike Travis /* UVH_RH_GAM_MMR_OVERLAY_CONFIG */ 4311647128f1SMike Travis /* ========================================================================= */ 4312647128f1SMike Travis #define UVH_RH_GAM_MMR_OVERLAY_CONFIG ( \ 4313647128f1SMike Travis is_uv(UV4) ? 0x480028UL : \ 4314647128f1SMike Travis is_uv(UV3) ? 0x1600028UL : \ 4315647128f1SMike Travis is_uv(UV2) ? 0x1600028UL : \ 4316647128f1SMike Travis 0) 4317647128f1SMike Travis 4318647128f1SMike Travis 4319647128f1SMike Travis /* UVXH common defines */ 4320647128f1SMike Travis #define UVXH_RH_GAM_MMR_OVERLAY_CONFIG_BASE_SHFT 26 4321647128f1SMike Travis #define UVXH_RH_GAM_MMR_OVERLAY_CONFIG_BASE_MASK ( \ 4322647128f1SMike Travis is_uv(UV4A) ? 0x000ffffffc000000UL : \ 4323647128f1SMike Travis is_uv(UV4) ? 0x00003ffffc000000UL : \ 4324647128f1SMike Travis is_uv(UV3) ? 0x00003ffffc000000UL : \ 4325647128f1SMike Travis is_uv(UV2) ? 0x00003ffffc000000UL : \ 4326647128f1SMike Travis 0) 4327647128f1SMike Travis #define UVXH_RH_GAM_MMR_OVERLAY_CONFIG_ENABLE_SHFT 63 4328647128f1SMike Travis #define UVXH_RH_GAM_MMR_OVERLAY_CONFIG_ENABLE_MASK 0x8000000000000000UL 4329647128f1SMike Travis 4330647128f1SMike Travis /* UV4A unique defines */ 4331647128f1SMike Travis #define UV4AH_RH_GAM_GRU_OVERLAY_CONFIG_BASE_SHFT 26 4332647128f1SMike Travis #define UV4AH_RH_GAM_GRU_OVERLAY_CONFIG_BASE_MASK 0x000ffffffc000000UL 4333647128f1SMike Travis 4334647128f1SMike Travis #define UVH_RH_GAM_MMR_OVERLAY_CONFIG_BASE_MASK ( \ 4335647128f1SMike Travis is_uv(UV4A) ? 0x000ffffffc000000UL : \ 4336647128f1SMike Travis is_uv(UV4) ? 0x00003ffffc000000UL : \ 4337647128f1SMike Travis is_uv(UV3) ? 0x00003ffffc000000UL : \ 4338647128f1SMike Travis is_uv(UV2) ? 0x00003ffffc000000UL : \ 4339647128f1SMike Travis 0) 4340647128f1SMike Travis 4341647128f1SMike Travis #define UVH_RH_GAM_MMR_OVERLAY_CONFIG_BASE_SHFT ( \ 4342647128f1SMike Travis is_uv(UV4) ? 26 : \ 4343647128f1SMike Travis is_uv(UV3) ? 26 : \ 4344647128f1SMike Travis is_uv(UV2) ? 26 : \ 4345647128f1SMike Travis -1) 4346647128f1SMike Travis 4347647128f1SMike Travis union uvh_rh_gam_mmr_overlay_config_u { 4348647128f1SMike Travis unsigned long v; 4349647128f1SMike Travis 4350647128f1SMike Travis /* UVH common struct */ 4351647128f1SMike Travis struct uvh_rh_gam_mmr_overlay_config_s { 4352647128f1SMike Travis unsigned long rsvd_0_25:26; 4353647128f1SMike Travis unsigned long base:20; /* RW */ 4354647128f1SMike Travis unsigned long rsvd_46_62:17; 4355647128f1SMike Travis unsigned long enable:1; /* RW */ 4356647128f1SMike Travis } s; 4357647128f1SMike Travis 4358647128f1SMike Travis /* UVXH common struct */ 4359647128f1SMike Travis struct uvxh_rh_gam_mmr_overlay_config_s { 4360647128f1SMike Travis unsigned long rsvd_0_25:26; 4361647128f1SMike Travis unsigned long base:20; /* RW */ 4362647128f1SMike Travis unsigned long rsvd_46_62:17; 4363647128f1SMike Travis unsigned long enable:1; /* RW */ 4364647128f1SMike Travis } sx; 4365647128f1SMike Travis 4366647128f1SMike Travis /* UV4 unique struct */ 4367647128f1SMike Travis struct uv4h_rh_gam_mmr_overlay_config_s { 4368647128f1SMike Travis unsigned long rsvd_0_25:26; 4369647128f1SMike Travis unsigned long base:20; /* RW */ 4370647128f1SMike Travis unsigned long rsvd_46_62:17; 4371647128f1SMike Travis unsigned long enable:1; /* RW */ 4372647128f1SMike Travis } s4; 4373647128f1SMike Travis 4374647128f1SMike Travis /* UV3 unique struct */ 4375647128f1SMike Travis struct uv3h_rh_gam_mmr_overlay_config_s { 4376647128f1SMike Travis unsigned long rsvd_0_25:26; 4377647128f1SMike Travis unsigned long base:20; /* RW */ 4378647128f1SMike Travis unsigned long rsvd_46_62:17; 4379647128f1SMike Travis unsigned long enable:1; /* RW */ 4380647128f1SMike Travis } s3; 4381647128f1SMike Travis 4382647128f1SMike Travis /* UV2 unique struct */ 4383647128f1SMike Travis struct uv2h_rh_gam_mmr_overlay_config_s { 4384647128f1SMike Travis unsigned long rsvd_0_25:26; 4385647128f1SMike Travis unsigned long base:20; /* RW */ 4386647128f1SMike Travis unsigned long rsvd_46_62:17; 4387647128f1SMike Travis unsigned long enable:1; /* RW */ 4388647128f1SMike Travis } s2; 4389647128f1SMike Travis }; 4390647128f1SMike Travis 4391647128f1SMike Travis /* ========================================================================= */ 4392647128f1SMike Travis /* UVH_RTC */ 4393647128f1SMike Travis /* ========================================================================= */ 4394647128f1SMike Travis #define UVH_RTC ( \ 4395647128f1SMike Travis is_uv(UV5) ? 0xe0000UL : \ 4396647128f1SMike Travis is_uv(UV4) ? 0xe0000UL : \ 4397647128f1SMike Travis is_uv(UV3) ? 0x340000UL : \ 4398647128f1SMike Travis is_uv(UV2) ? 0x340000UL : \ 4399647128f1SMike Travis 0) 4400647128f1SMike Travis 4401647128f1SMike Travis /* UVH common defines*/ 4402647128f1SMike Travis #define UVH_RTC_REAL_TIME_CLOCK_SHFT 0 4403647128f1SMike Travis #define UVH_RTC_REAL_TIME_CLOCK_MASK 0x00ffffffffffffffUL 4404647128f1SMike Travis 4405647128f1SMike Travis 4406647128f1SMike Travis union uvh_rtc_u { 4407647128f1SMike Travis unsigned long v; 4408647128f1SMike Travis 4409647128f1SMike Travis /* UVH common struct */ 4410647128f1SMike Travis struct uvh_rtc_s { 4411647128f1SMike Travis unsigned long real_time_clock:56; /* RW */ 4412647128f1SMike Travis unsigned long rsvd_56_63:8; 4413647128f1SMike Travis } s; 4414647128f1SMike Travis 4415647128f1SMike Travis /* UV5 unique struct */ 4416647128f1SMike Travis struct uv5h_rtc_s { 4417647128f1SMike Travis unsigned long real_time_clock:56; /* RW */ 4418647128f1SMike Travis unsigned long rsvd_56_63:8; 4419647128f1SMike Travis } s5; 4420647128f1SMike Travis 4421647128f1SMike Travis /* UV4 unique struct */ 4422647128f1SMike Travis struct uv4h_rtc_s { 4423647128f1SMike Travis unsigned long real_time_clock:56; /* RW */ 4424647128f1SMike Travis unsigned long rsvd_56_63:8; 4425647128f1SMike Travis } s4; 4426647128f1SMike Travis 4427647128f1SMike Travis /* UV3 unique struct */ 4428647128f1SMike Travis struct uv3h_rtc_s { 4429647128f1SMike Travis unsigned long real_time_clock:56; /* RW */ 4430647128f1SMike Travis unsigned long rsvd_56_63:8; 4431647128f1SMike Travis } s3; 4432647128f1SMike Travis 4433647128f1SMike Travis /* UV2 unique struct */ 4434647128f1SMike Travis struct uv2h_rtc_s { 4435647128f1SMike Travis unsigned long real_time_clock:56; /* RW */ 4436647128f1SMike Travis unsigned long rsvd_56_63:8; 4437647128f1SMike Travis } s2; 4438647128f1SMike Travis }; 4439647128f1SMike Travis 4440647128f1SMike Travis /* ========================================================================= */ 4441647128f1SMike Travis /* UVH_RTC1_INT_CONFIG */ 4442647128f1SMike Travis /* ========================================================================= */ 4443647128f1SMike Travis #define UVH_RTC1_INT_CONFIG 0x615c0UL 4444647128f1SMike Travis 4445647128f1SMike Travis /* UVH common defines*/ 4446647128f1SMike Travis #define UVH_RTC1_INT_CONFIG_VECTOR_SHFT 0 4447647128f1SMike Travis #define UVH_RTC1_INT_CONFIG_VECTOR_MASK 0x00000000000000ffUL 4448647128f1SMike Travis #define UVH_RTC1_INT_CONFIG_DM_SHFT 8 4449647128f1SMike Travis #define UVH_RTC1_INT_CONFIG_DM_MASK 0x0000000000000700UL 4450647128f1SMike Travis #define UVH_RTC1_INT_CONFIG_DESTMODE_SHFT 11 4451647128f1SMike Travis #define UVH_RTC1_INT_CONFIG_DESTMODE_MASK 0x0000000000000800UL 4452647128f1SMike Travis #define UVH_RTC1_INT_CONFIG_STATUS_SHFT 12 4453647128f1SMike Travis #define UVH_RTC1_INT_CONFIG_STATUS_MASK 0x0000000000001000UL 4454647128f1SMike Travis #define UVH_RTC1_INT_CONFIG_P_SHFT 13 4455647128f1SMike Travis #define UVH_RTC1_INT_CONFIG_P_MASK 0x0000000000002000UL 4456647128f1SMike Travis #define UVH_RTC1_INT_CONFIG_T_SHFT 15 4457647128f1SMike Travis #define UVH_RTC1_INT_CONFIG_T_MASK 0x0000000000008000UL 4458647128f1SMike Travis #define UVH_RTC1_INT_CONFIG_M_SHFT 16 4459647128f1SMike Travis #define UVH_RTC1_INT_CONFIG_M_MASK 0x0000000000010000UL 4460647128f1SMike Travis #define UVH_RTC1_INT_CONFIG_APIC_ID_SHFT 32 4461647128f1SMike Travis #define UVH_RTC1_INT_CONFIG_APIC_ID_MASK 0xffffffff00000000UL 4462647128f1SMike Travis 4463647128f1SMike Travis 4464647128f1SMike Travis union uvh_rtc1_int_config_u { 4465647128f1SMike Travis unsigned long v; 4466647128f1SMike Travis 4467647128f1SMike Travis /* UVH common struct */ 4468647128f1SMike Travis struct uvh_rtc1_int_config_s { 4469647128f1SMike Travis unsigned long vector_:8; /* RW */ 4470647128f1SMike Travis unsigned long dm:3; /* RW */ 4471647128f1SMike Travis unsigned long destmode:1; /* RW */ 4472647128f1SMike Travis unsigned long status:1; /* RO */ 4473647128f1SMike Travis unsigned long p:1; /* RO */ 4474647128f1SMike Travis unsigned long rsvd_14:1; 4475647128f1SMike Travis unsigned long t:1; /* RO */ 4476647128f1SMike Travis unsigned long m:1; /* RW */ 4477647128f1SMike Travis unsigned long rsvd_17_31:15; 4478647128f1SMike Travis unsigned long apic_id:32; /* RW */ 4479647128f1SMike Travis } s; 4480647128f1SMike Travis 4481647128f1SMike Travis /* UV5 unique struct */ 4482647128f1SMike Travis struct uv5h_rtc1_int_config_s { 4483647128f1SMike Travis unsigned long vector_:8; /* RW */ 4484647128f1SMike Travis unsigned long dm:3; /* RW */ 4485647128f1SMike Travis unsigned long destmode:1; /* RW */ 4486647128f1SMike Travis unsigned long status:1; /* RO */ 4487647128f1SMike Travis unsigned long p:1; /* RO */ 4488647128f1SMike Travis unsigned long rsvd_14:1; 4489647128f1SMike Travis unsigned long t:1; /* RO */ 4490647128f1SMike Travis unsigned long m:1; /* RW */ 4491647128f1SMike Travis unsigned long rsvd_17_31:15; 4492647128f1SMike Travis unsigned long apic_id:32; /* RW */ 4493647128f1SMike Travis } s5; 4494647128f1SMike Travis 4495647128f1SMike Travis /* UV4 unique struct */ 4496647128f1SMike Travis struct uv4h_rtc1_int_config_s { 4497647128f1SMike Travis unsigned long vector_:8; /* RW */ 4498647128f1SMike Travis unsigned long dm:3; /* RW */ 4499647128f1SMike Travis unsigned long destmode:1; /* RW */ 4500647128f1SMike Travis unsigned long status:1; /* RO */ 4501647128f1SMike Travis unsigned long p:1; /* RO */ 4502647128f1SMike Travis unsigned long rsvd_14:1; 4503647128f1SMike Travis unsigned long t:1; /* RO */ 4504647128f1SMike Travis unsigned long m:1; /* RW */ 4505647128f1SMike Travis unsigned long rsvd_17_31:15; 4506647128f1SMike Travis unsigned long apic_id:32; /* RW */ 4507647128f1SMike Travis } s4; 4508647128f1SMike Travis 4509647128f1SMike Travis /* UV3 unique struct */ 4510647128f1SMike Travis struct uv3h_rtc1_int_config_s { 4511647128f1SMike Travis unsigned long vector_:8; /* RW */ 4512647128f1SMike Travis unsigned long dm:3; /* RW */ 4513647128f1SMike Travis unsigned long destmode:1; /* RW */ 4514647128f1SMike Travis unsigned long status:1; /* RO */ 4515647128f1SMike Travis unsigned long p:1; /* RO */ 4516647128f1SMike Travis unsigned long rsvd_14:1; 4517647128f1SMike Travis unsigned long t:1; /* RO */ 4518647128f1SMike Travis unsigned long m:1; /* RW */ 4519647128f1SMike Travis unsigned long rsvd_17_31:15; 4520647128f1SMike Travis unsigned long apic_id:32; /* RW */ 4521647128f1SMike Travis } s3; 4522647128f1SMike Travis 4523647128f1SMike Travis /* UV2 unique struct */ 4524647128f1SMike Travis struct uv2h_rtc1_int_config_s { 4525647128f1SMike Travis unsigned long vector_:8; /* RW */ 4526647128f1SMike Travis unsigned long dm:3; /* RW */ 4527647128f1SMike Travis unsigned long destmode:1; /* RW */ 4528647128f1SMike Travis unsigned long status:1; /* RO */ 4529647128f1SMike Travis unsigned long p:1; /* RO */ 4530647128f1SMike Travis unsigned long rsvd_14:1; 4531647128f1SMike Travis unsigned long t:1; /* RO */ 4532647128f1SMike Travis unsigned long m:1; /* RW */ 4533647128f1SMike Travis unsigned long rsvd_17_31:15; 4534647128f1SMike Travis unsigned long apic_id:32; /* RW */ 4535647128f1SMike Travis } s2; 4536647128f1SMike Travis }; 4537647128f1SMike Travis 4538647128f1SMike Travis /* ========================================================================= */ 4539647128f1SMike Travis /* UVH_SCRATCH5 */ 4540647128f1SMike Travis /* ========================================================================= */ 4541647128f1SMike Travis #define UVH_SCRATCH5 ( \ 4542647128f1SMike Travis is_uv(UV5) ? 0xb0200UL : \ 4543647128f1SMike Travis is_uv(UV4) ? 0xb0200UL : \ 4544647128f1SMike Travis is_uv(UV3) ? 0x2d0200UL : \ 4545647128f1SMike Travis is_uv(UV2) ? 0x2d0200UL : \ 4546647128f1SMike Travis 0) 4547647128f1SMike Travis #define UV5H_SCRATCH5 0xb0200UL 4548647128f1SMike Travis #define UV4H_SCRATCH5 0xb0200UL 4549647128f1SMike Travis #define UV3H_SCRATCH5 0x2d0200UL 4550647128f1SMike Travis #define UV2H_SCRATCH5 0x2d0200UL 4551647128f1SMike Travis 4552647128f1SMike Travis /* UVH common defines*/ 4553647128f1SMike Travis #define UVH_SCRATCH5_SCRATCH5_SHFT 0 4554647128f1SMike Travis #define UVH_SCRATCH5_SCRATCH5_MASK 0xffffffffffffffffUL 4555647128f1SMike Travis 4556647128f1SMike Travis /* UVXH common defines */ 4557647128f1SMike Travis #define UVXH_SCRATCH5_SCRATCH5_SHFT 0 4558647128f1SMike Travis #define UVXH_SCRATCH5_SCRATCH5_MASK 0xffffffffffffffffUL 4559647128f1SMike Travis 4560647128f1SMike Travis /* UVYH common defines */ 4561647128f1SMike Travis #define UVYH_SCRATCH5_SCRATCH5_SHFT 0 4562647128f1SMike Travis #define UVYH_SCRATCH5_SCRATCH5_MASK 0xffffffffffffffffUL 4563647128f1SMike Travis 4564647128f1SMike Travis /* UV5 unique defines */ 4565647128f1SMike Travis #define UV5H_SCRATCH5_SCRATCH5_SHFT 0 4566647128f1SMike Travis #define UV5H_SCRATCH5_SCRATCH5_MASK 0xffffffffffffffffUL 4567647128f1SMike Travis 4568647128f1SMike Travis /* UV4 unique defines */ 4569647128f1SMike Travis #define UV4H_SCRATCH5_SCRATCH5_SHFT 0 4570647128f1SMike Travis #define UV4H_SCRATCH5_SCRATCH5_MASK 0xffffffffffffffffUL 4571647128f1SMike Travis 4572647128f1SMike Travis /* UV3 unique defines */ 4573647128f1SMike Travis #define UV3H_SCRATCH5_SCRATCH5_SHFT 0 4574647128f1SMike Travis #define UV3H_SCRATCH5_SCRATCH5_MASK 0xffffffffffffffffUL 4575647128f1SMike Travis 4576647128f1SMike Travis /* UV2 unique defines */ 4577647128f1SMike Travis #define UV2H_SCRATCH5_SCRATCH5_SHFT 0 4578647128f1SMike Travis #define UV2H_SCRATCH5_SCRATCH5_MASK 0xffffffffffffffffUL 4579647128f1SMike Travis 4580647128f1SMike Travis 4581647128f1SMike Travis union uvh_scratch5_u { 4582647128f1SMike Travis unsigned long v; 4583647128f1SMike Travis 4584647128f1SMike Travis /* UVH common struct */ 4585647128f1SMike Travis struct uvh_scratch5_s { 4586647128f1SMike Travis unsigned long scratch5:64; /* RW */ 4587647128f1SMike Travis } s; 4588647128f1SMike Travis 4589647128f1SMike Travis /* UVXH common struct */ 4590647128f1SMike Travis struct uvxh_scratch5_s { 4591647128f1SMike Travis unsigned long scratch5:64; /* RW */ 4592647128f1SMike Travis } sx; 4593647128f1SMike Travis 4594647128f1SMike Travis /* UVYH common struct */ 4595647128f1SMike Travis struct uvyh_scratch5_s { 4596647128f1SMike Travis unsigned long scratch5:64; /* RW */ 4597647128f1SMike Travis } sy; 4598647128f1SMike Travis 4599647128f1SMike Travis /* UV5 unique struct */ 4600647128f1SMike Travis struct uv5h_scratch5_s { 4601647128f1SMike Travis unsigned long scratch5:64; /* RW */ 4602647128f1SMike Travis } s5; 4603647128f1SMike Travis 4604647128f1SMike Travis /* UV4 unique struct */ 4605647128f1SMike Travis struct uv4h_scratch5_s { 4606647128f1SMike Travis unsigned long scratch5:64; /* RW */ 4607647128f1SMike Travis } s4; 4608647128f1SMike Travis 4609647128f1SMike Travis /* UV3 unique struct */ 4610647128f1SMike Travis struct uv3h_scratch5_s { 4611647128f1SMike Travis unsigned long scratch5:64; /* RW */ 4612647128f1SMike Travis } s3; 4613647128f1SMike Travis 4614647128f1SMike Travis /* UV2 unique struct */ 4615647128f1SMike Travis struct uv2h_scratch5_s { 4616647128f1SMike Travis unsigned long scratch5:64; /* RW */ 4617647128f1SMike Travis } s2; 4618647128f1SMike Travis }; 4619647128f1SMike Travis 4620647128f1SMike Travis /* ========================================================================= */ 4621647128f1SMike Travis /* UVH_SCRATCH5_ALIAS */ 4622647128f1SMike Travis /* ========================================================================= */ 4623647128f1SMike Travis #define UVH_SCRATCH5_ALIAS ( \ 4624647128f1SMike Travis is_uv(UV5) ? 0xb0208UL : \ 4625647128f1SMike Travis is_uv(UV4) ? 0xb0208UL : \ 4626647128f1SMike Travis is_uv(UV3) ? 0x2d0208UL : \ 4627647128f1SMike Travis is_uv(UV2) ? 0x2d0208UL : \ 4628647128f1SMike Travis 0) 4629647128f1SMike Travis #define UV5H_SCRATCH5_ALIAS 0xb0208UL 4630647128f1SMike Travis #define UV4H_SCRATCH5_ALIAS 0xb0208UL 4631647128f1SMike Travis #define UV3H_SCRATCH5_ALIAS 0x2d0208UL 4632647128f1SMike Travis #define UV2H_SCRATCH5_ALIAS 0x2d0208UL 4633647128f1SMike Travis 4634647128f1SMike Travis 4635647128f1SMike Travis /* ========================================================================= */ 4636647128f1SMike Travis /* UVH_SCRATCH5_ALIAS_2 */ 4637647128f1SMike Travis /* ========================================================================= */ 4638647128f1SMike Travis #define UVH_SCRATCH5_ALIAS_2 ( \ 4639647128f1SMike Travis is_uv(UV5) ? 0xb0210UL : \ 4640647128f1SMike Travis is_uv(UV4) ? 0xb0210UL : \ 4641647128f1SMike Travis is_uv(UV3) ? 0x2d0210UL : \ 4642647128f1SMike Travis is_uv(UV2) ? 0x2d0210UL : \ 4643647128f1SMike Travis 0) 4644647128f1SMike Travis #define UV5H_SCRATCH5_ALIAS_2 0xb0210UL 4645647128f1SMike Travis #define UV4H_SCRATCH5_ALIAS_2 0xb0210UL 4646647128f1SMike Travis #define UV3H_SCRATCH5_ALIAS_2 0x2d0210UL 4647647128f1SMike Travis #define UV2H_SCRATCH5_ALIAS_2 0x2d0210UL 4648647128f1SMike Travis 4649647128f1SMike Travis 46502a919596SJack Steiner 465155ba4120SJack Steiner #endif /* _ASM_X86_UV_UV_MMRS_H */ 4652