1 /* SPDX-License-Identifier: GPL-2.0-or-later */ 2 #ifndef _ASM_X86_UV_BIOS_H 3 #define _ASM_X86_UV_BIOS_H 4 5 /* 6 * UV BIOS layer definitions. 7 * 8 * (C) Copyright 2020 Hewlett Packard Enterprise Development LP 9 * Copyright (C) 2007-2017 Silicon Graphics, Inc. All rights reserved. 10 * Copyright (c) Russ Anderson <rja@sgi.com> 11 */ 12 13 #include <linux/rtc.h> 14 15 /* 16 * Values for the BIOS calls. It is passed as the first * argument in the 17 * BIOS call. Passing any other value in the first argument will result 18 * in a BIOS_STATUS_UNIMPLEMENTED return status. 19 */ 20 enum uv_bios_cmd { 21 UV_BIOS_COMMON, 22 UV_BIOS_GET_SN_INFO, 23 UV_BIOS_FREQ_BASE, 24 UV_BIOS_WATCHLIST_ALLOC, 25 UV_BIOS_WATCHLIST_FREE, 26 UV_BIOS_MEMPROTECT, 27 UV_BIOS_GET_PARTITION_ADDR, 28 UV_BIOS_SET_LEGACY_VGA_TARGET 29 }; 30 31 /* 32 * Status values returned from a BIOS call. 33 */ 34 enum { 35 BIOS_STATUS_MORE_PASSES = 1, 36 BIOS_STATUS_SUCCESS = 0, 37 BIOS_STATUS_UNIMPLEMENTED = -ENOSYS, 38 BIOS_STATUS_EINVAL = -EINVAL, 39 BIOS_STATUS_UNAVAIL = -EBUSY, 40 BIOS_STATUS_ABORT = -EINTR, 41 }; 42 43 /* Address map parameters */ 44 struct uv_gam_parameters { 45 u64 mmr_base; 46 u64 gru_base; 47 u8 mmr_shift; /* Convert PNode to MMR space offset */ 48 u8 gru_shift; /* Convert PNode to GRU space offset */ 49 u8 gpa_shift; /* Size of offset field in GRU phys addr */ 50 u8 unused1; 51 }; 52 53 /* UV_TABLE_GAM_RANGE_ENTRY values */ 54 #define UV_GAM_RANGE_TYPE_UNUSED 0 /* End of table */ 55 #define UV_GAM_RANGE_TYPE_RAM 1 /* Normal RAM */ 56 #define UV_GAM_RANGE_TYPE_NVRAM 2 /* Non-volatile memory */ 57 #define UV_GAM_RANGE_TYPE_NV_WINDOW 3 /* NVMDIMM block window */ 58 #define UV_GAM_RANGE_TYPE_NV_MAILBOX 4 /* NVMDIMM mailbox */ 59 #define UV_GAM_RANGE_TYPE_HOLE 5 /* Unused address range */ 60 #define UV_GAM_RANGE_TYPE_MAX 6 61 62 /* The structure stores PA bits 56:26, for 64MB granularity */ 63 #define UV_GAM_RANGE_SHFT 26 /* 64MB */ 64 65 struct uv_gam_range_entry { 66 char type; /* Entry type: GAM_RANGE_TYPE_UNUSED, etc. */ 67 char unused1; 68 u16 nasid; /* HNasid */ 69 u16 sockid; /* Socket ID, high bits of APIC ID */ 70 u16 pnode; /* Index to MMR and GRU spaces */ 71 u32 unused2; 72 u32 limit; /* PA bits 56:26 (UV_GAM_RANGE_SHFT) */ 73 }; 74 75 #define UV_AT_SIZE 8 /* 7 character arch type + NULL char */ 76 struct uv_arch_type_entry { 77 char archtype[UV_AT_SIZE]; 78 }; 79 80 #define UV_SYSTAB_SIG "UVST" 81 #define UV_SYSTAB_VERSION_1 1 /* UV2/3 BIOS version */ 82 #define UV_SYSTAB_VERSION_UV4 0x400 /* UV4 BIOS base version */ 83 #define UV_SYSTAB_VERSION_UV4_1 0x401 /* + gpa_shift */ 84 #define UV_SYSTAB_VERSION_UV4_2 0x402 /* + TYPE_NVRAM/WINDOW/MBOX */ 85 #define UV_SYSTAB_VERSION_UV4_3 0x403 /* - GAM Range PXM Value */ 86 #define UV_SYSTAB_VERSION_UV4_LATEST UV_SYSTAB_VERSION_UV4_3 87 88 #define UV_SYSTAB_VERSION_UV5 0x500 /* UV5 GAM base version */ 89 #define UV_SYSTAB_VERSION_UV5_LATEST UV_SYSTAB_VERSION_UV5 90 91 #define UV_SYSTAB_TYPE_UNUSED 0 /* End of table (offset == 0) */ 92 #define UV_SYSTAB_TYPE_GAM_PARAMS 1 /* GAM PARAM conversions */ 93 #define UV_SYSTAB_TYPE_GAM_RNG_TBL 2 /* GAM entry table */ 94 #define UV_SYSTAB_TYPE_ARCH_TYPE 3 /* UV arch type */ 95 #define UV_SYSTAB_TYPE_MAX 4 96 97 /* 98 * The UV system table describes specific firmware 99 * capabilities available to the Linux kernel at runtime. 100 */ 101 struct uv_systab { 102 char signature[4]; /* must be UV_SYSTAB_SIG */ 103 u32 revision; /* distinguish different firmware revs */ 104 u64 function; /* BIOS runtime callback function ptr */ 105 u32 size; /* systab size (starting with _VERSION_UV4) */ 106 struct { 107 u32 type:8; /* type of entry */ 108 u32 offset:24; /* byte offset from struct start to entry */ 109 } entry[1]; /* additional entries follow */ 110 }; 111 extern struct uv_systab *uv_systab; 112 /* (... end of definitions from UV BIOS ...) */ 113 114 enum { 115 BIOS_FREQ_BASE_PLATFORM = 0, 116 BIOS_FREQ_BASE_INTERVAL_TIMER = 1, 117 BIOS_FREQ_BASE_REALTIME_CLOCK = 2 118 }; 119 120 union partition_info_u { 121 u64 val; 122 struct { 123 u64 hub_version : 8, 124 partition_id : 16, 125 coherence_id : 16, 126 region_size : 24; 127 }; 128 }; 129 130 enum uv_memprotect { 131 UV_MEMPROT_RESTRICT_ACCESS, 132 UV_MEMPROT_ALLOW_AMO, 133 UV_MEMPROT_ALLOW_RW 134 }; 135 136 extern s64 uv_bios_get_sn_info(int, int *, long *, long *, long *, long *); 137 extern s64 uv_bios_freq_base(u64, u64 *); 138 extern int uv_bios_mq_watchlist_alloc(unsigned long, unsigned int, 139 unsigned long *); 140 extern int uv_bios_mq_watchlist_free(int, int); 141 extern s64 uv_bios_change_memprotect(u64, u64, enum uv_memprotect); 142 extern s64 uv_bios_reserved_page_pa(u64, u64 *, u64 *, u64 *); 143 extern int uv_bios_set_legacy_vga_target(bool decode, int domain, int bus); 144 145 extern int uv_bios_init(void); 146 extern unsigned long get_uv_systab_phys(bool msg); 147 148 extern unsigned long sn_rtc_cycles_per_second; 149 extern int uv_type; 150 extern long sn_partition_id; 151 extern long sn_coherency_id; 152 extern long sn_region_size; 153 extern long system_serial_number; 154 155 extern struct kobject *sgi_uv_kobj; /* /sys/firmware/sgi_uv */ 156 157 /* 158 * EFI runtime lock; cf. firmware/efi/runtime-wrappers.c for details 159 */ 160 extern struct semaphore __efi_uv_runtime_lock; 161 162 #endif /* _ASM_X86_UV_BIOS_H */ 163