xref: /openbmc/linux/arch/x86/include/asm/uv/bios.h (revision 9a3c425c)
11a59d1b8SThomas Gleixner /* SPDX-License-Identifier: GPL-2.0-or-later */
205e4d316SH. Peter Anvin #ifndef _ASM_X86_UV_BIOS_H
305e4d316SH. Peter Anvin #define _ASM_X86_UV_BIOS_H
4bb898558SAl Viro 
5bb898558SAl Viro /*
6bb898558SAl Viro  * UV BIOS layer definitions.
7bb898558SAl Viro  *
87a6d94f0SMike Travis  * (C) Copyright 2020 Hewlett Packard Enterprise Development LP
91e61f5a9SMike Travis  * Copyright (C) 2007-2017 Silicon Graphics, Inc. All rights reserved.
10b76365a1SRuss Anderson  * Copyright (c) Russ Anderson <rja@sgi.com>
11bb898558SAl Viro  */
12bb898558SAl Viro 
13bb898558SAl Viro #include <linux/rtc.h>
14bb898558SAl Viro 
15bb898558SAl Viro /*
16bb898558SAl Viro  * Values for the BIOS calls.  It is passed as the first * argument in the
17bb898558SAl Viro  * BIOS call.  Passing any other value in the first argument will result
18bb898558SAl Viro  * in a BIOS_STATUS_UNIMPLEMENTED return status.
19bb898558SAl Viro  */
20bb898558SAl Viro enum uv_bios_cmd {
21bb898558SAl Viro 	UV_BIOS_COMMON,
22bb898558SAl Viro 	UV_BIOS_GET_SN_INFO,
2364ccf2f9SRuss Anderson 	UV_BIOS_FREQ_BASE,
2464ccf2f9SRuss Anderson 	UV_BIOS_WATCHLIST_ALLOC,
25e8929c8aSRuss Anderson 	UV_BIOS_WATCHLIST_FREE,
2623c35700SRuss Anderson 	UV_BIOS_MEMPROTECT,
27841582eaSMike Travis 	UV_BIOS_GET_PARTITION_ADDR,
28841582eaSMike Travis 	UV_BIOS_SET_LEGACY_VGA_TARGET
29bb898558SAl Viro };
30bb898558SAl Viro 
31*9a3c425cSJustin Ernst #define UV_BIOS_EXTRA			    0x10000
32*9a3c425cSJustin Ernst #define UV_BIOS_GET_PCI_TOPOLOGY	    0x10001
33*9a3c425cSJustin Ernst #define UV_BIOS_GET_GEOINFO		    0x10003
34*9a3c425cSJustin Ernst 
35*9a3c425cSJustin Ernst #define UV_BIOS_EXTRA_OP_MEM_COPYIN	    0x1000
36*9a3c425cSJustin Ernst #define UV_BIOS_EXTRA_OP_MEM_COPYOUT	    0x2000
37*9a3c425cSJustin Ernst #define UV_BIOS_EXTRA_OP_MASK		    0x0fff
38*9a3c425cSJustin Ernst #define UV_BIOS_EXTRA_GET_HEAPSIZE	    1
39*9a3c425cSJustin Ernst #define UV_BIOS_EXTRA_INSTALL_HEAP	    2
40*9a3c425cSJustin Ernst #define UV_BIOS_EXTRA_MASTER_NASID	    3
41*9a3c425cSJustin Ernst #define UV_BIOS_EXTRA_OBJECT_COUNT	    (10|UV_BIOS_EXTRA_OP_MEM_COPYOUT)
42*9a3c425cSJustin Ernst #define UV_BIOS_EXTRA_ENUM_OBJECTS	    (12|UV_BIOS_EXTRA_OP_MEM_COPYOUT)
43*9a3c425cSJustin Ernst #define UV_BIOS_EXTRA_ENUM_PORTS	    (13|UV_BIOS_EXTRA_OP_MEM_COPYOUT)
44*9a3c425cSJustin Ernst 
45bb898558SAl Viro /*
46bb898558SAl Viro  * Status values returned from a BIOS call.
47bb898558SAl Viro  */
48bb898558SAl Viro enum {
4923c35700SRuss Anderson 	BIOS_STATUS_MORE_PASSES		=  1,
50bb898558SAl Viro 	BIOS_STATUS_SUCCESS		=  0,
51bb898558SAl Viro 	BIOS_STATUS_UNIMPLEMENTED	= -ENOSYS,
52bb898558SAl Viro 	BIOS_STATUS_EINVAL		= -EINVAL,
53f331e766SHedi Berriche 	BIOS_STATUS_UNAVAIL		= -EBUSY,
54f331e766SHedi Berriche 	BIOS_STATUS_ABORT		= -EINTR,
55bb898558SAl Viro };
56bb898558SAl Viro 
57ef93bf80SMike Travis /* Address map parameters */
58ef93bf80SMike Travis struct uv_gam_parameters {
59ef93bf80SMike Travis 	u64	mmr_base;
60ef93bf80SMike Travis 	u64	gru_base;
61ef93bf80SMike Travis 	u8	mmr_shift;	/* Convert PNode to MMR space offset */
62ef93bf80SMike Travis 	u8	gru_shift;	/* Convert PNode to GRU space offset */
63ef93bf80SMike Travis 	u8	gpa_shift;	/* Size of offset field in GRU phys addr */
64ef93bf80SMike Travis 	u8	unused1;
65ef93bf80SMike Travis };
66ef93bf80SMike Travis 
67ef93bf80SMike Travis /* UV_TABLE_GAM_RANGE_ENTRY values */
68ef93bf80SMike Travis #define UV_GAM_RANGE_TYPE_UNUSED	0 /* End of table */
69ef93bf80SMike Travis #define UV_GAM_RANGE_TYPE_RAM		1 /* Normal RAM */
70ef93bf80SMike Travis #define UV_GAM_RANGE_TYPE_NVRAM		2 /* Non-volatile memory */
71ef93bf80SMike Travis #define UV_GAM_RANGE_TYPE_NV_WINDOW	3 /* NVMDIMM block window */
72ef93bf80SMike Travis #define UV_GAM_RANGE_TYPE_NV_MAILBOX	4 /* NVMDIMM mailbox */
73ef93bf80SMike Travis #define UV_GAM_RANGE_TYPE_HOLE		5 /* Unused address range */
74ef93bf80SMike Travis #define UV_GAM_RANGE_TYPE_MAX		6
75ef93bf80SMike Travis 
76ef93bf80SMike Travis /* The structure stores PA bits 56:26, for 64MB granularity */
77ef93bf80SMike Travis #define UV_GAM_RANGE_SHFT		26		/* 64MB */
78ef93bf80SMike Travis 
79ef93bf80SMike Travis struct uv_gam_range_entry {
80ef93bf80SMike Travis 	char	type;		/* Entry type: GAM_RANGE_TYPE_UNUSED, etc. */
81ef93bf80SMike Travis 	char	unused1;
82ef93bf80SMike Travis 	u16	nasid;		/* HNasid */
83ef93bf80SMike Travis 	u16	sockid;		/* Socket ID, high bits of APIC ID */
84ef93bf80SMike Travis 	u16	pnode;		/* Index to MMR and GRU spaces */
8522ac2bcaSMike Travis 	u32	unused2;
86ef93bf80SMike Travis 	u32	limit;		/* PA bits 56:26 (UV_GAM_RANGE_SHFT) */
87ef93bf80SMike Travis };
88ef93bf80SMike Travis 
891e61f5a9SMike Travis #define	UV_AT_SIZE	8	/* 7 character arch type + NULL char */
901e61f5a9SMike Travis struct uv_arch_type_entry {
911e61f5a9SMike Travis 	char	archtype[UV_AT_SIZE];
921e61f5a9SMike Travis };
931e61f5a9SMike Travis 
94ef93bf80SMike Travis #define	UV_SYSTAB_SIG			"UVST"
955d662537Ssteve.wahl@hpe.com #define	UV_SYSTAB_VERSION_1		1	/* UV2/3 BIOS version */
96ef93bf80SMike Travis #define	UV_SYSTAB_VERSION_UV4		0x400	/* UV4 BIOS base version */
97ef93bf80SMike Travis #define	UV_SYSTAB_VERSION_UV4_1		0x401	/* + gpa_shift */
98ef93bf80SMike Travis #define	UV_SYSTAB_VERSION_UV4_2		0x402	/* + TYPE_NVRAM/WINDOW/MBOX */
9922ac2bcaSMike Travis #define	UV_SYSTAB_VERSION_UV4_3		0x403	/* - GAM Range PXM Value */
10022ac2bcaSMike Travis #define	UV_SYSTAB_VERSION_UV4_LATEST	UV_SYSTAB_VERSION_UV4_3
101ef93bf80SMike Travis 
1021e61f5a9SMike Travis #define	UV_SYSTAB_VERSION_UV5		0x500	/* UV5 GAM base version */
1031e61f5a9SMike Travis #define	UV_SYSTAB_VERSION_UV5_LATEST	UV_SYSTAB_VERSION_UV5
1041e61f5a9SMike Travis 
105ef93bf80SMike Travis #define	UV_SYSTAB_TYPE_UNUSED		0	/* End of table (offset == 0) */
106ef93bf80SMike Travis #define	UV_SYSTAB_TYPE_GAM_PARAMS	1	/* GAM PARAM conversions */
107ef93bf80SMike Travis #define	UV_SYSTAB_TYPE_GAM_RNG_TBL	2	/* GAM entry table */
1081e61f5a9SMike Travis #define	UV_SYSTAB_TYPE_ARCH_TYPE	3	/* UV arch type */
1091e61f5a9SMike Travis #define	UV_SYSTAB_TYPE_MAX		4
110ef93bf80SMike Travis 
111bb898558SAl Viro /*
112bb898558SAl Viro  * The UV system table describes specific firmware
113bb898558SAl Viro  * capabilities available to the Linux kernel at runtime.
114bb898558SAl Viro  */
115bb898558SAl Viro struct uv_systab {
116ef93bf80SMike Travis 	char signature[4];	/* must be UV_SYSTAB_SIG */
117bb898558SAl Viro 	u32 revision;		/* distinguish different firmware revs */
118bb898558SAl Viro 	u64 function;		/* BIOS runtime callback function ptr */
119ef93bf80SMike Travis 	u32 size;		/* systab size (starting with _VERSION_UV4) */
120ef93bf80SMike Travis 	struct {
121ef93bf80SMike Travis 		u32 type:8;	/* type of entry */
122ef93bf80SMike Travis 		u32 offset:24;	/* byte offset from struct start to entry */
123ef93bf80SMike Travis 	} entry[1];		/* additional entries follow */
124bb898558SAl Viro };
125ef93bf80SMike Travis extern struct uv_systab *uv_systab;
126*9a3c425cSJustin Ernst 
127*9a3c425cSJustin Ernst #define UV_BIOS_MAXSTRING	      128
128*9a3c425cSJustin Ernst struct uv_bios_hub_info {
129*9a3c425cSJustin Ernst 	unsigned int id;
130*9a3c425cSJustin Ernst 	union {
131*9a3c425cSJustin Ernst 		struct {
132*9a3c425cSJustin Ernst 			unsigned long long this_part:1;
133*9a3c425cSJustin Ernst 			unsigned long long is_shared:1;
134*9a3c425cSJustin Ernst 			unsigned long long is_disabled:1;
135*9a3c425cSJustin Ernst 		} fields;
136*9a3c425cSJustin Ernst 		struct {
137*9a3c425cSJustin Ernst 			unsigned long long flags;
138*9a3c425cSJustin Ernst 			unsigned long long reserved;
139*9a3c425cSJustin Ernst 		} b;
140*9a3c425cSJustin Ernst 	} f;
141*9a3c425cSJustin Ernst 	char name[UV_BIOS_MAXSTRING];
142*9a3c425cSJustin Ernst 	char location[UV_BIOS_MAXSTRING];
143*9a3c425cSJustin Ernst 	unsigned int ports;
144*9a3c425cSJustin Ernst };
145*9a3c425cSJustin Ernst 
146*9a3c425cSJustin Ernst struct uv_bios_port_info {
147*9a3c425cSJustin Ernst 	unsigned int port;
148*9a3c425cSJustin Ernst 	unsigned int conn_id;
149*9a3c425cSJustin Ernst 	unsigned int conn_port;
150*9a3c425cSJustin Ernst };
151*9a3c425cSJustin Ernst 
152ef93bf80SMike Travis /* (... end of definitions from UV BIOS ...) */
153bb898558SAl Viro 
154bb898558SAl Viro enum {
155bb898558SAl Viro 	BIOS_FREQ_BASE_PLATFORM = 0,
156bb898558SAl Viro 	BIOS_FREQ_BASE_INTERVAL_TIMER = 1,
157bb898558SAl Viro 	BIOS_FREQ_BASE_REALTIME_CLOCK = 2
158bb898558SAl Viro };
159bb898558SAl Viro 
160bb898558SAl Viro union partition_info_u {
161bb898558SAl Viro 	u64	val;
162bb898558SAl Viro 	struct {
163bb898558SAl Viro 		u64	hub_version	:  8,
164bb898558SAl Viro 			partition_id	: 16,
165bb898558SAl Viro 			coherence_id	: 16,
166bb898558SAl Viro 			region_size	: 24;
167bb898558SAl Viro 	};
168bb898558SAl Viro };
169bb898558SAl Viro 
170e8929c8aSRuss Anderson enum uv_memprotect {
171e8929c8aSRuss Anderson 	UV_MEMPROT_RESTRICT_ACCESS,
172e8929c8aSRuss Anderson 	UV_MEMPROT_ALLOW_AMO,
173e8929c8aSRuss Anderson 	UV_MEMPROT_ALLOW_RW
174e8929c8aSRuss Anderson };
175e8929c8aSRuss Anderson 
176b76365a1SRuss Anderson extern s64 uv_bios_get_sn_info(int, int *, long *, long *, long *, long *);
177bb898558SAl Viro extern s64 uv_bios_freq_base(u64, u64 *);
178c2c9f115SRobin Holt extern int uv_bios_mq_watchlist_alloc(unsigned long, unsigned int,
17964ccf2f9SRuss Anderson 					unsigned long *);
18064ccf2f9SRuss Anderson extern int uv_bios_mq_watchlist_free(int, int);
181e8929c8aSRuss Anderson extern s64 uv_bios_change_memprotect(u64, u64, enum uv_memprotect);
18223c35700SRuss Anderson extern s64 uv_bios_reserved_page_pa(u64, u64 *, u64 *, u64 *);
183841582eaSMike Travis extern int uv_bios_set_legacy_vga_target(bool decode, int domain, int bus);
184bb898558SAl Viro 
185*9a3c425cSJustin Ernst extern s64 uv_bios_get_master_nasid(u64 sz, u64 *nasid);
186*9a3c425cSJustin Ernst extern s64 uv_bios_get_heapsize(u64 nasid, u64 sz, u64 *heap_sz);
187*9a3c425cSJustin Ernst extern s64 uv_bios_install_heap(u64 nasid, u64 sz, u64 *heap);
188*9a3c425cSJustin Ernst extern s64 uv_bios_obj_count(u64 nasid, u64 sz, u64 *objcnt);
189*9a3c425cSJustin Ernst extern s64 uv_bios_enum_objs(u64 nasid, u64 sz, u64 *objbuf);
190*9a3c425cSJustin Ernst extern s64 uv_bios_enum_ports(u64 nasid, u64 obj_id, u64 sz, u64 *portbuf);
191*9a3c425cSJustin Ernst extern s64 uv_bios_get_geoinfo(u64 nasid, u64 sz, u64 *geo);
192*9a3c425cSJustin Ernst extern s64 uv_bios_get_pci_topology(u64 sz, u64 *buf);
193*9a3c425cSJustin Ernst 
1949743cb68SMike Travis extern int uv_bios_init(void);
1951e61f5a9SMike Travis extern unsigned long get_uv_systab_phys(bool msg);
196bb898558SAl Viro 
19764ccf2f9SRuss Anderson extern unsigned long sn_rtc_cycles_per_second;
198bb898558SAl Viro extern int uv_type;
199bb898558SAl Viro extern long sn_partition_id;
2005292ae11SIngo Molnar extern long sn_coherency_id;
2015292ae11SIngo Molnar extern long sn_region_size;
202b76365a1SRuss Anderson extern long system_serial_number;
203bb898558SAl Viro 
204bb898558SAl Viro extern struct kobject *sgi_uv_kobj;	/* /sys/firmware/sgi_uv */
205bb898558SAl Viro 
206f331e766SHedi Berriche /*
207f331e766SHedi Berriche  * EFI runtime lock; cf. firmware/efi/runtime-wrappers.c for details
208f331e766SHedi Berriche  */
209f331e766SHedi Berriche extern struct semaphore __efi_uv_runtime_lock;
210f331e766SHedi Berriche 
21105e4d316SH. Peter Anvin #endif /* _ASM_X86_UV_BIOS_H */
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