1 /* SPDX-License-Identifier: GPL-2.0 */ 2 /* 3 * x86 TSC related functions 4 */ 5 #ifndef _ASM_X86_TSC_H 6 #define _ASM_X86_TSC_H 7 8 #include <asm/processor.h> 9 10 #define NS_SCALE 10 /* 2^10, carefully chosen */ 11 #define US_SCALE 32 /* 2^32, arbitralrily chosen */ 12 13 /* 14 * Standard way to access the cycle counter. 15 */ 16 typedef unsigned long long cycles_t; 17 18 extern unsigned int cpu_khz; 19 extern unsigned int tsc_khz; 20 21 extern void disable_TSC(void); 22 23 static inline cycles_t get_cycles(void) 24 { 25 #ifndef CONFIG_X86_TSC 26 if (!boot_cpu_has(X86_FEATURE_TSC)) 27 return 0; 28 #endif 29 30 return rdtsc(); 31 } 32 33 extern struct system_counterval_t convert_art_to_tsc(u64 art); 34 35 extern void tsc_init(void); 36 extern void mark_tsc_unstable(char *reason); 37 extern int unsynchronized_tsc(void); 38 extern int check_tsc_unstable(void); 39 extern unsigned long native_calibrate_cpu(void); 40 extern unsigned long native_calibrate_tsc(void); 41 extern unsigned long long native_sched_clock_from_tsc(u64 tsc); 42 43 extern int tsc_clocksource_reliable; 44 45 /* 46 * Boot-time check whether the TSCs are synchronized across 47 * all CPUs/cores: 48 */ 49 #ifdef CONFIG_X86_TSC 50 extern bool tsc_store_and_check_tsc_adjust(bool bootcpu); 51 extern void tsc_verify_tsc_adjust(bool resume); 52 extern void check_tsc_sync_source(int cpu); 53 extern void check_tsc_sync_target(void); 54 #else 55 static inline bool tsc_store_and_check_tsc_adjust(bool bootcpu) { return false; } 56 static inline void tsc_verify_tsc_adjust(bool resume) { } 57 static inline void check_tsc_sync_source(int cpu) { } 58 static inline void check_tsc_sync_target(void) { } 59 #endif 60 61 extern int notsc_setup(char *); 62 extern void tsc_save_sched_clock_state(void); 63 extern void tsc_restore_sched_clock_state(void); 64 65 unsigned long cpu_khz_from_msr(void); 66 67 #endif /* _ASM_X86_TSC_H */ 68