1 #ifndef _ASM_X86_TLB_H 2 #define _ASM_X86_TLB_H 3 4 #define tlb_start_vma(tlb, vma) do { } while (0) 5 #define tlb_end_vma(tlb, vma) do { } while (0) 6 #define __tlb_remove_tlb_entry(tlb, ptep, address) do { } while (0) 7 8 #define tlb_flush(tlb) \ 9 { \ 10 if (!tlb->fullmm && !tlb->need_flush_all) \ 11 flush_tlb_mm_range(tlb->mm, tlb->start, tlb->end, 0UL); \ 12 else \ 13 flush_tlb_mm_range(tlb->mm, 0UL, TLB_FLUSH_ALL, 0UL); \ 14 } 15 16 #include <asm-generic/tlb.h> 17 18 /* 19 * While x86 architecture in general requires an IPI to perform TLB 20 * shootdown, enablement code for several hypervisors overrides 21 * .flush_tlb_others hook in pv_mmu_ops and implements it by issuing 22 * a hypercall. To keep software pagetable walkers safe in this case we 23 * switch to RCU based table free (HAVE_RCU_TABLE_FREE). See the comment 24 * below 'ifdef CONFIG_HAVE_RCU_TABLE_FREE' in include/asm-generic/tlb.h 25 * for more details. 26 */ 27 static inline void __tlb_remove_table(void *table) 28 { 29 free_page_and_swap_cache(table); 30 } 31 32 #endif /* _ASM_X86_TLB_H */ 33