xref: /openbmc/linux/arch/x86/include/asm/thread_info.h (revision 52cdded0)
1 /* SPDX-License-Identifier: GPL-2.0 */
2 /* thread_info.h: low-level thread information
3  *
4  * Copyright (C) 2002  David Howells (dhowells@redhat.com)
5  * - Incorporating suggestions made by Linus Torvalds and Dave Miller
6  */
7 
8 #ifndef _ASM_X86_THREAD_INFO_H
9 #define _ASM_X86_THREAD_INFO_H
10 
11 #include <linux/compiler.h>
12 #include <asm/page.h>
13 #include <asm/percpu.h>
14 #include <asm/types.h>
15 
16 /*
17  * TOP_OF_KERNEL_STACK_PADDING is a number of unused bytes that we
18  * reserve at the top of the kernel stack.  We do it because of a nasty
19  * 32-bit corner case.  On x86_32, the hardware stack frame is
20  * variable-length.  Except for vm86 mode, struct pt_regs assumes a
21  * maximum-length frame.  If we enter from CPL 0, the top 8 bytes of
22  * pt_regs don't actually exist.  Ordinarily this doesn't matter, but it
23  * does in at least one case:
24  *
25  * If we take an NMI early enough in SYSENTER, then we can end up with
26  * pt_regs that extends above sp0.  On the way out, in the espfix code,
27  * we can read the saved SS value, but that value will be above sp0.
28  * Without this offset, that can result in a page fault.  (We are
29  * careful that, in this case, the value we read doesn't matter.)
30  *
31  * In vm86 mode, the hardware frame is much longer still, so add 16
32  * bytes to make room for the real-mode segments.
33  *
34  * x86_64 has a fixed-length stack frame.
35  */
36 #ifdef CONFIG_X86_32
37 # ifdef CONFIG_VM86
38 #  define TOP_OF_KERNEL_STACK_PADDING 16
39 # else
40 #  define TOP_OF_KERNEL_STACK_PADDING 8
41 # endif
42 #else
43 # define TOP_OF_KERNEL_STACK_PADDING 0
44 #endif
45 
46 /*
47  * low level task data that entry.S needs immediate access to
48  * - this struct should fit entirely inside of one cache line
49  * - this struct shares the supervisor stack pages
50  */
51 #ifndef __ASSEMBLY__
52 struct task_struct;
53 #include <asm/cpufeature.h>
54 #include <linux/atomic.h>
55 
56 struct thread_info {
57 	unsigned long		flags;		/* low level flags */
58 	u32			status;		/* thread synchronous flags */
59 };
60 
61 #define INIT_THREAD_INFO(tsk)			\
62 {						\
63 	.flags		= 0,			\
64 }
65 
66 #else /* !__ASSEMBLY__ */
67 
68 #include <asm/asm-offsets.h>
69 
70 #endif
71 
72 /*
73  * thread information flags
74  * - these are process state flags that various assembly files
75  *   may need to access
76  */
77 #define TIF_SYSCALL_TRACE	0	/* syscall trace active */
78 #define TIF_NOTIFY_RESUME	1	/* callback before returning to user */
79 #define TIF_SIGPENDING		2	/* signal pending */
80 #define TIF_NEED_RESCHED	3	/* rescheduling necessary */
81 #define TIF_SINGLESTEP		4	/* reenable singlestep on user return*/
82 #define TIF_SSBD		5	/* Speculative store bypass disable */
83 #define TIF_SYSCALL_EMU		6	/* syscall emulation active */
84 #define TIF_SYSCALL_AUDIT	7	/* syscall auditing active */
85 #define TIF_SECCOMP		8	/* secure computing */
86 #define TIF_SPEC_IB		9	/* Indirect branch speculation mitigation */
87 #define TIF_SPEC_FORCE_UPDATE	10	/* Force speculation MSR update in context switch */
88 #define TIF_USER_RETURN_NOTIFY	11	/* notify kernel of userspace return */
89 #define TIF_UPROBE		12	/* breakpointed or singlestepping */
90 #define TIF_PATCH_PENDING	13	/* pending live patching update */
91 #define TIF_NEED_FPU_LOAD	14	/* load FPU on return to userspace */
92 #define TIF_NOCPUID		15	/* CPUID is not accessible in userland */
93 #define TIF_NOTSC		16	/* TSC is not accessible in userland */
94 #define TIF_IA32		17	/* IA32 compatibility process */
95 #define TIF_SLD			18	/* Restore split lock detection on context switch */
96 #define TIF_MEMDIE		20	/* is terminating due to OOM killer */
97 #define TIF_POLLING_NRFLAG	21	/* idle is polling for TIF_NEED_RESCHED */
98 #define TIF_IO_BITMAP		22	/* uses I/O bitmap */
99 #define TIF_FORCED_TF		24	/* true if TF in eflags artificially */
100 #define TIF_BLOCKSTEP		25	/* set when we want DEBUGCTLMSR_BTF */
101 #define TIF_LAZY_MMU_UPDATES	27	/* task is updating the mmu lazily */
102 #define TIF_SYSCALL_TRACEPOINT	28	/* syscall tracepoint instrumentation */
103 #define TIF_ADDR32		29	/* 32-bit address space on 64 bits */
104 #define TIF_X32			30	/* 32-bit native x86-64 binary */
105 #define TIF_FSCHECK		31	/* Check FS is USER_DS on return */
106 
107 #define _TIF_SYSCALL_TRACE	(1 << TIF_SYSCALL_TRACE)
108 #define _TIF_NOTIFY_RESUME	(1 << TIF_NOTIFY_RESUME)
109 #define _TIF_SIGPENDING		(1 << TIF_SIGPENDING)
110 #define _TIF_NEED_RESCHED	(1 << TIF_NEED_RESCHED)
111 #define _TIF_SINGLESTEP		(1 << TIF_SINGLESTEP)
112 #define _TIF_SSBD		(1 << TIF_SSBD)
113 #define _TIF_SYSCALL_EMU	(1 << TIF_SYSCALL_EMU)
114 #define _TIF_SYSCALL_AUDIT	(1 << TIF_SYSCALL_AUDIT)
115 #define _TIF_SECCOMP		(1 << TIF_SECCOMP)
116 #define _TIF_SPEC_IB		(1 << TIF_SPEC_IB)
117 #define _TIF_SPEC_FORCE_UPDATE	(1 << TIF_SPEC_FORCE_UPDATE)
118 #define _TIF_USER_RETURN_NOTIFY	(1 << TIF_USER_RETURN_NOTIFY)
119 #define _TIF_UPROBE		(1 << TIF_UPROBE)
120 #define _TIF_PATCH_PENDING	(1 << TIF_PATCH_PENDING)
121 #define _TIF_NEED_FPU_LOAD	(1 << TIF_NEED_FPU_LOAD)
122 #define _TIF_NOCPUID		(1 << TIF_NOCPUID)
123 #define _TIF_NOTSC		(1 << TIF_NOTSC)
124 #define _TIF_IA32		(1 << TIF_IA32)
125 #define _TIF_SLD		(1 << TIF_SLD)
126 #define _TIF_POLLING_NRFLAG	(1 << TIF_POLLING_NRFLAG)
127 #define _TIF_IO_BITMAP		(1 << TIF_IO_BITMAP)
128 #define _TIF_FORCED_TF		(1 << TIF_FORCED_TF)
129 #define _TIF_BLOCKSTEP		(1 << TIF_BLOCKSTEP)
130 #define _TIF_LAZY_MMU_UPDATES	(1 << TIF_LAZY_MMU_UPDATES)
131 #define _TIF_SYSCALL_TRACEPOINT	(1 << TIF_SYSCALL_TRACEPOINT)
132 #define _TIF_ADDR32		(1 << TIF_ADDR32)
133 #define _TIF_X32		(1 << TIF_X32)
134 #define _TIF_FSCHECK		(1 << TIF_FSCHECK)
135 
136 /* flags to check in __switch_to() */
137 #define _TIF_WORK_CTXSW_BASE					\
138 	(_TIF_NOCPUID | _TIF_NOTSC | _TIF_BLOCKSTEP |		\
139 	 _TIF_SSBD | _TIF_SPEC_FORCE_UPDATE | _TIF_SLD)
140 
141 /*
142  * Avoid calls to __switch_to_xtra() on UP as STIBP is not evaluated.
143  */
144 #ifdef CONFIG_SMP
145 # define _TIF_WORK_CTXSW	(_TIF_WORK_CTXSW_BASE | _TIF_SPEC_IB)
146 #else
147 # define _TIF_WORK_CTXSW	(_TIF_WORK_CTXSW_BASE)
148 #endif
149 
150 #ifdef CONFIG_X86_IOPL_IOPERM
151 # define _TIF_WORK_CTXSW_PREV	(_TIF_WORK_CTXSW| _TIF_USER_RETURN_NOTIFY | \
152 				 _TIF_IO_BITMAP)
153 #else
154 # define _TIF_WORK_CTXSW_PREV	(_TIF_WORK_CTXSW| _TIF_USER_RETURN_NOTIFY)
155 #endif
156 
157 #define _TIF_WORK_CTXSW_NEXT	(_TIF_WORK_CTXSW)
158 
159 #define STACK_WARN		(THREAD_SIZE/8)
160 
161 /*
162  * macros/functions for gaining access to the thread information structure
163  *
164  * preempt_count needs to be 1 initially, until the scheduler is functional.
165  */
166 #ifndef __ASSEMBLY__
167 
168 /*
169  * Walks up the stack frames to make sure that the specified object is
170  * entirely contained by a single stack frame.
171  *
172  * Returns:
173  *	GOOD_FRAME	if within a frame
174  *	BAD_STACK	if placed across a frame boundary (or outside stack)
175  *	NOT_STACK	unable to determine (no frame pointers, etc)
176  */
177 static inline int arch_within_stack_frames(const void * const stack,
178 					   const void * const stackend,
179 					   const void *obj, unsigned long len)
180 {
181 #if defined(CONFIG_FRAME_POINTER)
182 	const void *frame = NULL;
183 	const void *oldframe;
184 
185 	oldframe = __builtin_frame_address(1);
186 	if (oldframe)
187 		frame = __builtin_frame_address(2);
188 	/*
189 	 * low ----------------------------------------------> high
190 	 * [saved bp][saved ip][args][local vars][saved bp][saved ip]
191 	 *                     ^----------------^
192 	 *               allow copies only within here
193 	 */
194 	while (stack <= frame && frame < stackend) {
195 		/*
196 		 * If obj + len extends past the last frame, this
197 		 * check won't pass and the next frame will be 0,
198 		 * causing us to bail out and correctly report
199 		 * the copy as invalid.
200 		 */
201 		if (obj + len <= frame)
202 			return obj >= oldframe + 2 * sizeof(void *) ?
203 				GOOD_FRAME : BAD_STACK;
204 		oldframe = frame;
205 		frame = *(const void * const *)frame;
206 	}
207 	return BAD_STACK;
208 #else
209 	return NOT_STACK;
210 #endif
211 }
212 
213 #else /* !__ASSEMBLY__ */
214 
215 #ifdef CONFIG_X86_64
216 # define cpu_current_top_of_stack (cpu_tss_rw + TSS_sp1)
217 #endif
218 
219 #endif
220 
221 #ifdef CONFIG_COMPAT
222 #define TS_I386_REGS_POKED	0x0004	/* regs poked by 32-bit ptracer */
223 #endif
224 #ifndef __ASSEMBLY__
225 
226 #ifdef CONFIG_X86_32
227 #define in_ia32_syscall() true
228 #else
229 #define in_ia32_syscall() (IS_ENABLED(CONFIG_IA32_EMULATION) && \
230 			   current_thread_info()->status & TS_COMPAT)
231 #endif
232 
233 extern void arch_task_cache_init(void);
234 extern int arch_dup_task_struct(struct task_struct *dst, struct task_struct *src);
235 extern void arch_release_task_struct(struct task_struct *tsk);
236 extern void arch_setup_new_exec(void);
237 #define arch_setup_new_exec arch_setup_new_exec
238 #endif	/* !__ASSEMBLY__ */
239 
240 #endif /* _ASM_X86_THREAD_INFO_H */
241