11965aae3SH. Peter Anvin #ifndef _ASM_X86_SPINLOCK_H 21965aae3SH. Peter Anvin #define _ASM_X86_SPINLOCK_H 3bb898558SAl Viro 460063497SArun Sharma #include <linux/atomic.h> 5bb898558SAl Viro #include <asm/page.h> 6bb898558SAl Viro #include <asm/processor.h> 7bb898558SAl Viro #include <linux/compiler.h> 8bb898558SAl Viro #include <asm/paravirt.h> 9bb898558SAl Viro /* 10bb898558SAl Viro * Your basic SMP spinlocks, allowing only a single CPU anywhere 11bb898558SAl Viro * 12bb898558SAl Viro * Simple spin lock operations. There are two variants, one clears IRQ's 13bb898558SAl Viro * on the local processor, one does not. 14bb898558SAl Viro * 1583be4ffaSRichard Weinberger * These are fair FIFO ticket locks, which support up to 2^16 CPUs. 16bb898558SAl Viro * 17bb898558SAl Viro * (the type definitions are in asm/spinlock_types.h) 18bb898558SAl Viro */ 19bb898558SAl Viro 20bb898558SAl Viro #ifdef CONFIG_X86_32 21bb898558SAl Viro # define LOCK_PTR_REG "a" 22bb898558SAl Viro #else 23bb898558SAl Viro # define LOCK_PTR_REG "D" 24bb898558SAl Viro #endif 25bb898558SAl Viro 26bb898558SAl Viro #if defined(CONFIG_X86_32) && \ 27bb898558SAl Viro (defined(CONFIG_X86_OOSTORE) || defined(CONFIG_X86_PPRO_FENCE)) 28bb898558SAl Viro /* 29bb898558SAl Viro * On PPro SMP or if we are using OOSTORE, we use a locked operation to unlock 30bb898558SAl Viro * (PPro errata 66, 92) 31bb898558SAl Viro */ 32bb898558SAl Viro # define UNLOCK_LOCK_PREFIX LOCK_PREFIX 33bb898558SAl Viro #else 34bb898558SAl Viro # define UNLOCK_LOCK_PREFIX 35bb898558SAl Viro #endif 36bb898558SAl Viro 37bb898558SAl Viro /* 38bb898558SAl Viro * Ticket locks are conceptually two parts, one indicating the current head of 39bb898558SAl Viro * the queue, and the other indicating the current tail. The lock is acquired 40bb898558SAl Viro * by atomically noting the tail and incrementing it by one (thus adding 41bb898558SAl Viro * ourself to the queue and noting our position), then waiting until the head 42bb898558SAl Viro * becomes equal to the the initial value of the tail. 43bb898558SAl Viro * 44bb898558SAl Viro * We use an xadd covering *both* parts of the lock, to increment the tail and 45bb898558SAl Viro * also load the position of the head, which takes care of memory ordering 46bb898558SAl Viro * issues and should be optimal for the uncontended case. Note the tail must be 47bb898558SAl Viro * in the high part, because a wide xadd increment of the low part would carry 48bb898558SAl Viro * up and contaminate the high part. 49bb898558SAl Viro */ 50445c8951SThomas Gleixner static __always_inline void __ticket_spin_lock(arch_spinlock_t *lock) 51bb898558SAl Viro { 522994488fSJeremy Fitzhardinge register struct __raw_tickets inc = { .tail = 1 }; 53bb898558SAl Viro 542994488fSJeremy Fitzhardinge inc = xadd(&lock->tickets, inc); 55c576a3eaSJeremy Fitzhardinge 56c576a3eaSJeremy Fitzhardinge for (;;) { 572994488fSJeremy Fitzhardinge if (inc.head == inc.tail) 58c576a3eaSJeremy Fitzhardinge break; 59c576a3eaSJeremy Fitzhardinge cpu_relax(); 602994488fSJeremy Fitzhardinge inc.head = ACCESS_ONCE(lock->tickets.head); 61c576a3eaSJeremy Fitzhardinge } 62c576a3eaSJeremy Fitzhardinge barrier(); /* make sure nothing creeps before the lock is taken */ 63bb898558SAl Viro } 64bb898558SAl Viro 65445c8951SThomas Gleixner static __always_inline int __ticket_spin_trylock(arch_spinlock_t *lock) 66bb898558SAl Viro { 67229855d6SJeremy Fitzhardinge arch_spinlock_t old, new; 68bb898558SAl Viro 69229855d6SJeremy Fitzhardinge old.tickets = ACCESS_ONCE(lock->tickets); 70229855d6SJeremy Fitzhardinge if (old.tickets.head != old.tickets.tail) 71229855d6SJeremy Fitzhardinge return 0; 72bb898558SAl Viro 73229855d6SJeremy Fitzhardinge new.head_tail = old.head_tail + (1 << TICKET_SHIFT); 74229855d6SJeremy Fitzhardinge 75229855d6SJeremy Fitzhardinge /* cmpxchg is a full barrier, so nothing can move before it */ 76229855d6SJeremy Fitzhardinge return cmpxchg(&lock->head_tail, old.head_tail, new.head_tail) == old.head_tail; 77bb898558SAl Viro } 78bb898558SAl Viro 79445c8951SThomas Gleixner static __always_inline void __ticket_spin_unlock(arch_spinlock_t *lock) 80bb898558SAl Viro { 813d94ae0cSJeremy Fitzhardinge __add(&lock->tickets.head, 1, UNLOCK_LOCK_PREFIX); 82bb898558SAl Viro } 83bb898558SAl Viro 84445c8951SThomas Gleixner static inline int __ticket_spin_is_locked(arch_spinlock_t *lock) 85bb898558SAl Viro { 8684eb950dSJeremy Fitzhardinge struct __raw_tickets tmp = ACCESS_ONCE(lock->tickets); 87bb898558SAl Viro 887931d493SJan Beulich return tmp.tail != tmp.head; 89bb898558SAl Viro } 90bb898558SAl Viro 91445c8951SThomas Gleixner static inline int __ticket_spin_is_contended(arch_spinlock_t *lock) 92bb898558SAl Viro { 9384eb950dSJeremy Fitzhardinge struct __raw_tickets tmp = ACCESS_ONCE(lock->tickets); 94bb898558SAl Viro 957931d493SJan Beulich return (__ticket_t)(tmp.tail - tmp.head) > 1; 96bb898558SAl Viro } 97bb898558SAl Viro 98b4ecc126SJeremy Fitzhardinge #ifndef CONFIG_PARAVIRT_SPINLOCKS 99bb898558SAl Viro 1000199c4e6SThomas Gleixner static inline int arch_spin_is_locked(arch_spinlock_t *lock) 101bb898558SAl Viro { 102bb898558SAl Viro return __ticket_spin_is_locked(lock); 103bb898558SAl Viro } 104bb898558SAl Viro 1050199c4e6SThomas Gleixner static inline int arch_spin_is_contended(arch_spinlock_t *lock) 106bb898558SAl Viro { 107bb898558SAl Viro return __ticket_spin_is_contended(lock); 108bb898558SAl Viro } 1090199c4e6SThomas Gleixner #define arch_spin_is_contended arch_spin_is_contended 110bb898558SAl Viro 1110199c4e6SThomas Gleixner static __always_inline void arch_spin_lock(arch_spinlock_t *lock) 112bb898558SAl Viro { 113bb898558SAl Viro __ticket_spin_lock(lock); 114bb898558SAl Viro } 115bb898558SAl Viro 1160199c4e6SThomas Gleixner static __always_inline int arch_spin_trylock(arch_spinlock_t *lock) 117bb898558SAl Viro { 118bb898558SAl Viro return __ticket_spin_trylock(lock); 119bb898558SAl Viro } 120bb898558SAl Viro 1210199c4e6SThomas Gleixner static __always_inline void arch_spin_unlock(arch_spinlock_t *lock) 122bb898558SAl Viro { 123bb898558SAl Viro __ticket_spin_unlock(lock); 124bb898558SAl Viro } 125bb898558SAl Viro 1260199c4e6SThomas Gleixner static __always_inline void arch_spin_lock_flags(arch_spinlock_t *lock, 127bb898558SAl Viro unsigned long flags) 128bb898558SAl Viro { 1290199c4e6SThomas Gleixner arch_spin_lock(lock); 130bb898558SAl Viro } 131bb898558SAl Viro 132b4ecc126SJeremy Fitzhardinge #endif /* CONFIG_PARAVIRT_SPINLOCKS */ 133bb898558SAl Viro 1340199c4e6SThomas Gleixner static inline void arch_spin_unlock_wait(arch_spinlock_t *lock) 135bb898558SAl Viro { 1360199c4e6SThomas Gleixner while (arch_spin_is_locked(lock)) 137bb898558SAl Viro cpu_relax(); 138bb898558SAl Viro } 139bb898558SAl Viro 140bb898558SAl Viro /* 141bb898558SAl Viro * Read-write spinlocks, allowing multiple readers 142bb898558SAl Viro * but only one writer. 143bb898558SAl Viro * 144bb898558SAl Viro * NOTE! it is quite common to have readers in interrupts 145bb898558SAl Viro * but no interrupt writers. For those circumstances we 146bb898558SAl Viro * can "mix" irq-safe locks - any writer needs to get a 147bb898558SAl Viro * irq-safe write-lock, but readers can get non-irqsafe 148bb898558SAl Viro * read-locks. 149bb898558SAl Viro * 150bb898558SAl Viro * On x86, we implement read-write locks as a 32-bit counter 151bb898558SAl Viro * with the high bit (sign) being the "contended" bit. 152bb898558SAl Viro */ 153bb898558SAl Viro 154bb898558SAl Viro /** 155bb898558SAl Viro * read_can_lock - would read_trylock() succeed? 156bb898558SAl Viro * @lock: the rwlock in question. 157bb898558SAl Viro */ 158e5931943SThomas Gleixner static inline int arch_read_can_lock(arch_rwlock_t *lock) 159bb898558SAl Viro { 160a750036fSJan Beulich return lock->lock > 0; 161bb898558SAl Viro } 162bb898558SAl Viro 163bb898558SAl Viro /** 164bb898558SAl Viro * write_can_lock - would write_trylock() succeed? 165bb898558SAl Viro * @lock: the rwlock in question. 166bb898558SAl Viro */ 167e5931943SThomas Gleixner static inline int arch_write_can_lock(arch_rwlock_t *lock) 168bb898558SAl Viro { 169a750036fSJan Beulich return lock->write == WRITE_LOCK_CMP; 170bb898558SAl Viro } 171bb898558SAl Viro 172e5931943SThomas Gleixner static inline void arch_read_lock(arch_rwlock_t *rw) 173bb898558SAl Viro { 174a750036fSJan Beulich asm volatile(LOCK_PREFIX READ_LOCK_SIZE(dec) " (%0)\n\t" 175bb898558SAl Viro "jns 1f\n" 176bb898558SAl Viro "call __read_lock_failed\n\t" 177bb898558SAl Viro "1:\n" 178bb898558SAl Viro ::LOCK_PTR_REG (rw) : "memory"); 179bb898558SAl Viro } 180bb898558SAl Viro 181e5931943SThomas Gleixner static inline void arch_write_lock(arch_rwlock_t *rw) 182bb898558SAl Viro { 183a750036fSJan Beulich asm volatile(LOCK_PREFIX WRITE_LOCK_SUB(%1) "(%0)\n\t" 184bb898558SAl Viro "jz 1f\n" 185bb898558SAl Viro "call __write_lock_failed\n\t" 186bb898558SAl Viro "1:\n" 187a750036fSJan Beulich ::LOCK_PTR_REG (&rw->write), "i" (RW_LOCK_BIAS) 188a750036fSJan Beulich : "memory"); 189bb898558SAl Viro } 190bb898558SAl Viro 191e5931943SThomas Gleixner static inline int arch_read_trylock(arch_rwlock_t *lock) 192bb898558SAl Viro { 193a750036fSJan Beulich READ_LOCK_ATOMIC(t) *count = (READ_LOCK_ATOMIC(t) *)lock; 194bb898558SAl Viro 195a750036fSJan Beulich if (READ_LOCK_ATOMIC(dec_return)(count) >= 0) 196bb898558SAl Viro return 1; 197a750036fSJan Beulich READ_LOCK_ATOMIC(inc)(count); 198bb898558SAl Viro return 0; 199bb898558SAl Viro } 200bb898558SAl Viro 201e5931943SThomas Gleixner static inline int arch_write_trylock(arch_rwlock_t *lock) 202bb898558SAl Viro { 203a750036fSJan Beulich atomic_t *count = (atomic_t *)&lock->write; 204bb898558SAl Viro 205a750036fSJan Beulich if (atomic_sub_and_test(WRITE_LOCK_CMP, count)) 206bb898558SAl Viro return 1; 207a750036fSJan Beulich atomic_add(WRITE_LOCK_CMP, count); 208bb898558SAl Viro return 0; 209bb898558SAl Viro } 210bb898558SAl Viro 211e5931943SThomas Gleixner static inline void arch_read_unlock(arch_rwlock_t *rw) 212bb898558SAl Viro { 213a750036fSJan Beulich asm volatile(LOCK_PREFIX READ_LOCK_SIZE(inc) " %0" 214a750036fSJan Beulich :"+m" (rw->lock) : : "memory"); 215bb898558SAl Viro } 216bb898558SAl Viro 217e5931943SThomas Gleixner static inline void arch_write_unlock(arch_rwlock_t *rw) 218bb898558SAl Viro { 219a750036fSJan Beulich asm volatile(LOCK_PREFIX WRITE_LOCK_ADD(%1) "%0" 220a750036fSJan Beulich : "+m" (rw->write) : "i" (RW_LOCK_BIAS) : "memory"); 221bb898558SAl Viro } 222bb898558SAl Viro 223e5931943SThomas Gleixner #define arch_read_lock_flags(lock, flags) arch_read_lock(lock) 224e5931943SThomas Gleixner #define arch_write_lock_flags(lock, flags) arch_write_lock(lock) 225f5f7eac4SRobin Holt 226a750036fSJan Beulich #undef READ_LOCK_SIZE 227a750036fSJan Beulich #undef READ_LOCK_ATOMIC 228a750036fSJan Beulich #undef WRITE_LOCK_ADD 229a750036fSJan Beulich #undef WRITE_LOCK_SUB 230a750036fSJan Beulich #undef WRITE_LOCK_CMP 231a750036fSJan Beulich 2320199c4e6SThomas Gleixner #define arch_spin_relax(lock) cpu_relax() 2330199c4e6SThomas Gleixner #define arch_read_relax(lock) cpu_relax() 2340199c4e6SThomas Gleixner #define arch_write_relax(lock) cpu_relax() 235bb898558SAl Viro 236ad462769SJiri Olsa /* The {read|write|spin}_lock() on x86 are full memory barriers. */ 237ad462769SJiri Olsa static inline void smp_mb__after_lock(void) { } 238ad462769SJiri Olsa #define ARCH_HAS_SMP_MB_AFTER_LOCK 239ad462769SJiri Olsa 2401965aae3SH. Peter Anvin #endif /* _ASM_X86_SPINLOCK_H */ 241