11965aae3SH. Peter Anvin #ifndef _ASM_X86_SPINLOCK_H 21965aae3SH. Peter Anvin #define _ASM_X86_SPINLOCK_H 3bb898558SAl Viro 460063497SArun Sharma #include <linux/atomic.h> 5bb898558SAl Viro #include <asm/page.h> 6bb898558SAl Viro #include <asm/processor.h> 7bb898558SAl Viro #include <linux/compiler.h> 8bb898558SAl Viro #include <asm/paravirt.h> 9bb898558SAl Viro /* 10bb898558SAl Viro * Your basic SMP spinlocks, allowing only a single CPU anywhere 11bb898558SAl Viro * 12bb898558SAl Viro * Simple spin lock operations. There are two variants, one clears IRQ's 13bb898558SAl Viro * on the local processor, one does not. 14bb898558SAl Viro * 15bb898558SAl Viro * These are fair FIFO ticket locks, which are currently limited to 256 16bb898558SAl Viro * CPUs. 17bb898558SAl Viro * 18bb898558SAl Viro * (the type definitions are in asm/spinlock_types.h) 19bb898558SAl Viro */ 20bb898558SAl Viro 21bb898558SAl Viro #ifdef CONFIG_X86_32 22bb898558SAl Viro # define LOCK_PTR_REG "a" 23bb898558SAl Viro # define REG_PTR_MODE "k" 24bb898558SAl Viro #else 25bb898558SAl Viro # define LOCK_PTR_REG "D" 26bb898558SAl Viro # define REG_PTR_MODE "q" 27bb898558SAl Viro #endif 28bb898558SAl Viro 29bb898558SAl Viro #if defined(CONFIG_X86_32) && \ 30bb898558SAl Viro (defined(CONFIG_X86_OOSTORE) || defined(CONFIG_X86_PPRO_FENCE)) 31bb898558SAl Viro /* 32bb898558SAl Viro * On PPro SMP or if we are using OOSTORE, we use a locked operation to unlock 33bb898558SAl Viro * (PPro errata 66, 92) 34bb898558SAl Viro */ 35bb898558SAl Viro # define UNLOCK_LOCK_PREFIX LOCK_PREFIX 36bb898558SAl Viro #else 37bb898558SAl Viro # define UNLOCK_LOCK_PREFIX 38bb898558SAl Viro #endif 39bb898558SAl Viro 40bb898558SAl Viro /* 41bb898558SAl Viro * Ticket locks are conceptually two parts, one indicating the current head of 42bb898558SAl Viro * the queue, and the other indicating the current tail. The lock is acquired 43bb898558SAl Viro * by atomically noting the tail and incrementing it by one (thus adding 44bb898558SAl Viro * ourself to the queue and noting our position), then waiting until the head 45bb898558SAl Viro * becomes equal to the the initial value of the tail. 46bb898558SAl Viro * 47bb898558SAl Viro * We use an xadd covering *both* parts of the lock, to increment the tail and 48bb898558SAl Viro * also load the position of the head, which takes care of memory ordering 49bb898558SAl Viro * issues and should be optimal for the uncontended case. Note the tail must be 50bb898558SAl Viro * in the high part, because a wide xadd increment of the low part would carry 51bb898558SAl Viro * up and contaminate the high part. 52bb898558SAl Viro */ 53445c8951SThomas Gleixner static __always_inline void __ticket_spin_lock(arch_spinlock_t *lock) 54bb898558SAl Viro { 552994488fSJeremy Fitzhardinge register struct __raw_tickets inc = { .tail = 1 }; 56bb898558SAl Viro 572994488fSJeremy Fitzhardinge inc = xadd(&lock->tickets, inc); 58c576a3eaSJeremy Fitzhardinge 59c576a3eaSJeremy Fitzhardinge for (;;) { 602994488fSJeremy Fitzhardinge if (inc.head == inc.tail) 61c576a3eaSJeremy Fitzhardinge break; 62c576a3eaSJeremy Fitzhardinge cpu_relax(); 632994488fSJeremy Fitzhardinge inc.head = ACCESS_ONCE(lock->tickets.head); 64c576a3eaSJeremy Fitzhardinge } 65c576a3eaSJeremy Fitzhardinge barrier(); /* make sure nothing creeps before the lock is taken */ 66bb898558SAl Viro } 67bb898558SAl Viro 68445c8951SThomas Gleixner static __always_inline int __ticket_spin_trylock(arch_spinlock_t *lock) 69bb898558SAl Viro { 70229855d6SJeremy Fitzhardinge arch_spinlock_t old, new; 71bb898558SAl Viro 72229855d6SJeremy Fitzhardinge old.tickets = ACCESS_ONCE(lock->tickets); 73229855d6SJeremy Fitzhardinge if (old.tickets.head != old.tickets.tail) 74229855d6SJeremy Fitzhardinge return 0; 75bb898558SAl Viro 76229855d6SJeremy Fitzhardinge new.head_tail = old.head_tail + (1 << TICKET_SHIFT); 77229855d6SJeremy Fitzhardinge 78229855d6SJeremy Fitzhardinge /* cmpxchg is a full barrier, so nothing can move before it */ 79229855d6SJeremy Fitzhardinge return cmpxchg(&lock->head_tail, old.head_tail, new.head_tail) == old.head_tail; 80bb898558SAl Viro } 81bb898558SAl Viro 82445c8951SThomas Gleixner static __always_inline void __ticket_spin_unlock(arch_spinlock_t *lock) 83bb898558SAl Viro { 843d94ae0cSJeremy Fitzhardinge __add(&lock->tickets.head, 1, UNLOCK_LOCK_PREFIX); 85bb898558SAl Viro } 86bb898558SAl Viro 87445c8951SThomas Gleixner static inline int __ticket_spin_is_locked(arch_spinlock_t *lock) 88bb898558SAl Viro { 8984eb950dSJeremy Fitzhardinge struct __raw_tickets tmp = ACCESS_ONCE(lock->tickets); 90bb898558SAl Viro 917931d493SJan Beulich return tmp.tail != tmp.head; 92bb898558SAl Viro } 93bb898558SAl Viro 94445c8951SThomas Gleixner static inline int __ticket_spin_is_contended(arch_spinlock_t *lock) 95bb898558SAl Viro { 9684eb950dSJeremy Fitzhardinge struct __raw_tickets tmp = ACCESS_ONCE(lock->tickets); 97bb898558SAl Viro 987931d493SJan Beulich return (__ticket_t)(tmp.tail - tmp.head) > 1; 99bb898558SAl Viro } 100bb898558SAl Viro 101b4ecc126SJeremy Fitzhardinge #ifndef CONFIG_PARAVIRT_SPINLOCKS 102bb898558SAl Viro 1030199c4e6SThomas Gleixner static inline int arch_spin_is_locked(arch_spinlock_t *lock) 104bb898558SAl Viro { 105bb898558SAl Viro return __ticket_spin_is_locked(lock); 106bb898558SAl Viro } 107bb898558SAl Viro 1080199c4e6SThomas Gleixner static inline int arch_spin_is_contended(arch_spinlock_t *lock) 109bb898558SAl Viro { 110bb898558SAl Viro return __ticket_spin_is_contended(lock); 111bb898558SAl Viro } 1120199c4e6SThomas Gleixner #define arch_spin_is_contended arch_spin_is_contended 113bb898558SAl Viro 1140199c4e6SThomas Gleixner static __always_inline void arch_spin_lock(arch_spinlock_t *lock) 115bb898558SAl Viro { 116bb898558SAl Viro __ticket_spin_lock(lock); 117bb898558SAl Viro } 118bb898558SAl Viro 1190199c4e6SThomas Gleixner static __always_inline int arch_spin_trylock(arch_spinlock_t *lock) 120bb898558SAl Viro { 121bb898558SAl Viro return __ticket_spin_trylock(lock); 122bb898558SAl Viro } 123bb898558SAl Viro 1240199c4e6SThomas Gleixner static __always_inline void arch_spin_unlock(arch_spinlock_t *lock) 125bb898558SAl Viro { 126bb898558SAl Viro __ticket_spin_unlock(lock); 127bb898558SAl Viro } 128bb898558SAl Viro 1290199c4e6SThomas Gleixner static __always_inline void arch_spin_lock_flags(arch_spinlock_t *lock, 130bb898558SAl Viro unsigned long flags) 131bb898558SAl Viro { 1320199c4e6SThomas Gleixner arch_spin_lock(lock); 133bb898558SAl Viro } 134bb898558SAl Viro 135b4ecc126SJeremy Fitzhardinge #endif /* CONFIG_PARAVIRT_SPINLOCKS */ 136bb898558SAl Viro 1370199c4e6SThomas Gleixner static inline void arch_spin_unlock_wait(arch_spinlock_t *lock) 138bb898558SAl Viro { 1390199c4e6SThomas Gleixner while (arch_spin_is_locked(lock)) 140bb898558SAl Viro cpu_relax(); 141bb898558SAl Viro } 142bb898558SAl Viro 143bb898558SAl Viro /* 144bb898558SAl Viro * Read-write spinlocks, allowing multiple readers 145bb898558SAl Viro * but only one writer. 146bb898558SAl Viro * 147bb898558SAl Viro * NOTE! it is quite common to have readers in interrupts 148bb898558SAl Viro * but no interrupt writers. For those circumstances we 149bb898558SAl Viro * can "mix" irq-safe locks - any writer needs to get a 150bb898558SAl Viro * irq-safe write-lock, but readers can get non-irqsafe 151bb898558SAl Viro * read-locks. 152bb898558SAl Viro * 153bb898558SAl Viro * On x86, we implement read-write locks as a 32-bit counter 154bb898558SAl Viro * with the high bit (sign) being the "contended" bit. 155bb898558SAl Viro */ 156bb898558SAl Viro 157bb898558SAl Viro /** 158bb898558SAl Viro * read_can_lock - would read_trylock() succeed? 159bb898558SAl Viro * @lock: the rwlock in question. 160bb898558SAl Viro */ 161e5931943SThomas Gleixner static inline int arch_read_can_lock(arch_rwlock_t *lock) 162bb898558SAl Viro { 163a750036fSJan Beulich return lock->lock > 0; 164bb898558SAl Viro } 165bb898558SAl Viro 166bb898558SAl Viro /** 167bb898558SAl Viro * write_can_lock - would write_trylock() succeed? 168bb898558SAl Viro * @lock: the rwlock in question. 169bb898558SAl Viro */ 170e5931943SThomas Gleixner static inline int arch_write_can_lock(arch_rwlock_t *lock) 171bb898558SAl Viro { 172a750036fSJan Beulich return lock->write == WRITE_LOCK_CMP; 173bb898558SAl Viro } 174bb898558SAl Viro 175e5931943SThomas Gleixner static inline void arch_read_lock(arch_rwlock_t *rw) 176bb898558SAl Viro { 177a750036fSJan Beulich asm volatile(LOCK_PREFIX READ_LOCK_SIZE(dec) " (%0)\n\t" 178bb898558SAl Viro "jns 1f\n" 179bb898558SAl Viro "call __read_lock_failed\n\t" 180bb898558SAl Viro "1:\n" 181bb898558SAl Viro ::LOCK_PTR_REG (rw) : "memory"); 182bb898558SAl Viro } 183bb898558SAl Viro 184e5931943SThomas Gleixner static inline void arch_write_lock(arch_rwlock_t *rw) 185bb898558SAl Viro { 186a750036fSJan Beulich asm volatile(LOCK_PREFIX WRITE_LOCK_SUB(%1) "(%0)\n\t" 187bb898558SAl Viro "jz 1f\n" 188bb898558SAl Viro "call __write_lock_failed\n\t" 189bb898558SAl Viro "1:\n" 190a750036fSJan Beulich ::LOCK_PTR_REG (&rw->write), "i" (RW_LOCK_BIAS) 191a750036fSJan Beulich : "memory"); 192bb898558SAl Viro } 193bb898558SAl Viro 194e5931943SThomas Gleixner static inline int arch_read_trylock(arch_rwlock_t *lock) 195bb898558SAl Viro { 196a750036fSJan Beulich READ_LOCK_ATOMIC(t) *count = (READ_LOCK_ATOMIC(t) *)lock; 197bb898558SAl Viro 198a750036fSJan Beulich if (READ_LOCK_ATOMIC(dec_return)(count) >= 0) 199bb898558SAl Viro return 1; 200a750036fSJan Beulich READ_LOCK_ATOMIC(inc)(count); 201bb898558SAl Viro return 0; 202bb898558SAl Viro } 203bb898558SAl Viro 204e5931943SThomas Gleixner static inline int arch_write_trylock(arch_rwlock_t *lock) 205bb898558SAl Viro { 206a750036fSJan Beulich atomic_t *count = (atomic_t *)&lock->write; 207bb898558SAl Viro 208a750036fSJan Beulich if (atomic_sub_and_test(WRITE_LOCK_CMP, count)) 209bb898558SAl Viro return 1; 210a750036fSJan Beulich atomic_add(WRITE_LOCK_CMP, count); 211bb898558SAl Viro return 0; 212bb898558SAl Viro } 213bb898558SAl Viro 214e5931943SThomas Gleixner static inline void arch_read_unlock(arch_rwlock_t *rw) 215bb898558SAl Viro { 216a750036fSJan Beulich asm volatile(LOCK_PREFIX READ_LOCK_SIZE(inc) " %0" 217a750036fSJan Beulich :"+m" (rw->lock) : : "memory"); 218bb898558SAl Viro } 219bb898558SAl Viro 220e5931943SThomas Gleixner static inline void arch_write_unlock(arch_rwlock_t *rw) 221bb898558SAl Viro { 222a750036fSJan Beulich asm volatile(LOCK_PREFIX WRITE_LOCK_ADD(%1) "%0" 223a750036fSJan Beulich : "+m" (rw->write) : "i" (RW_LOCK_BIAS) : "memory"); 224bb898558SAl Viro } 225bb898558SAl Viro 226e5931943SThomas Gleixner #define arch_read_lock_flags(lock, flags) arch_read_lock(lock) 227e5931943SThomas Gleixner #define arch_write_lock_flags(lock, flags) arch_write_lock(lock) 228f5f7eac4SRobin Holt 229a750036fSJan Beulich #undef READ_LOCK_SIZE 230a750036fSJan Beulich #undef READ_LOCK_ATOMIC 231a750036fSJan Beulich #undef WRITE_LOCK_ADD 232a750036fSJan Beulich #undef WRITE_LOCK_SUB 233a750036fSJan Beulich #undef WRITE_LOCK_CMP 234a750036fSJan Beulich 2350199c4e6SThomas Gleixner #define arch_spin_relax(lock) cpu_relax() 2360199c4e6SThomas Gleixner #define arch_read_relax(lock) cpu_relax() 2370199c4e6SThomas Gleixner #define arch_write_relax(lock) cpu_relax() 238bb898558SAl Viro 239ad462769SJiri Olsa /* The {read|write|spin}_lock() on x86 are full memory barriers. */ 240ad462769SJiri Olsa static inline void smp_mb__after_lock(void) { } 241ad462769SJiri Olsa #define ARCH_HAS_SMP_MB_AFTER_LOCK 242ad462769SJiri Olsa 2431965aae3SH. Peter Anvin #endif /* _ASM_X86_SPINLOCK_H */ 244