1186525bdSIngo Molnar #ifndef _ASM_X86_PGTABLE_AREAS_H 2186525bdSIngo Molnar #define _ASM_X86_PGTABLE_AREAS_H 3186525bdSIngo Molnar 4186525bdSIngo Molnar #ifdef CONFIG_X86_32 5186525bdSIngo Molnar # include <asm/pgtable_32_areas.h> 6186525bdSIngo Molnar #endif 7186525bdSIngo Molnar 8186525bdSIngo Molnar /* Single page reserved for the readonly IDT mapping: */ 9186525bdSIngo Molnar #define CPU_ENTRY_AREA_RO_IDT CPU_ENTRY_AREA_BASE 10186525bdSIngo Molnar #define CPU_ENTRY_AREA_PER_CPU (CPU_ENTRY_AREA_RO_IDT + PAGE_SIZE) 11186525bdSIngo Molnar 12186525bdSIngo Molnar #define CPU_ENTRY_AREA_RO_IDT_VADDR ((void *)CPU_ENTRY_AREA_RO_IDT) 13186525bdSIngo Molnar 14*97e3d26bSPeter Zijlstra #ifdef CONFIG_X86_32 15*97e3d26bSPeter Zijlstra #define CPU_ENTRY_AREA_MAP_SIZE (CPU_ENTRY_AREA_PER_CPU + \ 16*97e3d26bSPeter Zijlstra (CPU_ENTRY_AREA_SIZE * NR_CPUS) - \ 17*97e3d26bSPeter Zijlstra CPU_ENTRY_AREA_BASE) 18*97e3d26bSPeter Zijlstra #else 19*97e3d26bSPeter Zijlstra #define CPU_ENTRY_AREA_MAP_SIZE P4D_SIZE 20*97e3d26bSPeter Zijlstra #endif 21186525bdSIngo Molnar 22186525bdSIngo Molnar #endif /* _ASM_X86_PGTABLE_AREAS_H */ 23