1 /* SPDX-License-Identifier: GPL-2.0 */ 2 #ifndef _ASM_X86_PGTABLE_H 3 #define _ASM_X86_PGTABLE_H 4 5 #include <linux/mem_encrypt.h> 6 #include <asm/page.h> 7 #include <asm/pgtable_types.h> 8 9 /* 10 * Macro to mark a page protection value as UC- 11 */ 12 #define pgprot_noncached(prot) \ 13 ((boot_cpu_data.x86 > 3) \ 14 ? (__pgprot(pgprot_val(prot) | \ 15 cachemode2protval(_PAGE_CACHE_MODE_UC_MINUS))) \ 16 : (prot)) 17 18 #ifndef __ASSEMBLY__ 19 #include <linux/spinlock.h> 20 #include <asm/x86_init.h> 21 #include <asm/pkru.h> 22 #include <asm/fpu/api.h> 23 #include <asm/coco.h> 24 #include <asm-generic/pgtable_uffd.h> 25 #include <linux/page_table_check.h> 26 27 extern pgd_t early_top_pgt[PTRS_PER_PGD]; 28 bool __init __early_make_pgtable(unsigned long address, pmdval_t pmd); 29 30 struct seq_file; 31 void ptdump_walk_pgd_level(struct seq_file *m, struct mm_struct *mm); 32 void ptdump_walk_pgd_level_debugfs(struct seq_file *m, struct mm_struct *mm, 33 bool user); 34 void ptdump_walk_pgd_level_checkwx(void); 35 void ptdump_walk_user_pgd_level_checkwx(void); 36 37 /* 38 * Macros to add or remove encryption attribute 39 */ 40 #define pgprot_encrypted(prot) __pgprot(cc_mkenc(pgprot_val(prot))) 41 #define pgprot_decrypted(prot) __pgprot(cc_mkdec(pgprot_val(prot))) 42 43 #ifdef CONFIG_DEBUG_WX 44 #define debug_checkwx() ptdump_walk_pgd_level_checkwx() 45 #define debug_checkwx_user() ptdump_walk_user_pgd_level_checkwx() 46 #else 47 #define debug_checkwx() do { } while (0) 48 #define debug_checkwx_user() do { } while (0) 49 #endif 50 51 /* 52 * ZERO_PAGE is a global shared page that is always zero: used 53 * for zero-mapped memory areas etc.. 54 */ 55 extern unsigned long empty_zero_page[PAGE_SIZE / sizeof(unsigned long)] 56 __visible; 57 #define ZERO_PAGE(vaddr) ((void)(vaddr),virt_to_page(empty_zero_page)) 58 59 extern spinlock_t pgd_lock; 60 extern struct list_head pgd_list; 61 62 extern struct mm_struct *pgd_page_get_mm(struct page *page); 63 64 extern pmdval_t early_pmd_flags; 65 66 #ifdef CONFIG_PARAVIRT_XXL 67 #include <asm/paravirt.h> 68 #else /* !CONFIG_PARAVIRT_XXL */ 69 #define set_pte(ptep, pte) native_set_pte(ptep, pte) 70 71 #define set_pte_atomic(ptep, pte) \ 72 native_set_pte_atomic(ptep, pte) 73 74 #define set_pmd(pmdp, pmd) native_set_pmd(pmdp, pmd) 75 76 #ifndef __PAGETABLE_P4D_FOLDED 77 #define set_pgd(pgdp, pgd) native_set_pgd(pgdp, pgd) 78 #define pgd_clear(pgd) (pgtable_l5_enabled() ? native_pgd_clear(pgd) : 0) 79 #endif 80 81 #ifndef set_p4d 82 # define set_p4d(p4dp, p4d) native_set_p4d(p4dp, p4d) 83 #endif 84 85 #ifndef __PAGETABLE_PUD_FOLDED 86 #define p4d_clear(p4d) native_p4d_clear(p4d) 87 #endif 88 89 #ifndef set_pud 90 # define set_pud(pudp, pud) native_set_pud(pudp, pud) 91 #endif 92 93 #ifndef __PAGETABLE_PUD_FOLDED 94 #define pud_clear(pud) native_pud_clear(pud) 95 #endif 96 97 #define pte_clear(mm, addr, ptep) native_pte_clear(mm, addr, ptep) 98 #define pmd_clear(pmd) native_pmd_clear(pmd) 99 100 #define pgd_val(x) native_pgd_val(x) 101 #define __pgd(x) native_make_pgd(x) 102 103 #ifndef __PAGETABLE_P4D_FOLDED 104 #define p4d_val(x) native_p4d_val(x) 105 #define __p4d(x) native_make_p4d(x) 106 #endif 107 108 #ifndef __PAGETABLE_PUD_FOLDED 109 #define pud_val(x) native_pud_val(x) 110 #define __pud(x) native_make_pud(x) 111 #endif 112 113 #ifndef __PAGETABLE_PMD_FOLDED 114 #define pmd_val(x) native_pmd_val(x) 115 #define __pmd(x) native_make_pmd(x) 116 #endif 117 118 #define pte_val(x) native_pte_val(x) 119 #define __pte(x) native_make_pte(x) 120 121 #define arch_end_context_switch(prev) do {} while(0) 122 #endif /* CONFIG_PARAVIRT_XXL */ 123 124 /* 125 * The following only work if pte_present() is true. 126 * Undefined behaviour if not.. 127 */ 128 static inline int pte_dirty(pte_t pte) 129 { 130 return pte_flags(pte) & _PAGE_DIRTY; 131 } 132 133 static inline int pte_young(pte_t pte) 134 { 135 return pte_flags(pte) & _PAGE_ACCESSED; 136 } 137 138 static inline int pmd_dirty(pmd_t pmd) 139 { 140 return pmd_flags(pmd) & _PAGE_DIRTY; 141 } 142 143 #define pmd_young pmd_young 144 static inline int pmd_young(pmd_t pmd) 145 { 146 return pmd_flags(pmd) & _PAGE_ACCESSED; 147 } 148 149 static inline int pud_dirty(pud_t pud) 150 { 151 return pud_flags(pud) & _PAGE_DIRTY; 152 } 153 154 static inline int pud_young(pud_t pud) 155 { 156 return pud_flags(pud) & _PAGE_ACCESSED; 157 } 158 159 static inline int pte_write(pte_t pte) 160 { 161 return pte_flags(pte) & _PAGE_RW; 162 } 163 164 static inline int pte_huge(pte_t pte) 165 { 166 return pte_flags(pte) & _PAGE_PSE; 167 } 168 169 static inline int pte_global(pte_t pte) 170 { 171 return pte_flags(pte) & _PAGE_GLOBAL; 172 } 173 174 static inline int pte_exec(pte_t pte) 175 { 176 return !(pte_flags(pte) & _PAGE_NX); 177 } 178 179 static inline int pte_special(pte_t pte) 180 { 181 return pte_flags(pte) & _PAGE_SPECIAL; 182 } 183 184 /* Entries that were set to PROT_NONE are inverted */ 185 186 static inline u64 protnone_mask(u64 val); 187 188 #define PFN_PTE_SHIFT PAGE_SHIFT 189 190 static inline unsigned long pte_pfn(pte_t pte) 191 { 192 phys_addr_t pfn = pte_val(pte); 193 pfn ^= protnone_mask(pfn); 194 return (pfn & PTE_PFN_MASK) >> PAGE_SHIFT; 195 } 196 197 static inline unsigned long pmd_pfn(pmd_t pmd) 198 { 199 phys_addr_t pfn = pmd_val(pmd); 200 pfn ^= protnone_mask(pfn); 201 return (pfn & pmd_pfn_mask(pmd)) >> PAGE_SHIFT; 202 } 203 204 static inline unsigned long pud_pfn(pud_t pud) 205 { 206 phys_addr_t pfn = pud_val(pud); 207 pfn ^= protnone_mask(pfn); 208 return (pfn & pud_pfn_mask(pud)) >> PAGE_SHIFT; 209 } 210 211 static inline unsigned long p4d_pfn(p4d_t p4d) 212 { 213 return (p4d_val(p4d) & p4d_pfn_mask(p4d)) >> PAGE_SHIFT; 214 } 215 216 static inline unsigned long pgd_pfn(pgd_t pgd) 217 { 218 return (pgd_val(pgd) & PTE_PFN_MASK) >> PAGE_SHIFT; 219 } 220 221 #define p4d_leaf p4d_large 222 static inline int p4d_large(p4d_t p4d) 223 { 224 /* No 512 GiB pages yet */ 225 return 0; 226 } 227 228 #define pte_page(pte) pfn_to_page(pte_pfn(pte)) 229 230 #define pmd_leaf pmd_large 231 static inline int pmd_large(pmd_t pte) 232 { 233 return pmd_flags(pte) & _PAGE_PSE; 234 } 235 236 #ifdef CONFIG_TRANSPARENT_HUGEPAGE 237 /* NOTE: when predicate huge page, consider also pmd_devmap, or use pmd_large */ 238 static inline int pmd_trans_huge(pmd_t pmd) 239 { 240 return (pmd_val(pmd) & (_PAGE_PSE|_PAGE_DEVMAP)) == _PAGE_PSE; 241 } 242 243 #ifdef CONFIG_HAVE_ARCH_TRANSPARENT_HUGEPAGE_PUD 244 static inline int pud_trans_huge(pud_t pud) 245 { 246 return (pud_val(pud) & (_PAGE_PSE|_PAGE_DEVMAP)) == _PAGE_PSE; 247 } 248 #endif 249 250 #define has_transparent_hugepage has_transparent_hugepage 251 static inline int has_transparent_hugepage(void) 252 { 253 return boot_cpu_has(X86_FEATURE_PSE); 254 } 255 256 #ifdef CONFIG_ARCH_HAS_PTE_DEVMAP 257 static inline int pmd_devmap(pmd_t pmd) 258 { 259 return !!(pmd_val(pmd) & _PAGE_DEVMAP); 260 } 261 262 #ifdef CONFIG_HAVE_ARCH_TRANSPARENT_HUGEPAGE_PUD 263 static inline int pud_devmap(pud_t pud) 264 { 265 return !!(pud_val(pud) & _PAGE_DEVMAP); 266 } 267 #else 268 static inline int pud_devmap(pud_t pud) 269 { 270 return 0; 271 } 272 #endif 273 274 static inline int pgd_devmap(pgd_t pgd) 275 { 276 return 0; 277 } 278 #endif 279 #endif /* CONFIG_TRANSPARENT_HUGEPAGE */ 280 281 static inline pte_t pte_set_flags(pte_t pte, pteval_t set) 282 { 283 pteval_t v = native_pte_val(pte); 284 285 return native_make_pte(v | set); 286 } 287 288 static inline pte_t pte_clear_flags(pte_t pte, pteval_t clear) 289 { 290 pteval_t v = native_pte_val(pte); 291 292 return native_make_pte(v & ~clear); 293 } 294 295 static inline pte_t pte_wrprotect(pte_t pte) 296 { 297 return pte_clear_flags(pte, _PAGE_RW); 298 } 299 300 #ifdef CONFIG_HAVE_ARCH_USERFAULTFD_WP 301 static inline int pte_uffd_wp(pte_t pte) 302 { 303 bool wp = pte_flags(pte) & _PAGE_UFFD_WP; 304 305 #ifdef CONFIG_DEBUG_VM 306 /* 307 * Having write bit for wr-protect-marked present ptes is fatal, 308 * because it means the uffd-wp bit will be ignored and write will 309 * just go through. 310 * 311 * Use any chance of pgtable walking to verify this (e.g., when 312 * page swapped out or being migrated for all purposes). It means 313 * something is already wrong. Tell the admin even before the 314 * process crashes. We also nail it with wrong pgtable setup. 315 */ 316 WARN_ON_ONCE(wp && pte_write(pte)); 317 #endif 318 319 return wp; 320 } 321 322 static inline pte_t pte_mkuffd_wp(pte_t pte) 323 { 324 return pte_wrprotect(pte_set_flags(pte, _PAGE_UFFD_WP)); 325 } 326 327 static inline pte_t pte_clear_uffd_wp(pte_t pte) 328 { 329 return pte_clear_flags(pte, _PAGE_UFFD_WP); 330 } 331 #endif /* CONFIG_HAVE_ARCH_USERFAULTFD_WP */ 332 333 static inline pte_t pte_mkclean(pte_t pte) 334 { 335 return pte_clear_flags(pte, _PAGE_DIRTY); 336 } 337 338 static inline pte_t pte_mkold(pte_t pte) 339 { 340 return pte_clear_flags(pte, _PAGE_ACCESSED); 341 } 342 343 static inline pte_t pte_mkexec(pte_t pte) 344 { 345 return pte_clear_flags(pte, _PAGE_NX); 346 } 347 348 static inline pte_t pte_mkdirty(pte_t pte) 349 { 350 return pte_set_flags(pte, _PAGE_DIRTY | _PAGE_SOFT_DIRTY); 351 } 352 353 static inline pte_t pte_mkyoung(pte_t pte) 354 { 355 return pte_set_flags(pte, _PAGE_ACCESSED); 356 } 357 358 static inline pte_t pte_mkwrite(pte_t pte) 359 { 360 return pte_set_flags(pte, _PAGE_RW); 361 } 362 363 static inline pte_t pte_mkhuge(pte_t pte) 364 { 365 return pte_set_flags(pte, _PAGE_PSE); 366 } 367 368 static inline pte_t pte_clrhuge(pte_t pte) 369 { 370 return pte_clear_flags(pte, _PAGE_PSE); 371 } 372 373 static inline pte_t pte_mkglobal(pte_t pte) 374 { 375 return pte_set_flags(pte, _PAGE_GLOBAL); 376 } 377 378 static inline pte_t pte_clrglobal(pte_t pte) 379 { 380 return pte_clear_flags(pte, _PAGE_GLOBAL); 381 } 382 383 static inline pte_t pte_mkspecial(pte_t pte) 384 { 385 return pte_set_flags(pte, _PAGE_SPECIAL); 386 } 387 388 static inline pte_t pte_mkdevmap(pte_t pte) 389 { 390 return pte_set_flags(pte, _PAGE_SPECIAL|_PAGE_DEVMAP); 391 } 392 393 static inline pmd_t pmd_set_flags(pmd_t pmd, pmdval_t set) 394 { 395 pmdval_t v = native_pmd_val(pmd); 396 397 return native_make_pmd(v | set); 398 } 399 400 static inline pmd_t pmd_clear_flags(pmd_t pmd, pmdval_t clear) 401 { 402 pmdval_t v = native_pmd_val(pmd); 403 404 return native_make_pmd(v & ~clear); 405 } 406 407 static inline pmd_t pmd_wrprotect(pmd_t pmd) 408 { 409 return pmd_clear_flags(pmd, _PAGE_RW); 410 } 411 412 #ifdef CONFIG_HAVE_ARCH_USERFAULTFD_WP 413 static inline int pmd_uffd_wp(pmd_t pmd) 414 { 415 return pmd_flags(pmd) & _PAGE_UFFD_WP; 416 } 417 418 static inline pmd_t pmd_mkuffd_wp(pmd_t pmd) 419 { 420 return pmd_wrprotect(pmd_set_flags(pmd, _PAGE_UFFD_WP)); 421 } 422 423 static inline pmd_t pmd_clear_uffd_wp(pmd_t pmd) 424 { 425 return pmd_clear_flags(pmd, _PAGE_UFFD_WP); 426 } 427 #endif /* CONFIG_HAVE_ARCH_USERFAULTFD_WP */ 428 429 static inline pmd_t pmd_mkold(pmd_t pmd) 430 { 431 return pmd_clear_flags(pmd, _PAGE_ACCESSED); 432 } 433 434 static inline pmd_t pmd_mkclean(pmd_t pmd) 435 { 436 return pmd_clear_flags(pmd, _PAGE_DIRTY); 437 } 438 439 static inline pmd_t pmd_mkdirty(pmd_t pmd) 440 { 441 return pmd_set_flags(pmd, _PAGE_DIRTY | _PAGE_SOFT_DIRTY); 442 } 443 444 static inline pmd_t pmd_mkdevmap(pmd_t pmd) 445 { 446 return pmd_set_flags(pmd, _PAGE_DEVMAP); 447 } 448 449 static inline pmd_t pmd_mkhuge(pmd_t pmd) 450 { 451 return pmd_set_flags(pmd, _PAGE_PSE); 452 } 453 454 static inline pmd_t pmd_mkyoung(pmd_t pmd) 455 { 456 return pmd_set_flags(pmd, _PAGE_ACCESSED); 457 } 458 459 static inline pmd_t pmd_mkwrite(pmd_t pmd) 460 { 461 return pmd_set_flags(pmd, _PAGE_RW); 462 } 463 464 static inline pud_t pud_set_flags(pud_t pud, pudval_t set) 465 { 466 pudval_t v = native_pud_val(pud); 467 468 return native_make_pud(v | set); 469 } 470 471 static inline pud_t pud_clear_flags(pud_t pud, pudval_t clear) 472 { 473 pudval_t v = native_pud_val(pud); 474 475 return native_make_pud(v & ~clear); 476 } 477 478 static inline pud_t pud_mkold(pud_t pud) 479 { 480 return pud_clear_flags(pud, _PAGE_ACCESSED); 481 } 482 483 static inline pud_t pud_mkclean(pud_t pud) 484 { 485 return pud_clear_flags(pud, _PAGE_DIRTY); 486 } 487 488 static inline pud_t pud_wrprotect(pud_t pud) 489 { 490 return pud_clear_flags(pud, _PAGE_RW); 491 } 492 493 static inline pud_t pud_mkdirty(pud_t pud) 494 { 495 return pud_set_flags(pud, _PAGE_DIRTY | _PAGE_SOFT_DIRTY); 496 } 497 498 static inline pud_t pud_mkdevmap(pud_t pud) 499 { 500 return pud_set_flags(pud, _PAGE_DEVMAP); 501 } 502 503 static inline pud_t pud_mkhuge(pud_t pud) 504 { 505 return pud_set_flags(pud, _PAGE_PSE); 506 } 507 508 static inline pud_t pud_mkyoung(pud_t pud) 509 { 510 return pud_set_flags(pud, _PAGE_ACCESSED); 511 } 512 513 static inline pud_t pud_mkwrite(pud_t pud) 514 { 515 return pud_set_flags(pud, _PAGE_RW); 516 } 517 518 #ifdef CONFIG_HAVE_ARCH_SOFT_DIRTY 519 static inline int pte_soft_dirty(pte_t pte) 520 { 521 return pte_flags(pte) & _PAGE_SOFT_DIRTY; 522 } 523 524 static inline int pmd_soft_dirty(pmd_t pmd) 525 { 526 return pmd_flags(pmd) & _PAGE_SOFT_DIRTY; 527 } 528 529 static inline int pud_soft_dirty(pud_t pud) 530 { 531 return pud_flags(pud) & _PAGE_SOFT_DIRTY; 532 } 533 534 static inline pte_t pte_mksoft_dirty(pte_t pte) 535 { 536 return pte_set_flags(pte, _PAGE_SOFT_DIRTY); 537 } 538 539 static inline pmd_t pmd_mksoft_dirty(pmd_t pmd) 540 { 541 return pmd_set_flags(pmd, _PAGE_SOFT_DIRTY); 542 } 543 544 static inline pud_t pud_mksoft_dirty(pud_t pud) 545 { 546 return pud_set_flags(pud, _PAGE_SOFT_DIRTY); 547 } 548 549 static inline pte_t pte_clear_soft_dirty(pte_t pte) 550 { 551 return pte_clear_flags(pte, _PAGE_SOFT_DIRTY); 552 } 553 554 static inline pmd_t pmd_clear_soft_dirty(pmd_t pmd) 555 { 556 return pmd_clear_flags(pmd, _PAGE_SOFT_DIRTY); 557 } 558 559 static inline pud_t pud_clear_soft_dirty(pud_t pud) 560 { 561 return pud_clear_flags(pud, _PAGE_SOFT_DIRTY); 562 } 563 564 #endif /* CONFIG_HAVE_ARCH_SOFT_DIRTY */ 565 566 /* 567 * Mask out unsupported bits in a present pgprot. Non-present pgprots 568 * can use those bits for other purposes, so leave them be. 569 */ 570 static inline pgprotval_t massage_pgprot(pgprot_t pgprot) 571 { 572 pgprotval_t protval = pgprot_val(pgprot); 573 574 if (protval & _PAGE_PRESENT) 575 protval &= __supported_pte_mask; 576 577 return protval; 578 } 579 580 static inline pgprotval_t check_pgprot(pgprot_t pgprot) 581 { 582 pgprotval_t massaged_val = massage_pgprot(pgprot); 583 584 /* mmdebug.h can not be included here because of dependencies */ 585 #ifdef CONFIG_DEBUG_VM 586 WARN_ONCE(pgprot_val(pgprot) != massaged_val, 587 "attempted to set unsupported pgprot: %016llx " 588 "bits: %016llx supported: %016llx\n", 589 (u64)pgprot_val(pgprot), 590 (u64)pgprot_val(pgprot) ^ massaged_val, 591 (u64)__supported_pte_mask); 592 #endif 593 594 return massaged_val; 595 } 596 597 static inline pte_t pfn_pte(unsigned long page_nr, pgprot_t pgprot) 598 { 599 phys_addr_t pfn = (phys_addr_t)page_nr << PAGE_SHIFT; 600 pfn ^= protnone_mask(pgprot_val(pgprot)); 601 pfn &= PTE_PFN_MASK; 602 return __pte(pfn | check_pgprot(pgprot)); 603 } 604 605 static inline pmd_t pfn_pmd(unsigned long page_nr, pgprot_t pgprot) 606 { 607 phys_addr_t pfn = (phys_addr_t)page_nr << PAGE_SHIFT; 608 pfn ^= protnone_mask(pgprot_val(pgprot)); 609 pfn &= PHYSICAL_PMD_PAGE_MASK; 610 return __pmd(pfn | check_pgprot(pgprot)); 611 } 612 613 static inline pud_t pfn_pud(unsigned long page_nr, pgprot_t pgprot) 614 { 615 phys_addr_t pfn = (phys_addr_t)page_nr << PAGE_SHIFT; 616 pfn ^= protnone_mask(pgprot_val(pgprot)); 617 pfn &= PHYSICAL_PUD_PAGE_MASK; 618 return __pud(pfn | check_pgprot(pgprot)); 619 } 620 621 static inline pmd_t pmd_mkinvalid(pmd_t pmd) 622 { 623 return pfn_pmd(pmd_pfn(pmd), 624 __pgprot(pmd_flags(pmd) & ~(_PAGE_PRESENT|_PAGE_PROTNONE))); 625 } 626 627 static inline u64 flip_protnone_guard(u64 oldval, u64 val, u64 mask); 628 629 static inline pte_t pte_modify(pte_t pte, pgprot_t newprot) 630 { 631 pteval_t val = pte_val(pte), oldval = val; 632 633 /* 634 * Chop off the NX bit (if present), and add the NX portion of 635 * the newprot (if present): 636 */ 637 val &= _PAGE_CHG_MASK; 638 val |= check_pgprot(newprot) & ~_PAGE_CHG_MASK; 639 val = flip_protnone_guard(oldval, val, PTE_PFN_MASK); 640 return __pte(val); 641 } 642 643 static inline pmd_t pmd_modify(pmd_t pmd, pgprot_t newprot) 644 { 645 pmdval_t val = pmd_val(pmd), oldval = val; 646 647 val &= _HPAGE_CHG_MASK; 648 val |= check_pgprot(newprot) & ~_HPAGE_CHG_MASK; 649 val = flip_protnone_guard(oldval, val, PHYSICAL_PMD_PAGE_MASK); 650 return __pmd(val); 651 } 652 653 /* 654 * mprotect needs to preserve PAT and encryption bits when updating 655 * vm_page_prot 656 */ 657 #define pgprot_modify pgprot_modify 658 static inline pgprot_t pgprot_modify(pgprot_t oldprot, pgprot_t newprot) 659 { 660 pgprotval_t preservebits = pgprot_val(oldprot) & _PAGE_CHG_MASK; 661 pgprotval_t addbits = pgprot_val(newprot) & ~_PAGE_CHG_MASK; 662 return __pgprot(preservebits | addbits); 663 } 664 665 #define pte_pgprot(x) __pgprot(pte_flags(x)) 666 #define pmd_pgprot(x) __pgprot(pmd_flags(x)) 667 #define pud_pgprot(x) __pgprot(pud_flags(x)) 668 #define p4d_pgprot(x) __pgprot(p4d_flags(x)) 669 670 #define canon_pgprot(p) __pgprot(massage_pgprot(p)) 671 672 static inline int is_new_memtype_allowed(u64 paddr, unsigned long size, 673 enum page_cache_mode pcm, 674 enum page_cache_mode new_pcm) 675 { 676 /* 677 * PAT type is always WB for untracked ranges, so no need to check. 678 */ 679 if (x86_platform.is_untracked_pat_range(paddr, paddr + size)) 680 return 1; 681 682 /* 683 * Certain new memtypes are not allowed with certain 684 * requested memtype: 685 * - request is uncached, return cannot be write-back 686 * - request is write-combine, return cannot be write-back 687 * - request is write-through, return cannot be write-back 688 * - request is write-through, return cannot be write-combine 689 */ 690 if ((pcm == _PAGE_CACHE_MODE_UC_MINUS && 691 new_pcm == _PAGE_CACHE_MODE_WB) || 692 (pcm == _PAGE_CACHE_MODE_WC && 693 new_pcm == _PAGE_CACHE_MODE_WB) || 694 (pcm == _PAGE_CACHE_MODE_WT && 695 new_pcm == _PAGE_CACHE_MODE_WB) || 696 (pcm == _PAGE_CACHE_MODE_WT && 697 new_pcm == _PAGE_CACHE_MODE_WC)) { 698 return 0; 699 } 700 701 return 1; 702 } 703 704 pmd_t *populate_extra_pmd(unsigned long vaddr); 705 pte_t *populate_extra_pte(unsigned long vaddr); 706 707 #ifdef CONFIG_PAGE_TABLE_ISOLATION 708 pgd_t __pti_set_user_pgtbl(pgd_t *pgdp, pgd_t pgd); 709 710 /* 711 * Take a PGD location (pgdp) and a pgd value that needs to be set there. 712 * Populates the user and returns the resulting PGD that must be set in 713 * the kernel copy of the page tables. 714 */ 715 static inline pgd_t pti_set_user_pgtbl(pgd_t *pgdp, pgd_t pgd) 716 { 717 if (!static_cpu_has(X86_FEATURE_PTI)) 718 return pgd; 719 return __pti_set_user_pgtbl(pgdp, pgd); 720 } 721 #else /* CONFIG_PAGE_TABLE_ISOLATION */ 722 static inline pgd_t pti_set_user_pgtbl(pgd_t *pgdp, pgd_t pgd) 723 { 724 return pgd; 725 } 726 #endif /* CONFIG_PAGE_TABLE_ISOLATION */ 727 728 #endif /* __ASSEMBLY__ */ 729 730 731 #ifdef CONFIG_X86_32 732 # include <asm/pgtable_32.h> 733 #else 734 # include <asm/pgtable_64.h> 735 #endif 736 737 #ifndef __ASSEMBLY__ 738 #include <linux/mm_types.h> 739 #include <linux/mmdebug.h> 740 #include <linux/log2.h> 741 #include <asm/fixmap.h> 742 743 static inline int pte_none(pte_t pte) 744 { 745 return !(pte.pte & ~(_PAGE_KNL_ERRATUM_MASK)); 746 } 747 748 #define __HAVE_ARCH_PTE_SAME 749 static inline int pte_same(pte_t a, pte_t b) 750 { 751 return a.pte == b.pte; 752 } 753 754 static inline int pte_present(pte_t a) 755 { 756 return pte_flags(a) & (_PAGE_PRESENT | _PAGE_PROTNONE); 757 } 758 759 #ifdef CONFIG_ARCH_HAS_PTE_DEVMAP 760 static inline int pte_devmap(pte_t a) 761 { 762 return (pte_flags(a) & _PAGE_DEVMAP) == _PAGE_DEVMAP; 763 } 764 #endif 765 766 #define pte_accessible pte_accessible 767 static inline bool pte_accessible(struct mm_struct *mm, pte_t a) 768 { 769 if (pte_flags(a) & _PAGE_PRESENT) 770 return true; 771 772 if ((pte_flags(a) & _PAGE_PROTNONE) && 773 atomic_read(&mm->tlb_flush_pending)) 774 return true; 775 776 return false; 777 } 778 779 static inline int pmd_present(pmd_t pmd) 780 { 781 /* 782 * Checking for _PAGE_PSE is needed too because 783 * split_huge_page will temporarily clear the present bit (but 784 * the _PAGE_PSE flag will remain set at all times while the 785 * _PAGE_PRESENT bit is clear). 786 */ 787 return pmd_flags(pmd) & (_PAGE_PRESENT | _PAGE_PROTNONE | _PAGE_PSE); 788 } 789 790 #ifdef CONFIG_NUMA_BALANCING 791 /* 792 * These work without NUMA balancing but the kernel does not care. See the 793 * comment in include/linux/pgtable.h 794 */ 795 static inline int pte_protnone(pte_t pte) 796 { 797 return (pte_flags(pte) & (_PAGE_PROTNONE | _PAGE_PRESENT)) 798 == _PAGE_PROTNONE; 799 } 800 801 static inline int pmd_protnone(pmd_t pmd) 802 { 803 return (pmd_flags(pmd) & (_PAGE_PROTNONE | _PAGE_PRESENT)) 804 == _PAGE_PROTNONE; 805 } 806 #endif /* CONFIG_NUMA_BALANCING */ 807 808 static inline int pmd_none(pmd_t pmd) 809 { 810 /* Only check low word on 32-bit platforms, since it might be 811 out of sync with upper half. */ 812 unsigned long val = native_pmd_val(pmd); 813 return (val & ~_PAGE_KNL_ERRATUM_MASK) == 0; 814 } 815 816 static inline unsigned long pmd_page_vaddr(pmd_t pmd) 817 { 818 return (unsigned long)__va(pmd_val(pmd) & pmd_pfn_mask(pmd)); 819 } 820 821 /* 822 * Currently stuck as a macro due to indirect forward reference to 823 * linux/mmzone.h's __section_mem_map_addr() definition: 824 */ 825 #define pmd_page(pmd) pfn_to_page(pmd_pfn(pmd)) 826 827 /* 828 * Conversion functions: convert a page and protection to a page entry, 829 * and a page entry and page directory to the page they refer to. 830 * 831 * (Currently stuck as a macro because of indirect forward reference 832 * to linux/mm.h:page_to_nid()) 833 */ 834 #define mk_pte(page, pgprot) pfn_pte(page_to_pfn(page), (pgprot)) 835 836 static inline int pmd_bad(pmd_t pmd) 837 { 838 return (pmd_flags(pmd) & ~(_PAGE_USER | _PAGE_ACCESSED)) != 839 (_KERNPG_TABLE & ~_PAGE_ACCESSED); 840 } 841 842 static inline unsigned long pages_to_mb(unsigned long npg) 843 { 844 return npg >> (20 - PAGE_SHIFT); 845 } 846 847 #if CONFIG_PGTABLE_LEVELS > 2 848 static inline int pud_none(pud_t pud) 849 { 850 return (native_pud_val(pud) & ~(_PAGE_KNL_ERRATUM_MASK)) == 0; 851 } 852 853 static inline int pud_present(pud_t pud) 854 { 855 return pud_flags(pud) & _PAGE_PRESENT; 856 } 857 858 static inline pmd_t *pud_pgtable(pud_t pud) 859 { 860 return (pmd_t *)__va(pud_val(pud) & pud_pfn_mask(pud)); 861 } 862 863 /* 864 * Currently stuck as a macro due to indirect forward reference to 865 * linux/mmzone.h's __section_mem_map_addr() definition: 866 */ 867 #define pud_page(pud) pfn_to_page(pud_pfn(pud)) 868 869 #define pud_leaf pud_large 870 static inline int pud_large(pud_t pud) 871 { 872 return (pud_val(pud) & (_PAGE_PSE | _PAGE_PRESENT)) == 873 (_PAGE_PSE | _PAGE_PRESENT); 874 } 875 876 static inline int pud_bad(pud_t pud) 877 { 878 return (pud_flags(pud) & ~(_KERNPG_TABLE | _PAGE_USER)) != 0; 879 } 880 #else 881 #define pud_leaf pud_large 882 static inline int pud_large(pud_t pud) 883 { 884 return 0; 885 } 886 #endif /* CONFIG_PGTABLE_LEVELS > 2 */ 887 888 #if CONFIG_PGTABLE_LEVELS > 3 889 static inline int p4d_none(p4d_t p4d) 890 { 891 return (native_p4d_val(p4d) & ~(_PAGE_KNL_ERRATUM_MASK)) == 0; 892 } 893 894 static inline int p4d_present(p4d_t p4d) 895 { 896 return p4d_flags(p4d) & _PAGE_PRESENT; 897 } 898 899 static inline pud_t *p4d_pgtable(p4d_t p4d) 900 { 901 return (pud_t *)__va(p4d_val(p4d) & p4d_pfn_mask(p4d)); 902 } 903 904 /* 905 * Currently stuck as a macro due to indirect forward reference to 906 * linux/mmzone.h's __section_mem_map_addr() definition: 907 */ 908 #define p4d_page(p4d) pfn_to_page(p4d_pfn(p4d)) 909 910 static inline int p4d_bad(p4d_t p4d) 911 { 912 unsigned long ignore_flags = _KERNPG_TABLE | _PAGE_USER; 913 914 if (IS_ENABLED(CONFIG_PAGE_TABLE_ISOLATION)) 915 ignore_flags |= _PAGE_NX; 916 917 return (p4d_flags(p4d) & ~ignore_flags) != 0; 918 } 919 #endif /* CONFIG_PGTABLE_LEVELS > 3 */ 920 921 static inline unsigned long p4d_index(unsigned long address) 922 { 923 return (address >> P4D_SHIFT) & (PTRS_PER_P4D - 1); 924 } 925 926 #if CONFIG_PGTABLE_LEVELS > 4 927 static inline int pgd_present(pgd_t pgd) 928 { 929 if (!pgtable_l5_enabled()) 930 return 1; 931 return pgd_flags(pgd) & _PAGE_PRESENT; 932 } 933 934 static inline unsigned long pgd_page_vaddr(pgd_t pgd) 935 { 936 return (unsigned long)__va((unsigned long)pgd_val(pgd) & PTE_PFN_MASK); 937 } 938 939 /* 940 * Currently stuck as a macro due to indirect forward reference to 941 * linux/mmzone.h's __section_mem_map_addr() definition: 942 */ 943 #define pgd_page(pgd) pfn_to_page(pgd_pfn(pgd)) 944 945 /* to find an entry in a page-table-directory. */ 946 static inline p4d_t *p4d_offset(pgd_t *pgd, unsigned long address) 947 { 948 if (!pgtable_l5_enabled()) 949 return (p4d_t *)pgd; 950 return (p4d_t *)pgd_page_vaddr(*pgd) + p4d_index(address); 951 } 952 953 static inline int pgd_bad(pgd_t pgd) 954 { 955 unsigned long ignore_flags = _PAGE_USER; 956 957 if (!pgtable_l5_enabled()) 958 return 0; 959 960 if (IS_ENABLED(CONFIG_PAGE_TABLE_ISOLATION)) 961 ignore_flags |= _PAGE_NX; 962 963 return (pgd_flags(pgd) & ~ignore_flags) != _KERNPG_TABLE; 964 } 965 966 static inline int pgd_none(pgd_t pgd) 967 { 968 if (!pgtable_l5_enabled()) 969 return 0; 970 /* 971 * There is no need to do a workaround for the KNL stray 972 * A/D bit erratum here. PGDs only point to page tables 973 * except on 32-bit non-PAE which is not supported on 974 * KNL. 975 */ 976 return !native_pgd_val(pgd); 977 } 978 #endif /* CONFIG_PGTABLE_LEVELS > 4 */ 979 980 #endif /* __ASSEMBLY__ */ 981 982 #define KERNEL_PGD_BOUNDARY pgd_index(PAGE_OFFSET) 983 #define KERNEL_PGD_PTRS (PTRS_PER_PGD - KERNEL_PGD_BOUNDARY) 984 985 #ifndef __ASSEMBLY__ 986 987 extern int direct_gbpages; 988 void init_mem_mapping(void); 989 void early_alloc_pgt_buf(void); 990 extern void memblock_find_dma_reserve(void); 991 void __init poking_init(void); 992 unsigned long init_memory_mapping(unsigned long start, 993 unsigned long end, pgprot_t prot); 994 995 #ifdef CONFIG_X86_64 996 extern pgd_t trampoline_pgd_entry; 997 #endif 998 999 /* local pte updates need not use xchg for locking */ 1000 static inline pte_t native_local_ptep_get_and_clear(pte_t *ptep) 1001 { 1002 pte_t res = *ptep; 1003 1004 /* Pure native function needs no input for mm, addr */ 1005 native_pte_clear(NULL, 0, ptep); 1006 return res; 1007 } 1008 1009 static inline pmd_t native_local_pmdp_get_and_clear(pmd_t *pmdp) 1010 { 1011 pmd_t res = *pmdp; 1012 1013 native_pmd_clear(pmdp); 1014 return res; 1015 } 1016 1017 static inline pud_t native_local_pudp_get_and_clear(pud_t *pudp) 1018 { 1019 pud_t res = *pudp; 1020 1021 native_pud_clear(pudp); 1022 return res; 1023 } 1024 1025 static inline void set_pmd_at(struct mm_struct *mm, unsigned long addr, 1026 pmd_t *pmdp, pmd_t pmd) 1027 { 1028 page_table_check_pmd_set(mm, pmdp, pmd); 1029 set_pmd(pmdp, pmd); 1030 } 1031 1032 static inline void set_pud_at(struct mm_struct *mm, unsigned long addr, 1033 pud_t *pudp, pud_t pud) 1034 { 1035 page_table_check_pud_set(mm, pudp, pud); 1036 native_set_pud(pudp, pud); 1037 } 1038 1039 /* 1040 * We only update the dirty/accessed state if we set 1041 * the dirty bit by hand in the kernel, since the hardware 1042 * will do the accessed bit for us, and we don't want to 1043 * race with other CPU's that might be updating the dirty 1044 * bit at the same time. 1045 */ 1046 struct vm_area_struct; 1047 1048 #define __HAVE_ARCH_PTEP_SET_ACCESS_FLAGS 1049 extern int ptep_set_access_flags(struct vm_area_struct *vma, 1050 unsigned long address, pte_t *ptep, 1051 pte_t entry, int dirty); 1052 1053 #define __HAVE_ARCH_PTEP_TEST_AND_CLEAR_YOUNG 1054 extern int ptep_test_and_clear_young(struct vm_area_struct *vma, 1055 unsigned long addr, pte_t *ptep); 1056 1057 #define __HAVE_ARCH_PTEP_CLEAR_YOUNG_FLUSH 1058 extern int ptep_clear_flush_young(struct vm_area_struct *vma, 1059 unsigned long address, pte_t *ptep); 1060 1061 #define __HAVE_ARCH_PTEP_GET_AND_CLEAR 1062 static inline pte_t ptep_get_and_clear(struct mm_struct *mm, unsigned long addr, 1063 pte_t *ptep) 1064 { 1065 pte_t pte = native_ptep_get_and_clear(ptep); 1066 page_table_check_pte_clear(mm, pte); 1067 return pte; 1068 } 1069 1070 #define __HAVE_ARCH_PTEP_GET_AND_CLEAR_FULL 1071 static inline pte_t ptep_get_and_clear_full(struct mm_struct *mm, 1072 unsigned long addr, pte_t *ptep, 1073 int full) 1074 { 1075 pte_t pte; 1076 if (full) { 1077 /* 1078 * Full address destruction in progress; paravirt does not 1079 * care about updates and native needs no locking 1080 */ 1081 pte = native_local_ptep_get_and_clear(ptep); 1082 page_table_check_pte_clear(mm, pte); 1083 } else { 1084 pte = ptep_get_and_clear(mm, addr, ptep); 1085 } 1086 return pte; 1087 } 1088 1089 #define __HAVE_ARCH_PTEP_SET_WRPROTECT 1090 static inline void ptep_set_wrprotect(struct mm_struct *mm, 1091 unsigned long addr, pte_t *ptep) 1092 { 1093 clear_bit(_PAGE_BIT_RW, (unsigned long *)&ptep->pte); 1094 } 1095 1096 #define flush_tlb_fix_spurious_fault(vma, address, ptep) do { } while (0) 1097 1098 #define mk_pmd(page, pgprot) pfn_pmd(page_to_pfn(page), (pgprot)) 1099 1100 #define __HAVE_ARCH_PMDP_SET_ACCESS_FLAGS 1101 extern int pmdp_set_access_flags(struct vm_area_struct *vma, 1102 unsigned long address, pmd_t *pmdp, 1103 pmd_t entry, int dirty); 1104 extern int pudp_set_access_flags(struct vm_area_struct *vma, 1105 unsigned long address, pud_t *pudp, 1106 pud_t entry, int dirty); 1107 1108 #define __HAVE_ARCH_PMDP_TEST_AND_CLEAR_YOUNG 1109 extern int pmdp_test_and_clear_young(struct vm_area_struct *vma, 1110 unsigned long addr, pmd_t *pmdp); 1111 extern int pudp_test_and_clear_young(struct vm_area_struct *vma, 1112 unsigned long addr, pud_t *pudp); 1113 1114 #define __HAVE_ARCH_PMDP_CLEAR_YOUNG_FLUSH 1115 extern int pmdp_clear_flush_young(struct vm_area_struct *vma, 1116 unsigned long address, pmd_t *pmdp); 1117 1118 1119 #define pmd_write pmd_write 1120 static inline int pmd_write(pmd_t pmd) 1121 { 1122 return pmd_flags(pmd) & _PAGE_RW; 1123 } 1124 1125 #define __HAVE_ARCH_PMDP_HUGE_GET_AND_CLEAR 1126 static inline pmd_t pmdp_huge_get_and_clear(struct mm_struct *mm, unsigned long addr, 1127 pmd_t *pmdp) 1128 { 1129 pmd_t pmd = native_pmdp_get_and_clear(pmdp); 1130 1131 page_table_check_pmd_clear(mm, pmd); 1132 1133 return pmd; 1134 } 1135 1136 #define __HAVE_ARCH_PUDP_HUGE_GET_AND_CLEAR 1137 static inline pud_t pudp_huge_get_and_clear(struct mm_struct *mm, 1138 unsigned long addr, pud_t *pudp) 1139 { 1140 pud_t pud = native_pudp_get_and_clear(pudp); 1141 1142 page_table_check_pud_clear(mm, pud); 1143 1144 return pud; 1145 } 1146 1147 #define __HAVE_ARCH_PMDP_SET_WRPROTECT 1148 static inline void pmdp_set_wrprotect(struct mm_struct *mm, 1149 unsigned long addr, pmd_t *pmdp) 1150 { 1151 clear_bit(_PAGE_BIT_RW, (unsigned long *)pmdp); 1152 } 1153 1154 #define pud_write pud_write 1155 static inline int pud_write(pud_t pud) 1156 { 1157 return pud_flags(pud) & _PAGE_RW; 1158 } 1159 1160 #ifndef pmdp_establish 1161 #define pmdp_establish pmdp_establish 1162 static inline pmd_t pmdp_establish(struct vm_area_struct *vma, 1163 unsigned long address, pmd_t *pmdp, pmd_t pmd) 1164 { 1165 page_table_check_pmd_set(vma->vm_mm, pmdp, pmd); 1166 if (IS_ENABLED(CONFIG_SMP)) { 1167 return xchg(pmdp, pmd); 1168 } else { 1169 pmd_t old = *pmdp; 1170 WRITE_ONCE(*pmdp, pmd); 1171 return old; 1172 } 1173 } 1174 #endif 1175 1176 #define __HAVE_ARCH_PMDP_INVALIDATE_AD 1177 extern pmd_t pmdp_invalidate_ad(struct vm_area_struct *vma, 1178 unsigned long address, pmd_t *pmdp); 1179 1180 /* 1181 * Page table pages are page-aligned. The lower half of the top 1182 * level is used for userspace and the top half for the kernel. 1183 * 1184 * Returns true for parts of the PGD that map userspace and 1185 * false for the parts that map the kernel. 1186 */ 1187 static inline bool pgdp_maps_userspace(void *__ptr) 1188 { 1189 unsigned long ptr = (unsigned long)__ptr; 1190 1191 return (((ptr & ~PAGE_MASK) / sizeof(pgd_t)) < PGD_KERNEL_START); 1192 } 1193 1194 #define pgd_leaf pgd_large 1195 static inline int pgd_large(pgd_t pgd) { return 0; } 1196 1197 #ifdef CONFIG_PAGE_TABLE_ISOLATION 1198 /* 1199 * All top-level PAGE_TABLE_ISOLATION page tables are order-1 pages 1200 * (8k-aligned and 8k in size). The kernel one is at the beginning 4k and 1201 * the user one is in the last 4k. To switch between them, you 1202 * just need to flip the 12th bit in their addresses. 1203 */ 1204 #define PTI_PGTABLE_SWITCH_BIT PAGE_SHIFT 1205 1206 /* 1207 * This generates better code than the inline assembly in 1208 * __set_bit(). 1209 */ 1210 static inline void *ptr_set_bit(void *ptr, int bit) 1211 { 1212 unsigned long __ptr = (unsigned long)ptr; 1213 1214 __ptr |= BIT(bit); 1215 return (void *)__ptr; 1216 } 1217 static inline void *ptr_clear_bit(void *ptr, int bit) 1218 { 1219 unsigned long __ptr = (unsigned long)ptr; 1220 1221 __ptr &= ~BIT(bit); 1222 return (void *)__ptr; 1223 } 1224 1225 static inline pgd_t *kernel_to_user_pgdp(pgd_t *pgdp) 1226 { 1227 return ptr_set_bit(pgdp, PTI_PGTABLE_SWITCH_BIT); 1228 } 1229 1230 static inline pgd_t *user_to_kernel_pgdp(pgd_t *pgdp) 1231 { 1232 return ptr_clear_bit(pgdp, PTI_PGTABLE_SWITCH_BIT); 1233 } 1234 1235 static inline p4d_t *kernel_to_user_p4dp(p4d_t *p4dp) 1236 { 1237 return ptr_set_bit(p4dp, PTI_PGTABLE_SWITCH_BIT); 1238 } 1239 1240 static inline p4d_t *user_to_kernel_p4dp(p4d_t *p4dp) 1241 { 1242 return ptr_clear_bit(p4dp, PTI_PGTABLE_SWITCH_BIT); 1243 } 1244 #endif /* CONFIG_PAGE_TABLE_ISOLATION */ 1245 1246 /* 1247 * clone_pgd_range(pgd_t *dst, pgd_t *src, int count); 1248 * 1249 * dst - pointer to pgd range anywhere on a pgd page 1250 * src - "" 1251 * count - the number of pgds to copy. 1252 * 1253 * dst and src can be on the same page, but the range must not overlap, 1254 * and must not cross a page boundary. 1255 */ 1256 static inline void clone_pgd_range(pgd_t *dst, pgd_t *src, int count) 1257 { 1258 memcpy(dst, src, count * sizeof(pgd_t)); 1259 #ifdef CONFIG_PAGE_TABLE_ISOLATION 1260 if (!static_cpu_has(X86_FEATURE_PTI)) 1261 return; 1262 /* Clone the user space pgd as well */ 1263 memcpy(kernel_to_user_pgdp(dst), kernel_to_user_pgdp(src), 1264 count * sizeof(pgd_t)); 1265 #endif 1266 } 1267 1268 #define PTE_SHIFT ilog2(PTRS_PER_PTE) 1269 static inline int page_level_shift(enum pg_level level) 1270 { 1271 return (PAGE_SHIFT - PTE_SHIFT) + level * PTE_SHIFT; 1272 } 1273 static inline unsigned long page_level_size(enum pg_level level) 1274 { 1275 return 1UL << page_level_shift(level); 1276 } 1277 static inline unsigned long page_level_mask(enum pg_level level) 1278 { 1279 return ~(page_level_size(level) - 1); 1280 } 1281 1282 /* 1283 * The x86 doesn't have any external MMU info: the kernel page 1284 * tables contain all the necessary information. 1285 */ 1286 static inline void update_mmu_cache(struct vm_area_struct *vma, 1287 unsigned long addr, pte_t *ptep) 1288 { 1289 } 1290 static inline void update_mmu_cache_range(struct vm_fault *vmf, 1291 struct vm_area_struct *vma, unsigned long addr, 1292 pte_t *ptep, unsigned int nr) 1293 { 1294 } 1295 static inline void update_mmu_cache_pmd(struct vm_area_struct *vma, 1296 unsigned long addr, pmd_t *pmd) 1297 { 1298 } 1299 static inline void update_mmu_cache_pud(struct vm_area_struct *vma, 1300 unsigned long addr, pud_t *pud) 1301 { 1302 } 1303 static inline pte_t pte_swp_mkexclusive(pte_t pte) 1304 { 1305 return pte_set_flags(pte, _PAGE_SWP_EXCLUSIVE); 1306 } 1307 1308 static inline int pte_swp_exclusive(pte_t pte) 1309 { 1310 return pte_flags(pte) & _PAGE_SWP_EXCLUSIVE; 1311 } 1312 1313 static inline pte_t pte_swp_clear_exclusive(pte_t pte) 1314 { 1315 return pte_clear_flags(pte, _PAGE_SWP_EXCLUSIVE); 1316 } 1317 1318 #ifdef CONFIG_HAVE_ARCH_SOFT_DIRTY 1319 static inline pte_t pte_swp_mksoft_dirty(pte_t pte) 1320 { 1321 return pte_set_flags(pte, _PAGE_SWP_SOFT_DIRTY); 1322 } 1323 1324 static inline int pte_swp_soft_dirty(pte_t pte) 1325 { 1326 return pte_flags(pte) & _PAGE_SWP_SOFT_DIRTY; 1327 } 1328 1329 static inline pte_t pte_swp_clear_soft_dirty(pte_t pte) 1330 { 1331 return pte_clear_flags(pte, _PAGE_SWP_SOFT_DIRTY); 1332 } 1333 1334 #ifdef CONFIG_ARCH_ENABLE_THP_MIGRATION 1335 static inline pmd_t pmd_swp_mksoft_dirty(pmd_t pmd) 1336 { 1337 return pmd_set_flags(pmd, _PAGE_SWP_SOFT_DIRTY); 1338 } 1339 1340 static inline int pmd_swp_soft_dirty(pmd_t pmd) 1341 { 1342 return pmd_flags(pmd) & _PAGE_SWP_SOFT_DIRTY; 1343 } 1344 1345 static inline pmd_t pmd_swp_clear_soft_dirty(pmd_t pmd) 1346 { 1347 return pmd_clear_flags(pmd, _PAGE_SWP_SOFT_DIRTY); 1348 } 1349 #endif 1350 #endif 1351 1352 #ifdef CONFIG_HAVE_ARCH_USERFAULTFD_WP 1353 static inline pte_t pte_swp_mkuffd_wp(pte_t pte) 1354 { 1355 return pte_set_flags(pte, _PAGE_SWP_UFFD_WP); 1356 } 1357 1358 static inline int pte_swp_uffd_wp(pte_t pte) 1359 { 1360 return pte_flags(pte) & _PAGE_SWP_UFFD_WP; 1361 } 1362 1363 static inline pte_t pte_swp_clear_uffd_wp(pte_t pte) 1364 { 1365 return pte_clear_flags(pte, _PAGE_SWP_UFFD_WP); 1366 } 1367 1368 static inline pmd_t pmd_swp_mkuffd_wp(pmd_t pmd) 1369 { 1370 return pmd_set_flags(pmd, _PAGE_SWP_UFFD_WP); 1371 } 1372 1373 static inline int pmd_swp_uffd_wp(pmd_t pmd) 1374 { 1375 return pmd_flags(pmd) & _PAGE_SWP_UFFD_WP; 1376 } 1377 1378 static inline pmd_t pmd_swp_clear_uffd_wp(pmd_t pmd) 1379 { 1380 return pmd_clear_flags(pmd, _PAGE_SWP_UFFD_WP); 1381 } 1382 #endif /* CONFIG_HAVE_ARCH_USERFAULTFD_WP */ 1383 1384 static inline u16 pte_flags_pkey(unsigned long pte_flags) 1385 { 1386 #ifdef CONFIG_X86_INTEL_MEMORY_PROTECTION_KEYS 1387 /* ifdef to avoid doing 59-bit shift on 32-bit values */ 1388 return (pte_flags & _PAGE_PKEY_MASK) >> _PAGE_BIT_PKEY_BIT0; 1389 #else 1390 return 0; 1391 #endif 1392 } 1393 1394 static inline bool __pkru_allows_pkey(u16 pkey, bool write) 1395 { 1396 u32 pkru = read_pkru(); 1397 1398 if (!__pkru_allows_read(pkru, pkey)) 1399 return false; 1400 if (write && !__pkru_allows_write(pkru, pkey)) 1401 return false; 1402 1403 return true; 1404 } 1405 1406 /* 1407 * 'pteval' can come from a PTE, PMD or PUD. We only check 1408 * _PAGE_PRESENT, _PAGE_USER, and _PAGE_RW in here which are the 1409 * same value on all 3 types. 1410 */ 1411 static inline bool __pte_access_permitted(unsigned long pteval, bool write) 1412 { 1413 unsigned long need_pte_bits = _PAGE_PRESENT|_PAGE_USER; 1414 1415 if (write) 1416 need_pte_bits |= _PAGE_RW; 1417 1418 if ((pteval & need_pte_bits) != need_pte_bits) 1419 return 0; 1420 1421 return __pkru_allows_pkey(pte_flags_pkey(pteval), write); 1422 } 1423 1424 #define pte_access_permitted pte_access_permitted 1425 static inline bool pte_access_permitted(pte_t pte, bool write) 1426 { 1427 return __pte_access_permitted(pte_val(pte), write); 1428 } 1429 1430 #define pmd_access_permitted pmd_access_permitted 1431 static inline bool pmd_access_permitted(pmd_t pmd, bool write) 1432 { 1433 return __pte_access_permitted(pmd_val(pmd), write); 1434 } 1435 1436 #define pud_access_permitted pud_access_permitted 1437 static inline bool pud_access_permitted(pud_t pud, bool write) 1438 { 1439 return __pte_access_permitted(pud_val(pud), write); 1440 } 1441 1442 #define __HAVE_ARCH_PFN_MODIFY_ALLOWED 1 1443 extern bool pfn_modify_allowed(unsigned long pfn, pgprot_t prot); 1444 1445 static inline bool arch_has_pfn_modify_check(void) 1446 { 1447 return boot_cpu_has_bug(X86_BUG_L1TF); 1448 } 1449 1450 #define arch_has_hw_pte_young arch_has_hw_pte_young 1451 static inline bool arch_has_hw_pte_young(void) 1452 { 1453 return true; 1454 } 1455 1456 #ifdef CONFIG_XEN_PV 1457 #define arch_has_hw_nonleaf_pmd_young arch_has_hw_nonleaf_pmd_young 1458 static inline bool arch_has_hw_nonleaf_pmd_young(void) 1459 { 1460 return !cpu_feature_enabled(X86_FEATURE_XENPV); 1461 } 1462 #endif 1463 1464 #ifdef CONFIG_PAGE_TABLE_CHECK 1465 static inline bool pte_user_accessible_page(pte_t pte) 1466 { 1467 return (pte_val(pte) & _PAGE_PRESENT) && (pte_val(pte) & _PAGE_USER); 1468 } 1469 1470 static inline bool pmd_user_accessible_page(pmd_t pmd) 1471 { 1472 return pmd_leaf(pmd) && (pmd_val(pmd) & _PAGE_PRESENT) && (pmd_val(pmd) & _PAGE_USER); 1473 } 1474 1475 static inline bool pud_user_accessible_page(pud_t pud) 1476 { 1477 return pud_leaf(pud) && (pud_val(pud) & _PAGE_PRESENT) && (pud_val(pud) & _PAGE_USER); 1478 } 1479 #endif 1480 1481 #endif /* __ASSEMBLY__ */ 1482 1483 #endif /* _ASM_X86_PGTABLE_H */ 1484