1 #ifndef _ASM_X86_PGTABLE_H 2 #define _ASM_X86_PGTABLE_H 3 4 #include <linux/mem_encrypt.h> 5 #include <asm/page.h> 6 #include <asm/pgtable_types.h> 7 8 /* 9 * Macro to mark a page protection value as UC- 10 */ 11 #define pgprot_noncached(prot) \ 12 ((boot_cpu_data.x86 > 3) \ 13 ? (__pgprot(pgprot_val(prot) | \ 14 cachemode2protval(_PAGE_CACHE_MODE_UC_MINUS))) \ 15 : (prot)) 16 17 /* 18 * Macros to add or remove encryption attribute 19 */ 20 #define pgprot_encrypted(prot) __pgprot(__sme_set(pgprot_val(prot))) 21 #define pgprot_decrypted(prot) __pgprot(__sme_clr(pgprot_val(prot))) 22 23 #ifndef __ASSEMBLY__ 24 #include <asm/x86_init.h> 25 26 extern pgd_t early_top_pgt[PTRS_PER_PGD]; 27 int __init __early_make_pgtable(unsigned long address, pmdval_t pmd); 28 29 void ptdump_walk_pgd_level(struct seq_file *m, pgd_t *pgd); 30 void ptdump_walk_pgd_level_checkwx(void); 31 32 #ifdef CONFIG_DEBUG_WX 33 #define debug_checkwx() ptdump_walk_pgd_level_checkwx() 34 #else 35 #define debug_checkwx() do { } while (0) 36 #endif 37 38 /* 39 * ZERO_PAGE is a global shared page that is always zero: used 40 * for zero-mapped memory areas etc.. 41 */ 42 extern unsigned long empty_zero_page[PAGE_SIZE / sizeof(unsigned long)] 43 __visible; 44 #define ZERO_PAGE(vaddr) (virt_to_page(empty_zero_page)) 45 46 extern spinlock_t pgd_lock; 47 extern struct list_head pgd_list; 48 49 extern struct mm_struct *pgd_page_get_mm(struct page *page); 50 51 extern pmdval_t early_pmd_flags; 52 53 #ifdef CONFIG_PARAVIRT 54 #include <asm/paravirt.h> 55 #else /* !CONFIG_PARAVIRT */ 56 #define set_pte(ptep, pte) native_set_pte(ptep, pte) 57 #define set_pte_at(mm, addr, ptep, pte) native_set_pte_at(mm, addr, ptep, pte) 58 59 #define set_pte_atomic(ptep, pte) \ 60 native_set_pte_atomic(ptep, pte) 61 62 #define set_pmd(pmdp, pmd) native_set_pmd(pmdp, pmd) 63 64 #ifndef __PAGETABLE_P4D_FOLDED 65 #define set_pgd(pgdp, pgd) native_set_pgd(pgdp, pgd) 66 #define pgd_clear(pgd) native_pgd_clear(pgd) 67 #endif 68 69 #ifndef set_p4d 70 # define set_p4d(p4dp, p4d) native_set_p4d(p4dp, p4d) 71 #endif 72 73 #ifndef __PAGETABLE_PUD_FOLDED 74 #define p4d_clear(p4d) native_p4d_clear(p4d) 75 #endif 76 77 #ifndef set_pud 78 # define set_pud(pudp, pud) native_set_pud(pudp, pud) 79 #endif 80 81 #ifndef __PAGETABLE_PUD_FOLDED 82 #define pud_clear(pud) native_pud_clear(pud) 83 #endif 84 85 #define pte_clear(mm, addr, ptep) native_pte_clear(mm, addr, ptep) 86 #define pmd_clear(pmd) native_pmd_clear(pmd) 87 88 #define pgd_val(x) native_pgd_val(x) 89 #define __pgd(x) native_make_pgd(x) 90 91 #ifndef __PAGETABLE_P4D_FOLDED 92 #define p4d_val(x) native_p4d_val(x) 93 #define __p4d(x) native_make_p4d(x) 94 #endif 95 96 #ifndef __PAGETABLE_PUD_FOLDED 97 #define pud_val(x) native_pud_val(x) 98 #define __pud(x) native_make_pud(x) 99 #endif 100 101 #ifndef __PAGETABLE_PMD_FOLDED 102 #define pmd_val(x) native_pmd_val(x) 103 #define __pmd(x) native_make_pmd(x) 104 #endif 105 106 #define pte_val(x) native_pte_val(x) 107 #define __pte(x) native_make_pte(x) 108 109 #define arch_end_context_switch(prev) do {} while(0) 110 111 #endif /* CONFIG_PARAVIRT */ 112 113 /* 114 * The following only work if pte_present() is true. 115 * Undefined behaviour if not.. 116 */ 117 static inline int pte_dirty(pte_t pte) 118 { 119 return pte_flags(pte) & _PAGE_DIRTY; 120 } 121 122 123 static inline u32 read_pkru(void) 124 { 125 if (boot_cpu_has(X86_FEATURE_OSPKE)) 126 return __read_pkru(); 127 return 0; 128 } 129 130 static inline void write_pkru(u32 pkru) 131 { 132 if (boot_cpu_has(X86_FEATURE_OSPKE)) 133 __write_pkru(pkru); 134 } 135 136 static inline int pte_young(pte_t pte) 137 { 138 return pte_flags(pte) & _PAGE_ACCESSED; 139 } 140 141 static inline int pmd_dirty(pmd_t pmd) 142 { 143 return pmd_flags(pmd) & _PAGE_DIRTY; 144 } 145 146 static inline int pmd_young(pmd_t pmd) 147 { 148 return pmd_flags(pmd) & _PAGE_ACCESSED; 149 } 150 151 static inline int pud_dirty(pud_t pud) 152 { 153 return pud_flags(pud) & _PAGE_DIRTY; 154 } 155 156 static inline int pud_young(pud_t pud) 157 { 158 return pud_flags(pud) & _PAGE_ACCESSED; 159 } 160 161 static inline int pte_write(pte_t pte) 162 { 163 return pte_flags(pte) & _PAGE_RW; 164 } 165 166 static inline int pte_huge(pte_t pte) 167 { 168 return pte_flags(pte) & _PAGE_PSE; 169 } 170 171 static inline int pte_global(pte_t pte) 172 { 173 return pte_flags(pte) & _PAGE_GLOBAL; 174 } 175 176 static inline int pte_exec(pte_t pte) 177 { 178 return !(pte_flags(pte) & _PAGE_NX); 179 } 180 181 static inline int pte_special(pte_t pte) 182 { 183 return pte_flags(pte) & _PAGE_SPECIAL; 184 } 185 186 static inline unsigned long pte_pfn(pte_t pte) 187 { 188 return (pte_val(pte) & PTE_PFN_MASK) >> PAGE_SHIFT; 189 } 190 191 static inline unsigned long pmd_pfn(pmd_t pmd) 192 { 193 return (pmd_val(pmd) & pmd_pfn_mask(pmd)) >> PAGE_SHIFT; 194 } 195 196 static inline unsigned long pud_pfn(pud_t pud) 197 { 198 return (pud_val(pud) & pud_pfn_mask(pud)) >> PAGE_SHIFT; 199 } 200 201 static inline unsigned long p4d_pfn(p4d_t p4d) 202 { 203 return (p4d_val(p4d) & p4d_pfn_mask(p4d)) >> PAGE_SHIFT; 204 } 205 206 static inline unsigned long pgd_pfn(pgd_t pgd) 207 { 208 return (pgd_val(pgd) & PTE_PFN_MASK) >> PAGE_SHIFT; 209 } 210 211 static inline int p4d_large(p4d_t p4d) 212 { 213 /* No 512 GiB pages yet */ 214 return 0; 215 } 216 217 #define pte_page(pte) pfn_to_page(pte_pfn(pte)) 218 219 static inline int pmd_large(pmd_t pte) 220 { 221 return pmd_flags(pte) & _PAGE_PSE; 222 } 223 224 #ifdef CONFIG_TRANSPARENT_HUGEPAGE 225 static inline int pmd_trans_huge(pmd_t pmd) 226 { 227 return (pmd_val(pmd) & (_PAGE_PSE|_PAGE_DEVMAP)) == _PAGE_PSE; 228 } 229 230 #ifdef CONFIG_HAVE_ARCH_TRANSPARENT_HUGEPAGE_PUD 231 static inline int pud_trans_huge(pud_t pud) 232 { 233 return (pud_val(pud) & (_PAGE_PSE|_PAGE_DEVMAP)) == _PAGE_PSE; 234 } 235 #endif 236 237 #define has_transparent_hugepage has_transparent_hugepage 238 static inline int has_transparent_hugepage(void) 239 { 240 return boot_cpu_has(X86_FEATURE_PSE); 241 } 242 243 #ifdef __HAVE_ARCH_PTE_DEVMAP 244 static inline int pmd_devmap(pmd_t pmd) 245 { 246 return !!(pmd_val(pmd) & _PAGE_DEVMAP); 247 } 248 249 #ifdef CONFIG_HAVE_ARCH_TRANSPARENT_HUGEPAGE_PUD 250 static inline int pud_devmap(pud_t pud) 251 { 252 return !!(pud_val(pud) & _PAGE_DEVMAP); 253 } 254 #else 255 static inline int pud_devmap(pud_t pud) 256 { 257 return 0; 258 } 259 #endif 260 261 static inline int pgd_devmap(pgd_t pgd) 262 { 263 return 0; 264 } 265 #endif 266 #endif /* CONFIG_TRANSPARENT_HUGEPAGE */ 267 268 static inline pte_t pte_set_flags(pte_t pte, pteval_t set) 269 { 270 pteval_t v = native_pte_val(pte); 271 272 return native_make_pte(v | set); 273 } 274 275 static inline pte_t pte_clear_flags(pte_t pte, pteval_t clear) 276 { 277 pteval_t v = native_pte_val(pte); 278 279 return native_make_pte(v & ~clear); 280 } 281 282 static inline pte_t pte_mkclean(pte_t pte) 283 { 284 return pte_clear_flags(pte, _PAGE_DIRTY); 285 } 286 287 static inline pte_t pte_mkold(pte_t pte) 288 { 289 return pte_clear_flags(pte, _PAGE_ACCESSED); 290 } 291 292 static inline pte_t pte_wrprotect(pte_t pte) 293 { 294 return pte_clear_flags(pte, _PAGE_RW); 295 } 296 297 static inline pte_t pte_mkexec(pte_t pte) 298 { 299 return pte_clear_flags(pte, _PAGE_NX); 300 } 301 302 static inline pte_t pte_mkdirty(pte_t pte) 303 { 304 return pte_set_flags(pte, _PAGE_DIRTY | _PAGE_SOFT_DIRTY); 305 } 306 307 static inline pte_t pte_mkyoung(pte_t pte) 308 { 309 return pte_set_flags(pte, _PAGE_ACCESSED); 310 } 311 312 static inline pte_t pte_mkwrite(pte_t pte) 313 { 314 return pte_set_flags(pte, _PAGE_RW); 315 } 316 317 static inline pte_t pte_mkhuge(pte_t pte) 318 { 319 return pte_set_flags(pte, _PAGE_PSE); 320 } 321 322 static inline pte_t pte_clrhuge(pte_t pte) 323 { 324 return pte_clear_flags(pte, _PAGE_PSE); 325 } 326 327 static inline pte_t pte_mkglobal(pte_t pte) 328 { 329 return pte_set_flags(pte, _PAGE_GLOBAL); 330 } 331 332 static inline pte_t pte_clrglobal(pte_t pte) 333 { 334 return pte_clear_flags(pte, _PAGE_GLOBAL); 335 } 336 337 static inline pte_t pte_mkspecial(pte_t pte) 338 { 339 return pte_set_flags(pte, _PAGE_SPECIAL); 340 } 341 342 static inline pte_t pte_mkdevmap(pte_t pte) 343 { 344 return pte_set_flags(pte, _PAGE_SPECIAL|_PAGE_DEVMAP); 345 } 346 347 static inline pmd_t pmd_set_flags(pmd_t pmd, pmdval_t set) 348 { 349 pmdval_t v = native_pmd_val(pmd); 350 351 return __pmd(v | set); 352 } 353 354 static inline pmd_t pmd_clear_flags(pmd_t pmd, pmdval_t clear) 355 { 356 pmdval_t v = native_pmd_val(pmd); 357 358 return __pmd(v & ~clear); 359 } 360 361 static inline pmd_t pmd_mkold(pmd_t pmd) 362 { 363 return pmd_clear_flags(pmd, _PAGE_ACCESSED); 364 } 365 366 static inline pmd_t pmd_mkclean(pmd_t pmd) 367 { 368 return pmd_clear_flags(pmd, _PAGE_DIRTY); 369 } 370 371 static inline pmd_t pmd_wrprotect(pmd_t pmd) 372 { 373 return pmd_clear_flags(pmd, _PAGE_RW); 374 } 375 376 static inline pmd_t pmd_mkdirty(pmd_t pmd) 377 { 378 return pmd_set_flags(pmd, _PAGE_DIRTY | _PAGE_SOFT_DIRTY); 379 } 380 381 static inline pmd_t pmd_mkdevmap(pmd_t pmd) 382 { 383 return pmd_set_flags(pmd, _PAGE_DEVMAP); 384 } 385 386 static inline pmd_t pmd_mkhuge(pmd_t pmd) 387 { 388 return pmd_set_flags(pmd, _PAGE_PSE); 389 } 390 391 static inline pmd_t pmd_mkyoung(pmd_t pmd) 392 { 393 return pmd_set_flags(pmd, _PAGE_ACCESSED); 394 } 395 396 static inline pmd_t pmd_mkwrite(pmd_t pmd) 397 { 398 return pmd_set_flags(pmd, _PAGE_RW); 399 } 400 401 static inline pmd_t pmd_mknotpresent(pmd_t pmd) 402 { 403 return pmd_clear_flags(pmd, _PAGE_PRESENT | _PAGE_PROTNONE); 404 } 405 406 static inline pud_t pud_set_flags(pud_t pud, pudval_t set) 407 { 408 pudval_t v = native_pud_val(pud); 409 410 return __pud(v | set); 411 } 412 413 static inline pud_t pud_clear_flags(pud_t pud, pudval_t clear) 414 { 415 pudval_t v = native_pud_val(pud); 416 417 return __pud(v & ~clear); 418 } 419 420 static inline pud_t pud_mkold(pud_t pud) 421 { 422 return pud_clear_flags(pud, _PAGE_ACCESSED); 423 } 424 425 static inline pud_t pud_mkclean(pud_t pud) 426 { 427 return pud_clear_flags(pud, _PAGE_DIRTY); 428 } 429 430 static inline pud_t pud_wrprotect(pud_t pud) 431 { 432 return pud_clear_flags(pud, _PAGE_RW); 433 } 434 435 static inline pud_t pud_mkdirty(pud_t pud) 436 { 437 return pud_set_flags(pud, _PAGE_DIRTY | _PAGE_SOFT_DIRTY); 438 } 439 440 static inline pud_t pud_mkdevmap(pud_t pud) 441 { 442 return pud_set_flags(pud, _PAGE_DEVMAP); 443 } 444 445 static inline pud_t pud_mkhuge(pud_t pud) 446 { 447 return pud_set_flags(pud, _PAGE_PSE); 448 } 449 450 static inline pud_t pud_mkyoung(pud_t pud) 451 { 452 return pud_set_flags(pud, _PAGE_ACCESSED); 453 } 454 455 static inline pud_t pud_mkwrite(pud_t pud) 456 { 457 return pud_set_flags(pud, _PAGE_RW); 458 } 459 460 static inline pud_t pud_mknotpresent(pud_t pud) 461 { 462 return pud_clear_flags(pud, _PAGE_PRESENT | _PAGE_PROTNONE); 463 } 464 465 #ifdef CONFIG_HAVE_ARCH_SOFT_DIRTY 466 static inline int pte_soft_dirty(pte_t pte) 467 { 468 return pte_flags(pte) & _PAGE_SOFT_DIRTY; 469 } 470 471 static inline int pmd_soft_dirty(pmd_t pmd) 472 { 473 return pmd_flags(pmd) & _PAGE_SOFT_DIRTY; 474 } 475 476 static inline int pud_soft_dirty(pud_t pud) 477 { 478 return pud_flags(pud) & _PAGE_SOFT_DIRTY; 479 } 480 481 static inline pte_t pte_mksoft_dirty(pte_t pte) 482 { 483 return pte_set_flags(pte, _PAGE_SOFT_DIRTY); 484 } 485 486 static inline pmd_t pmd_mksoft_dirty(pmd_t pmd) 487 { 488 return pmd_set_flags(pmd, _PAGE_SOFT_DIRTY); 489 } 490 491 static inline pud_t pud_mksoft_dirty(pud_t pud) 492 { 493 return pud_set_flags(pud, _PAGE_SOFT_DIRTY); 494 } 495 496 static inline pte_t pte_clear_soft_dirty(pte_t pte) 497 { 498 return pte_clear_flags(pte, _PAGE_SOFT_DIRTY); 499 } 500 501 static inline pmd_t pmd_clear_soft_dirty(pmd_t pmd) 502 { 503 return pmd_clear_flags(pmd, _PAGE_SOFT_DIRTY); 504 } 505 506 static inline pud_t pud_clear_soft_dirty(pud_t pud) 507 { 508 return pud_clear_flags(pud, _PAGE_SOFT_DIRTY); 509 } 510 511 #endif /* CONFIG_HAVE_ARCH_SOFT_DIRTY */ 512 513 /* 514 * Mask out unsupported bits in a present pgprot. Non-present pgprots 515 * can use those bits for other purposes, so leave them be. 516 */ 517 static inline pgprotval_t massage_pgprot(pgprot_t pgprot) 518 { 519 pgprotval_t protval = pgprot_val(pgprot); 520 521 if (protval & _PAGE_PRESENT) 522 protval &= __supported_pte_mask; 523 524 return protval; 525 } 526 527 static inline pte_t pfn_pte(unsigned long page_nr, pgprot_t pgprot) 528 { 529 return __pte(((phys_addr_t)page_nr << PAGE_SHIFT) | 530 massage_pgprot(pgprot)); 531 } 532 533 static inline pmd_t pfn_pmd(unsigned long page_nr, pgprot_t pgprot) 534 { 535 return __pmd(((phys_addr_t)page_nr << PAGE_SHIFT) | 536 massage_pgprot(pgprot)); 537 } 538 539 static inline pud_t pfn_pud(unsigned long page_nr, pgprot_t pgprot) 540 { 541 return __pud(((phys_addr_t)page_nr << PAGE_SHIFT) | 542 massage_pgprot(pgprot)); 543 } 544 545 static inline pte_t pte_modify(pte_t pte, pgprot_t newprot) 546 { 547 pteval_t val = pte_val(pte); 548 549 /* 550 * Chop off the NX bit (if present), and add the NX portion of 551 * the newprot (if present): 552 */ 553 val &= _PAGE_CHG_MASK; 554 val |= massage_pgprot(newprot) & ~_PAGE_CHG_MASK; 555 556 return __pte(val); 557 } 558 559 static inline pmd_t pmd_modify(pmd_t pmd, pgprot_t newprot) 560 { 561 pmdval_t val = pmd_val(pmd); 562 563 val &= _HPAGE_CHG_MASK; 564 val |= massage_pgprot(newprot) & ~_HPAGE_CHG_MASK; 565 566 return __pmd(val); 567 } 568 569 /* mprotect needs to preserve PAT bits when updating vm_page_prot */ 570 #define pgprot_modify pgprot_modify 571 static inline pgprot_t pgprot_modify(pgprot_t oldprot, pgprot_t newprot) 572 { 573 pgprotval_t preservebits = pgprot_val(oldprot) & _PAGE_CHG_MASK; 574 pgprotval_t addbits = pgprot_val(newprot); 575 return __pgprot(preservebits | addbits); 576 } 577 578 #define pte_pgprot(x) __pgprot(pte_flags(x)) 579 #define pmd_pgprot(x) __pgprot(pmd_flags(x)) 580 #define pud_pgprot(x) __pgprot(pud_flags(x)) 581 #define p4d_pgprot(x) __pgprot(p4d_flags(x)) 582 583 #define canon_pgprot(p) __pgprot(massage_pgprot(p)) 584 585 static inline int is_new_memtype_allowed(u64 paddr, unsigned long size, 586 enum page_cache_mode pcm, 587 enum page_cache_mode new_pcm) 588 { 589 /* 590 * PAT type is always WB for untracked ranges, so no need to check. 591 */ 592 if (x86_platform.is_untracked_pat_range(paddr, paddr + size)) 593 return 1; 594 595 /* 596 * Certain new memtypes are not allowed with certain 597 * requested memtype: 598 * - request is uncached, return cannot be write-back 599 * - request is write-combine, return cannot be write-back 600 * - request is write-through, return cannot be write-back 601 * - request is write-through, return cannot be write-combine 602 */ 603 if ((pcm == _PAGE_CACHE_MODE_UC_MINUS && 604 new_pcm == _PAGE_CACHE_MODE_WB) || 605 (pcm == _PAGE_CACHE_MODE_WC && 606 new_pcm == _PAGE_CACHE_MODE_WB) || 607 (pcm == _PAGE_CACHE_MODE_WT && 608 new_pcm == _PAGE_CACHE_MODE_WB) || 609 (pcm == _PAGE_CACHE_MODE_WT && 610 new_pcm == _PAGE_CACHE_MODE_WC)) { 611 return 0; 612 } 613 614 return 1; 615 } 616 617 pmd_t *populate_extra_pmd(unsigned long vaddr); 618 pte_t *populate_extra_pte(unsigned long vaddr); 619 #endif /* __ASSEMBLY__ */ 620 621 #ifdef CONFIG_X86_32 622 # include <asm/pgtable_32.h> 623 #else 624 # include <asm/pgtable_64.h> 625 #endif 626 627 #ifndef __ASSEMBLY__ 628 #include <linux/mm_types.h> 629 #include <linux/mmdebug.h> 630 #include <linux/log2.h> 631 #include <asm/fixmap.h> 632 633 static inline int pte_none(pte_t pte) 634 { 635 return !(pte.pte & ~(_PAGE_KNL_ERRATUM_MASK)); 636 } 637 638 #define __HAVE_ARCH_PTE_SAME 639 static inline int pte_same(pte_t a, pte_t b) 640 { 641 return a.pte == b.pte; 642 } 643 644 static inline int pte_present(pte_t a) 645 { 646 return pte_flags(a) & (_PAGE_PRESENT | _PAGE_PROTNONE); 647 } 648 649 #ifdef __HAVE_ARCH_PTE_DEVMAP 650 static inline int pte_devmap(pte_t a) 651 { 652 return (pte_flags(a) & _PAGE_DEVMAP) == _PAGE_DEVMAP; 653 } 654 #endif 655 656 #define pte_accessible pte_accessible 657 static inline bool pte_accessible(struct mm_struct *mm, pte_t a) 658 { 659 if (pte_flags(a) & _PAGE_PRESENT) 660 return true; 661 662 if ((pte_flags(a) & _PAGE_PROTNONE) && 663 mm_tlb_flush_pending(mm)) 664 return true; 665 666 return false; 667 } 668 669 static inline int pte_hidden(pte_t pte) 670 { 671 return pte_flags(pte) & _PAGE_HIDDEN; 672 } 673 674 static inline int pmd_present(pmd_t pmd) 675 { 676 /* 677 * Checking for _PAGE_PSE is needed too because 678 * split_huge_page will temporarily clear the present bit (but 679 * the _PAGE_PSE flag will remain set at all times while the 680 * _PAGE_PRESENT bit is clear). 681 */ 682 return pmd_flags(pmd) & (_PAGE_PRESENT | _PAGE_PROTNONE | _PAGE_PSE); 683 } 684 685 #ifdef CONFIG_NUMA_BALANCING 686 /* 687 * These work without NUMA balancing but the kernel does not care. See the 688 * comment in include/asm-generic/pgtable.h 689 */ 690 static inline int pte_protnone(pte_t pte) 691 { 692 return (pte_flags(pte) & (_PAGE_PROTNONE | _PAGE_PRESENT)) 693 == _PAGE_PROTNONE; 694 } 695 696 static inline int pmd_protnone(pmd_t pmd) 697 { 698 return (pmd_flags(pmd) & (_PAGE_PROTNONE | _PAGE_PRESENT)) 699 == _PAGE_PROTNONE; 700 } 701 #endif /* CONFIG_NUMA_BALANCING */ 702 703 static inline int pmd_none(pmd_t pmd) 704 { 705 /* Only check low word on 32-bit platforms, since it might be 706 out of sync with upper half. */ 707 unsigned long val = native_pmd_val(pmd); 708 return (val & ~_PAGE_KNL_ERRATUM_MASK) == 0; 709 } 710 711 static inline unsigned long pmd_page_vaddr(pmd_t pmd) 712 { 713 return (unsigned long)__va(pmd_val(pmd) & pmd_pfn_mask(pmd)); 714 } 715 716 /* 717 * Currently stuck as a macro due to indirect forward reference to 718 * linux/mmzone.h's __section_mem_map_addr() definition: 719 */ 720 #define pmd_page(pmd) pfn_to_page(pmd_pfn(pmd)) 721 722 /* 723 * the pmd page can be thought of an array like this: pmd_t[PTRS_PER_PMD] 724 * 725 * this macro returns the index of the entry in the pmd page which would 726 * control the given virtual address 727 */ 728 static inline unsigned long pmd_index(unsigned long address) 729 { 730 return (address >> PMD_SHIFT) & (PTRS_PER_PMD - 1); 731 } 732 733 /* 734 * Conversion functions: convert a page and protection to a page entry, 735 * and a page entry and page directory to the page they refer to. 736 * 737 * (Currently stuck as a macro because of indirect forward reference 738 * to linux/mm.h:page_to_nid()) 739 */ 740 #define mk_pte(page, pgprot) pfn_pte(page_to_pfn(page), (pgprot)) 741 742 /* 743 * the pte page can be thought of an array like this: pte_t[PTRS_PER_PTE] 744 * 745 * this function returns the index of the entry in the pte page which would 746 * control the given virtual address 747 */ 748 static inline unsigned long pte_index(unsigned long address) 749 { 750 return (address >> PAGE_SHIFT) & (PTRS_PER_PTE - 1); 751 } 752 753 static inline pte_t *pte_offset_kernel(pmd_t *pmd, unsigned long address) 754 { 755 return (pte_t *)pmd_page_vaddr(*pmd) + pte_index(address); 756 } 757 758 static inline int pmd_bad(pmd_t pmd) 759 { 760 return (pmd_flags(pmd) & ~_PAGE_USER) != _KERNPG_TABLE; 761 } 762 763 static inline unsigned long pages_to_mb(unsigned long npg) 764 { 765 return npg >> (20 - PAGE_SHIFT); 766 } 767 768 #if CONFIG_PGTABLE_LEVELS > 2 769 static inline int pud_none(pud_t pud) 770 { 771 return (native_pud_val(pud) & ~(_PAGE_KNL_ERRATUM_MASK)) == 0; 772 } 773 774 static inline int pud_present(pud_t pud) 775 { 776 return pud_flags(pud) & _PAGE_PRESENT; 777 } 778 779 static inline unsigned long pud_page_vaddr(pud_t pud) 780 { 781 return (unsigned long)__va(pud_val(pud) & pud_pfn_mask(pud)); 782 } 783 784 /* 785 * Currently stuck as a macro due to indirect forward reference to 786 * linux/mmzone.h's __section_mem_map_addr() definition: 787 */ 788 #define pud_page(pud) pfn_to_page(pud_pfn(pud)) 789 790 /* Find an entry in the second-level page table.. */ 791 static inline pmd_t *pmd_offset(pud_t *pud, unsigned long address) 792 { 793 return (pmd_t *)pud_page_vaddr(*pud) + pmd_index(address); 794 } 795 796 static inline int pud_large(pud_t pud) 797 { 798 return (pud_val(pud) & (_PAGE_PSE | _PAGE_PRESENT)) == 799 (_PAGE_PSE | _PAGE_PRESENT); 800 } 801 802 static inline int pud_bad(pud_t pud) 803 { 804 return (pud_flags(pud) & ~(_KERNPG_TABLE | _PAGE_USER)) != 0; 805 } 806 #else 807 static inline int pud_large(pud_t pud) 808 { 809 return 0; 810 } 811 #endif /* CONFIG_PGTABLE_LEVELS > 2 */ 812 813 static inline unsigned long pud_index(unsigned long address) 814 { 815 return (address >> PUD_SHIFT) & (PTRS_PER_PUD - 1); 816 } 817 818 #if CONFIG_PGTABLE_LEVELS > 3 819 static inline int p4d_none(p4d_t p4d) 820 { 821 return (native_p4d_val(p4d) & ~(_PAGE_KNL_ERRATUM_MASK)) == 0; 822 } 823 824 static inline int p4d_present(p4d_t p4d) 825 { 826 return p4d_flags(p4d) & _PAGE_PRESENT; 827 } 828 829 static inline unsigned long p4d_page_vaddr(p4d_t p4d) 830 { 831 return (unsigned long)__va(p4d_val(p4d) & p4d_pfn_mask(p4d)); 832 } 833 834 /* 835 * Currently stuck as a macro due to indirect forward reference to 836 * linux/mmzone.h's __section_mem_map_addr() definition: 837 */ 838 #define p4d_page(p4d) pfn_to_page(p4d_pfn(p4d)) 839 840 /* Find an entry in the third-level page table.. */ 841 static inline pud_t *pud_offset(p4d_t *p4d, unsigned long address) 842 { 843 return (pud_t *)p4d_page_vaddr(*p4d) + pud_index(address); 844 } 845 846 static inline int p4d_bad(p4d_t p4d) 847 { 848 return (p4d_flags(p4d) & ~(_KERNPG_TABLE | _PAGE_USER)) != 0; 849 } 850 #endif /* CONFIG_PGTABLE_LEVELS > 3 */ 851 852 static inline unsigned long p4d_index(unsigned long address) 853 { 854 return (address >> P4D_SHIFT) & (PTRS_PER_P4D - 1); 855 } 856 857 #if CONFIG_PGTABLE_LEVELS > 4 858 static inline int pgd_present(pgd_t pgd) 859 { 860 return pgd_flags(pgd) & _PAGE_PRESENT; 861 } 862 863 static inline unsigned long pgd_page_vaddr(pgd_t pgd) 864 { 865 return (unsigned long)__va((unsigned long)pgd_val(pgd) & PTE_PFN_MASK); 866 } 867 868 /* 869 * Currently stuck as a macro due to indirect forward reference to 870 * linux/mmzone.h's __section_mem_map_addr() definition: 871 */ 872 #define pgd_page(pgd) pfn_to_page(pgd_pfn(pgd)) 873 874 /* to find an entry in a page-table-directory. */ 875 static inline p4d_t *p4d_offset(pgd_t *pgd, unsigned long address) 876 { 877 return (p4d_t *)pgd_page_vaddr(*pgd) + p4d_index(address); 878 } 879 880 static inline int pgd_bad(pgd_t pgd) 881 { 882 return (pgd_flags(pgd) & ~_PAGE_USER) != _KERNPG_TABLE; 883 } 884 885 static inline int pgd_none(pgd_t pgd) 886 { 887 /* 888 * There is no need to do a workaround for the KNL stray 889 * A/D bit erratum here. PGDs only point to page tables 890 * except on 32-bit non-PAE which is not supported on 891 * KNL. 892 */ 893 return !native_pgd_val(pgd); 894 } 895 #endif /* CONFIG_PGTABLE_LEVELS > 4 */ 896 897 #endif /* __ASSEMBLY__ */ 898 899 /* 900 * the pgd page can be thought of an array like this: pgd_t[PTRS_PER_PGD] 901 * 902 * this macro returns the index of the entry in the pgd page which would 903 * control the given virtual address 904 */ 905 #define pgd_index(address) (((address) >> PGDIR_SHIFT) & (PTRS_PER_PGD - 1)) 906 907 /* 908 * pgd_offset() returns a (pgd_t *) 909 * pgd_index() is used get the offset into the pgd page's array of pgd_t's; 910 */ 911 #define pgd_offset(mm, address) ((mm)->pgd + pgd_index((address))) 912 /* 913 * a shortcut which implies the use of the kernel's pgd, instead 914 * of a process's 915 */ 916 #define pgd_offset_k(address) pgd_offset(&init_mm, (address)) 917 918 919 #define KERNEL_PGD_BOUNDARY pgd_index(PAGE_OFFSET) 920 #define KERNEL_PGD_PTRS (PTRS_PER_PGD - KERNEL_PGD_BOUNDARY) 921 922 #ifndef __ASSEMBLY__ 923 924 extern int direct_gbpages; 925 void init_mem_mapping(void); 926 void early_alloc_pgt_buf(void); 927 extern void memblock_find_dma_reserve(void); 928 929 #ifdef CONFIG_X86_64 930 /* Realmode trampoline initialization. */ 931 extern pgd_t trampoline_pgd_entry; 932 static inline void __meminit init_trampoline_default(void) 933 { 934 /* Default trampoline pgd value */ 935 trampoline_pgd_entry = init_top_pgt[pgd_index(__PAGE_OFFSET)]; 936 } 937 # ifdef CONFIG_RANDOMIZE_MEMORY 938 void __meminit init_trampoline(void); 939 # else 940 # define init_trampoline init_trampoline_default 941 # endif 942 #else 943 static inline void init_trampoline(void) { } 944 #endif 945 946 /* local pte updates need not use xchg for locking */ 947 static inline pte_t native_local_ptep_get_and_clear(pte_t *ptep) 948 { 949 pte_t res = *ptep; 950 951 /* Pure native function needs no input for mm, addr */ 952 native_pte_clear(NULL, 0, ptep); 953 return res; 954 } 955 956 static inline pmd_t native_local_pmdp_get_and_clear(pmd_t *pmdp) 957 { 958 pmd_t res = *pmdp; 959 960 native_pmd_clear(pmdp); 961 return res; 962 } 963 964 static inline pud_t native_local_pudp_get_and_clear(pud_t *pudp) 965 { 966 pud_t res = *pudp; 967 968 native_pud_clear(pudp); 969 return res; 970 } 971 972 static inline void native_set_pte_at(struct mm_struct *mm, unsigned long addr, 973 pte_t *ptep , pte_t pte) 974 { 975 native_set_pte(ptep, pte); 976 } 977 978 static inline void set_pmd_at(struct mm_struct *mm, unsigned long addr, 979 pmd_t *pmdp, pmd_t pmd) 980 { 981 native_set_pmd(pmdp, pmd); 982 } 983 984 static inline void set_pud_at(struct mm_struct *mm, unsigned long addr, 985 pud_t *pudp, pud_t pud) 986 { 987 native_set_pud(pudp, pud); 988 } 989 990 /* 991 * We only update the dirty/accessed state if we set 992 * the dirty bit by hand in the kernel, since the hardware 993 * will do the accessed bit for us, and we don't want to 994 * race with other CPU's that might be updating the dirty 995 * bit at the same time. 996 */ 997 struct vm_area_struct; 998 999 #define __HAVE_ARCH_PTEP_SET_ACCESS_FLAGS 1000 extern int ptep_set_access_flags(struct vm_area_struct *vma, 1001 unsigned long address, pte_t *ptep, 1002 pte_t entry, int dirty); 1003 1004 #define __HAVE_ARCH_PTEP_TEST_AND_CLEAR_YOUNG 1005 extern int ptep_test_and_clear_young(struct vm_area_struct *vma, 1006 unsigned long addr, pte_t *ptep); 1007 1008 #define __HAVE_ARCH_PTEP_CLEAR_YOUNG_FLUSH 1009 extern int ptep_clear_flush_young(struct vm_area_struct *vma, 1010 unsigned long address, pte_t *ptep); 1011 1012 #define __HAVE_ARCH_PTEP_GET_AND_CLEAR 1013 static inline pte_t ptep_get_and_clear(struct mm_struct *mm, unsigned long addr, 1014 pte_t *ptep) 1015 { 1016 pte_t pte = native_ptep_get_and_clear(ptep); 1017 return pte; 1018 } 1019 1020 #define __HAVE_ARCH_PTEP_GET_AND_CLEAR_FULL 1021 static inline pte_t ptep_get_and_clear_full(struct mm_struct *mm, 1022 unsigned long addr, pte_t *ptep, 1023 int full) 1024 { 1025 pte_t pte; 1026 if (full) { 1027 /* 1028 * Full address destruction in progress; paravirt does not 1029 * care about updates and native needs no locking 1030 */ 1031 pte = native_local_ptep_get_and_clear(ptep); 1032 } else { 1033 pte = ptep_get_and_clear(mm, addr, ptep); 1034 } 1035 return pte; 1036 } 1037 1038 #define __HAVE_ARCH_PTEP_SET_WRPROTECT 1039 static inline void ptep_set_wrprotect(struct mm_struct *mm, 1040 unsigned long addr, pte_t *ptep) 1041 { 1042 clear_bit(_PAGE_BIT_RW, (unsigned long *)&ptep->pte); 1043 } 1044 1045 #define flush_tlb_fix_spurious_fault(vma, address) do { } while (0) 1046 1047 #define mk_pmd(page, pgprot) pfn_pmd(page_to_pfn(page), (pgprot)) 1048 1049 #define __HAVE_ARCH_PMDP_SET_ACCESS_FLAGS 1050 extern int pmdp_set_access_flags(struct vm_area_struct *vma, 1051 unsigned long address, pmd_t *pmdp, 1052 pmd_t entry, int dirty); 1053 extern int pudp_set_access_flags(struct vm_area_struct *vma, 1054 unsigned long address, pud_t *pudp, 1055 pud_t entry, int dirty); 1056 1057 #define __HAVE_ARCH_PMDP_TEST_AND_CLEAR_YOUNG 1058 extern int pmdp_test_and_clear_young(struct vm_area_struct *vma, 1059 unsigned long addr, pmd_t *pmdp); 1060 extern int pudp_test_and_clear_young(struct vm_area_struct *vma, 1061 unsigned long addr, pud_t *pudp); 1062 1063 #define __HAVE_ARCH_PMDP_CLEAR_YOUNG_FLUSH 1064 extern int pmdp_clear_flush_young(struct vm_area_struct *vma, 1065 unsigned long address, pmd_t *pmdp); 1066 1067 1068 #define __HAVE_ARCH_PMD_WRITE 1069 static inline int pmd_write(pmd_t pmd) 1070 { 1071 return pmd_flags(pmd) & _PAGE_RW; 1072 } 1073 1074 #define __HAVE_ARCH_PMDP_HUGE_GET_AND_CLEAR 1075 static inline pmd_t pmdp_huge_get_and_clear(struct mm_struct *mm, unsigned long addr, 1076 pmd_t *pmdp) 1077 { 1078 return native_pmdp_get_and_clear(pmdp); 1079 } 1080 1081 #define __HAVE_ARCH_PUDP_HUGE_GET_AND_CLEAR 1082 static inline pud_t pudp_huge_get_and_clear(struct mm_struct *mm, 1083 unsigned long addr, pud_t *pudp) 1084 { 1085 return native_pudp_get_and_clear(pudp); 1086 } 1087 1088 #define __HAVE_ARCH_PMDP_SET_WRPROTECT 1089 static inline void pmdp_set_wrprotect(struct mm_struct *mm, 1090 unsigned long addr, pmd_t *pmdp) 1091 { 1092 clear_bit(_PAGE_BIT_RW, (unsigned long *)pmdp); 1093 } 1094 1095 /* 1096 * clone_pgd_range(pgd_t *dst, pgd_t *src, int count); 1097 * 1098 * dst - pointer to pgd range anwhere on a pgd page 1099 * src - "" 1100 * count - the number of pgds to copy. 1101 * 1102 * dst and src can be on the same page, but the range must not overlap, 1103 * and must not cross a page boundary. 1104 */ 1105 static inline void clone_pgd_range(pgd_t *dst, pgd_t *src, int count) 1106 { 1107 memcpy(dst, src, count * sizeof(pgd_t)); 1108 } 1109 1110 #define PTE_SHIFT ilog2(PTRS_PER_PTE) 1111 static inline int page_level_shift(enum pg_level level) 1112 { 1113 return (PAGE_SHIFT - PTE_SHIFT) + level * PTE_SHIFT; 1114 } 1115 static inline unsigned long page_level_size(enum pg_level level) 1116 { 1117 return 1UL << page_level_shift(level); 1118 } 1119 static inline unsigned long page_level_mask(enum pg_level level) 1120 { 1121 return ~(page_level_size(level) - 1); 1122 } 1123 1124 /* 1125 * The x86 doesn't have any external MMU info: the kernel page 1126 * tables contain all the necessary information. 1127 */ 1128 static inline void update_mmu_cache(struct vm_area_struct *vma, 1129 unsigned long addr, pte_t *ptep) 1130 { 1131 } 1132 static inline void update_mmu_cache_pmd(struct vm_area_struct *vma, 1133 unsigned long addr, pmd_t *pmd) 1134 { 1135 } 1136 static inline void update_mmu_cache_pud(struct vm_area_struct *vma, 1137 unsigned long addr, pud_t *pud) 1138 { 1139 } 1140 1141 #ifdef CONFIG_HAVE_ARCH_SOFT_DIRTY 1142 static inline pte_t pte_swp_mksoft_dirty(pte_t pte) 1143 { 1144 return pte_set_flags(pte, _PAGE_SWP_SOFT_DIRTY); 1145 } 1146 1147 static inline int pte_swp_soft_dirty(pte_t pte) 1148 { 1149 return pte_flags(pte) & _PAGE_SWP_SOFT_DIRTY; 1150 } 1151 1152 static inline pte_t pte_swp_clear_soft_dirty(pte_t pte) 1153 { 1154 return pte_clear_flags(pte, _PAGE_SWP_SOFT_DIRTY); 1155 } 1156 1157 #ifdef CONFIG_ARCH_ENABLE_THP_MIGRATION 1158 static inline pmd_t pmd_swp_mksoft_dirty(pmd_t pmd) 1159 { 1160 return pmd_set_flags(pmd, _PAGE_SWP_SOFT_DIRTY); 1161 } 1162 1163 static inline int pmd_swp_soft_dirty(pmd_t pmd) 1164 { 1165 return pmd_flags(pmd) & _PAGE_SWP_SOFT_DIRTY; 1166 } 1167 1168 static inline pmd_t pmd_swp_clear_soft_dirty(pmd_t pmd) 1169 { 1170 return pmd_clear_flags(pmd, _PAGE_SWP_SOFT_DIRTY); 1171 } 1172 #endif 1173 #endif 1174 1175 #define PKRU_AD_BIT 0x1 1176 #define PKRU_WD_BIT 0x2 1177 #define PKRU_BITS_PER_PKEY 2 1178 1179 static inline bool __pkru_allows_read(u32 pkru, u16 pkey) 1180 { 1181 int pkru_pkey_bits = pkey * PKRU_BITS_PER_PKEY; 1182 return !(pkru & (PKRU_AD_BIT << pkru_pkey_bits)); 1183 } 1184 1185 static inline bool __pkru_allows_write(u32 pkru, u16 pkey) 1186 { 1187 int pkru_pkey_bits = pkey * PKRU_BITS_PER_PKEY; 1188 /* 1189 * Access-disable disables writes too so we need to check 1190 * both bits here. 1191 */ 1192 return !(pkru & ((PKRU_AD_BIT|PKRU_WD_BIT) << pkru_pkey_bits)); 1193 } 1194 1195 static inline u16 pte_flags_pkey(unsigned long pte_flags) 1196 { 1197 #ifdef CONFIG_X86_INTEL_MEMORY_PROTECTION_KEYS 1198 /* ifdef to avoid doing 59-bit shift on 32-bit values */ 1199 return (pte_flags & _PAGE_PKEY_MASK) >> _PAGE_BIT_PKEY_BIT0; 1200 #else 1201 return 0; 1202 #endif 1203 } 1204 1205 static inline bool __pkru_allows_pkey(u16 pkey, bool write) 1206 { 1207 u32 pkru = read_pkru(); 1208 1209 if (!__pkru_allows_read(pkru, pkey)) 1210 return false; 1211 if (write && !__pkru_allows_write(pkru, pkey)) 1212 return false; 1213 1214 return true; 1215 } 1216 1217 /* 1218 * 'pteval' can come from a PTE, PMD or PUD. We only check 1219 * _PAGE_PRESENT, _PAGE_USER, and _PAGE_RW in here which are the 1220 * same value on all 3 types. 1221 */ 1222 static inline bool __pte_access_permitted(unsigned long pteval, bool write) 1223 { 1224 unsigned long need_pte_bits = _PAGE_PRESENT|_PAGE_USER; 1225 1226 if (write) 1227 need_pte_bits |= _PAGE_RW; 1228 1229 if ((pteval & need_pte_bits) != need_pte_bits) 1230 return 0; 1231 1232 return __pkru_allows_pkey(pte_flags_pkey(pteval), write); 1233 } 1234 1235 #define pte_access_permitted pte_access_permitted 1236 static inline bool pte_access_permitted(pte_t pte, bool write) 1237 { 1238 return __pte_access_permitted(pte_val(pte), write); 1239 } 1240 1241 #define pmd_access_permitted pmd_access_permitted 1242 static inline bool pmd_access_permitted(pmd_t pmd, bool write) 1243 { 1244 return __pte_access_permitted(pmd_val(pmd), write); 1245 } 1246 1247 #define pud_access_permitted pud_access_permitted 1248 static inline bool pud_access_permitted(pud_t pud, bool write) 1249 { 1250 return __pte_access_permitted(pud_val(pud), write); 1251 } 1252 1253 #include <asm-generic/pgtable.h> 1254 #endif /* __ASSEMBLY__ */ 1255 1256 #endif /* _ASM_X86_PGTABLE_H */ 1257