1 /* SPDX-License-Identifier: GPL-2.0 */ 2 #ifndef _ASM_X86_PGTABLE_H 3 #define _ASM_X86_PGTABLE_H 4 5 #include <linux/mem_encrypt.h> 6 #include <asm/page.h> 7 #include <asm/pgtable_types.h> 8 9 /* 10 * Macro to mark a page protection value as UC- 11 */ 12 #define pgprot_noncached(prot) \ 13 ((boot_cpu_data.x86 > 3) \ 14 ? (__pgprot(pgprot_val(prot) | \ 15 cachemode2protval(_PAGE_CACHE_MODE_UC_MINUS))) \ 16 : (prot)) 17 18 #ifndef __ASSEMBLY__ 19 #include <linux/spinlock.h> 20 #include <asm/x86_init.h> 21 #include <asm/pkru.h> 22 #include <asm/fpu/api.h> 23 #include <asm/coco.h> 24 #include <asm-generic/pgtable_uffd.h> 25 #include <linux/page_table_check.h> 26 27 extern pgd_t early_top_pgt[PTRS_PER_PGD]; 28 bool __init __early_make_pgtable(unsigned long address, pmdval_t pmd); 29 30 struct seq_file; 31 void ptdump_walk_pgd_level(struct seq_file *m, struct mm_struct *mm); 32 void ptdump_walk_pgd_level_debugfs(struct seq_file *m, struct mm_struct *mm, 33 bool user); 34 void ptdump_walk_pgd_level_checkwx(void); 35 void ptdump_walk_user_pgd_level_checkwx(void); 36 37 /* 38 * Macros to add or remove encryption attribute 39 */ 40 #define pgprot_encrypted(prot) __pgprot(cc_mkenc(pgprot_val(prot))) 41 #define pgprot_decrypted(prot) __pgprot(cc_mkdec(pgprot_val(prot))) 42 43 #ifdef CONFIG_DEBUG_WX 44 #define debug_checkwx() ptdump_walk_pgd_level_checkwx() 45 #define debug_checkwx_user() ptdump_walk_user_pgd_level_checkwx() 46 #else 47 #define debug_checkwx() do { } while (0) 48 #define debug_checkwx_user() do { } while (0) 49 #endif 50 51 /* 52 * ZERO_PAGE is a global shared page that is always zero: used 53 * for zero-mapped memory areas etc.. 54 */ 55 extern unsigned long empty_zero_page[PAGE_SIZE / sizeof(unsigned long)] 56 __visible; 57 #define ZERO_PAGE(vaddr) ((void)(vaddr),virt_to_page(empty_zero_page)) 58 59 extern spinlock_t pgd_lock; 60 extern struct list_head pgd_list; 61 62 extern struct mm_struct *pgd_page_get_mm(struct page *page); 63 64 extern pmdval_t early_pmd_flags; 65 66 #ifdef CONFIG_PARAVIRT_XXL 67 #include <asm/paravirt.h> 68 #else /* !CONFIG_PARAVIRT_XXL */ 69 #define set_pte(ptep, pte) native_set_pte(ptep, pte) 70 71 #define set_pte_atomic(ptep, pte) \ 72 native_set_pte_atomic(ptep, pte) 73 74 #define set_pmd(pmdp, pmd) native_set_pmd(pmdp, pmd) 75 76 #ifndef __PAGETABLE_P4D_FOLDED 77 #define set_pgd(pgdp, pgd) native_set_pgd(pgdp, pgd) 78 #define pgd_clear(pgd) (pgtable_l5_enabled() ? native_pgd_clear(pgd) : 0) 79 #endif 80 81 #ifndef set_p4d 82 # define set_p4d(p4dp, p4d) native_set_p4d(p4dp, p4d) 83 #endif 84 85 #ifndef __PAGETABLE_PUD_FOLDED 86 #define p4d_clear(p4d) native_p4d_clear(p4d) 87 #endif 88 89 #ifndef set_pud 90 # define set_pud(pudp, pud) native_set_pud(pudp, pud) 91 #endif 92 93 #ifndef __PAGETABLE_PUD_FOLDED 94 #define pud_clear(pud) native_pud_clear(pud) 95 #endif 96 97 #define pte_clear(mm, addr, ptep) native_pte_clear(mm, addr, ptep) 98 #define pmd_clear(pmd) native_pmd_clear(pmd) 99 100 #define pgd_val(x) native_pgd_val(x) 101 #define __pgd(x) native_make_pgd(x) 102 103 #ifndef __PAGETABLE_P4D_FOLDED 104 #define p4d_val(x) native_p4d_val(x) 105 #define __p4d(x) native_make_p4d(x) 106 #endif 107 108 #ifndef __PAGETABLE_PUD_FOLDED 109 #define pud_val(x) native_pud_val(x) 110 #define __pud(x) native_make_pud(x) 111 #endif 112 113 #ifndef __PAGETABLE_PMD_FOLDED 114 #define pmd_val(x) native_pmd_val(x) 115 #define __pmd(x) native_make_pmd(x) 116 #endif 117 118 #define pte_val(x) native_pte_val(x) 119 #define __pte(x) native_make_pte(x) 120 121 #define arch_end_context_switch(prev) do {} while(0) 122 #endif /* CONFIG_PARAVIRT_XXL */ 123 124 /* 125 * The following only work if pte_present() is true. 126 * Undefined behaviour if not.. 127 */ 128 static inline int pte_dirty(pte_t pte) 129 { 130 return pte_flags(pte) & _PAGE_DIRTY; 131 } 132 133 static inline int pte_young(pte_t pte) 134 { 135 return pte_flags(pte) & _PAGE_ACCESSED; 136 } 137 138 static inline int pmd_dirty(pmd_t pmd) 139 { 140 return pmd_flags(pmd) & _PAGE_DIRTY; 141 } 142 143 #define pmd_young pmd_young 144 static inline int pmd_young(pmd_t pmd) 145 { 146 return pmd_flags(pmd) & _PAGE_ACCESSED; 147 } 148 149 static inline int pud_dirty(pud_t pud) 150 { 151 return pud_flags(pud) & _PAGE_DIRTY; 152 } 153 154 static inline int pud_young(pud_t pud) 155 { 156 return pud_flags(pud) & _PAGE_ACCESSED; 157 } 158 159 static inline int pte_write(pte_t pte) 160 { 161 return pte_flags(pte) & _PAGE_RW; 162 } 163 164 static inline int pte_huge(pte_t pte) 165 { 166 return pte_flags(pte) & _PAGE_PSE; 167 } 168 169 static inline int pte_global(pte_t pte) 170 { 171 return pte_flags(pte) & _PAGE_GLOBAL; 172 } 173 174 static inline int pte_exec(pte_t pte) 175 { 176 return !(pte_flags(pte) & _PAGE_NX); 177 } 178 179 static inline int pte_special(pte_t pte) 180 { 181 return pte_flags(pte) & _PAGE_SPECIAL; 182 } 183 184 /* Entries that were set to PROT_NONE are inverted */ 185 186 static inline u64 protnone_mask(u64 val); 187 188 static inline unsigned long pte_pfn(pte_t pte) 189 { 190 phys_addr_t pfn = pte_val(pte); 191 pfn ^= protnone_mask(pfn); 192 return (pfn & PTE_PFN_MASK) >> PAGE_SHIFT; 193 } 194 195 static inline unsigned long pmd_pfn(pmd_t pmd) 196 { 197 phys_addr_t pfn = pmd_val(pmd); 198 pfn ^= protnone_mask(pfn); 199 return (pfn & pmd_pfn_mask(pmd)) >> PAGE_SHIFT; 200 } 201 202 static inline unsigned long pud_pfn(pud_t pud) 203 { 204 phys_addr_t pfn = pud_val(pud); 205 pfn ^= protnone_mask(pfn); 206 return (pfn & pud_pfn_mask(pud)) >> PAGE_SHIFT; 207 } 208 209 static inline unsigned long p4d_pfn(p4d_t p4d) 210 { 211 return (p4d_val(p4d) & p4d_pfn_mask(p4d)) >> PAGE_SHIFT; 212 } 213 214 static inline unsigned long pgd_pfn(pgd_t pgd) 215 { 216 return (pgd_val(pgd) & PTE_PFN_MASK) >> PAGE_SHIFT; 217 } 218 219 #define p4d_leaf p4d_large 220 static inline int p4d_large(p4d_t p4d) 221 { 222 /* No 512 GiB pages yet */ 223 return 0; 224 } 225 226 #define pte_page(pte) pfn_to_page(pte_pfn(pte)) 227 228 #define pmd_leaf pmd_large 229 static inline int pmd_large(pmd_t pte) 230 { 231 return pmd_flags(pte) & _PAGE_PSE; 232 } 233 234 #ifdef CONFIG_TRANSPARENT_HUGEPAGE 235 /* NOTE: when predicate huge page, consider also pmd_devmap, or use pmd_large */ 236 static inline int pmd_trans_huge(pmd_t pmd) 237 { 238 return (pmd_val(pmd) & (_PAGE_PSE|_PAGE_DEVMAP)) == _PAGE_PSE; 239 } 240 241 #ifdef CONFIG_HAVE_ARCH_TRANSPARENT_HUGEPAGE_PUD 242 static inline int pud_trans_huge(pud_t pud) 243 { 244 return (pud_val(pud) & (_PAGE_PSE|_PAGE_DEVMAP)) == _PAGE_PSE; 245 } 246 #endif 247 248 #define has_transparent_hugepage has_transparent_hugepage 249 static inline int has_transparent_hugepage(void) 250 { 251 return boot_cpu_has(X86_FEATURE_PSE); 252 } 253 254 #ifdef CONFIG_ARCH_HAS_PTE_DEVMAP 255 static inline int pmd_devmap(pmd_t pmd) 256 { 257 return !!(pmd_val(pmd) & _PAGE_DEVMAP); 258 } 259 260 #ifdef CONFIG_HAVE_ARCH_TRANSPARENT_HUGEPAGE_PUD 261 static inline int pud_devmap(pud_t pud) 262 { 263 return !!(pud_val(pud) & _PAGE_DEVMAP); 264 } 265 #else 266 static inline int pud_devmap(pud_t pud) 267 { 268 return 0; 269 } 270 #endif 271 272 static inline int pgd_devmap(pgd_t pgd) 273 { 274 return 0; 275 } 276 #endif 277 #endif /* CONFIG_TRANSPARENT_HUGEPAGE */ 278 279 static inline pte_t pte_set_flags(pte_t pte, pteval_t set) 280 { 281 pteval_t v = native_pte_val(pte); 282 283 return native_make_pte(v | set); 284 } 285 286 static inline pte_t pte_clear_flags(pte_t pte, pteval_t clear) 287 { 288 pteval_t v = native_pte_val(pte); 289 290 return native_make_pte(v & ~clear); 291 } 292 293 static inline pte_t pte_wrprotect(pte_t pte) 294 { 295 return pte_clear_flags(pte, _PAGE_RW); 296 } 297 298 #ifdef CONFIG_HAVE_ARCH_USERFAULTFD_WP 299 static inline int pte_uffd_wp(pte_t pte) 300 { 301 bool wp = pte_flags(pte) & _PAGE_UFFD_WP; 302 303 #ifdef CONFIG_DEBUG_VM 304 /* 305 * Having write bit for wr-protect-marked present ptes is fatal, 306 * because it means the uffd-wp bit will be ignored and write will 307 * just go through. 308 * 309 * Use any chance of pgtable walking to verify this (e.g., when 310 * page swapped out or being migrated for all purposes). It means 311 * something is already wrong. Tell the admin even before the 312 * process crashes. We also nail it with wrong pgtable setup. 313 */ 314 WARN_ON_ONCE(wp && pte_write(pte)); 315 #endif 316 317 return wp; 318 } 319 320 static inline pte_t pte_mkuffd_wp(pte_t pte) 321 { 322 return pte_wrprotect(pte_set_flags(pte, _PAGE_UFFD_WP)); 323 } 324 325 static inline pte_t pte_clear_uffd_wp(pte_t pte) 326 { 327 return pte_clear_flags(pte, _PAGE_UFFD_WP); 328 } 329 #endif /* CONFIG_HAVE_ARCH_USERFAULTFD_WP */ 330 331 static inline pte_t pte_mkclean(pte_t pte) 332 { 333 return pte_clear_flags(pte, _PAGE_DIRTY); 334 } 335 336 static inline pte_t pte_mkold(pte_t pte) 337 { 338 return pte_clear_flags(pte, _PAGE_ACCESSED); 339 } 340 341 static inline pte_t pte_mkexec(pte_t pte) 342 { 343 return pte_clear_flags(pte, _PAGE_NX); 344 } 345 346 static inline pte_t pte_mkdirty(pte_t pte) 347 { 348 return pte_set_flags(pte, _PAGE_DIRTY | _PAGE_SOFT_DIRTY); 349 } 350 351 static inline pte_t pte_mkyoung(pte_t pte) 352 { 353 return pte_set_flags(pte, _PAGE_ACCESSED); 354 } 355 356 static inline pte_t pte_mkwrite(pte_t pte) 357 { 358 return pte_set_flags(pte, _PAGE_RW); 359 } 360 361 static inline pte_t pte_mkhuge(pte_t pte) 362 { 363 return pte_set_flags(pte, _PAGE_PSE); 364 } 365 366 static inline pte_t pte_clrhuge(pte_t pte) 367 { 368 return pte_clear_flags(pte, _PAGE_PSE); 369 } 370 371 static inline pte_t pte_mkglobal(pte_t pte) 372 { 373 return pte_set_flags(pte, _PAGE_GLOBAL); 374 } 375 376 static inline pte_t pte_clrglobal(pte_t pte) 377 { 378 return pte_clear_flags(pte, _PAGE_GLOBAL); 379 } 380 381 static inline pte_t pte_mkspecial(pte_t pte) 382 { 383 return pte_set_flags(pte, _PAGE_SPECIAL); 384 } 385 386 static inline pte_t pte_mkdevmap(pte_t pte) 387 { 388 return pte_set_flags(pte, _PAGE_SPECIAL|_PAGE_DEVMAP); 389 } 390 391 static inline pmd_t pmd_set_flags(pmd_t pmd, pmdval_t set) 392 { 393 pmdval_t v = native_pmd_val(pmd); 394 395 return native_make_pmd(v | set); 396 } 397 398 static inline pmd_t pmd_clear_flags(pmd_t pmd, pmdval_t clear) 399 { 400 pmdval_t v = native_pmd_val(pmd); 401 402 return native_make_pmd(v & ~clear); 403 } 404 405 static inline pmd_t pmd_wrprotect(pmd_t pmd) 406 { 407 return pmd_clear_flags(pmd, _PAGE_RW); 408 } 409 410 #ifdef CONFIG_HAVE_ARCH_USERFAULTFD_WP 411 static inline int pmd_uffd_wp(pmd_t pmd) 412 { 413 return pmd_flags(pmd) & _PAGE_UFFD_WP; 414 } 415 416 static inline pmd_t pmd_mkuffd_wp(pmd_t pmd) 417 { 418 return pmd_wrprotect(pmd_set_flags(pmd, _PAGE_UFFD_WP)); 419 } 420 421 static inline pmd_t pmd_clear_uffd_wp(pmd_t pmd) 422 { 423 return pmd_clear_flags(pmd, _PAGE_UFFD_WP); 424 } 425 #endif /* CONFIG_HAVE_ARCH_USERFAULTFD_WP */ 426 427 static inline pmd_t pmd_mkold(pmd_t pmd) 428 { 429 return pmd_clear_flags(pmd, _PAGE_ACCESSED); 430 } 431 432 static inline pmd_t pmd_mkclean(pmd_t pmd) 433 { 434 return pmd_clear_flags(pmd, _PAGE_DIRTY); 435 } 436 437 static inline pmd_t pmd_mkdirty(pmd_t pmd) 438 { 439 return pmd_set_flags(pmd, _PAGE_DIRTY | _PAGE_SOFT_DIRTY); 440 } 441 442 static inline pmd_t pmd_mkdevmap(pmd_t pmd) 443 { 444 return pmd_set_flags(pmd, _PAGE_DEVMAP); 445 } 446 447 static inline pmd_t pmd_mkhuge(pmd_t pmd) 448 { 449 return pmd_set_flags(pmd, _PAGE_PSE); 450 } 451 452 static inline pmd_t pmd_mkyoung(pmd_t pmd) 453 { 454 return pmd_set_flags(pmd, _PAGE_ACCESSED); 455 } 456 457 static inline pmd_t pmd_mkwrite(pmd_t pmd) 458 { 459 return pmd_set_flags(pmd, _PAGE_RW); 460 } 461 462 static inline pud_t pud_set_flags(pud_t pud, pudval_t set) 463 { 464 pudval_t v = native_pud_val(pud); 465 466 return native_make_pud(v | set); 467 } 468 469 static inline pud_t pud_clear_flags(pud_t pud, pudval_t clear) 470 { 471 pudval_t v = native_pud_val(pud); 472 473 return native_make_pud(v & ~clear); 474 } 475 476 static inline pud_t pud_mkold(pud_t pud) 477 { 478 return pud_clear_flags(pud, _PAGE_ACCESSED); 479 } 480 481 static inline pud_t pud_mkclean(pud_t pud) 482 { 483 return pud_clear_flags(pud, _PAGE_DIRTY); 484 } 485 486 static inline pud_t pud_wrprotect(pud_t pud) 487 { 488 return pud_clear_flags(pud, _PAGE_RW); 489 } 490 491 static inline pud_t pud_mkdirty(pud_t pud) 492 { 493 return pud_set_flags(pud, _PAGE_DIRTY | _PAGE_SOFT_DIRTY); 494 } 495 496 static inline pud_t pud_mkdevmap(pud_t pud) 497 { 498 return pud_set_flags(pud, _PAGE_DEVMAP); 499 } 500 501 static inline pud_t pud_mkhuge(pud_t pud) 502 { 503 return pud_set_flags(pud, _PAGE_PSE); 504 } 505 506 static inline pud_t pud_mkyoung(pud_t pud) 507 { 508 return pud_set_flags(pud, _PAGE_ACCESSED); 509 } 510 511 static inline pud_t pud_mkwrite(pud_t pud) 512 { 513 return pud_set_flags(pud, _PAGE_RW); 514 } 515 516 #ifdef CONFIG_HAVE_ARCH_SOFT_DIRTY 517 static inline int pte_soft_dirty(pte_t pte) 518 { 519 return pte_flags(pte) & _PAGE_SOFT_DIRTY; 520 } 521 522 static inline int pmd_soft_dirty(pmd_t pmd) 523 { 524 return pmd_flags(pmd) & _PAGE_SOFT_DIRTY; 525 } 526 527 static inline int pud_soft_dirty(pud_t pud) 528 { 529 return pud_flags(pud) & _PAGE_SOFT_DIRTY; 530 } 531 532 static inline pte_t pte_mksoft_dirty(pte_t pte) 533 { 534 return pte_set_flags(pte, _PAGE_SOFT_DIRTY); 535 } 536 537 static inline pmd_t pmd_mksoft_dirty(pmd_t pmd) 538 { 539 return pmd_set_flags(pmd, _PAGE_SOFT_DIRTY); 540 } 541 542 static inline pud_t pud_mksoft_dirty(pud_t pud) 543 { 544 return pud_set_flags(pud, _PAGE_SOFT_DIRTY); 545 } 546 547 static inline pte_t pte_clear_soft_dirty(pte_t pte) 548 { 549 return pte_clear_flags(pte, _PAGE_SOFT_DIRTY); 550 } 551 552 static inline pmd_t pmd_clear_soft_dirty(pmd_t pmd) 553 { 554 return pmd_clear_flags(pmd, _PAGE_SOFT_DIRTY); 555 } 556 557 static inline pud_t pud_clear_soft_dirty(pud_t pud) 558 { 559 return pud_clear_flags(pud, _PAGE_SOFT_DIRTY); 560 } 561 562 #endif /* CONFIG_HAVE_ARCH_SOFT_DIRTY */ 563 564 /* 565 * Mask out unsupported bits in a present pgprot. Non-present pgprots 566 * can use those bits for other purposes, so leave them be. 567 */ 568 static inline pgprotval_t massage_pgprot(pgprot_t pgprot) 569 { 570 pgprotval_t protval = pgprot_val(pgprot); 571 572 if (protval & _PAGE_PRESENT) 573 protval &= __supported_pte_mask; 574 575 return protval; 576 } 577 578 static inline pgprotval_t check_pgprot(pgprot_t pgprot) 579 { 580 pgprotval_t massaged_val = massage_pgprot(pgprot); 581 582 /* mmdebug.h can not be included here because of dependencies */ 583 #ifdef CONFIG_DEBUG_VM 584 WARN_ONCE(pgprot_val(pgprot) != massaged_val, 585 "attempted to set unsupported pgprot: %016llx " 586 "bits: %016llx supported: %016llx\n", 587 (u64)pgprot_val(pgprot), 588 (u64)pgprot_val(pgprot) ^ massaged_val, 589 (u64)__supported_pte_mask); 590 #endif 591 592 return massaged_val; 593 } 594 595 static inline pte_t pfn_pte(unsigned long page_nr, pgprot_t pgprot) 596 { 597 phys_addr_t pfn = (phys_addr_t)page_nr << PAGE_SHIFT; 598 pfn ^= protnone_mask(pgprot_val(pgprot)); 599 pfn &= PTE_PFN_MASK; 600 return __pte(pfn | check_pgprot(pgprot)); 601 } 602 603 static inline pmd_t pfn_pmd(unsigned long page_nr, pgprot_t pgprot) 604 { 605 phys_addr_t pfn = (phys_addr_t)page_nr << PAGE_SHIFT; 606 pfn ^= protnone_mask(pgprot_val(pgprot)); 607 pfn &= PHYSICAL_PMD_PAGE_MASK; 608 return __pmd(pfn | check_pgprot(pgprot)); 609 } 610 611 static inline pud_t pfn_pud(unsigned long page_nr, pgprot_t pgprot) 612 { 613 phys_addr_t pfn = (phys_addr_t)page_nr << PAGE_SHIFT; 614 pfn ^= protnone_mask(pgprot_val(pgprot)); 615 pfn &= PHYSICAL_PUD_PAGE_MASK; 616 return __pud(pfn | check_pgprot(pgprot)); 617 } 618 619 static inline pmd_t pmd_mkinvalid(pmd_t pmd) 620 { 621 return pfn_pmd(pmd_pfn(pmd), 622 __pgprot(pmd_flags(pmd) & ~(_PAGE_PRESENT|_PAGE_PROTNONE))); 623 } 624 625 static inline u64 flip_protnone_guard(u64 oldval, u64 val, u64 mask); 626 627 static inline pte_t pte_modify(pte_t pte, pgprot_t newprot) 628 { 629 pteval_t val = pte_val(pte), oldval = val; 630 631 /* 632 * Chop off the NX bit (if present), and add the NX portion of 633 * the newprot (if present): 634 */ 635 val &= _PAGE_CHG_MASK; 636 val |= check_pgprot(newprot) & ~_PAGE_CHG_MASK; 637 val = flip_protnone_guard(oldval, val, PTE_PFN_MASK); 638 return __pte(val); 639 } 640 641 static inline pmd_t pmd_modify(pmd_t pmd, pgprot_t newprot) 642 { 643 pmdval_t val = pmd_val(pmd), oldval = val; 644 645 val &= _HPAGE_CHG_MASK; 646 val |= check_pgprot(newprot) & ~_HPAGE_CHG_MASK; 647 val = flip_protnone_guard(oldval, val, PHYSICAL_PMD_PAGE_MASK); 648 return __pmd(val); 649 } 650 651 /* 652 * mprotect needs to preserve PAT and encryption bits when updating 653 * vm_page_prot 654 */ 655 #define pgprot_modify pgprot_modify 656 static inline pgprot_t pgprot_modify(pgprot_t oldprot, pgprot_t newprot) 657 { 658 pgprotval_t preservebits = pgprot_val(oldprot) & _PAGE_CHG_MASK; 659 pgprotval_t addbits = pgprot_val(newprot) & ~_PAGE_CHG_MASK; 660 return __pgprot(preservebits | addbits); 661 } 662 663 #define pte_pgprot(x) __pgprot(pte_flags(x)) 664 #define pmd_pgprot(x) __pgprot(pmd_flags(x)) 665 #define pud_pgprot(x) __pgprot(pud_flags(x)) 666 #define p4d_pgprot(x) __pgprot(p4d_flags(x)) 667 668 #define canon_pgprot(p) __pgprot(massage_pgprot(p)) 669 670 static inline int is_new_memtype_allowed(u64 paddr, unsigned long size, 671 enum page_cache_mode pcm, 672 enum page_cache_mode new_pcm) 673 { 674 /* 675 * PAT type is always WB for untracked ranges, so no need to check. 676 */ 677 if (x86_platform.is_untracked_pat_range(paddr, paddr + size)) 678 return 1; 679 680 /* 681 * Certain new memtypes are not allowed with certain 682 * requested memtype: 683 * - request is uncached, return cannot be write-back 684 * - request is write-combine, return cannot be write-back 685 * - request is write-through, return cannot be write-back 686 * - request is write-through, return cannot be write-combine 687 */ 688 if ((pcm == _PAGE_CACHE_MODE_UC_MINUS && 689 new_pcm == _PAGE_CACHE_MODE_WB) || 690 (pcm == _PAGE_CACHE_MODE_WC && 691 new_pcm == _PAGE_CACHE_MODE_WB) || 692 (pcm == _PAGE_CACHE_MODE_WT && 693 new_pcm == _PAGE_CACHE_MODE_WB) || 694 (pcm == _PAGE_CACHE_MODE_WT && 695 new_pcm == _PAGE_CACHE_MODE_WC)) { 696 return 0; 697 } 698 699 return 1; 700 } 701 702 pmd_t *populate_extra_pmd(unsigned long vaddr); 703 pte_t *populate_extra_pte(unsigned long vaddr); 704 705 #ifdef CONFIG_PAGE_TABLE_ISOLATION 706 pgd_t __pti_set_user_pgtbl(pgd_t *pgdp, pgd_t pgd); 707 708 /* 709 * Take a PGD location (pgdp) and a pgd value that needs to be set there. 710 * Populates the user and returns the resulting PGD that must be set in 711 * the kernel copy of the page tables. 712 */ 713 static inline pgd_t pti_set_user_pgtbl(pgd_t *pgdp, pgd_t pgd) 714 { 715 if (!static_cpu_has(X86_FEATURE_PTI)) 716 return pgd; 717 return __pti_set_user_pgtbl(pgdp, pgd); 718 } 719 #else /* CONFIG_PAGE_TABLE_ISOLATION */ 720 static inline pgd_t pti_set_user_pgtbl(pgd_t *pgdp, pgd_t pgd) 721 { 722 return pgd; 723 } 724 #endif /* CONFIG_PAGE_TABLE_ISOLATION */ 725 726 #endif /* __ASSEMBLY__ */ 727 728 729 #ifdef CONFIG_X86_32 730 # include <asm/pgtable_32.h> 731 #else 732 # include <asm/pgtable_64.h> 733 #endif 734 735 #ifndef __ASSEMBLY__ 736 #include <linux/mm_types.h> 737 #include <linux/mmdebug.h> 738 #include <linux/log2.h> 739 #include <asm/fixmap.h> 740 741 static inline int pte_none(pte_t pte) 742 { 743 return !(pte.pte & ~(_PAGE_KNL_ERRATUM_MASK)); 744 } 745 746 #define __HAVE_ARCH_PTE_SAME 747 static inline int pte_same(pte_t a, pte_t b) 748 { 749 return a.pte == b.pte; 750 } 751 752 static inline int pte_present(pte_t a) 753 { 754 return pte_flags(a) & (_PAGE_PRESENT | _PAGE_PROTNONE); 755 } 756 757 #ifdef CONFIG_ARCH_HAS_PTE_DEVMAP 758 static inline int pte_devmap(pte_t a) 759 { 760 return (pte_flags(a) & _PAGE_DEVMAP) == _PAGE_DEVMAP; 761 } 762 #endif 763 764 #define pte_accessible pte_accessible 765 static inline bool pte_accessible(struct mm_struct *mm, pte_t a) 766 { 767 if (pte_flags(a) & _PAGE_PRESENT) 768 return true; 769 770 if ((pte_flags(a) & _PAGE_PROTNONE) && 771 atomic_read(&mm->tlb_flush_pending)) 772 return true; 773 774 return false; 775 } 776 777 static inline int pmd_present(pmd_t pmd) 778 { 779 /* 780 * Checking for _PAGE_PSE is needed too because 781 * split_huge_page will temporarily clear the present bit (but 782 * the _PAGE_PSE flag will remain set at all times while the 783 * _PAGE_PRESENT bit is clear). 784 */ 785 return pmd_flags(pmd) & (_PAGE_PRESENT | _PAGE_PROTNONE | _PAGE_PSE); 786 } 787 788 #ifdef CONFIG_NUMA_BALANCING 789 /* 790 * These work without NUMA balancing but the kernel does not care. See the 791 * comment in include/linux/pgtable.h 792 */ 793 static inline int pte_protnone(pte_t pte) 794 { 795 return (pte_flags(pte) & (_PAGE_PROTNONE | _PAGE_PRESENT)) 796 == _PAGE_PROTNONE; 797 } 798 799 static inline int pmd_protnone(pmd_t pmd) 800 { 801 return (pmd_flags(pmd) & (_PAGE_PROTNONE | _PAGE_PRESENT)) 802 == _PAGE_PROTNONE; 803 } 804 #endif /* CONFIG_NUMA_BALANCING */ 805 806 static inline int pmd_none(pmd_t pmd) 807 { 808 /* Only check low word on 32-bit platforms, since it might be 809 out of sync with upper half. */ 810 unsigned long val = native_pmd_val(pmd); 811 return (val & ~_PAGE_KNL_ERRATUM_MASK) == 0; 812 } 813 814 static inline unsigned long pmd_page_vaddr(pmd_t pmd) 815 { 816 return (unsigned long)__va(pmd_val(pmd) & pmd_pfn_mask(pmd)); 817 } 818 819 /* 820 * Currently stuck as a macro due to indirect forward reference to 821 * linux/mmzone.h's __section_mem_map_addr() definition: 822 */ 823 #define pmd_page(pmd) pfn_to_page(pmd_pfn(pmd)) 824 825 /* 826 * Conversion functions: convert a page and protection to a page entry, 827 * and a page entry and page directory to the page they refer to. 828 * 829 * (Currently stuck as a macro because of indirect forward reference 830 * to linux/mm.h:page_to_nid()) 831 */ 832 #define mk_pte(page, pgprot) pfn_pte(page_to_pfn(page), (pgprot)) 833 834 static inline int pmd_bad(pmd_t pmd) 835 { 836 return (pmd_flags(pmd) & ~(_PAGE_USER | _PAGE_ACCESSED)) != 837 (_KERNPG_TABLE & ~_PAGE_ACCESSED); 838 } 839 840 static inline unsigned long pages_to_mb(unsigned long npg) 841 { 842 return npg >> (20 - PAGE_SHIFT); 843 } 844 845 #if CONFIG_PGTABLE_LEVELS > 2 846 static inline int pud_none(pud_t pud) 847 { 848 return (native_pud_val(pud) & ~(_PAGE_KNL_ERRATUM_MASK)) == 0; 849 } 850 851 static inline int pud_present(pud_t pud) 852 { 853 return pud_flags(pud) & _PAGE_PRESENT; 854 } 855 856 static inline pmd_t *pud_pgtable(pud_t pud) 857 { 858 return (pmd_t *)__va(pud_val(pud) & pud_pfn_mask(pud)); 859 } 860 861 /* 862 * Currently stuck as a macro due to indirect forward reference to 863 * linux/mmzone.h's __section_mem_map_addr() definition: 864 */ 865 #define pud_page(pud) pfn_to_page(pud_pfn(pud)) 866 867 #define pud_leaf pud_large 868 static inline int pud_large(pud_t pud) 869 { 870 return (pud_val(pud) & (_PAGE_PSE | _PAGE_PRESENT)) == 871 (_PAGE_PSE | _PAGE_PRESENT); 872 } 873 874 static inline int pud_bad(pud_t pud) 875 { 876 return (pud_flags(pud) & ~(_KERNPG_TABLE | _PAGE_USER)) != 0; 877 } 878 #else 879 #define pud_leaf pud_large 880 static inline int pud_large(pud_t pud) 881 { 882 return 0; 883 } 884 #endif /* CONFIG_PGTABLE_LEVELS > 2 */ 885 886 #if CONFIG_PGTABLE_LEVELS > 3 887 static inline int p4d_none(p4d_t p4d) 888 { 889 return (native_p4d_val(p4d) & ~(_PAGE_KNL_ERRATUM_MASK)) == 0; 890 } 891 892 static inline int p4d_present(p4d_t p4d) 893 { 894 return p4d_flags(p4d) & _PAGE_PRESENT; 895 } 896 897 static inline pud_t *p4d_pgtable(p4d_t p4d) 898 { 899 return (pud_t *)__va(p4d_val(p4d) & p4d_pfn_mask(p4d)); 900 } 901 902 /* 903 * Currently stuck as a macro due to indirect forward reference to 904 * linux/mmzone.h's __section_mem_map_addr() definition: 905 */ 906 #define p4d_page(p4d) pfn_to_page(p4d_pfn(p4d)) 907 908 static inline int p4d_bad(p4d_t p4d) 909 { 910 unsigned long ignore_flags = _KERNPG_TABLE | _PAGE_USER; 911 912 if (IS_ENABLED(CONFIG_PAGE_TABLE_ISOLATION)) 913 ignore_flags |= _PAGE_NX; 914 915 return (p4d_flags(p4d) & ~ignore_flags) != 0; 916 } 917 #endif /* CONFIG_PGTABLE_LEVELS > 3 */ 918 919 static inline unsigned long p4d_index(unsigned long address) 920 { 921 return (address >> P4D_SHIFT) & (PTRS_PER_P4D - 1); 922 } 923 924 #if CONFIG_PGTABLE_LEVELS > 4 925 static inline int pgd_present(pgd_t pgd) 926 { 927 if (!pgtable_l5_enabled()) 928 return 1; 929 return pgd_flags(pgd) & _PAGE_PRESENT; 930 } 931 932 static inline unsigned long pgd_page_vaddr(pgd_t pgd) 933 { 934 return (unsigned long)__va((unsigned long)pgd_val(pgd) & PTE_PFN_MASK); 935 } 936 937 /* 938 * Currently stuck as a macro due to indirect forward reference to 939 * linux/mmzone.h's __section_mem_map_addr() definition: 940 */ 941 #define pgd_page(pgd) pfn_to_page(pgd_pfn(pgd)) 942 943 /* to find an entry in a page-table-directory. */ 944 static inline p4d_t *p4d_offset(pgd_t *pgd, unsigned long address) 945 { 946 if (!pgtable_l5_enabled()) 947 return (p4d_t *)pgd; 948 return (p4d_t *)pgd_page_vaddr(*pgd) + p4d_index(address); 949 } 950 951 static inline int pgd_bad(pgd_t pgd) 952 { 953 unsigned long ignore_flags = _PAGE_USER; 954 955 if (!pgtable_l5_enabled()) 956 return 0; 957 958 if (IS_ENABLED(CONFIG_PAGE_TABLE_ISOLATION)) 959 ignore_flags |= _PAGE_NX; 960 961 return (pgd_flags(pgd) & ~ignore_flags) != _KERNPG_TABLE; 962 } 963 964 static inline int pgd_none(pgd_t pgd) 965 { 966 if (!pgtable_l5_enabled()) 967 return 0; 968 /* 969 * There is no need to do a workaround for the KNL stray 970 * A/D bit erratum here. PGDs only point to page tables 971 * except on 32-bit non-PAE which is not supported on 972 * KNL. 973 */ 974 return !native_pgd_val(pgd); 975 } 976 #endif /* CONFIG_PGTABLE_LEVELS > 4 */ 977 978 #endif /* __ASSEMBLY__ */ 979 980 #define KERNEL_PGD_BOUNDARY pgd_index(PAGE_OFFSET) 981 #define KERNEL_PGD_PTRS (PTRS_PER_PGD - KERNEL_PGD_BOUNDARY) 982 983 #ifndef __ASSEMBLY__ 984 985 extern int direct_gbpages; 986 void init_mem_mapping(void); 987 void early_alloc_pgt_buf(void); 988 extern void memblock_find_dma_reserve(void); 989 void __init poking_init(void); 990 unsigned long init_memory_mapping(unsigned long start, 991 unsigned long end, pgprot_t prot); 992 993 #ifdef CONFIG_X86_64 994 extern pgd_t trampoline_pgd_entry; 995 #endif 996 997 /* local pte updates need not use xchg for locking */ 998 static inline pte_t native_local_ptep_get_and_clear(pte_t *ptep) 999 { 1000 pte_t res = *ptep; 1001 1002 /* Pure native function needs no input for mm, addr */ 1003 native_pte_clear(NULL, 0, ptep); 1004 return res; 1005 } 1006 1007 static inline pmd_t native_local_pmdp_get_and_clear(pmd_t *pmdp) 1008 { 1009 pmd_t res = *pmdp; 1010 1011 native_pmd_clear(pmdp); 1012 return res; 1013 } 1014 1015 static inline pud_t native_local_pudp_get_and_clear(pud_t *pudp) 1016 { 1017 pud_t res = *pudp; 1018 1019 native_pud_clear(pudp); 1020 return res; 1021 } 1022 1023 static inline void set_pte_at(struct mm_struct *mm, unsigned long addr, 1024 pte_t *ptep, pte_t pte) 1025 { 1026 page_table_check_pte_set(mm, addr, ptep, pte); 1027 set_pte(ptep, pte); 1028 } 1029 1030 static inline void set_pmd_at(struct mm_struct *mm, unsigned long addr, 1031 pmd_t *pmdp, pmd_t pmd) 1032 { 1033 page_table_check_pmd_set(mm, addr, pmdp, pmd); 1034 set_pmd(pmdp, pmd); 1035 } 1036 1037 static inline void set_pud_at(struct mm_struct *mm, unsigned long addr, 1038 pud_t *pudp, pud_t pud) 1039 { 1040 page_table_check_pud_set(mm, addr, pudp, pud); 1041 native_set_pud(pudp, pud); 1042 } 1043 1044 /* 1045 * We only update the dirty/accessed state if we set 1046 * the dirty bit by hand in the kernel, since the hardware 1047 * will do the accessed bit for us, and we don't want to 1048 * race with other CPU's that might be updating the dirty 1049 * bit at the same time. 1050 */ 1051 struct vm_area_struct; 1052 1053 #define __HAVE_ARCH_PTEP_SET_ACCESS_FLAGS 1054 extern int ptep_set_access_flags(struct vm_area_struct *vma, 1055 unsigned long address, pte_t *ptep, 1056 pte_t entry, int dirty); 1057 1058 #define __HAVE_ARCH_PTEP_TEST_AND_CLEAR_YOUNG 1059 extern int ptep_test_and_clear_young(struct vm_area_struct *vma, 1060 unsigned long addr, pte_t *ptep); 1061 1062 #define __HAVE_ARCH_PTEP_CLEAR_YOUNG_FLUSH 1063 extern int ptep_clear_flush_young(struct vm_area_struct *vma, 1064 unsigned long address, pte_t *ptep); 1065 1066 #define __HAVE_ARCH_PTEP_GET_AND_CLEAR 1067 static inline pte_t ptep_get_and_clear(struct mm_struct *mm, unsigned long addr, 1068 pte_t *ptep) 1069 { 1070 pte_t pte = native_ptep_get_and_clear(ptep); 1071 page_table_check_pte_clear(mm, addr, pte); 1072 return pte; 1073 } 1074 1075 #define __HAVE_ARCH_PTEP_GET_AND_CLEAR_FULL 1076 static inline pte_t ptep_get_and_clear_full(struct mm_struct *mm, 1077 unsigned long addr, pte_t *ptep, 1078 int full) 1079 { 1080 pte_t pte; 1081 if (full) { 1082 /* 1083 * Full address destruction in progress; paravirt does not 1084 * care about updates and native needs no locking 1085 */ 1086 pte = native_local_ptep_get_and_clear(ptep); 1087 page_table_check_pte_clear(mm, addr, pte); 1088 } else { 1089 pte = ptep_get_and_clear(mm, addr, ptep); 1090 } 1091 return pte; 1092 } 1093 1094 #define __HAVE_ARCH_PTEP_SET_WRPROTECT 1095 static inline void ptep_set_wrprotect(struct mm_struct *mm, 1096 unsigned long addr, pte_t *ptep) 1097 { 1098 clear_bit(_PAGE_BIT_RW, (unsigned long *)&ptep->pte); 1099 } 1100 1101 #define flush_tlb_fix_spurious_fault(vma, address, ptep) do { } while (0) 1102 1103 #define mk_pmd(page, pgprot) pfn_pmd(page_to_pfn(page), (pgprot)) 1104 1105 #define __HAVE_ARCH_PMDP_SET_ACCESS_FLAGS 1106 extern int pmdp_set_access_flags(struct vm_area_struct *vma, 1107 unsigned long address, pmd_t *pmdp, 1108 pmd_t entry, int dirty); 1109 extern int pudp_set_access_flags(struct vm_area_struct *vma, 1110 unsigned long address, pud_t *pudp, 1111 pud_t entry, int dirty); 1112 1113 #define __HAVE_ARCH_PMDP_TEST_AND_CLEAR_YOUNG 1114 extern int pmdp_test_and_clear_young(struct vm_area_struct *vma, 1115 unsigned long addr, pmd_t *pmdp); 1116 extern int pudp_test_and_clear_young(struct vm_area_struct *vma, 1117 unsigned long addr, pud_t *pudp); 1118 1119 #define __HAVE_ARCH_PMDP_CLEAR_YOUNG_FLUSH 1120 extern int pmdp_clear_flush_young(struct vm_area_struct *vma, 1121 unsigned long address, pmd_t *pmdp); 1122 1123 1124 #define pmd_write pmd_write 1125 static inline int pmd_write(pmd_t pmd) 1126 { 1127 return pmd_flags(pmd) & _PAGE_RW; 1128 } 1129 1130 #define __HAVE_ARCH_PMDP_HUGE_GET_AND_CLEAR 1131 static inline pmd_t pmdp_huge_get_and_clear(struct mm_struct *mm, unsigned long addr, 1132 pmd_t *pmdp) 1133 { 1134 pmd_t pmd = native_pmdp_get_and_clear(pmdp); 1135 1136 page_table_check_pmd_clear(mm, addr, pmd); 1137 1138 return pmd; 1139 } 1140 1141 #define __HAVE_ARCH_PUDP_HUGE_GET_AND_CLEAR 1142 static inline pud_t pudp_huge_get_and_clear(struct mm_struct *mm, 1143 unsigned long addr, pud_t *pudp) 1144 { 1145 pud_t pud = native_pudp_get_and_clear(pudp); 1146 1147 page_table_check_pud_clear(mm, addr, pud); 1148 1149 return pud; 1150 } 1151 1152 #define __HAVE_ARCH_PMDP_SET_WRPROTECT 1153 static inline void pmdp_set_wrprotect(struct mm_struct *mm, 1154 unsigned long addr, pmd_t *pmdp) 1155 { 1156 clear_bit(_PAGE_BIT_RW, (unsigned long *)pmdp); 1157 } 1158 1159 #define pud_write pud_write 1160 static inline int pud_write(pud_t pud) 1161 { 1162 return pud_flags(pud) & _PAGE_RW; 1163 } 1164 1165 #ifndef pmdp_establish 1166 #define pmdp_establish pmdp_establish 1167 static inline pmd_t pmdp_establish(struct vm_area_struct *vma, 1168 unsigned long address, pmd_t *pmdp, pmd_t pmd) 1169 { 1170 page_table_check_pmd_set(vma->vm_mm, address, pmdp, pmd); 1171 if (IS_ENABLED(CONFIG_SMP)) { 1172 return xchg(pmdp, pmd); 1173 } else { 1174 pmd_t old = *pmdp; 1175 WRITE_ONCE(*pmdp, pmd); 1176 return old; 1177 } 1178 } 1179 #endif 1180 1181 #define __HAVE_ARCH_PMDP_INVALIDATE_AD 1182 extern pmd_t pmdp_invalidate_ad(struct vm_area_struct *vma, 1183 unsigned long address, pmd_t *pmdp); 1184 1185 /* 1186 * Page table pages are page-aligned. The lower half of the top 1187 * level is used for userspace and the top half for the kernel. 1188 * 1189 * Returns true for parts of the PGD that map userspace and 1190 * false for the parts that map the kernel. 1191 */ 1192 static inline bool pgdp_maps_userspace(void *__ptr) 1193 { 1194 unsigned long ptr = (unsigned long)__ptr; 1195 1196 return (((ptr & ~PAGE_MASK) / sizeof(pgd_t)) < PGD_KERNEL_START); 1197 } 1198 1199 #define pgd_leaf pgd_large 1200 static inline int pgd_large(pgd_t pgd) { return 0; } 1201 1202 #ifdef CONFIG_PAGE_TABLE_ISOLATION 1203 /* 1204 * All top-level PAGE_TABLE_ISOLATION page tables are order-1 pages 1205 * (8k-aligned and 8k in size). The kernel one is at the beginning 4k and 1206 * the user one is in the last 4k. To switch between them, you 1207 * just need to flip the 12th bit in their addresses. 1208 */ 1209 #define PTI_PGTABLE_SWITCH_BIT PAGE_SHIFT 1210 1211 /* 1212 * This generates better code than the inline assembly in 1213 * __set_bit(). 1214 */ 1215 static inline void *ptr_set_bit(void *ptr, int bit) 1216 { 1217 unsigned long __ptr = (unsigned long)ptr; 1218 1219 __ptr |= BIT(bit); 1220 return (void *)__ptr; 1221 } 1222 static inline void *ptr_clear_bit(void *ptr, int bit) 1223 { 1224 unsigned long __ptr = (unsigned long)ptr; 1225 1226 __ptr &= ~BIT(bit); 1227 return (void *)__ptr; 1228 } 1229 1230 static inline pgd_t *kernel_to_user_pgdp(pgd_t *pgdp) 1231 { 1232 return ptr_set_bit(pgdp, PTI_PGTABLE_SWITCH_BIT); 1233 } 1234 1235 static inline pgd_t *user_to_kernel_pgdp(pgd_t *pgdp) 1236 { 1237 return ptr_clear_bit(pgdp, PTI_PGTABLE_SWITCH_BIT); 1238 } 1239 1240 static inline p4d_t *kernel_to_user_p4dp(p4d_t *p4dp) 1241 { 1242 return ptr_set_bit(p4dp, PTI_PGTABLE_SWITCH_BIT); 1243 } 1244 1245 static inline p4d_t *user_to_kernel_p4dp(p4d_t *p4dp) 1246 { 1247 return ptr_clear_bit(p4dp, PTI_PGTABLE_SWITCH_BIT); 1248 } 1249 #endif /* CONFIG_PAGE_TABLE_ISOLATION */ 1250 1251 /* 1252 * clone_pgd_range(pgd_t *dst, pgd_t *src, int count); 1253 * 1254 * dst - pointer to pgd range anywhere on a pgd page 1255 * src - "" 1256 * count - the number of pgds to copy. 1257 * 1258 * dst and src can be on the same page, but the range must not overlap, 1259 * and must not cross a page boundary. 1260 */ 1261 static inline void clone_pgd_range(pgd_t *dst, pgd_t *src, int count) 1262 { 1263 memcpy(dst, src, count * sizeof(pgd_t)); 1264 #ifdef CONFIG_PAGE_TABLE_ISOLATION 1265 if (!static_cpu_has(X86_FEATURE_PTI)) 1266 return; 1267 /* Clone the user space pgd as well */ 1268 memcpy(kernel_to_user_pgdp(dst), kernel_to_user_pgdp(src), 1269 count * sizeof(pgd_t)); 1270 #endif 1271 } 1272 1273 #define PTE_SHIFT ilog2(PTRS_PER_PTE) 1274 static inline int page_level_shift(enum pg_level level) 1275 { 1276 return (PAGE_SHIFT - PTE_SHIFT) + level * PTE_SHIFT; 1277 } 1278 static inline unsigned long page_level_size(enum pg_level level) 1279 { 1280 return 1UL << page_level_shift(level); 1281 } 1282 static inline unsigned long page_level_mask(enum pg_level level) 1283 { 1284 return ~(page_level_size(level) - 1); 1285 } 1286 1287 /* 1288 * The x86 doesn't have any external MMU info: the kernel page 1289 * tables contain all the necessary information. 1290 */ 1291 static inline void update_mmu_cache(struct vm_area_struct *vma, 1292 unsigned long addr, pte_t *ptep) 1293 { 1294 } 1295 static inline void update_mmu_cache_pmd(struct vm_area_struct *vma, 1296 unsigned long addr, pmd_t *pmd) 1297 { 1298 } 1299 static inline void update_mmu_cache_pud(struct vm_area_struct *vma, 1300 unsigned long addr, pud_t *pud) 1301 { 1302 } 1303 static inline pte_t pte_swp_mkexclusive(pte_t pte) 1304 { 1305 return pte_set_flags(pte, _PAGE_SWP_EXCLUSIVE); 1306 } 1307 1308 static inline int pte_swp_exclusive(pte_t pte) 1309 { 1310 return pte_flags(pte) & _PAGE_SWP_EXCLUSIVE; 1311 } 1312 1313 static inline pte_t pte_swp_clear_exclusive(pte_t pte) 1314 { 1315 return pte_clear_flags(pte, _PAGE_SWP_EXCLUSIVE); 1316 } 1317 1318 #ifdef CONFIG_HAVE_ARCH_SOFT_DIRTY 1319 static inline pte_t pte_swp_mksoft_dirty(pte_t pte) 1320 { 1321 return pte_set_flags(pte, _PAGE_SWP_SOFT_DIRTY); 1322 } 1323 1324 static inline int pte_swp_soft_dirty(pte_t pte) 1325 { 1326 return pte_flags(pte) & _PAGE_SWP_SOFT_DIRTY; 1327 } 1328 1329 static inline pte_t pte_swp_clear_soft_dirty(pte_t pte) 1330 { 1331 return pte_clear_flags(pte, _PAGE_SWP_SOFT_DIRTY); 1332 } 1333 1334 #ifdef CONFIG_ARCH_ENABLE_THP_MIGRATION 1335 static inline pmd_t pmd_swp_mksoft_dirty(pmd_t pmd) 1336 { 1337 return pmd_set_flags(pmd, _PAGE_SWP_SOFT_DIRTY); 1338 } 1339 1340 static inline int pmd_swp_soft_dirty(pmd_t pmd) 1341 { 1342 return pmd_flags(pmd) & _PAGE_SWP_SOFT_DIRTY; 1343 } 1344 1345 static inline pmd_t pmd_swp_clear_soft_dirty(pmd_t pmd) 1346 { 1347 return pmd_clear_flags(pmd, _PAGE_SWP_SOFT_DIRTY); 1348 } 1349 #endif 1350 #endif 1351 1352 #ifdef CONFIG_HAVE_ARCH_USERFAULTFD_WP 1353 static inline pte_t pte_swp_mkuffd_wp(pte_t pte) 1354 { 1355 return pte_set_flags(pte, _PAGE_SWP_UFFD_WP); 1356 } 1357 1358 static inline int pte_swp_uffd_wp(pte_t pte) 1359 { 1360 return pte_flags(pte) & _PAGE_SWP_UFFD_WP; 1361 } 1362 1363 static inline pte_t pte_swp_clear_uffd_wp(pte_t pte) 1364 { 1365 return pte_clear_flags(pte, _PAGE_SWP_UFFD_WP); 1366 } 1367 1368 static inline pmd_t pmd_swp_mkuffd_wp(pmd_t pmd) 1369 { 1370 return pmd_set_flags(pmd, _PAGE_SWP_UFFD_WP); 1371 } 1372 1373 static inline int pmd_swp_uffd_wp(pmd_t pmd) 1374 { 1375 return pmd_flags(pmd) & _PAGE_SWP_UFFD_WP; 1376 } 1377 1378 static inline pmd_t pmd_swp_clear_uffd_wp(pmd_t pmd) 1379 { 1380 return pmd_clear_flags(pmd, _PAGE_SWP_UFFD_WP); 1381 } 1382 #endif /* CONFIG_HAVE_ARCH_USERFAULTFD_WP */ 1383 1384 static inline u16 pte_flags_pkey(unsigned long pte_flags) 1385 { 1386 #ifdef CONFIG_X86_INTEL_MEMORY_PROTECTION_KEYS 1387 /* ifdef to avoid doing 59-bit shift on 32-bit values */ 1388 return (pte_flags & _PAGE_PKEY_MASK) >> _PAGE_BIT_PKEY_BIT0; 1389 #else 1390 return 0; 1391 #endif 1392 } 1393 1394 static inline bool __pkru_allows_pkey(u16 pkey, bool write) 1395 { 1396 u32 pkru = read_pkru(); 1397 1398 if (!__pkru_allows_read(pkru, pkey)) 1399 return false; 1400 if (write && !__pkru_allows_write(pkru, pkey)) 1401 return false; 1402 1403 return true; 1404 } 1405 1406 /* 1407 * 'pteval' can come from a PTE, PMD or PUD. We only check 1408 * _PAGE_PRESENT, _PAGE_USER, and _PAGE_RW in here which are the 1409 * same value on all 3 types. 1410 */ 1411 static inline bool __pte_access_permitted(unsigned long pteval, bool write) 1412 { 1413 unsigned long need_pte_bits = _PAGE_PRESENT|_PAGE_USER; 1414 1415 if (write) 1416 need_pte_bits |= _PAGE_RW; 1417 1418 if ((pteval & need_pte_bits) != need_pte_bits) 1419 return 0; 1420 1421 return __pkru_allows_pkey(pte_flags_pkey(pteval), write); 1422 } 1423 1424 #define pte_access_permitted pte_access_permitted 1425 static inline bool pte_access_permitted(pte_t pte, bool write) 1426 { 1427 return __pte_access_permitted(pte_val(pte), write); 1428 } 1429 1430 #define pmd_access_permitted pmd_access_permitted 1431 static inline bool pmd_access_permitted(pmd_t pmd, bool write) 1432 { 1433 return __pte_access_permitted(pmd_val(pmd), write); 1434 } 1435 1436 #define pud_access_permitted pud_access_permitted 1437 static inline bool pud_access_permitted(pud_t pud, bool write) 1438 { 1439 return __pte_access_permitted(pud_val(pud), write); 1440 } 1441 1442 #define __HAVE_ARCH_PFN_MODIFY_ALLOWED 1 1443 extern bool pfn_modify_allowed(unsigned long pfn, pgprot_t prot); 1444 1445 static inline bool arch_has_pfn_modify_check(void) 1446 { 1447 return boot_cpu_has_bug(X86_BUG_L1TF); 1448 } 1449 1450 #define arch_has_hw_pte_young arch_has_hw_pte_young 1451 static inline bool arch_has_hw_pte_young(void) 1452 { 1453 return true; 1454 } 1455 1456 #ifdef CONFIG_XEN_PV 1457 #define arch_has_hw_nonleaf_pmd_young arch_has_hw_nonleaf_pmd_young 1458 static inline bool arch_has_hw_nonleaf_pmd_young(void) 1459 { 1460 return !cpu_feature_enabled(X86_FEATURE_XENPV); 1461 } 1462 #endif 1463 1464 #ifdef CONFIG_PAGE_TABLE_CHECK 1465 static inline bool pte_user_accessible_page(pte_t pte) 1466 { 1467 return (pte_val(pte) & _PAGE_PRESENT) && (pte_val(pte) & _PAGE_USER); 1468 } 1469 1470 static inline bool pmd_user_accessible_page(pmd_t pmd) 1471 { 1472 return pmd_leaf(pmd) && (pmd_val(pmd) & _PAGE_PRESENT) && (pmd_val(pmd) & _PAGE_USER); 1473 } 1474 1475 static inline bool pud_user_accessible_page(pud_t pud) 1476 { 1477 return pud_leaf(pud) && (pud_val(pud) & _PAGE_PRESENT) && (pud_val(pud) & _PAGE_USER); 1478 } 1479 #endif 1480 1481 #endif /* __ASSEMBLY__ */ 1482 1483 #endif /* _ASM_X86_PGTABLE_H */ 1484