1 #ifndef _ASM_X86_PGTABLE_H 2 #define _ASM_X86_PGTABLE_H 3 4 #include <asm/page.h> 5 #include <asm/e820.h> 6 7 #include <asm/pgtable_types.h> 8 9 /* 10 * Macro to mark a page protection value as UC- 11 */ 12 #define pgprot_noncached(prot) \ 13 ((boot_cpu_data.x86 > 3) \ 14 ? (__pgprot(pgprot_val(prot) | \ 15 cachemode2protval(_PAGE_CACHE_MODE_UC_MINUS))) \ 16 : (prot)) 17 18 #ifndef __ASSEMBLY__ 19 #include <asm/x86_init.h> 20 21 void ptdump_walk_pgd_level(struct seq_file *m, pgd_t *pgd); 22 23 /* 24 * ZERO_PAGE is a global shared page that is always zero: used 25 * for zero-mapped memory areas etc.. 26 */ 27 extern unsigned long empty_zero_page[PAGE_SIZE / sizeof(unsigned long)] 28 __visible; 29 #define ZERO_PAGE(vaddr) (virt_to_page(empty_zero_page)) 30 31 extern spinlock_t pgd_lock; 32 extern struct list_head pgd_list; 33 34 extern struct mm_struct *pgd_page_get_mm(struct page *page); 35 36 #ifdef CONFIG_PARAVIRT 37 #include <asm/paravirt.h> 38 #else /* !CONFIG_PARAVIRT */ 39 #define set_pte(ptep, pte) native_set_pte(ptep, pte) 40 #define set_pte_at(mm, addr, ptep, pte) native_set_pte_at(mm, addr, ptep, pte) 41 #define set_pmd_at(mm, addr, pmdp, pmd) native_set_pmd_at(mm, addr, pmdp, pmd) 42 43 #define set_pte_atomic(ptep, pte) \ 44 native_set_pte_atomic(ptep, pte) 45 46 #define set_pmd(pmdp, pmd) native_set_pmd(pmdp, pmd) 47 48 #ifndef __PAGETABLE_PUD_FOLDED 49 #define set_pgd(pgdp, pgd) native_set_pgd(pgdp, pgd) 50 #define pgd_clear(pgd) native_pgd_clear(pgd) 51 #endif 52 53 #ifndef set_pud 54 # define set_pud(pudp, pud) native_set_pud(pudp, pud) 55 #endif 56 57 #ifndef __PAGETABLE_PMD_FOLDED 58 #define pud_clear(pud) native_pud_clear(pud) 59 #endif 60 61 #define pte_clear(mm, addr, ptep) native_pte_clear(mm, addr, ptep) 62 #define pmd_clear(pmd) native_pmd_clear(pmd) 63 64 #define pte_update(mm, addr, ptep) do { } while (0) 65 #define pte_update_defer(mm, addr, ptep) do { } while (0) 66 #define pmd_update(mm, addr, ptep) do { } while (0) 67 #define pmd_update_defer(mm, addr, ptep) do { } while (0) 68 69 #define pgd_val(x) native_pgd_val(x) 70 #define __pgd(x) native_make_pgd(x) 71 72 #ifndef __PAGETABLE_PUD_FOLDED 73 #define pud_val(x) native_pud_val(x) 74 #define __pud(x) native_make_pud(x) 75 #endif 76 77 #ifndef __PAGETABLE_PMD_FOLDED 78 #define pmd_val(x) native_pmd_val(x) 79 #define __pmd(x) native_make_pmd(x) 80 #endif 81 82 #define pte_val(x) native_pte_val(x) 83 #define __pte(x) native_make_pte(x) 84 85 #define arch_end_context_switch(prev) do {} while(0) 86 87 #endif /* CONFIG_PARAVIRT */ 88 89 /* 90 * The following only work if pte_present() is true. 91 * Undefined behaviour if not.. 92 */ 93 static inline int pte_dirty(pte_t pte) 94 { 95 return pte_flags(pte) & _PAGE_DIRTY; 96 } 97 98 static inline int pte_young(pte_t pte) 99 { 100 return pte_flags(pte) & _PAGE_ACCESSED; 101 } 102 103 static inline int pmd_dirty(pmd_t pmd) 104 { 105 return pmd_flags(pmd) & _PAGE_DIRTY; 106 } 107 108 static inline int pmd_young(pmd_t pmd) 109 { 110 return pmd_flags(pmd) & _PAGE_ACCESSED; 111 } 112 113 static inline int pte_write(pte_t pte) 114 { 115 return pte_flags(pte) & _PAGE_RW; 116 } 117 118 static inline int pte_huge(pte_t pte) 119 { 120 return pte_flags(pte) & _PAGE_PSE; 121 } 122 123 static inline int pte_global(pte_t pte) 124 { 125 return pte_flags(pte) & _PAGE_GLOBAL; 126 } 127 128 static inline int pte_exec(pte_t pte) 129 { 130 return !(pte_flags(pte) & _PAGE_NX); 131 } 132 133 static inline int pte_special(pte_t pte) 134 { 135 return pte_flags(pte) & _PAGE_SPECIAL; 136 } 137 138 static inline unsigned long pte_pfn(pte_t pte) 139 { 140 return (pte_val(pte) & PTE_PFN_MASK) >> PAGE_SHIFT; 141 } 142 143 static inline unsigned long pmd_pfn(pmd_t pmd) 144 { 145 return (pmd_val(pmd) & PTE_PFN_MASK) >> PAGE_SHIFT; 146 } 147 148 static inline unsigned long pud_pfn(pud_t pud) 149 { 150 return (pud_val(pud) & PTE_PFN_MASK) >> PAGE_SHIFT; 151 } 152 153 #define pte_page(pte) pfn_to_page(pte_pfn(pte)) 154 155 static inline int pmd_large(pmd_t pte) 156 { 157 return pmd_flags(pte) & _PAGE_PSE; 158 } 159 160 #ifdef CONFIG_TRANSPARENT_HUGEPAGE 161 static inline int pmd_trans_splitting(pmd_t pmd) 162 { 163 return pmd_val(pmd) & _PAGE_SPLITTING; 164 } 165 166 static inline int pmd_trans_huge(pmd_t pmd) 167 { 168 return pmd_val(pmd) & _PAGE_PSE; 169 } 170 171 static inline int has_transparent_hugepage(void) 172 { 173 return cpu_has_pse; 174 } 175 #endif /* CONFIG_TRANSPARENT_HUGEPAGE */ 176 177 static inline pte_t pte_set_flags(pte_t pte, pteval_t set) 178 { 179 pteval_t v = native_pte_val(pte); 180 181 return native_make_pte(v | set); 182 } 183 184 static inline pte_t pte_clear_flags(pte_t pte, pteval_t clear) 185 { 186 pteval_t v = native_pte_val(pte); 187 188 return native_make_pte(v & ~clear); 189 } 190 191 static inline pte_t pte_mkclean(pte_t pte) 192 { 193 return pte_clear_flags(pte, _PAGE_DIRTY); 194 } 195 196 static inline pte_t pte_mkold(pte_t pte) 197 { 198 return pte_clear_flags(pte, _PAGE_ACCESSED); 199 } 200 201 static inline pte_t pte_wrprotect(pte_t pte) 202 { 203 return pte_clear_flags(pte, _PAGE_RW); 204 } 205 206 static inline pte_t pte_mkexec(pte_t pte) 207 { 208 return pte_clear_flags(pte, _PAGE_NX); 209 } 210 211 static inline pte_t pte_mkdirty(pte_t pte) 212 { 213 return pte_set_flags(pte, _PAGE_DIRTY | _PAGE_SOFT_DIRTY); 214 } 215 216 static inline pte_t pte_mkyoung(pte_t pte) 217 { 218 return pte_set_flags(pte, _PAGE_ACCESSED); 219 } 220 221 static inline pte_t pte_mkwrite(pte_t pte) 222 { 223 return pte_set_flags(pte, _PAGE_RW); 224 } 225 226 static inline pte_t pte_mkhuge(pte_t pte) 227 { 228 return pte_set_flags(pte, _PAGE_PSE); 229 } 230 231 static inline pte_t pte_clrhuge(pte_t pte) 232 { 233 return pte_clear_flags(pte, _PAGE_PSE); 234 } 235 236 static inline pte_t pte_mkglobal(pte_t pte) 237 { 238 return pte_set_flags(pte, _PAGE_GLOBAL); 239 } 240 241 static inline pte_t pte_clrglobal(pte_t pte) 242 { 243 return pte_clear_flags(pte, _PAGE_GLOBAL); 244 } 245 246 static inline pte_t pte_mkspecial(pte_t pte) 247 { 248 return pte_set_flags(pte, _PAGE_SPECIAL); 249 } 250 251 static inline pmd_t pmd_set_flags(pmd_t pmd, pmdval_t set) 252 { 253 pmdval_t v = native_pmd_val(pmd); 254 255 return __pmd(v | set); 256 } 257 258 static inline pmd_t pmd_clear_flags(pmd_t pmd, pmdval_t clear) 259 { 260 pmdval_t v = native_pmd_val(pmd); 261 262 return __pmd(v & ~clear); 263 } 264 265 static inline pmd_t pmd_mkold(pmd_t pmd) 266 { 267 return pmd_clear_flags(pmd, _PAGE_ACCESSED); 268 } 269 270 static inline pmd_t pmd_wrprotect(pmd_t pmd) 271 { 272 return pmd_clear_flags(pmd, _PAGE_RW); 273 } 274 275 static inline pmd_t pmd_mkdirty(pmd_t pmd) 276 { 277 return pmd_set_flags(pmd, _PAGE_DIRTY | _PAGE_SOFT_DIRTY); 278 } 279 280 static inline pmd_t pmd_mkhuge(pmd_t pmd) 281 { 282 return pmd_set_flags(pmd, _PAGE_PSE); 283 } 284 285 static inline pmd_t pmd_mkyoung(pmd_t pmd) 286 { 287 return pmd_set_flags(pmd, _PAGE_ACCESSED); 288 } 289 290 static inline pmd_t pmd_mkwrite(pmd_t pmd) 291 { 292 return pmd_set_flags(pmd, _PAGE_RW); 293 } 294 295 static inline pmd_t pmd_mknotpresent(pmd_t pmd) 296 { 297 return pmd_clear_flags(pmd, _PAGE_PRESENT | _PAGE_PROTNONE); 298 } 299 300 #ifdef CONFIG_HAVE_ARCH_SOFT_DIRTY 301 static inline int pte_soft_dirty(pte_t pte) 302 { 303 return pte_flags(pte) & _PAGE_SOFT_DIRTY; 304 } 305 306 static inline int pmd_soft_dirty(pmd_t pmd) 307 { 308 return pmd_flags(pmd) & _PAGE_SOFT_DIRTY; 309 } 310 311 static inline pte_t pte_mksoft_dirty(pte_t pte) 312 { 313 return pte_set_flags(pte, _PAGE_SOFT_DIRTY); 314 } 315 316 static inline pmd_t pmd_mksoft_dirty(pmd_t pmd) 317 { 318 return pmd_set_flags(pmd, _PAGE_SOFT_DIRTY); 319 } 320 321 #endif /* CONFIG_HAVE_ARCH_SOFT_DIRTY */ 322 323 /* 324 * Mask out unsupported bits in a present pgprot. Non-present pgprots 325 * can use those bits for other purposes, so leave them be. 326 */ 327 static inline pgprotval_t massage_pgprot(pgprot_t pgprot) 328 { 329 pgprotval_t protval = pgprot_val(pgprot); 330 331 if (protval & _PAGE_PRESENT) 332 protval &= __supported_pte_mask; 333 334 return protval; 335 } 336 337 static inline pte_t pfn_pte(unsigned long page_nr, pgprot_t pgprot) 338 { 339 return __pte(((phys_addr_t)page_nr << PAGE_SHIFT) | 340 massage_pgprot(pgprot)); 341 } 342 343 static inline pmd_t pfn_pmd(unsigned long page_nr, pgprot_t pgprot) 344 { 345 return __pmd(((phys_addr_t)page_nr << PAGE_SHIFT) | 346 massage_pgprot(pgprot)); 347 } 348 349 static inline pte_t pte_modify(pte_t pte, pgprot_t newprot) 350 { 351 pteval_t val = pte_val(pte); 352 353 /* 354 * Chop off the NX bit (if present), and add the NX portion of 355 * the newprot (if present): 356 */ 357 val &= _PAGE_CHG_MASK; 358 val |= massage_pgprot(newprot) & ~_PAGE_CHG_MASK; 359 360 return __pte(val); 361 } 362 363 static inline pmd_t pmd_modify(pmd_t pmd, pgprot_t newprot) 364 { 365 pmdval_t val = pmd_val(pmd); 366 367 val &= _HPAGE_CHG_MASK; 368 val |= massage_pgprot(newprot) & ~_HPAGE_CHG_MASK; 369 370 return __pmd(val); 371 } 372 373 /* mprotect needs to preserve PAT bits when updating vm_page_prot */ 374 #define pgprot_modify pgprot_modify 375 static inline pgprot_t pgprot_modify(pgprot_t oldprot, pgprot_t newprot) 376 { 377 pgprotval_t preservebits = pgprot_val(oldprot) & _PAGE_CHG_MASK; 378 pgprotval_t addbits = pgprot_val(newprot); 379 return __pgprot(preservebits | addbits); 380 } 381 382 #define pte_pgprot(x) __pgprot(pte_flags(x) & PTE_FLAGS_MASK) 383 384 #define canon_pgprot(p) __pgprot(massage_pgprot(p)) 385 386 static inline int is_new_memtype_allowed(u64 paddr, unsigned long size, 387 enum page_cache_mode pcm, 388 enum page_cache_mode new_pcm) 389 { 390 /* 391 * PAT type is always WB for untracked ranges, so no need to check. 392 */ 393 if (x86_platform.is_untracked_pat_range(paddr, paddr + size)) 394 return 1; 395 396 /* 397 * Certain new memtypes are not allowed with certain 398 * requested memtype: 399 * - request is uncached, return cannot be write-back 400 * - request is write-combine, return cannot be write-back 401 */ 402 if ((pcm == _PAGE_CACHE_MODE_UC_MINUS && 403 new_pcm == _PAGE_CACHE_MODE_WB) || 404 (pcm == _PAGE_CACHE_MODE_WC && 405 new_pcm == _PAGE_CACHE_MODE_WB)) { 406 return 0; 407 } 408 409 return 1; 410 } 411 412 pmd_t *populate_extra_pmd(unsigned long vaddr); 413 pte_t *populate_extra_pte(unsigned long vaddr); 414 #endif /* __ASSEMBLY__ */ 415 416 #ifdef CONFIG_X86_32 417 # include <asm/pgtable_32.h> 418 #else 419 # include <asm/pgtable_64.h> 420 #endif 421 422 #ifndef __ASSEMBLY__ 423 #include <linux/mm_types.h> 424 #include <linux/mmdebug.h> 425 #include <linux/log2.h> 426 427 static inline int pte_none(pte_t pte) 428 { 429 return !pte.pte; 430 } 431 432 #define __HAVE_ARCH_PTE_SAME 433 static inline int pte_same(pte_t a, pte_t b) 434 { 435 return a.pte == b.pte; 436 } 437 438 static inline int pte_present(pte_t a) 439 { 440 return pte_flags(a) & (_PAGE_PRESENT | _PAGE_PROTNONE); 441 } 442 443 #define pte_accessible pte_accessible 444 static inline bool pte_accessible(struct mm_struct *mm, pte_t a) 445 { 446 if (pte_flags(a) & _PAGE_PRESENT) 447 return true; 448 449 if ((pte_flags(a) & _PAGE_PROTNONE) && 450 mm_tlb_flush_pending(mm)) 451 return true; 452 453 return false; 454 } 455 456 static inline int pte_hidden(pte_t pte) 457 { 458 return pte_flags(pte) & _PAGE_HIDDEN; 459 } 460 461 static inline int pmd_present(pmd_t pmd) 462 { 463 /* 464 * Checking for _PAGE_PSE is needed too because 465 * split_huge_page will temporarily clear the present bit (but 466 * the _PAGE_PSE flag will remain set at all times while the 467 * _PAGE_PRESENT bit is clear). 468 */ 469 return pmd_flags(pmd) & (_PAGE_PRESENT | _PAGE_PROTNONE | _PAGE_PSE); 470 } 471 472 #ifdef CONFIG_NUMA_BALANCING 473 /* 474 * These work without NUMA balancing but the kernel does not care. See the 475 * comment in include/asm-generic/pgtable.h 476 */ 477 static inline int pte_protnone(pte_t pte) 478 { 479 return (pte_flags(pte) & (_PAGE_PROTNONE | _PAGE_PRESENT)) 480 == _PAGE_PROTNONE; 481 } 482 483 static inline int pmd_protnone(pmd_t pmd) 484 { 485 return (pmd_flags(pmd) & (_PAGE_PROTNONE | _PAGE_PRESENT)) 486 == _PAGE_PROTNONE; 487 } 488 #endif /* CONFIG_NUMA_BALANCING */ 489 490 static inline int pmd_none(pmd_t pmd) 491 { 492 /* Only check low word on 32-bit platforms, since it might be 493 out of sync with upper half. */ 494 return (unsigned long)native_pmd_val(pmd) == 0; 495 } 496 497 static inline unsigned long pmd_page_vaddr(pmd_t pmd) 498 { 499 return (unsigned long)__va(pmd_val(pmd) & PTE_PFN_MASK); 500 } 501 502 /* 503 * Currently stuck as a macro due to indirect forward reference to 504 * linux/mmzone.h's __section_mem_map_addr() definition: 505 */ 506 #define pmd_page(pmd) pfn_to_page((pmd_val(pmd) & PTE_PFN_MASK) >> PAGE_SHIFT) 507 508 /* 509 * the pmd page can be thought of an array like this: pmd_t[PTRS_PER_PMD] 510 * 511 * this macro returns the index of the entry in the pmd page which would 512 * control the given virtual address 513 */ 514 static inline unsigned long pmd_index(unsigned long address) 515 { 516 return (address >> PMD_SHIFT) & (PTRS_PER_PMD - 1); 517 } 518 519 /* 520 * Conversion functions: convert a page and protection to a page entry, 521 * and a page entry and page directory to the page they refer to. 522 * 523 * (Currently stuck as a macro because of indirect forward reference 524 * to linux/mm.h:page_to_nid()) 525 */ 526 #define mk_pte(page, pgprot) pfn_pte(page_to_pfn(page), (pgprot)) 527 528 /* 529 * the pte page can be thought of an array like this: pte_t[PTRS_PER_PTE] 530 * 531 * this function returns the index of the entry in the pte page which would 532 * control the given virtual address 533 */ 534 static inline unsigned long pte_index(unsigned long address) 535 { 536 return (address >> PAGE_SHIFT) & (PTRS_PER_PTE - 1); 537 } 538 539 static inline pte_t *pte_offset_kernel(pmd_t *pmd, unsigned long address) 540 { 541 return (pte_t *)pmd_page_vaddr(*pmd) + pte_index(address); 542 } 543 544 static inline int pmd_bad(pmd_t pmd) 545 { 546 return (pmd_flags(pmd) & ~_PAGE_USER) != _KERNPG_TABLE; 547 } 548 549 static inline unsigned long pages_to_mb(unsigned long npg) 550 { 551 return npg >> (20 - PAGE_SHIFT); 552 } 553 554 #if CONFIG_PGTABLE_LEVELS > 2 555 static inline int pud_none(pud_t pud) 556 { 557 return native_pud_val(pud) == 0; 558 } 559 560 static inline int pud_present(pud_t pud) 561 { 562 return pud_flags(pud) & _PAGE_PRESENT; 563 } 564 565 static inline unsigned long pud_page_vaddr(pud_t pud) 566 { 567 return (unsigned long)__va((unsigned long)pud_val(pud) & PTE_PFN_MASK); 568 } 569 570 /* 571 * Currently stuck as a macro due to indirect forward reference to 572 * linux/mmzone.h's __section_mem_map_addr() definition: 573 */ 574 #define pud_page(pud) pfn_to_page(pud_val(pud) >> PAGE_SHIFT) 575 576 /* Find an entry in the second-level page table.. */ 577 static inline pmd_t *pmd_offset(pud_t *pud, unsigned long address) 578 { 579 return (pmd_t *)pud_page_vaddr(*pud) + pmd_index(address); 580 } 581 582 static inline int pud_large(pud_t pud) 583 { 584 return (pud_val(pud) & (_PAGE_PSE | _PAGE_PRESENT)) == 585 (_PAGE_PSE | _PAGE_PRESENT); 586 } 587 588 static inline int pud_bad(pud_t pud) 589 { 590 return (pud_flags(pud) & ~(_KERNPG_TABLE | _PAGE_USER)) != 0; 591 } 592 #else 593 static inline int pud_large(pud_t pud) 594 { 595 return 0; 596 } 597 #endif /* CONFIG_PGTABLE_LEVELS > 2 */ 598 599 #if CONFIG_PGTABLE_LEVELS > 3 600 static inline int pgd_present(pgd_t pgd) 601 { 602 return pgd_flags(pgd) & _PAGE_PRESENT; 603 } 604 605 static inline unsigned long pgd_page_vaddr(pgd_t pgd) 606 { 607 return (unsigned long)__va((unsigned long)pgd_val(pgd) & PTE_PFN_MASK); 608 } 609 610 /* 611 * Currently stuck as a macro due to indirect forward reference to 612 * linux/mmzone.h's __section_mem_map_addr() definition: 613 */ 614 #define pgd_page(pgd) pfn_to_page(pgd_val(pgd) >> PAGE_SHIFT) 615 616 /* to find an entry in a page-table-directory. */ 617 static inline unsigned long pud_index(unsigned long address) 618 { 619 return (address >> PUD_SHIFT) & (PTRS_PER_PUD - 1); 620 } 621 622 static inline pud_t *pud_offset(pgd_t *pgd, unsigned long address) 623 { 624 return (pud_t *)pgd_page_vaddr(*pgd) + pud_index(address); 625 } 626 627 static inline int pgd_bad(pgd_t pgd) 628 { 629 return (pgd_flags(pgd) & ~_PAGE_USER) != _KERNPG_TABLE; 630 } 631 632 static inline int pgd_none(pgd_t pgd) 633 { 634 return !native_pgd_val(pgd); 635 } 636 #endif /* CONFIG_PGTABLE_LEVELS > 3 */ 637 638 #endif /* __ASSEMBLY__ */ 639 640 /* 641 * the pgd page can be thought of an array like this: pgd_t[PTRS_PER_PGD] 642 * 643 * this macro returns the index of the entry in the pgd page which would 644 * control the given virtual address 645 */ 646 #define pgd_index(address) (((address) >> PGDIR_SHIFT) & (PTRS_PER_PGD - 1)) 647 648 /* 649 * pgd_offset() returns a (pgd_t *) 650 * pgd_index() is used get the offset into the pgd page's array of pgd_t's; 651 */ 652 #define pgd_offset(mm, address) ((mm)->pgd + pgd_index((address))) 653 /* 654 * a shortcut which implies the use of the kernel's pgd, instead 655 * of a process's 656 */ 657 #define pgd_offset_k(address) pgd_offset(&init_mm, (address)) 658 659 660 #define KERNEL_PGD_BOUNDARY pgd_index(PAGE_OFFSET) 661 #define KERNEL_PGD_PTRS (PTRS_PER_PGD - KERNEL_PGD_BOUNDARY) 662 663 #ifndef __ASSEMBLY__ 664 665 extern int direct_gbpages; 666 void init_mem_mapping(void); 667 void early_alloc_pgt_buf(void); 668 669 /* local pte updates need not use xchg for locking */ 670 static inline pte_t native_local_ptep_get_and_clear(pte_t *ptep) 671 { 672 pte_t res = *ptep; 673 674 /* Pure native function needs no input for mm, addr */ 675 native_pte_clear(NULL, 0, ptep); 676 return res; 677 } 678 679 static inline pmd_t native_local_pmdp_get_and_clear(pmd_t *pmdp) 680 { 681 pmd_t res = *pmdp; 682 683 native_pmd_clear(pmdp); 684 return res; 685 } 686 687 static inline void native_set_pte_at(struct mm_struct *mm, unsigned long addr, 688 pte_t *ptep , pte_t pte) 689 { 690 native_set_pte(ptep, pte); 691 } 692 693 static inline void native_set_pmd_at(struct mm_struct *mm, unsigned long addr, 694 pmd_t *pmdp , pmd_t pmd) 695 { 696 native_set_pmd(pmdp, pmd); 697 } 698 699 #ifndef CONFIG_PARAVIRT 700 /* 701 * Rules for using pte_update - it must be called after any PTE update which 702 * has not been done using the set_pte / clear_pte interfaces. It is used by 703 * shadow mode hypervisors to resynchronize the shadow page tables. Kernel PTE 704 * updates should either be sets, clears, or set_pte_atomic for P->P 705 * transitions, which means this hook should only be called for user PTEs. 706 * This hook implies a P->P protection or access change has taken place, which 707 * requires a subsequent TLB flush. The notification can optionally be delayed 708 * until the TLB flush event by using the pte_update_defer form of the 709 * interface, but care must be taken to assure that the flush happens while 710 * still holding the same page table lock so that the shadow and primary pages 711 * do not become out of sync on SMP. 712 */ 713 #define pte_update(mm, addr, ptep) do { } while (0) 714 #define pte_update_defer(mm, addr, ptep) do { } while (0) 715 #endif 716 717 /* 718 * We only update the dirty/accessed state if we set 719 * the dirty bit by hand in the kernel, since the hardware 720 * will do the accessed bit for us, and we don't want to 721 * race with other CPU's that might be updating the dirty 722 * bit at the same time. 723 */ 724 struct vm_area_struct; 725 726 #define __HAVE_ARCH_PTEP_SET_ACCESS_FLAGS 727 extern int ptep_set_access_flags(struct vm_area_struct *vma, 728 unsigned long address, pte_t *ptep, 729 pte_t entry, int dirty); 730 731 #define __HAVE_ARCH_PTEP_TEST_AND_CLEAR_YOUNG 732 extern int ptep_test_and_clear_young(struct vm_area_struct *vma, 733 unsigned long addr, pte_t *ptep); 734 735 #define __HAVE_ARCH_PTEP_CLEAR_YOUNG_FLUSH 736 extern int ptep_clear_flush_young(struct vm_area_struct *vma, 737 unsigned long address, pte_t *ptep); 738 739 #define __HAVE_ARCH_PTEP_GET_AND_CLEAR 740 static inline pte_t ptep_get_and_clear(struct mm_struct *mm, unsigned long addr, 741 pte_t *ptep) 742 { 743 pte_t pte = native_ptep_get_and_clear(ptep); 744 pte_update(mm, addr, ptep); 745 return pte; 746 } 747 748 #define __HAVE_ARCH_PTEP_GET_AND_CLEAR_FULL 749 static inline pte_t ptep_get_and_clear_full(struct mm_struct *mm, 750 unsigned long addr, pte_t *ptep, 751 int full) 752 { 753 pte_t pte; 754 if (full) { 755 /* 756 * Full address destruction in progress; paravirt does not 757 * care about updates and native needs no locking 758 */ 759 pte = native_local_ptep_get_and_clear(ptep); 760 } else { 761 pte = ptep_get_and_clear(mm, addr, ptep); 762 } 763 return pte; 764 } 765 766 #define __HAVE_ARCH_PTEP_SET_WRPROTECT 767 static inline void ptep_set_wrprotect(struct mm_struct *mm, 768 unsigned long addr, pte_t *ptep) 769 { 770 clear_bit(_PAGE_BIT_RW, (unsigned long *)&ptep->pte); 771 pte_update(mm, addr, ptep); 772 } 773 774 #define flush_tlb_fix_spurious_fault(vma, address) do { } while (0) 775 776 #define mk_pmd(page, pgprot) pfn_pmd(page_to_pfn(page), (pgprot)) 777 778 #define __HAVE_ARCH_PMDP_SET_ACCESS_FLAGS 779 extern int pmdp_set_access_flags(struct vm_area_struct *vma, 780 unsigned long address, pmd_t *pmdp, 781 pmd_t entry, int dirty); 782 783 #define __HAVE_ARCH_PMDP_TEST_AND_CLEAR_YOUNG 784 extern int pmdp_test_and_clear_young(struct vm_area_struct *vma, 785 unsigned long addr, pmd_t *pmdp); 786 787 #define __HAVE_ARCH_PMDP_CLEAR_YOUNG_FLUSH 788 extern int pmdp_clear_flush_young(struct vm_area_struct *vma, 789 unsigned long address, pmd_t *pmdp); 790 791 792 #define __HAVE_ARCH_PMDP_SPLITTING_FLUSH 793 extern void pmdp_splitting_flush(struct vm_area_struct *vma, 794 unsigned long addr, pmd_t *pmdp); 795 796 #define __HAVE_ARCH_PMD_WRITE 797 static inline int pmd_write(pmd_t pmd) 798 { 799 return pmd_flags(pmd) & _PAGE_RW; 800 } 801 802 #define __HAVE_ARCH_PMDP_GET_AND_CLEAR 803 static inline pmd_t pmdp_get_and_clear(struct mm_struct *mm, unsigned long addr, 804 pmd_t *pmdp) 805 { 806 pmd_t pmd = native_pmdp_get_and_clear(pmdp); 807 pmd_update(mm, addr, pmdp); 808 return pmd; 809 } 810 811 #define __HAVE_ARCH_PMDP_SET_WRPROTECT 812 static inline void pmdp_set_wrprotect(struct mm_struct *mm, 813 unsigned long addr, pmd_t *pmdp) 814 { 815 clear_bit(_PAGE_BIT_RW, (unsigned long *)pmdp); 816 pmd_update(mm, addr, pmdp); 817 } 818 819 /* 820 * clone_pgd_range(pgd_t *dst, pgd_t *src, int count); 821 * 822 * dst - pointer to pgd range anwhere on a pgd page 823 * src - "" 824 * count - the number of pgds to copy. 825 * 826 * dst and src can be on the same page, but the range must not overlap, 827 * and must not cross a page boundary. 828 */ 829 static inline void clone_pgd_range(pgd_t *dst, pgd_t *src, int count) 830 { 831 memcpy(dst, src, count * sizeof(pgd_t)); 832 } 833 834 #define PTE_SHIFT ilog2(PTRS_PER_PTE) 835 static inline int page_level_shift(enum pg_level level) 836 { 837 return (PAGE_SHIFT - PTE_SHIFT) + level * PTE_SHIFT; 838 } 839 static inline unsigned long page_level_size(enum pg_level level) 840 { 841 return 1UL << page_level_shift(level); 842 } 843 static inline unsigned long page_level_mask(enum pg_level level) 844 { 845 return ~(page_level_size(level) - 1); 846 } 847 848 /* 849 * The x86 doesn't have any external MMU info: the kernel page 850 * tables contain all the necessary information. 851 */ 852 static inline void update_mmu_cache(struct vm_area_struct *vma, 853 unsigned long addr, pte_t *ptep) 854 { 855 } 856 static inline void update_mmu_cache_pmd(struct vm_area_struct *vma, 857 unsigned long addr, pmd_t *pmd) 858 { 859 } 860 861 #ifdef CONFIG_HAVE_ARCH_SOFT_DIRTY 862 static inline pte_t pte_swp_mksoft_dirty(pte_t pte) 863 { 864 return pte_set_flags(pte, _PAGE_SWP_SOFT_DIRTY); 865 } 866 867 static inline int pte_swp_soft_dirty(pte_t pte) 868 { 869 return pte_flags(pte) & _PAGE_SWP_SOFT_DIRTY; 870 } 871 872 static inline pte_t pte_swp_clear_soft_dirty(pte_t pte) 873 { 874 return pte_clear_flags(pte, _PAGE_SWP_SOFT_DIRTY); 875 } 876 #endif 877 878 #include <asm-generic/pgtable.h> 879 #endif /* __ASSEMBLY__ */ 880 881 #endif /* _ASM_X86_PGTABLE_H */ 882