1 /* SPDX-License-Identifier: GPL-2.0 */ 2 #ifndef _ASM_X86_PGTABLE_2LEVEL_H 3 #define _ASM_X86_PGTABLE_2LEVEL_H 4 5 #define pte_ERROR(e) \ 6 pr_err("%s:%d: bad pte %08lx\n", __FILE__, __LINE__, (e).pte_low) 7 #define pgd_ERROR(e) \ 8 pr_err("%s:%d: bad pgd %08lx\n", __FILE__, __LINE__, pgd_val(e)) 9 10 /* 11 * Certain architectures need to do special things when PTEs 12 * within a page table are directly modified. Thus, the following 13 * hook is made available. 14 */ 15 static inline void native_set_pte(pte_t *ptep , pte_t pte) 16 { 17 *ptep = pte; 18 } 19 20 static inline void native_set_pmd(pmd_t *pmdp, pmd_t pmd) 21 { 22 #ifdef CONFIG_PAGE_TABLE_ISOLATION 23 pmd.pud.p4d.pgd = pti_set_user_pgtbl(&pmdp->pud.p4d.pgd, pmd.pud.p4d.pgd); 24 #endif 25 *pmdp = pmd; 26 } 27 28 static inline void native_set_pud(pud_t *pudp, pud_t pud) 29 { 30 } 31 32 static inline void native_set_pte_atomic(pte_t *ptep, pte_t pte) 33 { 34 native_set_pte(ptep, pte); 35 } 36 37 static inline void native_pmd_clear(pmd_t *pmdp) 38 { 39 native_set_pmd(pmdp, __pmd(0)); 40 } 41 42 static inline void native_pud_clear(pud_t *pudp) 43 { 44 } 45 46 static inline void native_pte_clear(struct mm_struct *mm, 47 unsigned long addr, pte_t *xp) 48 { 49 *xp = native_make_pte(0); 50 } 51 52 #ifdef CONFIG_SMP 53 static inline pte_t native_ptep_get_and_clear(pte_t *xp) 54 { 55 return __pte(xchg(&xp->pte_low, 0)); 56 } 57 #else 58 #define native_ptep_get_and_clear(xp) native_local_ptep_get_and_clear(xp) 59 #endif 60 61 #ifdef CONFIG_SMP 62 static inline pmd_t native_pmdp_get_and_clear(pmd_t *xp) 63 { 64 #ifdef CONFIG_PAGE_TABLE_ISOLATION 65 pti_set_user_pgtbl(&xp->pud.p4d.pgd, __pgd(0)); 66 #endif 67 return __pmd(xchg((pmdval_t *)xp, 0)); 68 } 69 #else 70 #define native_pmdp_get_and_clear(xp) native_local_pmdp_get_and_clear(xp) 71 #endif 72 73 #ifdef CONFIG_SMP 74 static inline pud_t native_pudp_get_and_clear(pud_t *xp) 75 { 76 #ifdef CONFIG_PAGE_TABLE_ISOLATION 77 pti_set_user_pgtbl(&xp->p4d.pgd, __pgd(0)); 78 #endif 79 return __pud(xchg((pudval_t *)xp, 0)); 80 } 81 #else 82 #define native_pudp_get_and_clear(xp) native_local_pudp_get_and_clear(xp) 83 #endif 84 85 /* Bit manipulation helper on pte/pgoff entry */ 86 static inline unsigned long pte_bitop(unsigned long value, unsigned int rightshift, 87 unsigned long mask, unsigned int leftshift) 88 { 89 return ((value >> rightshift) & mask) << leftshift; 90 } 91 92 /* Encode and de-code a swap entry */ 93 #define SWP_TYPE_BITS 5 94 #define SWP_OFFSET_SHIFT (_PAGE_BIT_PROTNONE + 1) 95 96 #define MAX_SWAPFILES_CHECK() BUILD_BUG_ON(MAX_SWAPFILES_SHIFT > SWP_TYPE_BITS) 97 98 #define __swp_type(x) (((x).val >> (_PAGE_BIT_PRESENT + 1)) \ 99 & ((1U << SWP_TYPE_BITS) - 1)) 100 #define __swp_offset(x) ((x).val >> SWP_OFFSET_SHIFT) 101 #define __swp_entry(type, offset) ((swp_entry_t) { \ 102 ((type) << (_PAGE_BIT_PRESENT + 1)) \ 103 | ((offset) << SWP_OFFSET_SHIFT) }) 104 #define __pte_to_swp_entry(pte) ((swp_entry_t) { (pte).pte_low }) 105 #define __swp_entry_to_pte(x) ((pte_t) { .pte = (x).val }) 106 107 /* No inverted PFNs on 2 level page tables */ 108 109 static inline u64 protnone_mask(u64 val) 110 { 111 return 0; 112 } 113 114 static inline u64 flip_protnone_guard(u64 oldval, u64 val, u64 mask) 115 { 116 return val; 117 } 118 119 static inline bool __pte_needs_invert(u64 val) 120 { 121 return false; 122 } 123 124 #endif /* _ASM_X86_PGTABLE_2LEVEL_H */ 125