1 /* SPDX-License-Identifier: GPL-2.0 */ 2 #ifndef _ASM_X86_PARAVIRT_TYPES_H 3 #define _ASM_X86_PARAVIRT_TYPES_H 4 5 /* Bitmask of what can be clobbered: usually at least eax. */ 6 #define CLBR_NONE 0 7 #define CLBR_EAX (1 << 0) 8 #define CLBR_ECX (1 << 1) 9 #define CLBR_EDX (1 << 2) 10 #define CLBR_EDI (1 << 3) 11 12 #ifdef CONFIG_X86_32 13 /* CLBR_ANY should match all regs platform has. For i386, that's just it */ 14 #define CLBR_ANY ((1 << 4) - 1) 15 16 #define CLBR_ARG_REGS (CLBR_EAX | CLBR_EDX | CLBR_ECX) 17 #define CLBR_RET_REG (CLBR_EAX | CLBR_EDX) 18 #define CLBR_SCRATCH (0) 19 #else 20 #define CLBR_RAX CLBR_EAX 21 #define CLBR_RCX CLBR_ECX 22 #define CLBR_RDX CLBR_EDX 23 #define CLBR_RDI CLBR_EDI 24 #define CLBR_RSI (1 << 4) 25 #define CLBR_R8 (1 << 5) 26 #define CLBR_R9 (1 << 6) 27 #define CLBR_R10 (1 << 7) 28 #define CLBR_R11 (1 << 8) 29 30 #define CLBR_ANY ((1 << 9) - 1) 31 32 #define CLBR_ARG_REGS (CLBR_RDI | CLBR_RSI | CLBR_RDX | \ 33 CLBR_RCX | CLBR_R8 | CLBR_R9) 34 #define CLBR_RET_REG (CLBR_RAX) 35 #define CLBR_SCRATCH (CLBR_R10 | CLBR_R11) 36 37 #endif /* X86_64 */ 38 39 #define CLBR_CALLEE_SAVE ((CLBR_ARG_REGS | CLBR_SCRATCH) & ~CLBR_RET_REG) 40 41 #ifndef __ASSEMBLY__ 42 43 #include <asm/desc_defs.h> 44 #include <asm/kmap_types.h> 45 #include <asm/pgtable_types.h> 46 #include <asm/nospec-branch.h> 47 48 struct page; 49 struct thread_struct; 50 struct desc_ptr; 51 struct tss_struct; 52 struct mm_struct; 53 struct desc_struct; 54 struct task_struct; 55 struct cpumask; 56 struct flush_tlb_info; 57 58 /* 59 * Wrapper type for pointers to code which uses the non-standard 60 * calling convention. See PV_CALL_SAVE_REGS_THUNK below. 61 */ 62 struct paravirt_callee_save { 63 void *func; 64 }; 65 66 /* general info */ 67 struct pv_info { 68 unsigned int kernel_rpl; 69 int shared_kernel_pmd; 70 71 #ifdef CONFIG_X86_64 72 u16 extra_user_64bit_cs; /* __USER_CS if none */ 73 #endif 74 75 const char *name; 76 }; 77 78 struct pv_init_ops { 79 /* 80 * Patch may replace one of the defined code sequences with 81 * arbitrary code, subject to the same register constraints. 82 * This generally means the code is not free to clobber any 83 * registers other than EAX. The patch function should return 84 * the number of bytes of code generated, as we nop pad the 85 * rest in generic code. 86 */ 87 unsigned (*patch)(u8 type, u16 clobber, void *insnbuf, 88 unsigned long addr, unsigned len); 89 } __no_randomize_layout; 90 91 92 struct pv_lazy_ops { 93 /* Set deferred update mode, used for batching operations. */ 94 void (*enter)(void); 95 void (*leave)(void); 96 void (*flush)(void); 97 } __no_randomize_layout; 98 99 struct pv_time_ops { 100 unsigned long long (*sched_clock)(void); 101 unsigned long long (*steal_clock)(int cpu); 102 } __no_randomize_layout; 103 104 struct pv_cpu_ops { 105 /* hooks for various privileged instructions */ 106 unsigned long (*get_debugreg)(int regno); 107 void (*set_debugreg)(int regno, unsigned long value); 108 109 unsigned long (*read_cr0)(void); 110 void (*write_cr0)(unsigned long); 111 112 void (*write_cr4)(unsigned long); 113 114 #ifdef CONFIG_X86_64 115 unsigned long (*read_cr8)(void); 116 void (*write_cr8)(unsigned long); 117 #endif 118 119 /* Segment descriptor handling */ 120 void (*load_tr_desc)(void); 121 void (*load_gdt)(const struct desc_ptr *); 122 void (*load_idt)(const struct desc_ptr *); 123 void (*set_ldt)(const void *desc, unsigned entries); 124 unsigned long (*store_tr)(void); 125 void (*load_tls)(struct thread_struct *t, unsigned int cpu); 126 #ifdef CONFIG_X86_64 127 void (*load_gs_index)(unsigned int idx); 128 #endif 129 void (*write_ldt_entry)(struct desc_struct *ldt, int entrynum, 130 const void *desc); 131 void (*write_gdt_entry)(struct desc_struct *, 132 int entrynum, const void *desc, int size); 133 void (*write_idt_entry)(gate_desc *, 134 int entrynum, const gate_desc *gate); 135 void (*alloc_ldt)(struct desc_struct *ldt, unsigned entries); 136 void (*free_ldt)(struct desc_struct *ldt, unsigned entries); 137 138 void (*load_sp0)(unsigned long sp0); 139 140 void (*set_iopl_mask)(unsigned mask); 141 142 void (*wbinvd)(void); 143 void (*io_delay)(void); 144 145 /* cpuid emulation, mostly so that caps bits can be disabled */ 146 void (*cpuid)(unsigned int *eax, unsigned int *ebx, 147 unsigned int *ecx, unsigned int *edx); 148 149 /* Unsafe MSR operations. These will warn or panic on failure. */ 150 u64 (*read_msr)(unsigned int msr); 151 void (*write_msr)(unsigned int msr, unsigned low, unsigned high); 152 153 /* 154 * Safe MSR operations. 155 * read sets err to 0 or -EIO. write returns 0 or -EIO. 156 */ 157 u64 (*read_msr_safe)(unsigned int msr, int *err); 158 int (*write_msr_safe)(unsigned int msr, unsigned low, unsigned high); 159 160 u64 (*read_pmc)(int counter); 161 162 /* 163 * Switch to usermode gs and return to 64-bit usermode using 164 * sysret. Only used in 64-bit kernels to return to 64-bit 165 * processes. Usermode register state, including %rsp, must 166 * already be restored. 167 */ 168 void (*usergs_sysret64)(void); 169 170 /* Normal iret. Jump to this with the standard iret stack 171 frame set up. */ 172 void (*iret)(void); 173 174 void (*swapgs)(void); 175 176 void (*start_context_switch)(struct task_struct *prev); 177 void (*end_context_switch)(struct task_struct *next); 178 } __no_randomize_layout; 179 180 struct pv_irq_ops { 181 /* 182 * Get/set interrupt state. save_fl and restore_fl are only 183 * expected to use X86_EFLAGS_IF; all other bits 184 * returned from save_fl are undefined, and may be ignored by 185 * restore_fl. 186 * 187 * NOTE: These functions callers expect the callee to preserve 188 * more registers than the standard C calling convention. 189 */ 190 struct paravirt_callee_save save_fl; 191 struct paravirt_callee_save restore_fl; 192 struct paravirt_callee_save irq_disable; 193 struct paravirt_callee_save irq_enable; 194 195 void (*safe_halt)(void); 196 void (*halt)(void); 197 198 } __no_randomize_layout; 199 200 struct pv_mmu_ops { 201 unsigned long (*read_cr2)(void); 202 void (*write_cr2)(unsigned long); 203 204 unsigned long (*read_cr3)(void); 205 void (*write_cr3)(unsigned long); 206 207 /* 208 * Hooks for intercepting the creation/use/destruction of an 209 * mm_struct. 210 */ 211 void (*activate_mm)(struct mm_struct *prev, 212 struct mm_struct *next); 213 void (*dup_mmap)(struct mm_struct *oldmm, 214 struct mm_struct *mm); 215 void (*exit_mmap)(struct mm_struct *mm); 216 217 218 /* TLB operations */ 219 void (*flush_tlb_user)(void); 220 void (*flush_tlb_kernel)(void); 221 void (*flush_tlb_one_user)(unsigned long addr); 222 void (*flush_tlb_others)(const struct cpumask *cpus, 223 const struct flush_tlb_info *info); 224 225 /* Hooks for allocating and freeing a pagetable top-level */ 226 int (*pgd_alloc)(struct mm_struct *mm); 227 void (*pgd_free)(struct mm_struct *mm, pgd_t *pgd); 228 229 /* 230 * Hooks for allocating/releasing pagetable pages when they're 231 * attached to a pagetable 232 */ 233 void (*alloc_pte)(struct mm_struct *mm, unsigned long pfn); 234 void (*alloc_pmd)(struct mm_struct *mm, unsigned long pfn); 235 void (*alloc_pud)(struct mm_struct *mm, unsigned long pfn); 236 void (*alloc_p4d)(struct mm_struct *mm, unsigned long pfn); 237 void (*release_pte)(unsigned long pfn); 238 void (*release_pmd)(unsigned long pfn); 239 void (*release_pud)(unsigned long pfn); 240 void (*release_p4d)(unsigned long pfn); 241 242 /* Pagetable manipulation functions */ 243 void (*set_pte)(pte_t *ptep, pte_t pteval); 244 void (*set_pte_at)(struct mm_struct *mm, unsigned long addr, 245 pte_t *ptep, pte_t pteval); 246 void (*set_pmd)(pmd_t *pmdp, pmd_t pmdval); 247 248 pte_t (*ptep_modify_prot_start)(struct mm_struct *mm, unsigned long addr, 249 pte_t *ptep); 250 void (*ptep_modify_prot_commit)(struct mm_struct *mm, unsigned long addr, 251 pte_t *ptep, pte_t pte); 252 253 struct paravirt_callee_save pte_val; 254 struct paravirt_callee_save make_pte; 255 256 struct paravirt_callee_save pgd_val; 257 struct paravirt_callee_save make_pgd; 258 259 #if CONFIG_PGTABLE_LEVELS >= 3 260 #ifdef CONFIG_X86_PAE 261 void (*set_pte_atomic)(pte_t *ptep, pte_t pteval); 262 void (*pte_clear)(struct mm_struct *mm, unsigned long addr, 263 pte_t *ptep); 264 void (*pmd_clear)(pmd_t *pmdp); 265 266 #endif /* CONFIG_X86_PAE */ 267 268 void (*set_pud)(pud_t *pudp, pud_t pudval); 269 270 struct paravirt_callee_save pmd_val; 271 struct paravirt_callee_save make_pmd; 272 273 #if CONFIG_PGTABLE_LEVELS >= 4 274 struct paravirt_callee_save pud_val; 275 struct paravirt_callee_save make_pud; 276 277 void (*set_p4d)(p4d_t *p4dp, p4d_t p4dval); 278 279 #if CONFIG_PGTABLE_LEVELS >= 5 280 struct paravirt_callee_save p4d_val; 281 struct paravirt_callee_save make_p4d; 282 283 void (*set_pgd)(pgd_t *pgdp, pgd_t pgdval); 284 #endif /* CONFIG_PGTABLE_LEVELS >= 5 */ 285 286 #endif /* CONFIG_PGTABLE_LEVELS >= 4 */ 287 288 #endif /* CONFIG_PGTABLE_LEVELS >= 3 */ 289 290 struct pv_lazy_ops lazy_mode; 291 292 /* dom0 ops */ 293 294 /* Sometimes the physical address is a pfn, and sometimes its 295 an mfn. We can tell which is which from the index. */ 296 void (*set_fixmap)(unsigned /* enum fixed_addresses */ idx, 297 phys_addr_t phys, pgprot_t flags); 298 } __no_randomize_layout; 299 300 struct arch_spinlock; 301 #ifdef CONFIG_SMP 302 #include <asm/spinlock_types.h> 303 #endif 304 305 struct qspinlock; 306 307 struct pv_lock_ops { 308 void (*queued_spin_lock_slowpath)(struct qspinlock *lock, u32 val); 309 struct paravirt_callee_save queued_spin_unlock; 310 311 void (*wait)(u8 *ptr, u8 val); 312 void (*kick)(int cpu); 313 314 struct paravirt_callee_save vcpu_is_preempted; 315 } __no_randomize_layout; 316 317 /* This contains all the paravirt structures: we get a convenient 318 * number for each function using the offset which we use to indicate 319 * what to patch. */ 320 struct paravirt_patch_template { 321 struct pv_init_ops pv_init_ops; 322 struct pv_time_ops pv_time_ops; 323 struct pv_cpu_ops pv_cpu_ops; 324 struct pv_irq_ops pv_irq_ops; 325 struct pv_mmu_ops pv_mmu_ops; 326 struct pv_lock_ops pv_lock_ops; 327 } __no_randomize_layout; 328 329 extern struct pv_info pv_info; 330 extern struct pv_init_ops pv_init_ops; 331 extern struct pv_time_ops pv_time_ops; 332 extern struct pv_cpu_ops pv_cpu_ops; 333 extern struct pv_irq_ops pv_irq_ops; 334 extern struct pv_mmu_ops pv_mmu_ops; 335 extern struct pv_lock_ops pv_lock_ops; 336 337 #define PARAVIRT_PATCH(x) \ 338 (offsetof(struct paravirt_patch_template, x) / sizeof(void *)) 339 340 #define paravirt_type(op) \ 341 [paravirt_typenum] "i" (PARAVIRT_PATCH(op)), \ 342 [paravirt_opptr] "i" (&(op)) 343 #define paravirt_clobber(clobber) \ 344 [paravirt_clobber] "i" (clobber) 345 346 /* 347 * Generate some code, and mark it as patchable by the 348 * apply_paravirt() alternate instruction patcher. 349 */ 350 #define _paravirt_alt(insn_string, type, clobber) \ 351 "771:\n\t" insn_string "\n" "772:\n" \ 352 ".pushsection .parainstructions,\"a\"\n" \ 353 _ASM_ALIGN "\n" \ 354 _ASM_PTR " 771b\n" \ 355 " .byte " type "\n" \ 356 " .byte 772b-771b\n" \ 357 " .short " clobber "\n" \ 358 ".popsection\n" 359 360 /* Generate patchable code, with the default asm parameters. */ 361 #define paravirt_alt(insn_string) \ 362 _paravirt_alt(insn_string, "%c[paravirt_typenum]", "%c[paravirt_clobber]") 363 364 /* Simple instruction patching code. */ 365 #define NATIVE_LABEL(a,x,b) "\n\t.globl " a #x "_" #b "\n" a #x "_" #b ":\n\t" 366 367 #define DEF_NATIVE(ops, name, code) \ 368 __visible extern const char start_##ops##_##name[], end_##ops##_##name[]; \ 369 asm(NATIVE_LABEL("start_", ops, name) code NATIVE_LABEL("end_", ops, name)) 370 371 unsigned paravirt_patch_ident_32(void *insnbuf, unsigned len); 372 unsigned paravirt_patch_ident_64(void *insnbuf, unsigned len); 373 unsigned paravirt_patch_call(void *insnbuf, 374 const void *target, u16 tgt_clobbers, 375 unsigned long addr, u16 site_clobbers, 376 unsigned len); 377 unsigned paravirt_patch_jmp(void *insnbuf, const void *target, 378 unsigned long addr, unsigned len); 379 unsigned paravirt_patch_default(u8 type, u16 clobbers, void *insnbuf, 380 unsigned long addr, unsigned len); 381 382 unsigned paravirt_patch_insns(void *insnbuf, unsigned len, 383 const char *start, const char *end); 384 385 unsigned native_patch(u8 type, u16 clobbers, void *ibuf, 386 unsigned long addr, unsigned len); 387 388 int paravirt_disable_iospace(void); 389 390 /* 391 * This generates an indirect call based on the operation type number. 392 * The type number, computed in PARAVIRT_PATCH, is derived from the 393 * offset into the paravirt_patch_template structure, and can therefore be 394 * freely converted back into a structure offset. 395 */ 396 #define PARAVIRT_CALL \ 397 ANNOTATE_RETPOLINE_SAFE \ 398 "call *%c[paravirt_opptr];" 399 400 /* 401 * These macros are intended to wrap calls through one of the paravirt 402 * ops structs, so that they can be later identified and patched at 403 * runtime. 404 * 405 * Normally, a call to a pv_op function is a simple indirect call: 406 * (pv_op_struct.operations)(args...). 407 * 408 * Unfortunately, this is a relatively slow operation for modern CPUs, 409 * because it cannot necessarily determine what the destination 410 * address is. In this case, the address is a runtime constant, so at 411 * the very least we can patch the call to e a simple direct call, or 412 * ideally, patch an inline implementation into the callsite. (Direct 413 * calls are essentially free, because the call and return addresses 414 * are completely predictable.) 415 * 416 * For i386, these macros rely on the standard gcc "regparm(3)" calling 417 * convention, in which the first three arguments are placed in %eax, 418 * %edx, %ecx (in that order), and the remaining arguments are placed 419 * on the stack. All caller-save registers (eax,edx,ecx) are expected 420 * to be modified (either clobbered or used for return values). 421 * X86_64, on the other hand, already specifies a register-based calling 422 * conventions, returning at %rax, with parameteres going on %rdi, %rsi, 423 * %rdx, and %rcx. Note that for this reason, x86_64 does not need any 424 * special handling for dealing with 4 arguments, unlike i386. 425 * However, x86_64 also have to clobber all caller saved registers, which 426 * unfortunately, are quite a bit (r8 - r11) 427 * 428 * The call instruction itself is marked by placing its start address 429 * and size into the .parainstructions section, so that 430 * apply_paravirt() in arch/i386/kernel/alternative.c can do the 431 * appropriate patching under the control of the backend pv_init_ops 432 * implementation. 433 * 434 * Unfortunately there's no way to get gcc to generate the args setup 435 * for the call, and then allow the call itself to be generated by an 436 * inline asm. Because of this, we must do the complete arg setup and 437 * return value handling from within these macros. This is fairly 438 * cumbersome. 439 * 440 * There are 5 sets of PVOP_* macros for dealing with 0-4 arguments. 441 * It could be extended to more arguments, but there would be little 442 * to be gained from that. For each number of arguments, there are 443 * the two VCALL and CALL variants for void and non-void functions. 444 * 445 * When there is a return value, the invoker of the macro must specify 446 * the return type. The macro then uses sizeof() on that type to 447 * determine whether its a 32 or 64 bit value, and places the return 448 * in the right register(s) (just %eax for 32-bit, and %edx:%eax for 449 * 64-bit). For x86_64 machines, it just returns at %rax regardless of 450 * the return value size. 451 * 452 * 64-bit arguments are passed as a pair of adjacent 32-bit arguments 453 * i386 also passes 64-bit arguments as a pair of adjacent 32-bit arguments 454 * in low,high order 455 * 456 * Small structures are passed and returned in registers. The macro 457 * calling convention can't directly deal with this, so the wrapper 458 * functions must do this. 459 * 460 * These PVOP_* macros are only defined within this header. This 461 * means that all uses must be wrapped in inline functions. This also 462 * makes sure the incoming and outgoing types are always correct. 463 */ 464 #ifdef CONFIG_X86_32 465 #define PVOP_VCALL_ARGS \ 466 unsigned long __eax = __eax, __edx = __edx, __ecx = __ecx; 467 468 #define PVOP_CALL_ARGS PVOP_VCALL_ARGS 469 470 #define PVOP_CALL_ARG1(x) "a" ((unsigned long)(x)) 471 #define PVOP_CALL_ARG2(x) "d" ((unsigned long)(x)) 472 #define PVOP_CALL_ARG3(x) "c" ((unsigned long)(x)) 473 474 #define PVOP_VCALL_CLOBBERS "=a" (__eax), "=d" (__edx), \ 475 "=c" (__ecx) 476 #define PVOP_CALL_CLOBBERS PVOP_VCALL_CLOBBERS 477 478 #define PVOP_VCALLEE_CLOBBERS "=a" (__eax), "=d" (__edx) 479 #define PVOP_CALLEE_CLOBBERS PVOP_VCALLEE_CLOBBERS 480 481 #define EXTRA_CLOBBERS 482 #define VEXTRA_CLOBBERS 483 #else /* CONFIG_X86_64 */ 484 /* [re]ax isn't an arg, but the return val */ 485 #define PVOP_VCALL_ARGS \ 486 unsigned long __edi = __edi, __esi = __esi, \ 487 __edx = __edx, __ecx = __ecx, __eax = __eax; 488 489 #define PVOP_CALL_ARGS PVOP_VCALL_ARGS 490 491 #define PVOP_CALL_ARG1(x) "D" ((unsigned long)(x)) 492 #define PVOP_CALL_ARG2(x) "S" ((unsigned long)(x)) 493 #define PVOP_CALL_ARG3(x) "d" ((unsigned long)(x)) 494 #define PVOP_CALL_ARG4(x) "c" ((unsigned long)(x)) 495 496 #define PVOP_VCALL_CLOBBERS "=D" (__edi), \ 497 "=S" (__esi), "=d" (__edx), \ 498 "=c" (__ecx) 499 #define PVOP_CALL_CLOBBERS PVOP_VCALL_CLOBBERS, "=a" (__eax) 500 501 /* void functions are still allowed [re]ax for scratch */ 502 #define PVOP_VCALLEE_CLOBBERS "=a" (__eax) 503 #define PVOP_CALLEE_CLOBBERS PVOP_VCALLEE_CLOBBERS 504 505 #define EXTRA_CLOBBERS , "r8", "r9", "r10", "r11" 506 #define VEXTRA_CLOBBERS , "rax", "r8", "r9", "r10", "r11" 507 #endif /* CONFIG_X86_32 */ 508 509 #ifdef CONFIG_PARAVIRT_DEBUG 510 #define PVOP_TEST_NULL(op) BUG_ON(op == NULL) 511 #else 512 #define PVOP_TEST_NULL(op) ((void)op) 513 #endif 514 515 #define PVOP_RETMASK(rettype) \ 516 ({ unsigned long __mask = ~0UL; \ 517 switch (sizeof(rettype)) { \ 518 case 1: __mask = 0xffUL; break; \ 519 case 2: __mask = 0xffffUL; break; \ 520 case 4: __mask = 0xffffffffUL; break; \ 521 default: break; \ 522 } \ 523 __mask; \ 524 }) 525 526 527 #define ____PVOP_CALL(rettype, op, clbr, call_clbr, extra_clbr, \ 528 pre, post, ...) \ 529 ({ \ 530 rettype __ret; \ 531 PVOP_CALL_ARGS; \ 532 PVOP_TEST_NULL(op); \ 533 /* This is 32-bit specific, but is okay in 64-bit */ \ 534 /* since this condition will never hold */ \ 535 if (sizeof(rettype) > sizeof(unsigned long)) { \ 536 asm volatile(pre \ 537 paravirt_alt(PARAVIRT_CALL) \ 538 post \ 539 : call_clbr, ASM_CALL_CONSTRAINT \ 540 : paravirt_type(op), \ 541 paravirt_clobber(clbr), \ 542 ##__VA_ARGS__ \ 543 : "memory", "cc" extra_clbr); \ 544 __ret = (rettype)((((u64)__edx) << 32) | __eax); \ 545 } else { \ 546 asm volatile(pre \ 547 paravirt_alt(PARAVIRT_CALL) \ 548 post \ 549 : call_clbr, ASM_CALL_CONSTRAINT \ 550 : paravirt_type(op), \ 551 paravirt_clobber(clbr), \ 552 ##__VA_ARGS__ \ 553 : "memory", "cc" extra_clbr); \ 554 __ret = (rettype)(__eax & PVOP_RETMASK(rettype)); \ 555 } \ 556 __ret; \ 557 }) 558 559 #define __PVOP_CALL(rettype, op, pre, post, ...) \ 560 ____PVOP_CALL(rettype, op, CLBR_ANY, PVOP_CALL_CLOBBERS, \ 561 EXTRA_CLOBBERS, pre, post, ##__VA_ARGS__) 562 563 #define __PVOP_CALLEESAVE(rettype, op, pre, post, ...) \ 564 ____PVOP_CALL(rettype, op.func, CLBR_RET_REG, \ 565 PVOP_CALLEE_CLOBBERS, , \ 566 pre, post, ##__VA_ARGS__) 567 568 569 #define ____PVOP_VCALL(op, clbr, call_clbr, extra_clbr, pre, post, ...) \ 570 ({ \ 571 PVOP_VCALL_ARGS; \ 572 PVOP_TEST_NULL(op); \ 573 asm volatile(pre \ 574 paravirt_alt(PARAVIRT_CALL) \ 575 post \ 576 : call_clbr, ASM_CALL_CONSTRAINT \ 577 : paravirt_type(op), \ 578 paravirt_clobber(clbr), \ 579 ##__VA_ARGS__ \ 580 : "memory", "cc" extra_clbr); \ 581 }) 582 583 #define __PVOP_VCALL(op, pre, post, ...) \ 584 ____PVOP_VCALL(op, CLBR_ANY, PVOP_VCALL_CLOBBERS, \ 585 VEXTRA_CLOBBERS, \ 586 pre, post, ##__VA_ARGS__) 587 588 #define __PVOP_VCALLEESAVE(op, pre, post, ...) \ 589 ____PVOP_VCALL(op.func, CLBR_RET_REG, \ 590 PVOP_VCALLEE_CLOBBERS, , \ 591 pre, post, ##__VA_ARGS__) 592 593 594 595 #define PVOP_CALL0(rettype, op) \ 596 __PVOP_CALL(rettype, op, "", "") 597 #define PVOP_VCALL0(op) \ 598 __PVOP_VCALL(op, "", "") 599 600 #define PVOP_CALLEE0(rettype, op) \ 601 __PVOP_CALLEESAVE(rettype, op, "", "") 602 #define PVOP_VCALLEE0(op) \ 603 __PVOP_VCALLEESAVE(op, "", "") 604 605 606 #define PVOP_CALL1(rettype, op, arg1) \ 607 __PVOP_CALL(rettype, op, "", "", PVOP_CALL_ARG1(arg1)) 608 #define PVOP_VCALL1(op, arg1) \ 609 __PVOP_VCALL(op, "", "", PVOP_CALL_ARG1(arg1)) 610 611 #define PVOP_CALLEE1(rettype, op, arg1) \ 612 __PVOP_CALLEESAVE(rettype, op, "", "", PVOP_CALL_ARG1(arg1)) 613 #define PVOP_VCALLEE1(op, arg1) \ 614 __PVOP_VCALLEESAVE(op, "", "", PVOP_CALL_ARG1(arg1)) 615 616 617 #define PVOP_CALL2(rettype, op, arg1, arg2) \ 618 __PVOP_CALL(rettype, op, "", "", PVOP_CALL_ARG1(arg1), \ 619 PVOP_CALL_ARG2(arg2)) 620 #define PVOP_VCALL2(op, arg1, arg2) \ 621 __PVOP_VCALL(op, "", "", PVOP_CALL_ARG1(arg1), \ 622 PVOP_CALL_ARG2(arg2)) 623 624 #define PVOP_CALLEE2(rettype, op, arg1, arg2) \ 625 __PVOP_CALLEESAVE(rettype, op, "", "", PVOP_CALL_ARG1(arg1), \ 626 PVOP_CALL_ARG2(arg2)) 627 #define PVOP_VCALLEE2(op, arg1, arg2) \ 628 __PVOP_VCALLEESAVE(op, "", "", PVOP_CALL_ARG1(arg1), \ 629 PVOP_CALL_ARG2(arg2)) 630 631 632 #define PVOP_CALL3(rettype, op, arg1, arg2, arg3) \ 633 __PVOP_CALL(rettype, op, "", "", PVOP_CALL_ARG1(arg1), \ 634 PVOP_CALL_ARG2(arg2), PVOP_CALL_ARG3(arg3)) 635 #define PVOP_VCALL3(op, arg1, arg2, arg3) \ 636 __PVOP_VCALL(op, "", "", PVOP_CALL_ARG1(arg1), \ 637 PVOP_CALL_ARG2(arg2), PVOP_CALL_ARG3(arg3)) 638 639 /* This is the only difference in x86_64. We can make it much simpler */ 640 #ifdef CONFIG_X86_32 641 #define PVOP_CALL4(rettype, op, arg1, arg2, arg3, arg4) \ 642 __PVOP_CALL(rettype, op, \ 643 "push %[_arg4];", "lea 4(%%esp),%%esp;", \ 644 PVOP_CALL_ARG1(arg1), PVOP_CALL_ARG2(arg2), \ 645 PVOP_CALL_ARG3(arg3), [_arg4] "mr" ((u32)(arg4))) 646 #define PVOP_VCALL4(op, arg1, arg2, arg3, arg4) \ 647 __PVOP_VCALL(op, \ 648 "push %[_arg4];", "lea 4(%%esp),%%esp;", \ 649 "0" ((u32)(arg1)), "1" ((u32)(arg2)), \ 650 "2" ((u32)(arg3)), [_arg4] "mr" ((u32)(arg4))) 651 #else 652 #define PVOP_CALL4(rettype, op, arg1, arg2, arg3, arg4) \ 653 __PVOP_CALL(rettype, op, "", "", \ 654 PVOP_CALL_ARG1(arg1), PVOP_CALL_ARG2(arg2), \ 655 PVOP_CALL_ARG3(arg3), PVOP_CALL_ARG4(arg4)) 656 #define PVOP_VCALL4(op, arg1, arg2, arg3, arg4) \ 657 __PVOP_VCALL(op, "", "", \ 658 PVOP_CALL_ARG1(arg1), PVOP_CALL_ARG2(arg2), \ 659 PVOP_CALL_ARG3(arg3), PVOP_CALL_ARG4(arg4)) 660 #endif 661 662 /* Lazy mode for batching updates / context switch */ 663 enum paravirt_lazy_mode { 664 PARAVIRT_LAZY_NONE, 665 PARAVIRT_LAZY_MMU, 666 PARAVIRT_LAZY_CPU, 667 }; 668 669 enum paravirt_lazy_mode paravirt_get_lazy_mode(void); 670 void paravirt_start_context_switch(struct task_struct *prev); 671 void paravirt_end_context_switch(struct task_struct *next); 672 673 void paravirt_enter_lazy_mmu(void); 674 void paravirt_leave_lazy_mmu(void); 675 void paravirt_flush_lazy_mmu(void); 676 677 void _paravirt_nop(void); 678 u32 _paravirt_ident_32(u32); 679 u64 _paravirt_ident_64(u64); 680 681 #define paravirt_nop ((void *)_paravirt_nop) 682 683 /* These all sit in the .parainstructions section to tell us what to patch. */ 684 struct paravirt_patch_site { 685 u8 *instr; /* original instructions */ 686 u8 instrtype; /* type of this instruction */ 687 u8 len; /* length of original instruction */ 688 u16 clobbers; /* what registers you may clobber */ 689 }; 690 691 extern struct paravirt_patch_site __parainstructions[], 692 __parainstructions_end[]; 693 694 #endif /* __ASSEMBLY__ */ 695 696 #endif /* _ASM_X86_PARAVIRT_TYPES_H */ 697