1 /* SPDX-License-Identifier: GPL-2.0 */ 2 #ifndef _ASM_X86_PARAVIRT_TYPES_H 3 #define _ASM_X86_PARAVIRT_TYPES_H 4 5 /* Bitmask of what can be clobbered: usually at least eax. */ 6 #define CLBR_NONE 0 7 #define CLBR_EAX (1 << 0) 8 #define CLBR_ECX (1 << 1) 9 #define CLBR_EDX (1 << 2) 10 #define CLBR_EDI (1 << 3) 11 12 #ifdef CONFIG_X86_32 13 /* CLBR_ANY should match all regs platform has. For i386, that's just it */ 14 #define CLBR_ANY ((1 << 4) - 1) 15 16 #define CLBR_ARG_REGS (CLBR_EAX | CLBR_EDX | CLBR_ECX) 17 #define CLBR_RET_REG (CLBR_EAX | CLBR_EDX) 18 #define CLBR_SCRATCH (0) 19 #else 20 #define CLBR_RAX CLBR_EAX 21 #define CLBR_RCX CLBR_ECX 22 #define CLBR_RDX CLBR_EDX 23 #define CLBR_RDI CLBR_EDI 24 #define CLBR_RSI (1 << 4) 25 #define CLBR_R8 (1 << 5) 26 #define CLBR_R9 (1 << 6) 27 #define CLBR_R10 (1 << 7) 28 #define CLBR_R11 (1 << 8) 29 30 #define CLBR_ANY ((1 << 9) - 1) 31 32 #define CLBR_ARG_REGS (CLBR_RDI | CLBR_RSI | CLBR_RDX | \ 33 CLBR_RCX | CLBR_R8 | CLBR_R9) 34 #define CLBR_RET_REG (CLBR_RAX) 35 #define CLBR_SCRATCH (CLBR_R10 | CLBR_R11) 36 37 #endif /* X86_64 */ 38 39 #define CLBR_CALLEE_SAVE ((CLBR_ARG_REGS | CLBR_SCRATCH) & ~CLBR_RET_REG) 40 41 #ifndef __ASSEMBLY__ 42 43 #include <asm/desc_defs.h> 44 #include <asm/kmap_types.h> 45 #include <asm/pgtable_types.h> 46 #include <asm/nospec-branch.h> 47 48 struct page; 49 struct thread_struct; 50 struct desc_ptr; 51 struct tss_struct; 52 struct mm_struct; 53 struct desc_struct; 54 struct task_struct; 55 struct cpumask; 56 struct flush_tlb_info; 57 struct mmu_gather; 58 struct vm_area_struct; 59 60 /* 61 * Wrapper type for pointers to code which uses the non-standard 62 * calling convention. See PV_CALL_SAVE_REGS_THUNK below. 63 */ 64 struct paravirt_callee_save { 65 void *func; 66 }; 67 68 /* general info */ 69 struct pv_info { 70 #ifdef CONFIG_PARAVIRT_XXL 71 u16 extra_user_64bit_cs; /* __USER_CS if none */ 72 #endif 73 74 const char *name; 75 }; 76 77 struct pv_init_ops { 78 /* 79 * Patch may replace one of the defined code sequences with 80 * arbitrary code, subject to the same register constraints. 81 * This generally means the code is not free to clobber any 82 * registers other than EAX. The patch function should return 83 * the number of bytes of code generated, as we nop pad the 84 * rest in generic code. 85 */ 86 unsigned (*patch)(u8 type, void *insn_buff, 87 unsigned long addr, unsigned len); 88 } __no_randomize_layout; 89 90 #ifdef CONFIG_PARAVIRT_XXL 91 struct pv_lazy_ops { 92 /* Set deferred update mode, used for batching operations. */ 93 void (*enter)(void); 94 void (*leave)(void); 95 void (*flush)(void); 96 } __no_randomize_layout; 97 #endif 98 99 struct pv_time_ops { 100 unsigned long long (*sched_clock)(void); 101 unsigned long long (*steal_clock)(int cpu); 102 } __no_randomize_layout; 103 104 struct pv_cpu_ops { 105 /* hooks for various privileged instructions */ 106 void (*io_delay)(void); 107 108 #ifdef CONFIG_PARAVIRT_XXL 109 unsigned long (*get_debugreg)(int regno); 110 void (*set_debugreg)(int regno, unsigned long value); 111 112 unsigned long (*read_cr0)(void); 113 void (*write_cr0)(unsigned long); 114 115 void (*write_cr4)(unsigned long); 116 117 /* Segment descriptor handling */ 118 void (*load_tr_desc)(void); 119 void (*load_gdt)(const struct desc_ptr *); 120 void (*load_idt)(const struct desc_ptr *); 121 void (*set_ldt)(const void *desc, unsigned entries); 122 unsigned long (*store_tr)(void); 123 void (*load_tls)(struct thread_struct *t, unsigned int cpu); 124 void (*load_gs_index)(unsigned int idx); 125 void (*write_ldt_entry)(struct desc_struct *ldt, int entrynum, 126 const void *desc); 127 void (*write_gdt_entry)(struct desc_struct *, 128 int entrynum, const void *desc, int size); 129 void (*write_idt_entry)(gate_desc *, 130 int entrynum, const gate_desc *gate); 131 void (*alloc_ldt)(struct desc_struct *ldt, unsigned entries); 132 void (*free_ldt)(struct desc_struct *ldt, unsigned entries); 133 134 void (*load_sp0)(unsigned long sp0); 135 136 #ifdef CONFIG_X86_IOPL_IOPERM 137 void (*invalidate_io_bitmap)(void); 138 void (*update_io_bitmap)(void); 139 #endif 140 141 void (*wbinvd)(void); 142 143 /* cpuid emulation, mostly so that caps bits can be disabled */ 144 void (*cpuid)(unsigned int *eax, unsigned int *ebx, 145 unsigned int *ecx, unsigned int *edx); 146 147 /* Unsafe MSR operations. These will warn or panic on failure. */ 148 u64 (*read_msr)(unsigned int msr); 149 void (*write_msr)(unsigned int msr, unsigned low, unsigned high); 150 151 /* 152 * Safe MSR operations. 153 * read sets err to 0 or -EIO. write returns 0 or -EIO. 154 */ 155 u64 (*read_msr_safe)(unsigned int msr, int *err); 156 int (*write_msr_safe)(unsigned int msr, unsigned low, unsigned high); 157 158 u64 (*read_pmc)(int counter); 159 160 /* 161 * Switch to usermode gs and return to 64-bit usermode using 162 * sysret. Only used in 64-bit kernels to return to 64-bit 163 * processes. Usermode register state, including %rsp, must 164 * already be restored. 165 */ 166 void (*usergs_sysret64)(void); 167 168 /* Normal iret. Jump to this with the standard iret stack 169 frame set up. */ 170 void (*iret)(void); 171 172 void (*swapgs)(void); 173 174 void (*start_context_switch)(struct task_struct *prev); 175 void (*end_context_switch)(struct task_struct *next); 176 #endif 177 } __no_randomize_layout; 178 179 struct pv_irq_ops { 180 #ifdef CONFIG_PARAVIRT_XXL 181 /* 182 * Get/set interrupt state. save_fl and restore_fl are only 183 * expected to use X86_EFLAGS_IF; all other bits 184 * returned from save_fl are undefined, and may be ignored by 185 * restore_fl. 186 * 187 * NOTE: These functions callers expect the callee to preserve 188 * more registers than the standard C calling convention. 189 */ 190 struct paravirt_callee_save save_fl; 191 struct paravirt_callee_save restore_fl; 192 struct paravirt_callee_save irq_disable; 193 struct paravirt_callee_save irq_enable; 194 195 void (*safe_halt)(void); 196 void (*halt)(void); 197 #endif 198 } __no_randomize_layout; 199 200 struct pv_mmu_ops { 201 /* TLB operations */ 202 void (*flush_tlb_user)(void); 203 void (*flush_tlb_kernel)(void); 204 void (*flush_tlb_one_user)(unsigned long addr); 205 void (*flush_tlb_others)(const struct cpumask *cpus, 206 const struct flush_tlb_info *info); 207 208 void (*tlb_remove_table)(struct mmu_gather *tlb, void *table); 209 210 /* Hook for intercepting the destruction of an mm_struct. */ 211 void (*exit_mmap)(struct mm_struct *mm); 212 213 #ifdef CONFIG_PARAVIRT_XXL 214 struct paravirt_callee_save read_cr2; 215 void (*write_cr2)(unsigned long); 216 217 unsigned long (*read_cr3)(void); 218 void (*write_cr3)(unsigned long); 219 220 /* Hooks for intercepting the creation/use of an mm_struct. */ 221 void (*activate_mm)(struct mm_struct *prev, 222 struct mm_struct *next); 223 void (*dup_mmap)(struct mm_struct *oldmm, 224 struct mm_struct *mm); 225 226 /* Hooks for allocating and freeing a pagetable top-level */ 227 int (*pgd_alloc)(struct mm_struct *mm); 228 void (*pgd_free)(struct mm_struct *mm, pgd_t *pgd); 229 230 /* 231 * Hooks for allocating/releasing pagetable pages when they're 232 * attached to a pagetable 233 */ 234 void (*alloc_pte)(struct mm_struct *mm, unsigned long pfn); 235 void (*alloc_pmd)(struct mm_struct *mm, unsigned long pfn); 236 void (*alloc_pud)(struct mm_struct *mm, unsigned long pfn); 237 void (*alloc_p4d)(struct mm_struct *mm, unsigned long pfn); 238 void (*release_pte)(unsigned long pfn); 239 void (*release_pmd)(unsigned long pfn); 240 void (*release_pud)(unsigned long pfn); 241 void (*release_p4d)(unsigned long pfn); 242 243 /* Pagetable manipulation functions */ 244 void (*set_pte)(pte_t *ptep, pte_t pteval); 245 void (*set_pmd)(pmd_t *pmdp, pmd_t pmdval); 246 247 pte_t (*ptep_modify_prot_start)(struct vm_area_struct *vma, unsigned long addr, 248 pte_t *ptep); 249 void (*ptep_modify_prot_commit)(struct vm_area_struct *vma, unsigned long addr, 250 pte_t *ptep, pte_t pte); 251 252 struct paravirt_callee_save pte_val; 253 struct paravirt_callee_save make_pte; 254 255 struct paravirt_callee_save pgd_val; 256 struct paravirt_callee_save make_pgd; 257 258 void (*set_pud)(pud_t *pudp, pud_t pudval); 259 260 struct paravirt_callee_save pmd_val; 261 struct paravirt_callee_save make_pmd; 262 263 struct paravirt_callee_save pud_val; 264 struct paravirt_callee_save make_pud; 265 266 void (*set_p4d)(p4d_t *p4dp, p4d_t p4dval); 267 268 #if CONFIG_PGTABLE_LEVELS >= 5 269 struct paravirt_callee_save p4d_val; 270 struct paravirt_callee_save make_p4d; 271 272 void (*set_pgd)(pgd_t *pgdp, pgd_t pgdval); 273 #endif /* CONFIG_PGTABLE_LEVELS >= 5 */ 274 275 struct pv_lazy_ops lazy_mode; 276 277 /* dom0 ops */ 278 279 /* Sometimes the physical address is a pfn, and sometimes its 280 an mfn. We can tell which is which from the index. */ 281 void (*set_fixmap)(unsigned /* enum fixed_addresses */ idx, 282 phys_addr_t phys, pgprot_t flags); 283 #endif 284 } __no_randomize_layout; 285 286 struct arch_spinlock; 287 #ifdef CONFIG_SMP 288 #include <asm/spinlock_types.h> 289 #endif 290 291 struct qspinlock; 292 293 struct pv_lock_ops { 294 void (*queued_spin_lock_slowpath)(struct qspinlock *lock, u32 val); 295 struct paravirt_callee_save queued_spin_unlock; 296 297 void (*wait)(u8 *ptr, u8 val); 298 void (*kick)(int cpu); 299 300 struct paravirt_callee_save vcpu_is_preempted; 301 } __no_randomize_layout; 302 303 /* This contains all the paravirt structures: we get a convenient 304 * number for each function using the offset which we use to indicate 305 * what to patch. */ 306 struct paravirt_patch_template { 307 struct pv_init_ops init; 308 struct pv_time_ops time; 309 struct pv_cpu_ops cpu; 310 struct pv_irq_ops irq; 311 struct pv_mmu_ops mmu; 312 struct pv_lock_ops lock; 313 } __no_randomize_layout; 314 315 extern struct pv_info pv_info; 316 extern struct paravirt_patch_template pv_ops; 317 318 #define PARAVIRT_PATCH(x) \ 319 (offsetof(struct paravirt_patch_template, x) / sizeof(void *)) 320 321 #define paravirt_type(op) \ 322 [paravirt_typenum] "i" (PARAVIRT_PATCH(op)), \ 323 [paravirt_opptr] "i" (&(pv_ops.op)) 324 #define paravirt_clobber(clobber) \ 325 [paravirt_clobber] "i" (clobber) 326 327 /* 328 * Generate some code, and mark it as patchable by the 329 * apply_paravirt() alternate instruction patcher. 330 */ 331 #define _paravirt_alt(insn_string, type, clobber) \ 332 "771:\n\t" insn_string "\n" "772:\n" \ 333 ".pushsection .parainstructions,\"a\"\n" \ 334 _ASM_ALIGN "\n" \ 335 _ASM_PTR " 771b\n" \ 336 " .byte " type "\n" \ 337 " .byte 772b-771b\n" \ 338 " .short " clobber "\n" \ 339 ".popsection\n" 340 341 /* Generate patchable code, with the default asm parameters. */ 342 #define paravirt_alt(insn_string) \ 343 _paravirt_alt(insn_string, "%c[paravirt_typenum]", "%c[paravirt_clobber]") 344 345 /* Simple instruction patching code. */ 346 #define NATIVE_LABEL(a,x,b) "\n\t.globl " a #x "_" #b "\n" a #x "_" #b ":\n\t" 347 348 unsigned paravirt_patch_ident_64(void *insn_buff, unsigned len); 349 unsigned paravirt_patch_default(u8 type, void *insn_buff, unsigned long addr, unsigned len); 350 unsigned paravirt_patch_insns(void *insn_buff, unsigned len, const char *start, const char *end); 351 352 unsigned native_patch(u8 type, void *insn_buff, unsigned long addr, unsigned len); 353 354 int paravirt_disable_iospace(void); 355 356 /* 357 * This generates an indirect call based on the operation type number. 358 * The type number, computed in PARAVIRT_PATCH, is derived from the 359 * offset into the paravirt_patch_template structure, and can therefore be 360 * freely converted back into a structure offset. 361 */ 362 #define PARAVIRT_CALL \ 363 ANNOTATE_RETPOLINE_SAFE \ 364 "call *%c[paravirt_opptr];" 365 366 /* 367 * These macros are intended to wrap calls through one of the paravirt 368 * ops structs, so that they can be later identified and patched at 369 * runtime. 370 * 371 * Normally, a call to a pv_op function is a simple indirect call: 372 * (pv_op_struct.operations)(args...). 373 * 374 * Unfortunately, this is a relatively slow operation for modern CPUs, 375 * because it cannot necessarily determine what the destination 376 * address is. In this case, the address is a runtime constant, so at 377 * the very least we can patch the call to e a simple direct call, or 378 * ideally, patch an inline implementation into the callsite. (Direct 379 * calls are essentially free, because the call and return addresses 380 * are completely predictable.) 381 * 382 * For i386, these macros rely on the standard gcc "regparm(3)" calling 383 * convention, in which the first three arguments are placed in %eax, 384 * %edx, %ecx (in that order), and the remaining arguments are placed 385 * on the stack. All caller-save registers (eax,edx,ecx) are expected 386 * to be modified (either clobbered or used for return values). 387 * X86_64, on the other hand, already specifies a register-based calling 388 * conventions, returning at %rax, with parameteres going on %rdi, %rsi, 389 * %rdx, and %rcx. Note that for this reason, x86_64 does not need any 390 * special handling for dealing with 4 arguments, unlike i386. 391 * However, x86_64 also have to clobber all caller saved registers, which 392 * unfortunately, are quite a bit (r8 - r11) 393 * 394 * The call instruction itself is marked by placing its start address 395 * and size into the .parainstructions section, so that 396 * apply_paravirt() in arch/i386/kernel/alternative.c can do the 397 * appropriate patching under the control of the backend pv_init_ops 398 * implementation. 399 * 400 * Unfortunately there's no way to get gcc to generate the args setup 401 * for the call, and then allow the call itself to be generated by an 402 * inline asm. Because of this, we must do the complete arg setup and 403 * return value handling from within these macros. This is fairly 404 * cumbersome. 405 * 406 * There are 5 sets of PVOP_* macros for dealing with 0-4 arguments. 407 * It could be extended to more arguments, but there would be little 408 * to be gained from that. For each number of arguments, there are 409 * the two VCALL and CALL variants for void and non-void functions. 410 * 411 * When there is a return value, the invoker of the macro must specify 412 * the return type. The macro then uses sizeof() on that type to 413 * determine whether its a 32 or 64 bit value, and places the return 414 * in the right register(s) (just %eax for 32-bit, and %edx:%eax for 415 * 64-bit). For x86_64 machines, it just returns at %rax regardless of 416 * the return value size. 417 * 418 * 64-bit arguments are passed as a pair of adjacent 32-bit arguments 419 * i386 also passes 64-bit arguments as a pair of adjacent 32-bit arguments 420 * in low,high order 421 * 422 * Small structures are passed and returned in registers. The macro 423 * calling convention can't directly deal with this, so the wrapper 424 * functions must do this. 425 * 426 * These PVOP_* macros are only defined within this header. This 427 * means that all uses must be wrapped in inline functions. This also 428 * makes sure the incoming and outgoing types are always correct. 429 */ 430 #ifdef CONFIG_X86_32 431 #define PVOP_VCALL_ARGS \ 432 unsigned long __eax = __eax, __edx = __edx, __ecx = __ecx; 433 434 #define PVOP_CALL_ARGS PVOP_VCALL_ARGS 435 436 #define PVOP_CALL_ARG1(x) "a" ((unsigned long)(x)) 437 #define PVOP_CALL_ARG2(x) "d" ((unsigned long)(x)) 438 #define PVOP_CALL_ARG3(x) "c" ((unsigned long)(x)) 439 440 #define PVOP_VCALL_CLOBBERS "=a" (__eax), "=d" (__edx), \ 441 "=c" (__ecx) 442 #define PVOP_CALL_CLOBBERS PVOP_VCALL_CLOBBERS 443 444 #define PVOP_VCALLEE_CLOBBERS "=a" (__eax), "=d" (__edx) 445 #define PVOP_CALLEE_CLOBBERS PVOP_VCALLEE_CLOBBERS 446 447 #define EXTRA_CLOBBERS 448 #define VEXTRA_CLOBBERS 449 #else /* CONFIG_X86_64 */ 450 /* [re]ax isn't an arg, but the return val */ 451 #define PVOP_VCALL_ARGS \ 452 unsigned long __edi = __edi, __esi = __esi, \ 453 __edx = __edx, __ecx = __ecx, __eax = __eax; 454 455 #define PVOP_CALL_ARGS PVOP_VCALL_ARGS 456 457 #define PVOP_CALL_ARG1(x) "D" ((unsigned long)(x)) 458 #define PVOP_CALL_ARG2(x) "S" ((unsigned long)(x)) 459 #define PVOP_CALL_ARG3(x) "d" ((unsigned long)(x)) 460 #define PVOP_CALL_ARG4(x) "c" ((unsigned long)(x)) 461 462 #define PVOP_VCALL_CLOBBERS "=D" (__edi), \ 463 "=S" (__esi), "=d" (__edx), \ 464 "=c" (__ecx) 465 #define PVOP_CALL_CLOBBERS PVOP_VCALL_CLOBBERS, "=a" (__eax) 466 467 /* void functions are still allowed [re]ax for scratch */ 468 #define PVOP_VCALLEE_CLOBBERS "=a" (__eax) 469 #define PVOP_CALLEE_CLOBBERS PVOP_VCALLEE_CLOBBERS 470 471 #define EXTRA_CLOBBERS , "r8", "r9", "r10", "r11" 472 #define VEXTRA_CLOBBERS , "rax", "r8", "r9", "r10", "r11" 473 #endif /* CONFIG_X86_32 */ 474 475 #ifdef CONFIG_PARAVIRT_DEBUG 476 #define PVOP_TEST_NULL(op) BUG_ON(pv_ops.op == NULL) 477 #else 478 #define PVOP_TEST_NULL(op) ((void)pv_ops.op) 479 #endif 480 481 #define PVOP_RETMASK(rettype) \ 482 ({ unsigned long __mask = ~0UL; \ 483 switch (sizeof(rettype)) { \ 484 case 1: __mask = 0xffUL; break; \ 485 case 2: __mask = 0xffffUL; break; \ 486 case 4: __mask = 0xffffffffUL; break; \ 487 default: break; \ 488 } \ 489 __mask; \ 490 }) 491 492 493 #define ____PVOP_CALL(rettype, op, clbr, call_clbr, extra_clbr, \ 494 pre, post, ...) \ 495 ({ \ 496 rettype __ret; \ 497 PVOP_CALL_ARGS; \ 498 PVOP_TEST_NULL(op); \ 499 /* This is 32-bit specific, but is okay in 64-bit */ \ 500 /* since this condition will never hold */ \ 501 if (sizeof(rettype) > sizeof(unsigned long)) { \ 502 asm volatile(pre \ 503 paravirt_alt(PARAVIRT_CALL) \ 504 post \ 505 : call_clbr, ASM_CALL_CONSTRAINT \ 506 : paravirt_type(op), \ 507 paravirt_clobber(clbr), \ 508 ##__VA_ARGS__ \ 509 : "memory", "cc" extra_clbr); \ 510 __ret = (rettype)((((u64)__edx) << 32) | __eax); \ 511 } else { \ 512 asm volatile(pre \ 513 paravirt_alt(PARAVIRT_CALL) \ 514 post \ 515 : call_clbr, ASM_CALL_CONSTRAINT \ 516 : paravirt_type(op), \ 517 paravirt_clobber(clbr), \ 518 ##__VA_ARGS__ \ 519 : "memory", "cc" extra_clbr); \ 520 __ret = (rettype)(__eax & PVOP_RETMASK(rettype)); \ 521 } \ 522 __ret; \ 523 }) 524 525 #define __PVOP_CALL(rettype, op, pre, post, ...) \ 526 ____PVOP_CALL(rettype, op, CLBR_ANY, PVOP_CALL_CLOBBERS, \ 527 EXTRA_CLOBBERS, pre, post, ##__VA_ARGS__) 528 529 #define __PVOP_CALLEESAVE(rettype, op, pre, post, ...) \ 530 ____PVOP_CALL(rettype, op.func, CLBR_RET_REG, \ 531 PVOP_CALLEE_CLOBBERS, , \ 532 pre, post, ##__VA_ARGS__) 533 534 535 #define ____PVOP_VCALL(op, clbr, call_clbr, extra_clbr, pre, post, ...) \ 536 ({ \ 537 PVOP_VCALL_ARGS; \ 538 PVOP_TEST_NULL(op); \ 539 asm volatile(pre \ 540 paravirt_alt(PARAVIRT_CALL) \ 541 post \ 542 : call_clbr, ASM_CALL_CONSTRAINT \ 543 : paravirt_type(op), \ 544 paravirt_clobber(clbr), \ 545 ##__VA_ARGS__ \ 546 : "memory", "cc" extra_clbr); \ 547 }) 548 549 #define __PVOP_VCALL(op, pre, post, ...) \ 550 ____PVOP_VCALL(op, CLBR_ANY, PVOP_VCALL_CLOBBERS, \ 551 VEXTRA_CLOBBERS, \ 552 pre, post, ##__VA_ARGS__) 553 554 #define __PVOP_VCALLEESAVE(op, pre, post, ...) \ 555 ____PVOP_VCALL(op.func, CLBR_RET_REG, \ 556 PVOP_VCALLEE_CLOBBERS, , \ 557 pre, post, ##__VA_ARGS__) 558 559 560 561 #define PVOP_CALL0(rettype, op) \ 562 __PVOP_CALL(rettype, op, "", "") 563 #define PVOP_VCALL0(op) \ 564 __PVOP_VCALL(op, "", "") 565 566 #define PVOP_CALLEE0(rettype, op) \ 567 __PVOP_CALLEESAVE(rettype, op, "", "") 568 #define PVOP_VCALLEE0(op) \ 569 __PVOP_VCALLEESAVE(op, "", "") 570 571 572 #define PVOP_CALL1(rettype, op, arg1) \ 573 __PVOP_CALL(rettype, op, "", "", PVOP_CALL_ARG1(arg1)) 574 #define PVOP_VCALL1(op, arg1) \ 575 __PVOP_VCALL(op, "", "", PVOP_CALL_ARG1(arg1)) 576 577 #define PVOP_CALLEE1(rettype, op, arg1) \ 578 __PVOP_CALLEESAVE(rettype, op, "", "", PVOP_CALL_ARG1(arg1)) 579 #define PVOP_VCALLEE1(op, arg1) \ 580 __PVOP_VCALLEESAVE(op, "", "", PVOP_CALL_ARG1(arg1)) 581 582 583 #define PVOP_CALL2(rettype, op, arg1, arg2) \ 584 __PVOP_CALL(rettype, op, "", "", PVOP_CALL_ARG1(arg1), \ 585 PVOP_CALL_ARG2(arg2)) 586 #define PVOP_VCALL2(op, arg1, arg2) \ 587 __PVOP_VCALL(op, "", "", PVOP_CALL_ARG1(arg1), \ 588 PVOP_CALL_ARG2(arg2)) 589 590 #define PVOP_CALLEE2(rettype, op, arg1, arg2) \ 591 __PVOP_CALLEESAVE(rettype, op, "", "", PVOP_CALL_ARG1(arg1), \ 592 PVOP_CALL_ARG2(arg2)) 593 #define PVOP_VCALLEE2(op, arg1, arg2) \ 594 __PVOP_VCALLEESAVE(op, "", "", PVOP_CALL_ARG1(arg1), \ 595 PVOP_CALL_ARG2(arg2)) 596 597 598 #define PVOP_CALL3(rettype, op, arg1, arg2, arg3) \ 599 __PVOP_CALL(rettype, op, "", "", PVOP_CALL_ARG1(arg1), \ 600 PVOP_CALL_ARG2(arg2), PVOP_CALL_ARG3(arg3)) 601 #define PVOP_VCALL3(op, arg1, arg2, arg3) \ 602 __PVOP_VCALL(op, "", "", PVOP_CALL_ARG1(arg1), \ 603 PVOP_CALL_ARG2(arg2), PVOP_CALL_ARG3(arg3)) 604 605 /* This is the only difference in x86_64. We can make it much simpler */ 606 #ifdef CONFIG_X86_32 607 #define PVOP_CALL4(rettype, op, arg1, arg2, arg3, arg4) \ 608 __PVOP_CALL(rettype, op, \ 609 "push %[_arg4];", "lea 4(%%esp),%%esp;", \ 610 PVOP_CALL_ARG1(arg1), PVOP_CALL_ARG2(arg2), \ 611 PVOP_CALL_ARG3(arg3), [_arg4] "mr" ((u32)(arg4))) 612 #define PVOP_VCALL4(op, arg1, arg2, arg3, arg4) \ 613 __PVOP_VCALL(op, \ 614 "push %[_arg4];", "lea 4(%%esp),%%esp;", \ 615 "0" ((u32)(arg1)), "1" ((u32)(arg2)), \ 616 "2" ((u32)(arg3)), [_arg4] "mr" ((u32)(arg4))) 617 #else 618 #define PVOP_CALL4(rettype, op, arg1, arg2, arg3, arg4) \ 619 __PVOP_CALL(rettype, op, "", "", \ 620 PVOP_CALL_ARG1(arg1), PVOP_CALL_ARG2(arg2), \ 621 PVOP_CALL_ARG3(arg3), PVOP_CALL_ARG4(arg4)) 622 #define PVOP_VCALL4(op, arg1, arg2, arg3, arg4) \ 623 __PVOP_VCALL(op, "", "", \ 624 PVOP_CALL_ARG1(arg1), PVOP_CALL_ARG2(arg2), \ 625 PVOP_CALL_ARG3(arg3), PVOP_CALL_ARG4(arg4)) 626 #endif 627 628 /* Lazy mode for batching updates / context switch */ 629 enum paravirt_lazy_mode { 630 PARAVIRT_LAZY_NONE, 631 PARAVIRT_LAZY_MMU, 632 PARAVIRT_LAZY_CPU, 633 }; 634 635 enum paravirt_lazy_mode paravirt_get_lazy_mode(void); 636 void paravirt_start_context_switch(struct task_struct *prev); 637 void paravirt_end_context_switch(struct task_struct *next); 638 639 void paravirt_enter_lazy_mmu(void); 640 void paravirt_leave_lazy_mmu(void); 641 void paravirt_flush_lazy_mmu(void); 642 643 void _paravirt_nop(void); 644 u64 _paravirt_ident_64(u64); 645 646 #define paravirt_nop ((void *)_paravirt_nop) 647 648 /* These all sit in the .parainstructions section to tell us what to patch. */ 649 struct paravirt_patch_site { 650 u8 *instr; /* original instructions */ 651 u8 type; /* type of this instruction */ 652 u8 len; /* length of original instruction */ 653 }; 654 655 extern struct paravirt_patch_site __parainstructions[], 656 __parainstructions_end[]; 657 658 #endif /* __ASSEMBLY__ */ 659 660 #endif /* _ASM_X86_PARAVIRT_TYPES_H */ 661