1 /* SPDX-License-Identifier: GPL-2.0 */ 2 #ifndef _ASM_X86_PARAVIRT_TYPES_H 3 #define _ASM_X86_PARAVIRT_TYPES_H 4 5 /* Bitmask of what can be clobbered: usually at least eax. */ 6 #define CLBR_NONE 0 7 #define CLBR_EAX (1 << 0) 8 #define CLBR_ECX (1 << 1) 9 #define CLBR_EDX (1 << 2) 10 #define CLBR_EDI (1 << 3) 11 12 #ifdef CONFIG_X86_32 13 /* CLBR_ANY should match all regs platform has. For i386, that's just it */ 14 #define CLBR_ANY ((1 << 4) - 1) 15 16 #define CLBR_ARG_REGS (CLBR_EAX | CLBR_EDX | CLBR_ECX) 17 #define CLBR_RET_REG (CLBR_EAX | CLBR_EDX) 18 #define CLBR_SCRATCH (0) 19 #else 20 #define CLBR_RAX CLBR_EAX 21 #define CLBR_RCX CLBR_ECX 22 #define CLBR_RDX CLBR_EDX 23 #define CLBR_RDI CLBR_EDI 24 #define CLBR_RSI (1 << 4) 25 #define CLBR_R8 (1 << 5) 26 #define CLBR_R9 (1 << 6) 27 #define CLBR_R10 (1 << 7) 28 #define CLBR_R11 (1 << 8) 29 30 #define CLBR_ANY ((1 << 9) - 1) 31 32 #define CLBR_ARG_REGS (CLBR_RDI | CLBR_RSI | CLBR_RDX | \ 33 CLBR_RCX | CLBR_R8 | CLBR_R9) 34 #define CLBR_RET_REG (CLBR_RAX) 35 #define CLBR_SCRATCH (CLBR_R10 | CLBR_R11) 36 37 #endif /* X86_64 */ 38 39 #define CLBR_CALLEE_SAVE ((CLBR_ARG_REGS | CLBR_SCRATCH) & ~CLBR_RET_REG) 40 41 #ifndef __ASSEMBLY__ 42 43 #include <asm/desc_defs.h> 44 #include <asm/pgtable_types.h> 45 #include <asm/nospec-branch.h> 46 47 struct page; 48 struct thread_struct; 49 struct desc_ptr; 50 struct tss_struct; 51 struct mm_struct; 52 struct desc_struct; 53 struct task_struct; 54 struct cpumask; 55 struct flush_tlb_info; 56 struct mmu_gather; 57 struct vm_area_struct; 58 59 /* 60 * Wrapper type for pointers to code which uses the non-standard 61 * calling convention. See PV_CALL_SAVE_REGS_THUNK below. 62 */ 63 struct paravirt_callee_save { 64 void *func; 65 }; 66 67 /* general info */ 68 struct pv_info { 69 #ifdef CONFIG_PARAVIRT_XXL 70 u16 extra_user_64bit_cs; /* __USER_CS if none */ 71 #endif 72 73 const char *name; 74 }; 75 76 struct pv_init_ops { 77 /* 78 * Patch may replace one of the defined code sequences with 79 * arbitrary code, subject to the same register constraints. 80 * This generally means the code is not free to clobber any 81 * registers other than EAX. The patch function should return 82 * the number of bytes of code generated, as we nop pad the 83 * rest in generic code. 84 */ 85 unsigned (*patch)(u8 type, void *insn_buff, 86 unsigned long addr, unsigned len); 87 } __no_randomize_layout; 88 89 #ifdef CONFIG_PARAVIRT_XXL 90 struct pv_lazy_ops { 91 /* Set deferred update mode, used for batching operations. */ 92 void (*enter)(void); 93 void (*leave)(void); 94 void (*flush)(void); 95 } __no_randomize_layout; 96 #endif 97 98 struct pv_time_ops { 99 unsigned long long (*sched_clock)(void); 100 unsigned long long (*steal_clock)(int cpu); 101 } __no_randomize_layout; 102 103 struct pv_cpu_ops { 104 /* hooks for various privileged instructions */ 105 void (*io_delay)(void); 106 107 #ifdef CONFIG_PARAVIRT_XXL 108 unsigned long (*get_debugreg)(int regno); 109 void (*set_debugreg)(int regno, unsigned long value); 110 111 unsigned long (*read_cr0)(void); 112 void (*write_cr0)(unsigned long); 113 114 void (*write_cr4)(unsigned long); 115 116 /* Segment descriptor handling */ 117 void (*load_tr_desc)(void); 118 void (*load_gdt)(const struct desc_ptr *); 119 void (*load_idt)(const struct desc_ptr *); 120 void (*set_ldt)(const void *desc, unsigned entries); 121 unsigned long (*store_tr)(void); 122 void (*load_tls)(struct thread_struct *t, unsigned int cpu); 123 void (*load_gs_index)(unsigned int idx); 124 void (*write_ldt_entry)(struct desc_struct *ldt, int entrynum, 125 const void *desc); 126 void (*write_gdt_entry)(struct desc_struct *, 127 int entrynum, const void *desc, int size); 128 void (*write_idt_entry)(gate_desc *, 129 int entrynum, const gate_desc *gate); 130 void (*alloc_ldt)(struct desc_struct *ldt, unsigned entries); 131 void (*free_ldt)(struct desc_struct *ldt, unsigned entries); 132 133 void (*load_sp0)(unsigned long sp0); 134 135 #ifdef CONFIG_X86_IOPL_IOPERM 136 void (*invalidate_io_bitmap)(void); 137 void (*update_io_bitmap)(void); 138 #endif 139 140 void (*wbinvd)(void); 141 142 /* cpuid emulation, mostly so that caps bits can be disabled */ 143 void (*cpuid)(unsigned int *eax, unsigned int *ebx, 144 unsigned int *ecx, unsigned int *edx); 145 146 /* Unsafe MSR operations. These will warn or panic on failure. */ 147 u64 (*read_msr)(unsigned int msr); 148 void (*write_msr)(unsigned int msr, unsigned low, unsigned high); 149 150 /* 151 * Safe MSR operations. 152 * read sets err to 0 or -EIO. write returns 0 or -EIO. 153 */ 154 u64 (*read_msr_safe)(unsigned int msr, int *err); 155 int (*write_msr_safe)(unsigned int msr, unsigned low, unsigned high); 156 157 u64 (*read_pmc)(int counter); 158 159 /* Normal iret. Jump to this with the standard iret stack 160 frame set up. */ 161 void (*iret)(void); 162 163 void (*start_context_switch)(struct task_struct *prev); 164 void (*end_context_switch)(struct task_struct *next); 165 #endif 166 } __no_randomize_layout; 167 168 struct pv_irq_ops { 169 #ifdef CONFIG_PARAVIRT_XXL 170 /* 171 * Get/set interrupt state. save_fl is expected to use X86_EFLAGS_IF; 172 * all other bits returned from save_fl are undefined. 173 * 174 * NOTE: These functions callers expect the callee to preserve 175 * more registers than the standard C calling convention. 176 */ 177 struct paravirt_callee_save save_fl; 178 struct paravirt_callee_save irq_disable; 179 struct paravirt_callee_save irq_enable; 180 181 void (*safe_halt)(void); 182 void (*halt)(void); 183 #endif 184 } __no_randomize_layout; 185 186 struct pv_mmu_ops { 187 /* TLB operations */ 188 void (*flush_tlb_user)(void); 189 void (*flush_tlb_kernel)(void); 190 void (*flush_tlb_one_user)(unsigned long addr); 191 void (*flush_tlb_others)(const struct cpumask *cpus, 192 const struct flush_tlb_info *info); 193 194 void (*tlb_remove_table)(struct mmu_gather *tlb, void *table); 195 196 /* Hook for intercepting the destruction of an mm_struct. */ 197 void (*exit_mmap)(struct mm_struct *mm); 198 199 #ifdef CONFIG_PARAVIRT_XXL 200 struct paravirt_callee_save read_cr2; 201 void (*write_cr2)(unsigned long); 202 203 unsigned long (*read_cr3)(void); 204 void (*write_cr3)(unsigned long); 205 206 /* Hooks for intercepting the creation/use of an mm_struct. */ 207 void (*activate_mm)(struct mm_struct *prev, 208 struct mm_struct *next); 209 void (*dup_mmap)(struct mm_struct *oldmm, 210 struct mm_struct *mm); 211 212 /* Hooks for allocating and freeing a pagetable top-level */ 213 int (*pgd_alloc)(struct mm_struct *mm); 214 void (*pgd_free)(struct mm_struct *mm, pgd_t *pgd); 215 216 /* 217 * Hooks for allocating/releasing pagetable pages when they're 218 * attached to a pagetable 219 */ 220 void (*alloc_pte)(struct mm_struct *mm, unsigned long pfn); 221 void (*alloc_pmd)(struct mm_struct *mm, unsigned long pfn); 222 void (*alloc_pud)(struct mm_struct *mm, unsigned long pfn); 223 void (*alloc_p4d)(struct mm_struct *mm, unsigned long pfn); 224 void (*release_pte)(unsigned long pfn); 225 void (*release_pmd)(unsigned long pfn); 226 void (*release_pud)(unsigned long pfn); 227 void (*release_p4d)(unsigned long pfn); 228 229 /* Pagetable manipulation functions */ 230 void (*set_pte)(pte_t *ptep, pte_t pteval); 231 void (*set_pmd)(pmd_t *pmdp, pmd_t pmdval); 232 233 pte_t (*ptep_modify_prot_start)(struct vm_area_struct *vma, unsigned long addr, 234 pte_t *ptep); 235 void (*ptep_modify_prot_commit)(struct vm_area_struct *vma, unsigned long addr, 236 pte_t *ptep, pte_t pte); 237 238 struct paravirt_callee_save pte_val; 239 struct paravirt_callee_save make_pte; 240 241 struct paravirt_callee_save pgd_val; 242 struct paravirt_callee_save make_pgd; 243 244 void (*set_pud)(pud_t *pudp, pud_t pudval); 245 246 struct paravirt_callee_save pmd_val; 247 struct paravirt_callee_save make_pmd; 248 249 struct paravirt_callee_save pud_val; 250 struct paravirt_callee_save make_pud; 251 252 void (*set_p4d)(p4d_t *p4dp, p4d_t p4dval); 253 254 #if CONFIG_PGTABLE_LEVELS >= 5 255 struct paravirt_callee_save p4d_val; 256 struct paravirt_callee_save make_p4d; 257 258 void (*set_pgd)(pgd_t *pgdp, pgd_t pgdval); 259 #endif /* CONFIG_PGTABLE_LEVELS >= 5 */ 260 261 struct pv_lazy_ops lazy_mode; 262 263 /* dom0 ops */ 264 265 /* Sometimes the physical address is a pfn, and sometimes its 266 an mfn. We can tell which is which from the index. */ 267 void (*set_fixmap)(unsigned /* enum fixed_addresses */ idx, 268 phys_addr_t phys, pgprot_t flags); 269 #endif 270 } __no_randomize_layout; 271 272 struct arch_spinlock; 273 #ifdef CONFIG_SMP 274 #include <asm/spinlock_types.h> 275 #endif 276 277 struct qspinlock; 278 279 struct pv_lock_ops { 280 void (*queued_spin_lock_slowpath)(struct qspinlock *lock, u32 val); 281 struct paravirt_callee_save queued_spin_unlock; 282 283 void (*wait)(u8 *ptr, u8 val); 284 void (*kick)(int cpu); 285 286 struct paravirt_callee_save vcpu_is_preempted; 287 } __no_randomize_layout; 288 289 /* This contains all the paravirt structures: we get a convenient 290 * number for each function using the offset which we use to indicate 291 * what to patch. */ 292 struct paravirt_patch_template { 293 struct pv_init_ops init; 294 struct pv_time_ops time; 295 struct pv_cpu_ops cpu; 296 struct pv_irq_ops irq; 297 struct pv_mmu_ops mmu; 298 struct pv_lock_ops lock; 299 } __no_randomize_layout; 300 301 extern struct pv_info pv_info; 302 extern struct paravirt_patch_template pv_ops; 303 304 #define PARAVIRT_PATCH(x) \ 305 (offsetof(struct paravirt_patch_template, x) / sizeof(void *)) 306 307 #define paravirt_type(op) \ 308 [paravirt_typenum] "i" (PARAVIRT_PATCH(op)), \ 309 [paravirt_opptr] "i" (&(pv_ops.op)) 310 #define paravirt_clobber(clobber) \ 311 [paravirt_clobber] "i" (clobber) 312 313 /* 314 * Generate some code, and mark it as patchable by the 315 * apply_paravirt() alternate instruction patcher. 316 */ 317 #define _paravirt_alt(insn_string, type, clobber) \ 318 "771:\n\t" insn_string "\n" "772:\n" \ 319 ".pushsection .parainstructions,\"a\"\n" \ 320 _ASM_ALIGN "\n" \ 321 _ASM_PTR " 771b\n" \ 322 " .byte " type "\n" \ 323 " .byte 772b-771b\n" \ 324 " .short " clobber "\n" \ 325 ".popsection\n" 326 327 /* Generate patchable code, with the default asm parameters. */ 328 #define paravirt_alt(insn_string) \ 329 _paravirt_alt(insn_string, "%c[paravirt_typenum]", "%c[paravirt_clobber]") 330 331 /* Simple instruction patching code. */ 332 #define NATIVE_LABEL(a,x,b) "\n\t.globl " a #x "_" #b "\n" a #x "_" #b ":\n\t" 333 334 unsigned paravirt_patch_ident_64(void *insn_buff, unsigned len); 335 unsigned paravirt_patch_default(u8 type, void *insn_buff, unsigned long addr, unsigned len); 336 unsigned paravirt_patch_insns(void *insn_buff, unsigned len, const char *start, const char *end); 337 338 unsigned native_patch(u8 type, void *insn_buff, unsigned long addr, unsigned len); 339 340 int paravirt_disable_iospace(void); 341 342 /* 343 * This generates an indirect call based on the operation type number. 344 * The type number, computed in PARAVIRT_PATCH, is derived from the 345 * offset into the paravirt_patch_template structure, and can therefore be 346 * freely converted back into a structure offset. 347 */ 348 #define PARAVIRT_CALL \ 349 ANNOTATE_RETPOLINE_SAFE \ 350 "call *%c[paravirt_opptr];" 351 352 /* 353 * These macros are intended to wrap calls through one of the paravirt 354 * ops structs, so that they can be later identified and patched at 355 * runtime. 356 * 357 * Normally, a call to a pv_op function is a simple indirect call: 358 * (pv_op_struct.operations)(args...). 359 * 360 * Unfortunately, this is a relatively slow operation for modern CPUs, 361 * because it cannot necessarily determine what the destination 362 * address is. In this case, the address is a runtime constant, so at 363 * the very least we can patch the call to e a simple direct call, or 364 * ideally, patch an inline implementation into the callsite. (Direct 365 * calls are essentially free, because the call and return addresses 366 * are completely predictable.) 367 * 368 * For i386, these macros rely on the standard gcc "regparm(3)" calling 369 * convention, in which the first three arguments are placed in %eax, 370 * %edx, %ecx (in that order), and the remaining arguments are placed 371 * on the stack. All caller-save registers (eax,edx,ecx) are expected 372 * to be modified (either clobbered or used for return values). 373 * X86_64, on the other hand, already specifies a register-based calling 374 * conventions, returning at %rax, with parameteres going on %rdi, %rsi, 375 * %rdx, and %rcx. Note that for this reason, x86_64 does not need any 376 * special handling for dealing with 4 arguments, unlike i386. 377 * However, x86_64 also have to clobber all caller saved registers, which 378 * unfortunately, are quite a bit (r8 - r11) 379 * 380 * The call instruction itself is marked by placing its start address 381 * and size into the .parainstructions section, so that 382 * apply_paravirt() in arch/i386/kernel/alternative.c can do the 383 * appropriate patching under the control of the backend pv_init_ops 384 * implementation. 385 * 386 * Unfortunately there's no way to get gcc to generate the args setup 387 * for the call, and then allow the call itself to be generated by an 388 * inline asm. Because of this, we must do the complete arg setup and 389 * return value handling from within these macros. This is fairly 390 * cumbersome. 391 * 392 * There are 5 sets of PVOP_* macros for dealing with 0-4 arguments. 393 * It could be extended to more arguments, but there would be little 394 * to be gained from that. For each number of arguments, there are 395 * the two VCALL and CALL variants for void and non-void functions. 396 * 397 * When there is a return value, the invoker of the macro must specify 398 * the return type. The macro then uses sizeof() on that type to 399 * determine whether its a 32 or 64 bit value, and places the return 400 * in the right register(s) (just %eax for 32-bit, and %edx:%eax for 401 * 64-bit). For x86_64 machines, it just returns at %rax regardless of 402 * the return value size. 403 * 404 * 64-bit arguments are passed as a pair of adjacent 32-bit arguments 405 * i386 also passes 64-bit arguments as a pair of adjacent 32-bit arguments 406 * in low,high order 407 * 408 * Small structures are passed and returned in registers. The macro 409 * calling convention can't directly deal with this, so the wrapper 410 * functions must do this. 411 * 412 * These PVOP_* macros are only defined within this header. This 413 * means that all uses must be wrapped in inline functions. This also 414 * makes sure the incoming and outgoing types are always correct. 415 */ 416 #ifdef CONFIG_X86_32 417 #define PVOP_VCALL_ARGS \ 418 unsigned long __eax = __eax, __edx = __edx, __ecx = __ecx; 419 420 #define PVOP_CALL_ARGS PVOP_VCALL_ARGS 421 422 #define PVOP_CALL_ARG1(x) "a" ((unsigned long)(x)) 423 #define PVOP_CALL_ARG2(x) "d" ((unsigned long)(x)) 424 #define PVOP_CALL_ARG3(x) "c" ((unsigned long)(x)) 425 426 #define PVOP_VCALL_CLOBBERS "=a" (__eax), "=d" (__edx), \ 427 "=c" (__ecx) 428 #define PVOP_CALL_CLOBBERS PVOP_VCALL_CLOBBERS 429 430 #define PVOP_VCALLEE_CLOBBERS "=a" (__eax), "=d" (__edx) 431 #define PVOP_CALLEE_CLOBBERS PVOP_VCALLEE_CLOBBERS 432 433 #define EXTRA_CLOBBERS 434 #define VEXTRA_CLOBBERS 435 #else /* CONFIG_X86_64 */ 436 /* [re]ax isn't an arg, but the return val */ 437 #define PVOP_VCALL_ARGS \ 438 unsigned long __edi = __edi, __esi = __esi, \ 439 __edx = __edx, __ecx = __ecx, __eax = __eax; 440 441 #define PVOP_CALL_ARGS PVOP_VCALL_ARGS 442 443 #define PVOP_CALL_ARG1(x) "D" ((unsigned long)(x)) 444 #define PVOP_CALL_ARG2(x) "S" ((unsigned long)(x)) 445 #define PVOP_CALL_ARG3(x) "d" ((unsigned long)(x)) 446 #define PVOP_CALL_ARG4(x) "c" ((unsigned long)(x)) 447 448 #define PVOP_VCALL_CLOBBERS "=D" (__edi), \ 449 "=S" (__esi), "=d" (__edx), \ 450 "=c" (__ecx) 451 #define PVOP_CALL_CLOBBERS PVOP_VCALL_CLOBBERS, "=a" (__eax) 452 453 /* void functions are still allowed [re]ax for scratch */ 454 #define PVOP_VCALLEE_CLOBBERS "=a" (__eax) 455 #define PVOP_CALLEE_CLOBBERS PVOP_VCALLEE_CLOBBERS 456 457 #define EXTRA_CLOBBERS , "r8", "r9", "r10", "r11" 458 #define VEXTRA_CLOBBERS , "rax", "r8", "r9", "r10", "r11" 459 #endif /* CONFIG_X86_32 */ 460 461 #ifdef CONFIG_PARAVIRT_DEBUG 462 #define PVOP_TEST_NULL(op) BUG_ON(pv_ops.op == NULL) 463 #else 464 #define PVOP_TEST_NULL(op) ((void)pv_ops.op) 465 #endif 466 467 #define PVOP_RETMASK(rettype) \ 468 ({ unsigned long __mask = ~0UL; \ 469 switch (sizeof(rettype)) { \ 470 case 1: __mask = 0xffUL; break; \ 471 case 2: __mask = 0xffffUL; break; \ 472 case 4: __mask = 0xffffffffUL; break; \ 473 default: break; \ 474 } \ 475 __mask; \ 476 }) 477 478 479 #define ____PVOP_CALL(rettype, op, clbr, call_clbr, extra_clbr, \ 480 pre, post, ...) \ 481 ({ \ 482 rettype __ret; \ 483 PVOP_CALL_ARGS; \ 484 PVOP_TEST_NULL(op); \ 485 /* This is 32-bit specific, but is okay in 64-bit */ \ 486 /* since this condition will never hold */ \ 487 if (sizeof(rettype) > sizeof(unsigned long)) { \ 488 asm volatile(pre \ 489 paravirt_alt(PARAVIRT_CALL) \ 490 post \ 491 : call_clbr, ASM_CALL_CONSTRAINT \ 492 : paravirt_type(op), \ 493 paravirt_clobber(clbr), \ 494 ##__VA_ARGS__ \ 495 : "memory", "cc" extra_clbr); \ 496 __ret = (rettype)((((u64)__edx) << 32) | __eax); \ 497 } else { \ 498 asm volatile(pre \ 499 paravirt_alt(PARAVIRT_CALL) \ 500 post \ 501 : call_clbr, ASM_CALL_CONSTRAINT \ 502 : paravirt_type(op), \ 503 paravirt_clobber(clbr), \ 504 ##__VA_ARGS__ \ 505 : "memory", "cc" extra_clbr); \ 506 __ret = (rettype)(__eax & PVOP_RETMASK(rettype)); \ 507 } \ 508 __ret; \ 509 }) 510 511 #define __PVOP_CALL(rettype, op, pre, post, ...) \ 512 ____PVOP_CALL(rettype, op, CLBR_ANY, PVOP_CALL_CLOBBERS, \ 513 EXTRA_CLOBBERS, pre, post, ##__VA_ARGS__) 514 515 #define __PVOP_CALLEESAVE(rettype, op, pre, post, ...) \ 516 ____PVOP_CALL(rettype, op.func, CLBR_RET_REG, \ 517 PVOP_CALLEE_CLOBBERS, , \ 518 pre, post, ##__VA_ARGS__) 519 520 521 #define ____PVOP_VCALL(op, clbr, call_clbr, extra_clbr, pre, post, ...) \ 522 ({ \ 523 PVOP_VCALL_ARGS; \ 524 PVOP_TEST_NULL(op); \ 525 asm volatile(pre \ 526 paravirt_alt(PARAVIRT_CALL) \ 527 post \ 528 : call_clbr, ASM_CALL_CONSTRAINT \ 529 : paravirt_type(op), \ 530 paravirt_clobber(clbr), \ 531 ##__VA_ARGS__ \ 532 : "memory", "cc" extra_clbr); \ 533 }) 534 535 #define __PVOP_VCALL(op, pre, post, ...) \ 536 ____PVOP_VCALL(op, CLBR_ANY, PVOP_VCALL_CLOBBERS, \ 537 VEXTRA_CLOBBERS, \ 538 pre, post, ##__VA_ARGS__) 539 540 #define __PVOP_VCALLEESAVE(op, pre, post, ...) \ 541 ____PVOP_VCALL(op.func, CLBR_RET_REG, \ 542 PVOP_VCALLEE_CLOBBERS, , \ 543 pre, post, ##__VA_ARGS__) 544 545 546 547 #define PVOP_CALL0(rettype, op) \ 548 __PVOP_CALL(rettype, op, "", "") 549 #define PVOP_VCALL0(op) \ 550 __PVOP_VCALL(op, "", "") 551 552 #define PVOP_CALLEE0(rettype, op) \ 553 __PVOP_CALLEESAVE(rettype, op, "", "") 554 #define PVOP_VCALLEE0(op) \ 555 __PVOP_VCALLEESAVE(op, "", "") 556 557 558 #define PVOP_CALL1(rettype, op, arg1) \ 559 __PVOP_CALL(rettype, op, "", "", PVOP_CALL_ARG1(arg1)) 560 #define PVOP_VCALL1(op, arg1) \ 561 __PVOP_VCALL(op, "", "", PVOP_CALL_ARG1(arg1)) 562 563 #define PVOP_CALLEE1(rettype, op, arg1) \ 564 __PVOP_CALLEESAVE(rettype, op, "", "", PVOP_CALL_ARG1(arg1)) 565 #define PVOP_VCALLEE1(op, arg1) \ 566 __PVOP_VCALLEESAVE(op, "", "", PVOP_CALL_ARG1(arg1)) 567 568 569 #define PVOP_CALL2(rettype, op, arg1, arg2) \ 570 __PVOP_CALL(rettype, op, "", "", PVOP_CALL_ARG1(arg1), \ 571 PVOP_CALL_ARG2(arg2)) 572 #define PVOP_VCALL2(op, arg1, arg2) \ 573 __PVOP_VCALL(op, "", "", PVOP_CALL_ARG1(arg1), \ 574 PVOP_CALL_ARG2(arg2)) 575 576 #define PVOP_CALLEE2(rettype, op, arg1, arg2) \ 577 __PVOP_CALLEESAVE(rettype, op, "", "", PVOP_CALL_ARG1(arg1), \ 578 PVOP_CALL_ARG2(arg2)) 579 #define PVOP_VCALLEE2(op, arg1, arg2) \ 580 __PVOP_VCALLEESAVE(op, "", "", PVOP_CALL_ARG1(arg1), \ 581 PVOP_CALL_ARG2(arg2)) 582 583 584 #define PVOP_CALL3(rettype, op, arg1, arg2, arg3) \ 585 __PVOP_CALL(rettype, op, "", "", PVOP_CALL_ARG1(arg1), \ 586 PVOP_CALL_ARG2(arg2), PVOP_CALL_ARG3(arg3)) 587 #define PVOP_VCALL3(op, arg1, arg2, arg3) \ 588 __PVOP_VCALL(op, "", "", PVOP_CALL_ARG1(arg1), \ 589 PVOP_CALL_ARG2(arg2), PVOP_CALL_ARG3(arg3)) 590 591 /* This is the only difference in x86_64. We can make it much simpler */ 592 #ifdef CONFIG_X86_32 593 #define PVOP_CALL4(rettype, op, arg1, arg2, arg3, arg4) \ 594 __PVOP_CALL(rettype, op, \ 595 "push %[_arg4];", "lea 4(%%esp),%%esp;", \ 596 PVOP_CALL_ARG1(arg1), PVOP_CALL_ARG2(arg2), \ 597 PVOP_CALL_ARG3(arg3), [_arg4] "mr" ((u32)(arg4))) 598 #define PVOP_VCALL4(op, arg1, arg2, arg3, arg4) \ 599 __PVOP_VCALL(op, \ 600 "push %[_arg4];", "lea 4(%%esp),%%esp;", \ 601 "0" ((u32)(arg1)), "1" ((u32)(arg2)), \ 602 "2" ((u32)(arg3)), [_arg4] "mr" ((u32)(arg4))) 603 #else 604 #define PVOP_CALL4(rettype, op, arg1, arg2, arg3, arg4) \ 605 __PVOP_CALL(rettype, op, "", "", \ 606 PVOP_CALL_ARG1(arg1), PVOP_CALL_ARG2(arg2), \ 607 PVOP_CALL_ARG3(arg3), PVOP_CALL_ARG4(arg4)) 608 #define PVOP_VCALL4(op, arg1, arg2, arg3, arg4) \ 609 __PVOP_VCALL(op, "", "", \ 610 PVOP_CALL_ARG1(arg1), PVOP_CALL_ARG2(arg2), \ 611 PVOP_CALL_ARG3(arg3), PVOP_CALL_ARG4(arg4)) 612 #endif 613 614 /* Lazy mode for batching updates / context switch */ 615 enum paravirt_lazy_mode { 616 PARAVIRT_LAZY_NONE, 617 PARAVIRT_LAZY_MMU, 618 PARAVIRT_LAZY_CPU, 619 }; 620 621 enum paravirt_lazy_mode paravirt_get_lazy_mode(void); 622 void paravirt_start_context_switch(struct task_struct *prev); 623 void paravirt_end_context_switch(struct task_struct *next); 624 625 void paravirt_enter_lazy_mmu(void); 626 void paravirt_leave_lazy_mmu(void); 627 void paravirt_flush_lazy_mmu(void); 628 629 void _paravirt_nop(void); 630 u64 _paravirt_ident_64(u64); 631 632 #define paravirt_nop ((void *)_paravirt_nop) 633 634 /* These all sit in the .parainstructions section to tell us what to patch. */ 635 struct paravirt_patch_site { 636 u8 *instr; /* original instructions */ 637 u8 type; /* type of this instruction */ 638 u8 len; /* length of original instruction */ 639 }; 640 641 extern struct paravirt_patch_site __parainstructions[], 642 __parainstructions_end[]; 643 644 #endif /* __ASSEMBLY__ */ 645 646 #endif /* _ASM_X86_PARAVIRT_TYPES_H */ 647