1b2441318SGreg Kroah-Hartman /* SPDX-License-Identifier: GPL-2.0 */
251c78eb3SJeremy Fitzhardinge #ifndef _ASM_X86_PAGE_64_DEFS_H
351c78eb3SJeremy Fitzhardinge #define _ASM_X86_PAGE_64_DEFS_H
451c78eb3SJeremy Fitzhardinge 
5021182e5SThomas Garnier #ifndef __ASSEMBLY__
6021182e5SThomas Garnier #include <asm/kaslr.h>
7021182e5SThomas Garnier #endif
8021182e5SThomas Garnier 
9c420f167SAndrey Ryabinin #ifdef CONFIG_KASAN
10c420f167SAndrey Ryabinin #define KASAN_STACK_ORDER 1
11c420f167SAndrey Ryabinin #else
12c420f167SAndrey Ryabinin #define KASAN_STACK_ORDER 0
13c420f167SAndrey Ryabinin #endif
14c420f167SAndrey Ryabinin 
15c420f167SAndrey Ryabinin #define THREAD_SIZE_ORDER	(2 + KASAN_STACK_ORDER)
1638e7c572SThomas Gleixner #define THREAD_SIZE  (PAGE_SIZE << THREAD_SIZE_ORDER)
1751c78eb3SJeremy Fitzhardinge 
187fae4c24SPeter Zijlstra #define EXCEPTION_STACK_ORDER (1 + KASAN_STACK_ORDER)
1951c78eb3SJeremy Fitzhardinge #define EXCEPTION_STKSZ (PAGE_SIZE << EXCEPTION_STACK_ORDER)
2051c78eb3SJeremy Fitzhardinge 
21c420f167SAndrey Ryabinin #define IRQ_STACK_ORDER (2 + KASAN_STACK_ORDER)
2251c78eb3SJeremy Fitzhardinge #define IRQ_STACK_SIZE (PAGE_SIZE << IRQ_STACK_ORDER)
2351c78eb3SJeremy Fitzhardinge 
248f34c5b5SThomas Gleixner /*
258f34c5b5SThomas Gleixner  * The index for the tss.ist[] array. The hardware limit is 7 entries.
268f34c5b5SThomas Gleixner  */
2732074269SThomas Gleixner #define	IST_INDEX_DF		0
2832074269SThomas Gleixner #define	IST_INDEX_NMI		1
2932074269SThomas Gleixner #define	IST_INDEX_DB		2
3032074269SThomas Gleixner #define	IST_INDEX_MCE		3
3102772fb9SJoerg Roedel #define	IST_INDEX_VC		4
3251c78eb3SJeremy Fitzhardinge 
3351c78eb3SJeremy Fitzhardinge /*
3451c78eb3SJeremy Fitzhardinge  * Set __PAGE_OFFSET to the most negative possible address +
35d52888aaSKirill A. Shutemov  * PGDIR_SIZE*17 (pgd slot 273).
36d52888aaSKirill A. Shutemov  *
37d52888aaSKirill A. Shutemov  * The gap is to allow a space for LDT remap for PTI (1 pgd slot) and space for
38d52888aaSKirill A. Shutemov  * a hypervisor (16 slots). Choosing 16 slots for a hypervisor is arbitrary,
39d52888aaSKirill A. Shutemov  * but it's what Xen requires.
4051c78eb3SJeremy Fitzhardinge  */
41d52888aaSKirill A. Shutemov #define __PAGE_OFFSET_BASE_L5	_AC(0xff11000000000000, UL)
42d52888aaSKirill A. Shutemov #define __PAGE_OFFSET_BASE_L4	_AC(0xffff888000000000, UL)
434c7c4483SKirill A. Shutemov 
44eedb92abSKirill A. Shutemov #ifdef CONFIG_DYNAMIC_MEMORY_LAYOUT
45021182e5SThomas Garnier #define __PAGE_OFFSET           page_offset_base
46021182e5SThomas Garnier #else
474fa5662bSKirill A. Shutemov #define __PAGE_OFFSET           __PAGE_OFFSET_BASE_L4
48eedb92abSKirill A. Shutemov #endif /* CONFIG_DYNAMIC_MEMORY_LAYOUT */
4951c78eb3SJeremy Fitzhardinge 
5051c78eb3SJeremy Fitzhardinge #define __START_KERNEL_map	_AC(0xffffffff80000000, UL)
5151c78eb3SJeremy Fitzhardinge 
52*ff61f079SJonathan Corbet /* See Documentation/arch/x86/x86_64/mm.rst for a description of the memory map. */
53b83ce5eeSKirill A. Shutemov 
544c7c4483SKirill A. Shutemov #define __PHYSICAL_MASK_SHIFT	52
55b83ce5eeSKirill A. Shutemov 
56b83ce5eeSKirill A. Shutemov #ifdef CONFIG_X86_5LEVEL
57ed7588d5SKirill A. Shutemov #define __VIRTUAL_MASK_SHIFT	(pgtable_l5_enabled() ? 56 : 47)
58025768a9SLinus Torvalds /* See task_size_max() in <asm/page_64.h> */
594c7c4483SKirill A. Shutemov #else
609063c61fSLinus Torvalds #define __VIRTUAL_MASK_SHIFT	47
61025768a9SLinus Torvalds #define task_size_max()		((_AC(1,UL) << __VIRTUAL_MASK_SHIFT) - PAGE_SIZE)
624c7c4483SKirill A. Shutemov #endif
6351c78eb3SJeremy Fitzhardinge 
64025768a9SLinus Torvalds #define TASK_SIZE_MAX		task_size_max()
65999c83e8SChristoph Hellwig #define DEFAULT_MAP_WINDOW	((1UL << 47) - PAGE_SIZE)
66999c83e8SChristoph Hellwig 
67999c83e8SChristoph Hellwig /* This decides where the kernel will search for a free chunk of vm
68999c83e8SChristoph Hellwig  * space during mmap's.
69999c83e8SChristoph Hellwig  */
70999c83e8SChristoph Hellwig #define IA32_PAGE_OFFSET	((current->personality & ADDR_LIMIT_3GB) ? \
71999c83e8SChristoph Hellwig 					0xc0000000 : 0xFFFFe000)
72999c83e8SChristoph Hellwig 
73999c83e8SChristoph Hellwig #define TASK_SIZE_LOW		(test_thread_flag(TIF_ADDR32) ? \
74999c83e8SChristoph Hellwig 					IA32_PAGE_OFFSET : DEFAULT_MAP_WINDOW)
75999c83e8SChristoph Hellwig #define TASK_SIZE		(test_thread_flag(TIF_ADDR32) ? \
76999c83e8SChristoph Hellwig 					IA32_PAGE_OFFSET : TASK_SIZE_MAX)
77999c83e8SChristoph Hellwig #define TASK_SIZE_OF(child)	((test_tsk_thread_flag(child, TIF_ADDR32)) ? \
78999c83e8SChristoph Hellwig 					IA32_PAGE_OFFSET : TASK_SIZE_MAX)
79999c83e8SChristoph Hellwig 
80999c83e8SChristoph Hellwig #define STACK_TOP		TASK_SIZE_LOW
81999c83e8SChristoph Hellwig #define STACK_TOP_MAX		TASK_SIZE_MAX
82999c83e8SChristoph Hellwig 
83999c83e8SChristoph Hellwig /*
84ea3186b9SArvind Sankar  * In spite of the name, KERNEL_IMAGE_SIZE is a limit on the maximum virtual
85ea3186b9SArvind Sankar  * address for the kernel image, rather than the limit on the size itself.
86ea3186b9SArvind Sankar  * This can be at most 1 GiB, due to the fixmap living in the next 1 GiB (see
87ea3186b9SArvind Sankar  * level2_kernel_pgt in arch/x86/kernel/head_64.S).
8806d4a462SBaoquan He  *
8906d4a462SBaoquan He  * On KASLR use 1 GiB by default, leaving 1 GiB for modules once the
9006d4a462SBaoquan He  * page tables are fully set up.
9106d4a462SBaoquan He  *
9206d4a462SBaoquan He  * If KASLR is disabled we can shrink it to 0.5 GiB and increase the size
9306d4a462SBaoquan He  * of the modules area to 1.5 GiB.
9451c78eb3SJeremy Fitzhardinge  */
9506d4a462SBaoquan He #ifdef CONFIG_RANDOMIZE_BASE
96e8581e3dSBaoquan He #define KERNEL_IMAGE_SIZE	(1024 * 1024 * 1024)
976145cfe3SKees Cook #else
98e8581e3dSBaoquan He #define KERNEL_IMAGE_SIZE	(512 * 1024 * 1024)
996145cfe3SKees Cook #endif
10051c78eb3SJeremy Fitzhardinge 
10151c78eb3SJeremy Fitzhardinge #endif /* _ASM_X86_PAGE_64_DEFS_H */
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