1 /* 2 * This file is subject to the terms and conditions of the GNU General Public 3 * License. See the file "COPYING" in the main directory of this archive 4 * for more details. 5 * 6 * Numascale NumaConnect-Specific Header file 7 * 8 * Copyright (C) 2011 Numascale AS. All rights reserved. 9 * 10 * Send feedback to <support@numascale.com> 11 * 12 */ 13 14 #ifndef _ASM_X86_NUMACHIP_NUMACHIP_CSR_H 15 #define _ASM_X86_NUMACHIP_NUMACHIP_CSR_H 16 17 #include <linux/smp.h> 18 #include <linux/io.h> 19 20 #define CSR_NODE_SHIFT 16 21 #define CSR_NODE_BITS(p) (((unsigned long)(p)) << CSR_NODE_SHIFT) 22 #define CSR_NODE_MASK 0x0fff /* 4K nodes */ 23 24 /* 32K CSR space, b15 indicates geo/non-geo */ 25 #define CSR_OFFSET_MASK 0x7fffUL 26 #define CSR_G0_NODE_IDS (0x008 + (0 << 12)) 27 #define CSR_G3_EXT_IRQ_GEN (0x030 + (3 << 12)) 28 29 /* 30 * Local CSR space starts in global CSR space with "nodeid" = 0xfff0, however 31 * when using the direct mapping on x86_64, both start and size needs to be 32 * aligned with PMD_SIZE which is 2M 33 */ 34 #define NUMACHIP_LCSR_BASE 0x3ffffe000000ULL 35 #define NUMACHIP_LCSR_LIM 0x3fffffffffffULL 36 #define NUMACHIP_LCSR_SIZE (NUMACHIP_LCSR_LIM - NUMACHIP_LCSR_BASE + 1) 37 #define NUMACHIP_LAPIC_BITS 8 38 39 static inline void *lcsr_address(unsigned long offset) 40 { 41 return __va(NUMACHIP_LCSR_BASE | (1UL << 15) | 42 CSR_NODE_BITS(0xfff0) | (offset & CSR_OFFSET_MASK)); 43 } 44 45 static inline unsigned int read_lcsr(unsigned long offset) 46 { 47 return swab32(readl(lcsr_address(offset))); 48 } 49 50 static inline void write_lcsr(unsigned long offset, unsigned int val) 51 { 52 writel(swab32(val), lcsr_address(offset)); 53 } 54 55 /* 56 * On NumaChip2, local CSR space is 16MB and starts at fixed offset below 4G 57 */ 58 59 #define NUMACHIP2_LCSR_BASE 0xf0000000UL 60 #define NUMACHIP2_LCSR_SIZE 0x1000000UL 61 #define NUMACHIP2_APIC_ICR 0x100000 62 #define NUMACHIP2_TIMER_DEADLINE 0x200000 63 #define NUMACHIP2_TIMER_INT 0x200008 64 #define NUMACHIP2_TIMER_NOW 0x200018 65 #define NUMACHIP2_TIMER_RESET 0x200020 66 67 static inline void __iomem *numachip2_lcsr_address(unsigned long offset) 68 { 69 return (void __iomem *)__va(NUMACHIP2_LCSR_BASE | 70 (offset & (NUMACHIP2_LCSR_SIZE - 1))); 71 } 72 73 static inline u32 numachip2_read32_lcsr(unsigned long offset) 74 { 75 return readl(numachip2_lcsr_address(offset)); 76 } 77 78 static inline u64 numachip2_read64_lcsr(unsigned long offset) 79 { 80 return readq(numachip2_lcsr_address(offset)); 81 } 82 83 static inline void numachip2_write32_lcsr(unsigned long offset, u32 val) 84 { 85 writel(val, numachip2_lcsr_address(offset)); 86 } 87 88 static inline void numachip2_write64_lcsr(unsigned long offset, u64 val) 89 { 90 writeq(val, numachip2_lcsr_address(offset)); 91 } 92 93 static inline unsigned int numachip2_timer(void) 94 { 95 return (smp_processor_id() % 48) << 6; 96 } 97 98 #endif /* _ASM_X86_NUMACHIP_NUMACHIP_CSR_H */ 99