1 /* SPDX-License-Identifier: GPL-2.0 */ 2 #ifndef _ASM_X86_NOPS_H 3 #define _ASM_X86_NOPS_H 4 5 /* 6 * Define nops for use with alternative() and for tracing. 7 * 8 * *_NOP5_ATOMIC must be a single instruction. 9 */ 10 11 #define NOP_DS_PREFIX 0x3e 12 13 /* generic versions from gas 14 1: nop 15 the following instructions are NOT nops in 64-bit mode, 16 for 64-bit mode use K8 or P6 nops instead 17 2: movl %esi,%esi 18 3: leal 0x00(%esi),%esi 19 4: leal 0x00(,%esi,1),%esi 20 6: leal 0x00000000(%esi),%esi 21 7: leal 0x00000000(,%esi,1),%esi 22 */ 23 #define GENERIC_NOP1 0x90 24 #define GENERIC_NOP2 0x89,0xf6 25 #define GENERIC_NOP3 0x8d,0x76,0x00 26 #define GENERIC_NOP4 0x8d,0x74,0x26,0x00 27 #define GENERIC_NOP5 GENERIC_NOP1,GENERIC_NOP4 28 #define GENERIC_NOP6 0x8d,0xb6,0x00,0x00,0x00,0x00 29 #define GENERIC_NOP7 0x8d,0xb4,0x26,0x00,0x00,0x00,0x00 30 #define GENERIC_NOP8 GENERIC_NOP1,GENERIC_NOP7 31 #define GENERIC_NOP5_ATOMIC NOP_DS_PREFIX,GENERIC_NOP4 32 33 /* Opteron 64bit nops 34 1: nop 35 2: osp nop 36 3: osp osp nop 37 4: osp osp osp nop 38 */ 39 #define K8_NOP1 GENERIC_NOP1 40 #define K8_NOP2 0x66,K8_NOP1 41 #define K8_NOP3 0x66,K8_NOP2 42 #define K8_NOP4 0x66,K8_NOP3 43 #define K8_NOP5 K8_NOP3,K8_NOP2 44 #define K8_NOP6 K8_NOP3,K8_NOP3 45 #define K8_NOP7 K8_NOP4,K8_NOP3 46 #define K8_NOP8 K8_NOP4,K8_NOP4 47 #define K8_NOP5_ATOMIC 0x66,K8_NOP4 48 49 /* K7 nops 50 uses eax dependencies (arbitrary choice) 51 1: nop 52 2: movl %eax,%eax 53 3: leal (,%eax,1),%eax 54 4: leal 0x00(,%eax,1),%eax 55 6: leal 0x00000000(%eax),%eax 56 7: leal 0x00000000(,%eax,1),%eax 57 */ 58 #define K7_NOP1 GENERIC_NOP1 59 #define K7_NOP2 0x8b,0xc0 60 #define K7_NOP3 0x8d,0x04,0x20 61 #define K7_NOP4 0x8d,0x44,0x20,0x00 62 #define K7_NOP5 K7_NOP4,K7_NOP1 63 #define K7_NOP6 0x8d,0x80,0,0,0,0 64 #define K7_NOP7 0x8D,0x04,0x05,0,0,0,0 65 #define K7_NOP8 K7_NOP7,K7_NOP1 66 #define K7_NOP5_ATOMIC NOP_DS_PREFIX,K7_NOP4 67 68 /* P6 nops 69 uses eax dependencies (Intel-recommended choice) 70 1: nop 71 2: osp nop 72 3: nopl (%eax) 73 4: nopl 0x00(%eax) 74 5: nopl 0x00(%eax,%eax,1) 75 6: osp nopl 0x00(%eax,%eax,1) 76 7: nopl 0x00000000(%eax) 77 8: nopl 0x00000000(%eax,%eax,1) 78 Note: All the above are assumed to be a single instruction. 79 There is kernel code that depends on this. 80 */ 81 #define P6_NOP1 GENERIC_NOP1 82 #define P6_NOP2 0x66,0x90 83 #define P6_NOP3 0x0f,0x1f,0x00 84 #define P6_NOP4 0x0f,0x1f,0x40,0 85 #define P6_NOP5 0x0f,0x1f,0x44,0x00,0 86 #define P6_NOP6 0x66,0x0f,0x1f,0x44,0x00,0 87 #define P6_NOP7 0x0f,0x1f,0x80,0,0,0,0 88 #define P6_NOP8 0x0f,0x1f,0x84,0x00,0,0,0,0 89 #define P6_NOP5_ATOMIC P6_NOP5 90 91 #ifdef __ASSEMBLY__ 92 #define _ASM_MK_NOP(x) .byte x 93 #else 94 #define _ASM_MK_NOP(x) ".byte " __stringify(x) "\n" 95 #endif 96 97 #if defined(CONFIG_MK7) 98 #define ASM_NOP1 _ASM_MK_NOP(K7_NOP1) 99 #define ASM_NOP2 _ASM_MK_NOP(K7_NOP2) 100 #define ASM_NOP3 _ASM_MK_NOP(K7_NOP3) 101 #define ASM_NOP4 _ASM_MK_NOP(K7_NOP4) 102 #define ASM_NOP5 _ASM_MK_NOP(K7_NOP5) 103 #define ASM_NOP6 _ASM_MK_NOP(K7_NOP6) 104 #define ASM_NOP7 _ASM_MK_NOP(K7_NOP7) 105 #define ASM_NOP8 _ASM_MK_NOP(K7_NOP8) 106 #define ASM_NOP5_ATOMIC _ASM_MK_NOP(K7_NOP5_ATOMIC) 107 #elif defined(CONFIG_X86_P6_NOP) 108 #define ASM_NOP1 _ASM_MK_NOP(P6_NOP1) 109 #define ASM_NOP2 _ASM_MK_NOP(P6_NOP2) 110 #define ASM_NOP3 _ASM_MK_NOP(P6_NOP3) 111 #define ASM_NOP4 _ASM_MK_NOP(P6_NOP4) 112 #define ASM_NOP5 _ASM_MK_NOP(P6_NOP5) 113 #define ASM_NOP6 _ASM_MK_NOP(P6_NOP6) 114 #define ASM_NOP7 _ASM_MK_NOP(P6_NOP7) 115 #define ASM_NOP8 _ASM_MK_NOP(P6_NOP8) 116 #define ASM_NOP5_ATOMIC _ASM_MK_NOP(P6_NOP5_ATOMIC) 117 #elif defined(CONFIG_X86_64) 118 #define ASM_NOP1 _ASM_MK_NOP(K8_NOP1) 119 #define ASM_NOP2 _ASM_MK_NOP(K8_NOP2) 120 #define ASM_NOP3 _ASM_MK_NOP(K8_NOP3) 121 #define ASM_NOP4 _ASM_MK_NOP(K8_NOP4) 122 #define ASM_NOP5 _ASM_MK_NOP(K8_NOP5) 123 #define ASM_NOP6 _ASM_MK_NOP(K8_NOP6) 124 #define ASM_NOP7 _ASM_MK_NOP(K8_NOP7) 125 #define ASM_NOP8 _ASM_MK_NOP(K8_NOP8) 126 #define ASM_NOP5_ATOMIC _ASM_MK_NOP(K8_NOP5_ATOMIC) 127 #else 128 #define ASM_NOP1 _ASM_MK_NOP(GENERIC_NOP1) 129 #define ASM_NOP2 _ASM_MK_NOP(GENERIC_NOP2) 130 #define ASM_NOP3 _ASM_MK_NOP(GENERIC_NOP3) 131 #define ASM_NOP4 _ASM_MK_NOP(GENERIC_NOP4) 132 #define ASM_NOP5 _ASM_MK_NOP(GENERIC_NOP5) 133 #define ASM_NOP6 _ASM_MK_NOP(GENERIC_NOP6) 134 #define ASM_NOP7 _ASM_MK_NOP(GENERIC_NOP7) 135 #define ASM_NOP8 _ASM_MK_NOP(GENERIC_NOP8) 136 #define ASM_NOP5_ATOMIC _ASM_MK_NOP(GENERIC_NOP5_ATOMIC) 137 #endif 138 139 #define ASM_NOP_MAX 8 140 #define NOP_ATOMIC5 (ASM_NOP_MAX+1) /* Entry for the 5-byte atomic NOP */ 141 142 #ifndef __ASSEMBLY__ 143 extern const unsigned char * const *ideal_nops; 144 extern void arch_init_ideal_nops(void); 145 #endif 146 147 #endif /* _ASM_X86_NOPS_H */ 148