xref: /openbmc/linux/arch/x86/include/asm/mshyperv.h (revision 83a530e1)
1 /* SPDX-License-Identifier: GPL-2.0 */
2 #ifndef _ASM_X86_MSHYPER_H
3 #define _ASM_X86_MSHYPER_H
4 
5 #include <linux/types.h>
6 #include <linux/atomic.h>
7 #include <linux/nmi.h>
8 #include <asm/io.h>
9 #include <asm/hyperv-tlfs.h>
10 #include <asm/nospec-branch.h>
11 
12 struct ms_hyperv_info {
13 	u32 features;
14 	u32 misc_features;
15 	u32 hints;
16 	u32 nested_features;
17 	u32 max_vp_index;
18 	u32 max_lp_index;
19 };
20 
21 extern struct ms_hyperv_info ms_hyperv;
22 
23 
24 /*
25  * Generate the guest ID.
26  */
27 
28 static inline  __u64 generate_guest_id(__u64 d_info1, __u64 kernel_version,
29 				       __u64 d_info2)
30 {
31 	__u64 guest_id = 0;
32 
33 	guest_id = (((__u64)HV_LINUX_VENDOR_ID) << 48);
34 	guest_id |= (d_info1 << 48);
35 	guest_id |= (kernel_version << 16);
36 	guest_id |= d_info2;
37 
38 	return guest_id;
39 }
40 
41 
42 /* Free the message slot and signal end-of-message if required */
43 static inline void vmbus_signal_eom(struct hv_message *msg, u32 old_msg_type)
44 {
45 	/*
46 	 * On crash we're reading some other CPU's message page and we need
47 	 * to be careful: this other CPU may already had cleared the header
48 	 * and the host may already had delivered some other message there.
49 	 * In case we blindly write msg->header.message_type we're going
50 	 * to lose it. We can still lose a message of the same type but
51 	 * we count on the fact that there can only be one
52 	 * CHANNELMSG_UNLOAD_RESPONSE and we don't care about other messages
53 	 * on crash.
54 	 */
55 	if (cmpxchg(&msg->header.message_type, old_msg_type,
56 		    HVMSG_NONE) != old_msg_type)
57 		return;
58 
59 	/*
60 	 * Make sure the write to MessageType (ie set to
61 	 * HVMSG_NONE) happens before we read the
62 	 * MessagePending and EOMing. Otherwise, the EOMing
63 	 * will not deliver any more messages since there is
64 	 * no empty slot
65 	 */
66 	mb();
67 
68 	if (msg->header.message_flags.msg_pending) {
69 		/*
70 		 * This will cause message queue rescan to
71 		 * possibly deliver another msg from the
72 		 * hypervisor
73 		 */
74 		wrmsrl(HV_X64_MSR_EOM, 0);
75 	}
76 }
77 
78 #define hv_init_timer(timer, tick) wrmsrl(timer, tick)
79 #define hv_init_timer_config(config, val) wrmsrl(config, val)
80 
81 #define hv_get_simp(val) rdmsrl(HV_X64_MSR_SIMP, val)
82 #define hv_set_simp(val) wrmsrl(HV_X64_MSR_SIMP, val)
83 
84 #define hv_get_siefp(val) rdmsrl(HV_X64_MSR_SIEFP, val)
85 #define hv_set_siefp(val) wrmsrl(HV_X64_MSR_SIEFP, val)
86 
87 #define hv_get_synic_state(val) rdmsrl(HV_X64_MSR_SCONTROL, val)
88 #define hv_set_synic_state(val) wrmsrl(HV_X64_MSR_SCONTROL, val)
89 
90 #define hv_get_vp_index(index) rdmsrl(HV_X64_MSR_VP_INDEX, index)
91 
92 #define hv_get_synint_state(int_num, val) rdmsrl(int_num, val)
93 #define hv_set_synint_state(int_num, val) wrmsrl(int_num, val)
94 
95 void hyperv_callback_vector(void);
96 void hyperv_reenlightenment_vector(void);
97 #ifdef CONFIG_TRACING
98 #define trace_hyperv_callback_vector hyperv_callback_vector
99 #endif
100 void hyperv_vector_handler(struct pt_regs *regs);
101 void hv_setup_vmbus_irq(void (*handler)(void));
102 void hv_remove_vmbus_irq(void);
103 
104 void hv_setup_kexec_handler(void (*handler)(void));
105 void hv_remove_kexec_handler(void);
106 void hv_setup_crash_handler(void (*handler)(struct pt_regs *regs));
107 void hv_remove_crash_handler(void);
108 
109 /*
110  * Routines for stimer0 Direct Mode handling.
111  * On x86/x64, there are no percpu actions to take.
112  */
113 void hv_stimer0_vector_handler(struct pt_regs *regs);
114 void hv_stimer0_callback_vector(void);
115 int hv_setup_stimer0_irq(int *irq, int *vector, void (*handler)(void));
116 void hv_remove_stimer0_irq(int irq);
117 
118 static inline void hv_enable_stimer0_percpu_irq(int irq) {}
119 static inline void hv_disable_stimer0_percpu_irq(int irq) {}
120 
121 
122 #if IS_ENABLED(CONFIG_HYPERV)
123 extern struct clocksource *hyperv_cs;
124 extern void *hv_hypercall_pg;
125 
126 static inline u64 hv_do_hypercall(u64 control, void *input, void *output)
127 {
128 	u64 input_address = input ? virt_to_phys(input) : 0;
129 	u64 output_address = output ? virt_to_phys(output) : 0;
130 	u64 hv_status;
131 
132 #ifdef CONFIG_X86_64
133 	if (!hv_hypercall_pg)
134 		return U64_MAX;
135 
136 	__asm__ __volatile__("mov %4, %%r8\n"
137 			     CALL_NOSPEC
138 			     : "=a" (hv_status), ASM_CALL_CONSTRAINT,
139 			       "+c" (control), "+d" (input_address)
140 			     :  "r" (output_address),
141 				THUNK_TARGET(hv_hypercall_pg)
142 			     : "cc", "memory", "r8", "r9", "r10", "r11");
143 #else
144 	u32 input_address_hi = upper_32_bits(input_address);
145 	u32 input_address_lo = lower_32_bits(input_address);
146 	u32 output_address_hi = upper_32_bits(output_address);
147 	u32 output_address_lo = lower_32_bits(output_address);
148 
149 	if (!hv_hypercall_pg)
150 		return U64_MAX;
151 
152 	__asm__ __volatile__(CALL_NOSPEC
153 			     : "=A" (hv_status),
154 			       "+c" (input_address_lo), ASM_CALL_CONSTRAINT
155 			     : "A" (control),
156 			       "b" (input_address_hi),
157 			       "D"(output_address_hi), "S"(output_address_lo),
158 			       THUNK_TARGET(hv_hypercall_pg)
159 			     : "cc", "memory");
160 #endif /* !x86_64 */
161 	return hv_status;
162 }
163 
164 /* Fast hypercall with 8 bytes of input and no output */
165 static inline u64 hv_do_fast_hypercall8(u16 code, u64 input1)
166 {
167 	u64 hv_status, control = (u64)code | HV_HYPERCALL_FAST_BIT;
168 
169 #ifdef CONFIG_X86_64
170 	{
171 		__asm__ __volatile__(CALL_NOSPEC
172 				     : "=a" (hv_status), ASM_CALL_CONSTRAINT,
173 				       "+c" (control), "+d" (input1)
174 				     : THUNK_TARGET(hv_hypercall_pg)
175 				     : "cc", "r8", "r9", "r10", "r11");
176 	}
177 #else
178 	{
179 		u32 input1_hi = upper_32_bits(input1);
180 		u32 input1_lo = lower_32_bits(input1);
181 
182 		__asm__ __volatile__ (CALL_NOSPEC
183 				      : "=A"(hv_status),
184 					"+c"(input1_lo),
185 					ASM_CALL_CONSTRAINT
186 				      :	"A" (control),
187 					"b" (input1_hi),
188 					THUNK_TARGET(hv_hypercall_pg)
189 				      : "cc", "edi", "esi");
190 	}
191 #endif
192 		return hv_status;
193 }
194 
195 /*
196  * Rep hypercalls. Callers of this functions are supposed to ensure that
197  * rep_count and varhead_size comply with Hyper-V hypercall definition.
198  */
199 static inline u64 hv_do_rep_hypercall(u16 code, u16 rep_count, u16 varhead_size,
200 				      void *input, void *output)
201 {
202 	u64 control = code;
203 	u64 status;
204 	u16 rep_comp;
205 
206 	control |= (u64)varhead_size << HV_HYPERCALL_VARHEAD_OFFSET;
207 	control |= (u64)rep_count << HV_HYPERCALL_REP_COMP_OFFSET;
208 
209 	do {
210 		status = hv_do_hypercall(control, input, output);
211 		if ((status & HV_HYPERCALL_RESULT_MASK) != HV_STATUS_SUCCESS)
212 			return status;
213 
214 		/* Bits 32-43 of status have 'Reps completed' data. */
215 		rep_comp = (status & HV_HYPERCALL_REP_COMP_MASK) >>
216 			HV_HYPERCALL_REP_COMP_OFFSET;
217 
218 		control &= ~HV_HYPERCALL_REP_START_MASK;
219 		control |= (u64)rep_comp << HV_HYPERCALL_REP_START_OFFSET;
220 
221 		touch_nmi_watchdog();
222 	} while (rep_comp < rep_count);
223 
224 	return status;
225 }
226 
227 /*
228  * Hypervisor's notion of virtual processor ID is different from
229  * Linux' notion of CPU ID. This information can only be retrieved
230  * in the context of the calling CPU. Setup a map for easy access
231  * to this information.
232  */
233 extern u32 *hv_vp_index;
234 extern u32 hv_max_vp_index;
235 extern struct hv_vp_assist_page **hv_vp_assist_page;
236 
237 static inline struct hv_vp_assist_page *hv_get_vp_assist_page(unsigned int cpu)
238 {
239 	if (!hv_vp_assist_page)
240 		return NULL;
241 
242 	return hv_vp_assist_page[cpu];
243 }
244 
245 /**
246  * hv_cpu_number_to_vp_number() - Map CPU to VP.
247  * @cpu_number: CPU number in Linux terms
248  *
249  * This function returns the mapping between the Linux processor
250  * number and the hypervisor's virtual processor number, useful
251  * in making hypercalls and such that talk about specific
252  * processors.
253  *
254  * Return: Virtual processor number in Hyper-V terms
255  */
256 static inline int hv_cpu_number_to_vp_number(int cpu_number)
257 {
258 	return hv_vp_index[cpu_number];
259 }
260 
261 void hyperv_init(void);
262 void hyperv_setup_mmu_ops(void);
263 void hyper_alloc_mmu(void);
264 void hyperv_report_panic(struct pt_regs *regs, long err);
265 bool hv_is_hyperv_initialized(void);
266 void hyperv_cleanup(void);
267 
268 void hyperv_reenlightenment_intr(struct pt_regs *regs);
269 void set_hv_tscchange_cb(void (*cb)(void));
270 void clear_hv_tscchange_cb(void);
271 void hyperv_stop_tsc_emulation(void);
272 #else /* CONFIG_HYPERV */
273 static inline void hyperv_init(void) {}
274 static inline bool hv_is_hyperv_initialized(void) { return false; }
275 static inline void hyperv_cleanup(void) {}
276 static inline void hyperv_setup_mmu_ops(void) {}
277 static inline void set_hv_tscchange_cb(void (*cb)(void)) {}
278 static inline void clear_hv_tscchange_cb(void) {}
279 static inline void hyperv_stop_tsc_emulation(void) {};
280 static inline struct hv_vp_assist_page *hv_get_vp_assist_page(unsigned int cpu)
281 {
282 	return NULL;
283 }
284 #endif /* CONFIG_HYPERV */
285 
286 #ifdef CONFIG_HYPERV_TSCPAGE
287 struct ms_hyperv_tsc_page *hv_get_tsc_page(void);
288 static inline u64 hv_read_tsc_page_tsc(const struct ms_hyperv_tsc_page *tsc_pg,
289 				       u64 *cur_tsc)
290 {
291 	u64 scale, offset;
292 	u32 sequence;
293 
294 	/*
295 	 * The protocol for reading Hyper-V TSC page is specified in Hypervisor
296 	 * Top-Level Functional Specification ver. 3.0 and above. To get the
297 	 * reference time we must do the following:
298 	 * - READ ReferenceTscSequence
299 	 *   A special '0' value indicates the time source is unreliable and we
300 	 *   need to use something else. The currently published specification
301 	 *   versions (up to 4.0b) contain a mistake and wrongly claim '-1'
302 	 *   instead of '0' as the special value, see commit c35b82ef0294.
303 	 * - ReferenceTime =
304 	 *        ((RDTSC() * ReferenceTscScale) >> 64) + ReferenceTscOffset
305 	 * - READ ReferenceTscSequence again. In case its value has changed
306 	 *   since our first reading we need to discard ReferenceTime and repeat
307 	 *   the whole sequence as the hypervisor was updating the page in
308 	 *   between.
309 	 */
310 	do {
311 		sequence = READ_ONCE(tsc_pg->tsc_sequence);
312 		if (!sequence)
313 			return U64_MAX;
314 		/*
315 		 * Make sure we read sequence before we read other values from
316 		 * TSC page.
317 		 */
318 		smp_rmb();
319 
320 		scale = READ_ONCE(tsc_pg->tsc_scale);
321 		offset = READ_ONCE(tsc_pg->tsc_offset);
322 		*cur_tsc = rdtsc_ordered();
323 
324 		/*
325 		 * Make sure we read sequence after we read all other values
326 		 * from TSC page.
327 		 */
328 		smp_rmb();
329 
330 	} while (READ_ONCE(tsc_pg->tsc_sequence) != sequence);
331 
332 	return mul_u64_u64_shr(*cur_tsc, scale, 64) + offset;
333 }
334 
335 static inline u64 hv_read_tsc_page(const struct ms_hyperv_tsc_page *tsc_pg)
336 {
337 	u64 cur_tsc;
338 
339 	return hv_read_tsc_page_tsc(tsc_pg, &cur_tsc);
340 }
341 
342 #else
343 static inline struct ms_hyperv_tsc_page *hv_get_tsc_page(void)
344 {
345 	return NULL;
346 }
347 
348 static inline u64 hv_read_tsc_page_tsc(const struct ms_hyperv_tsc_page *tsc_pg,
349 				       u64 *cur_tsc)
350 {
351 	BUG();
352 	return U64_MAX;
353 }
354 #endif
355 #endif
356