1 /* SPDX-License-Identifier: GPL-2.0 */ 2 #ifndef _ASM_X86_MSHYPER_H 3 #define _ASM_X86_MSHYPER_H 4 5 #include <linux/types.h> 6 #include <linux/nmi.h> 7 #include <linux/msi.h> 8 #include <asm/io.h> 9 #include <asm/hyperv-tlfs.h> 10 #include <asm/nospec-branch.h> 11 #include <asm/paravirt.h> 12 #include <asm/mshyperv.h> 13 14 union hv_ghcb; 15 16 DECLARE_STATIC_KEY_FALSE(isolation_type_snp); 17 18 typedef int (*hyperv_fill_flush_list_func)( 19 struct hv_guest_mapping_flush_list *flush, 20 void *data); 21 22 void hyperv_vector_handler(struct pt_regs *regs); 23 24 #if IS_ENABLED(CONFIG_HYPERV) 25 extern int hyperv_init_cpuhp; 26 27 extern void *hv_hypercall_pg; 28 29 extern u64 hv_current_partition_id; 30 31 extern union hv_ghcb * __percpu *hv_ghcb_pg; 32 33 int hv_call_deposit_pages(int node, u64 partition_id, u32 num_pages); 34 int hv_call_add_logical_proc(int node, u32 lp_index, u32 acpi_id); 35 int hv_call_create_vp(int node, u64 partition_id, u32 vp_index, u32 flags); 36 37 static inline u64 hv_do_hypercall(u64 control, void *input, void *output) 38 { 39 u64 input_address = input ? virt_to_phys(input) : 0; 40 u64 output_address = output ? virt_to_phys(output) : 0; 41 u64 hv_status; 42 43 #ifdef CONFIG_X86_64 44 if (!hv_hypercall_pg) 45 return U64_MAX; 46 47 __asm__ __volatile__("mov %4, %%r8\n" 48 CALL_NOSPEC 49 : "=a" (hv_status), ASM_CALL_CONSTRAINT, 50 "+c" (control), "+d" (input_address) 51 : "r" (output_address), 52 THUNK_TARGET(hv_hypercall_pg) 53 : "cc", "memory", "r8", "r9", "r10", "r11"); 54 #else 55 u32 input_address_hi = upper_32_bits(input_address); 56 u32 input_address_lo = lower_32_bits(input_address); 57 u32 output_address_hi = upper_32_bits(output_address); 58 u32 output_address_lo = lower_32_bits(output_address); 59 60 if (!hv_hypercall_pg) 61 return U64_MAX; 62 63 __asm__ __volatile__(CALL_NOSPEC 64 : "=A" (hv_status), 65 "+c" (input_address_lo), ASM_CALL_CONSTRAINT 66 : "A" (control), 67 "b" (input_address_hi), 68 "D"(output_address_hi), "S"(output_address_lo), 69 THUNK_TARGET(hv_hypercall_pg) 70 : "cc", "memory"); 71 #endif /* !x86_64 */ 72 return hv_status; 73 } 74 75 /* Fast hypercall with 8 bytes of input and no output */ 76 static inline u64 hv_do_fast_hypercall8(u16 code, u64 input1) 77 { 78 u64 hv_status, control = (u64)code | HV_HYPERCALL_FAST_BIT; 79 80 #ifdef CONFIG_X86_64 81 { 82 __asm__ __volatile__(CALL_NOSPEC 83 : "=a" (hv_status), ASM_CALL_CONSTRAINT, 84 "+c" (control), "+d" (input1) 85 : THUNK_TARGET(hv_hypercall_pg) 86 : "cc", "r8", "r9", "r10", "r11"); 87 } 88 #else 89 { 90 u32 input1_hi = upper_32_bits(input1); 91 u32 input1_lo = lower_32_bits(input1); 92 93 __asm__ __volatile__ (CALL_NOSPEC 94 : "=A"(hv_status), 95 "+c"(input1_lo), 96 ASM_CALL_CONSTRAINT 97 : "A" (control), 98 "b" (input1_hi), 99 THUNK_TARGET(hv_hypercall_pg) 100 : "cc", "edi", "esi"); 101 } 102 #endif 103 return hv_status; 104 } 105 106 /* Fast hypercall with 16 bytes of input */ 107 static inline u64 hv_do_fast_hypercall16(u16 code, u64 input1, u64 input2) 108 { 109 u64 hv_status, control = (u64)code | HV_HYPERCALL_FAST_BIT; 110 111 #ifdef CONFIG_X86_64 112 { 113 __asm__ __volatile__("mov %4, %%r8\n" 114 CALL_NOSPEC 115 : "=a" (hv_status), ASM_CALL_CONSTRAINT, 116 "+c" (control), "+d" (input1) 117 : "r" (input2), 118 THUNK_TARGET(hv_hypercall_pg) 119 : "cc", "r8", "r9", "r10", "r11"); 120 } 121 #else 122 { 123 u32 input1_hi = upper_32_bits(input1); 124 u32 input1_lo = lower_32_bits(input1); 125 u32 input2_hi = upper_32_bits(input2); 126 u32 input2_lo = lower_32_bits(input2); 127 128 __asm__ __volatile__ (CALL_NOSPEC 129 : "=A"(hv_status), 130 "+c"(input1_lo), ASM_CALL_CONSTRAINT 131 : "A" (control), "b" (input1_hi), 132 "D"(input2_hi), "S"(input2_lo), 133 THUNK_TARGET(hv_hypercall_pg) 134 : "cc"); 135 } 136 #endif 137 return hv_status; 138 } 139 140 extern struct hv_vp_assist_page **hv_vp_assist_page; 141 142 static inline struct hv_vp_assist_page *hv_get_vp_assist_page(unsigned int cpu) 143 { 144 if (!hv_vp_assist_page) 145 return NULL; 146 147 return hv_vp_assist_page[cpu]; 148 } 149 150 void __init hyperv_init(void); 151 void hyperv_setup_mmu_ops(void); 152 void set_hv_tscchange_cb(void (*cb)(void)); 153 void clear_hv_tscchange_cb(void); 154 void hyperv_stop_tsc_emulation(void); 155 int hyperv_flush_guest_mapping(u64 as); 156 int hyperv_flush_guest_mapping_range(u64 as, 157 hyperv_fill_flush_list_func fill_func, void *data); 158 int hyperv_fill_flush_guest_mapping_list( 159 struct hv_guest_mapping_flush_list *flush, 160 u64 start_gfn, u64 end_gfn); 161 162 #ifdef CONFIG_X86_64 163 void hv_apic_init(void); 164 void __init hv_init_spinlocks(void); 165 bool hv_vcpu_is_preempted(int vcpu); 166 #else 167 static inline void hv_apic_init(void) {} 168 #endif 169 170 struct irq_domain *hv_create_pci_msi_domain(void); 171 172 int hv_map_ioapic_interrupt(int ioapic_id, bool level, int vcpu, int vector, 173 struct hv_interrupt_entry *entry); 174 int hv_unmap_ioapic_interrupt(int ioapic_id, struct hv_interrupt_entry *entry); 175 int hv_set_mem_host_visibility(unsigned long addr, int numpages, bool visible); 176 177 #ifdef CONFIG_AMD_MEM_ENCRYPT 178 void hv_ghcb_msr_write(u64 msr, u64 value); 179 void hv_ghcb_msr_read(u64 msr, u64 *value); 180 bool hv_ghcb_negotiate_protocol(void); 181 void hv_ghcb_terminate(unsigned int set, unsigned int reason); 182 #else 183 static inline void hv_ghcb_msr_write(u64 msr, u64 value) {} 184 static inline void hv_ghcb_msr_read(u64 msr, u64 *value) {} 185 static inline bool hv_ghcb_negotiate_protocol(void) { return false; } 186 static inline void hv_ghcb_terminate(unsigned int set, unsigned int reason) {} 187 #endif 188 189 extern bool hv_isolation_type_snp(void); 190 191 static inline bool hv_is_synic_reg(unsigned int reg) 192 { 193 if ((reg >= HV_REGISTER_SCONTROL) && 194 (reg <= HV_REGISTER_SINT15)) 195 return true; 196 return false; 197 } 198 199 static inline u64 hv_get_register(unsigned int reg) 200 { 201 u64 value; 202 203 if (hv_is_synic_reg(reg) && hv_isolation_type_snp()) 204 hv_ghcb_msr_read(reg, &value); 205 else 206 rdmsrl(reg, value); 207 return value; 208 } 209 210 static inline void hv_set_register(unsigned int reg, u64 value) 211 { 212 if (hv_is_synic_reg(reg) && hv_isolation_type_snp()) { 213 hv_ghcb_msr_write(reg, value); 214 215 /* Write proxy bit via wrmsl instruction */ 216 if (reg >= HV_REGISTER_SINT0 && 217 reg <= HV_REGISTER_SINT15) 218 wrmsrl(reg, value | 1 << 20); 219 } else { 220 wrmsrl(reg, value); 221 } 222 } 223 224 #else /* CONFIG_HYPERV */ 225 static inline void hyperv_init(void) {} 226 static inline void hyperv_setup_mmu_ops(void) {} 227 static inline void set_hv_tscchange_cb(void (*cb)(void)) {} 228 static inline void clear_hv_tscchange_cb(void) {} 229 static inline void hyperv_stop_tsc_emulation(void) {}; 230 static inline struct hv_vp_assist_page *hv_get_vp_assist_page(unsigned int cpu) 231 { 232 return NULL; 233 } 234 static inline int hyperv_flush_guest_mapping(u64 as) { return -1; } 235 static inline int hyperv_flush_guest_mapping_range(u64 as, 236 hyperv_fill_flush_list_func fill_func, void *data) 237 { 238 return -1; 239 } 240 static inline void hv_set_register(unsigned int reg, u64 value) { } 241 static inline u64 hv_get_register(unsigned int reg) { return 0; } 242 static inline int hv_set_mem_host_visibility(unsigned long addr, int numpages, 243 bool visible) 244 { 245 return -1; 246 } 247 #endif /* CONFIG_HYPERV */ 248 249 250 #include <asm-generic/mshyperv.h> 251 252 #endif 253