1 #ifndef _ASM_X86_MPSPEC_H 2 #define _ASM_X86_MPSPEC_H 3 4 5 #include <asm/mpspec_def.h> 6 #include <asm/x86_init.h> 7 #include <asm/apicdef.h> 8 9 extern int apic_version[]; 10 extern int pic_mode; 11 12 #ifdef CONFIG_X86_32 13 14 /* 15 * Summit or generic (i.e. installer) kernels need lots of bus entries. 16 * Maximum 256 PCI busses, plus 1 ISA bus in each of 4 cabinets. 17 */ 18 #if CONFIG_BASE_SMALL == 0 19 # define MAX_MP_BUSSES 260 20 #else 21 # define MAX_MP_BUSSES 32 22 #endif 23 24 #define MAX_IRQ_SOURCES 256 25 26 extern unsigned int def_to_bigsmp; 27 28 #ifdef CONFIG_X86_NUMAQ 29 extern int mp_bus_id_to_node[MAX_MP_BUSSES]; 30 extern int mp_bus_id_to_local[MAX_MP_BUSSES]; 31 extern int quad_local_to_mp_bus_id [NR_CPUS/4][4]; 32 #endif 33 34 #else /* CONFIG_X86_64: */ 35 36 #define MAX_MP_BUSSES 256 37 /* Each PCI slot may be a combo card with its own bus. 4 IRQ pins per slot. */ 38 #define MAX_IRQ_SOURCES (MAX_MP_BUSSES * 4) 39 40 #endif /* CONFIG_X86_64 */ 41 42 #ifdef CONFIG_EISA 43 extern int mp_bus_id_to_type[MAX_MP_BUSSES]; 44 #endif 45 46 extern DECLARE_BITMAP(mp_bus_not_pci, MAX_MP_BUSSES); 47 48 extern unsigned int boot_cpu_physical_apicid; 49 extern unsigned int max_physical_apicid; 50 extern int mpc_default_type; 51 extern unsigned long mp_lapic_addr; 52 53 #ifdef CONFIG_X86_LOCAL_APIC 54 extern int smp_found_config; 55 #else 56 # define smp_found_config 0 57 #endif 58 59 static inline void get_smp_config(void) 60 { 61 x86_init.mpparse.get_smp_config(0); 62 } 63 64 static inline void early_get_smp_config(void) 65 { 66 x86_init.mpparse.get_smp_config(1); 67 } 68 69 static inline void find_smp_config(void) 70 { 71 x86_init.mpparse.find_smp_config(); 72 } 73 74 #ifdef CONFIG_X86_MPPARSE 75 extern void early_reserve_e820_mpc_new(void); 76 extern int enable_update_mptable; 77 extern int default_mpc_apic_id(struct mpc_cpu *m); 78 extern void default_smp_read_mpc_oem(struct mpc_table *mpc); 79 # ifdef CONFIG_X86_IO_APIC 80 extern void default_mpc_oem_bus_info(struct mpc_bus *m, char *str); 81 # else 82 # define default_mpc_oem_bus_info NULL 83 # endif 84 extern void default_find_smp_config(void); 85 extern void default_get_smp_config(unsigned int early); 86 #else 87 static inline void early_reserve_e820_mpc_new(void) { } 88 #define enable_update_mptable 0 89 #define default_mpc_apic_id NULL 90 #define default_smp_read_mpc_oem NULL 91 #define default_mpc_oem_bus_info NULL 92 #define default_find_smp_config x86_init_noop 93 #define default_get_smp_config x86_init_uint_noop 94 #endif 95 96 int generic_processor_info(int apicid, int version); 97 #ifdef CONFIG_ACPI 98 extern void mp_register_ioapic(int id, u32 address, u32 gsi_base); 99 extern void mp_override_legacy_irq(u8 bus_irq, u8 polarity, u8 trigger, 100 u32 gsi); 101 extern void mp_config_acpi_legacy_irqs(void); 102 struct device; 103 extern int mp_register_gsi(struct device *dev, u32 gsi, int edge_level, 104 int active_high_low); 105 #endif /* CONFIG_ACPI */ 106 107 #define PHYSID_ARRAY_SIZE BITS_TO_LONGS(MAX_LOCAL_APIC) 108 109 struct physid_mask { 110 unsigned long mask[PHYSID_ARRAY_SIZE]; 111 }; 112 113 typedef struct physid_mask physid_mask_t; 114 115 #define physid_set(physid, map) set_bit(physid, (map).mask) 116 #define physid_clear(physid, map) clear_bit(physid, (map).mask) 117 #define physid_isset(physid, map) test_bit(physid, (map).mask) 118 #define physid_test_and_set(physid, map) \ 119 test_and_set_bit(physid, (map).mask) 120 121 #define physids_and(dst, src1, src2) \ 122 bitmap_and((dst).mask, (src1).mask, (src2).mask, MAX_LOCAL_APIC) 123 124 #define physids_or(dst, src1, src2) \ 125 bitmap_or((dst).mask, (src1).mask, (src2).mask, MAX_LOCAL_APIC) 126 127 #define physids_clear(map) \ 128 bitmap_zero((map).mask, MAX_LOCAL_APIC) 129 130 #define physids_complement(dst, src) \ 131 bitmap_complement((dst).mask, (src).mask, MAX_LOCAL_APIC) 132 133 #define physids_empty(map) \ 134 bitmap_empty((map).mask, MAX_LOCAL_APIC) 135 136 #define physids_equal(map1, map2) \ 137 bitmap_equal((map1).mask, (map2).mask, MAX_LOCAL_APIC) 138 139 #define physids_weight(map) \ 140 bitmap_weight((map).mask, MAX_LOCAL_APIC) 141 142 #define physids_shift_right(d, s, n) \ 143 bitmap_shift_right((d).mask, (s).mask, n, MAX_LOCAL_APIC) 144 145 #define physids_shift_left(d, s, n) \ 146 bitmap_shift_left((d).mask, (s).mask, n, MAX_LOCAL_APIC) 147 148 static inline unsigned long physids_coerce(physid_mask_t *map) 149 { 150 return map->mask[0]; 151 } 152 153 static inline void physids_promote(unsigned long physids, physid_mask_t *map) 154 { 155 physids_clear(*map); 156 map->mask[0] = physids; 157 } 158 159 static inline void physid_set_mask_of_physid(int physid, physid_mask_t *map) 160 { 161 physids_clear(*map); 162 physid_set(physid, *map); 163 } 164 165 #define PHYSID_MASK_ALL { {[0 ... PHYSID_ARRAY_SIZE-1] = ~0UL} } 166 #define PHYSID_MASK_NONE { {[0 ... PHYSID_ARRAY_SIZE-1] = 0UL} } 167 168 extern physid_mask_t phys_cpu_present_map; 169 170 extern int generic_mps_oem_check(struct mpc_table *, char *, char *); 171 172 extern int default_acpi_madt_oem_check(char *, char *); 173 174 #endif /* _ASM_X86_MPSPEC_H */ 175