xref: /openbmc/linux/arch/x86/include/asm/mc146818rtc.h (revision bc5aa3a0)
1 /*
2  * Machine dependent access functions for RTC registers.
3  */
4 #ifndef _ASM_X86_MC146818RTC_H
5 #define _ASM_X86_MC146818RTC_H
6 
7 #include <asm/io.h>
8 #include <asm/processor.h>
9 
10 #ifndef RTC_PORT
11 #define RTC_PORT(x)	(0x70 + (x))
12 #define RTC_ALWAYS_BCD	1	/* RTC operates in binary mode */
13 #endif
14 
15 #if defined(CONFIG_X86_32)
16 /*
17  * This lock provides nmi access to the CMOS/RTC registers.  It has some
18  * special properties.  It is owned by a CPU and stores the index register
19  * currently being accessed (if owned).  The idea here is that it works
20  * like a normal lock (normally).  However, in an NMI, the NMI code will
21  * first check to see if its CPU owns the lock, meaning that the NMI
22  * interrupted during the read/write of the device.  If it does, it goes ahead
23  * and performs the access and then restores the index register.  If it does
24  * not, it locks normally.
25  *
26  * Note that since we are working with NMIs, we need this lock even in
27  * a non-SMP machine just to mark that the lock is owned.
28  *
29  * This only works with compare-and-swap.  There is no other way to
30  * atomically claim the lock and set the owner.
31  */
32 #include <linux/smp.h>
33 extern volatile unsigned long cmos_lock;
34 
35 /*
36  * All of these below must be called with interrupts off, preempt
37  * disabled, etc.
38  */
39 
40 static inline void lock_cmos(unsigned char reg)
41 {
42 	unsigned long new;
43 	new = ((smp_processor_id() + 1) << 8) | reg;
44 	for (;;) {
45 		if (cmos_lock) {
46 			cpu_relax();
47 			continue;
48 		}
49 		if (__cmpxchg(&cmos_lock, 0, new, sizeof(cmos_lock)) == 0)
50 			return;
51 	}
52 }
53 
54 static inline void unlock_cmos(void)
55 {
56 	cmos_lock = 0;
57 }
58 
59 static inline int do_i_have_lock_cmos(void)
60 {
61 	return (cmos_lock >> 8) == (smp_processor_id() + 1);
62 }
63 
64 static inline unsigned char current_lock_cmos_reg(void)
65 {
66 	return cmos_lock & 0xff;
67 }
68 
69 #define lock_cmos_prefix(reg)			\
70 	do {					\
71 		unsigned long cmos_flags;	\
72 		local_irq_save(cmos_flags);	\
73 		lock_cmos(reg)
74 
75 #define lock_cmos_suffix(reg)			\
76 	unlock_cmos();				\
77 	local_irq_restore(cmos_flags);		\
78 	} while (0)
79 #else
80 #define lock_cmos_prefix(reg) do {} while (0)
81 #define lock_cmos_suffix(reg) do {} while (0)
82 #define lock_cmos(reg) do { } while (0)
83 #define unlock_cmos() do { } while (0)
84 #define do_i_have_lock_cmos() 0
85 #define current_lock_cmos_reg() 0
86 #endif
87 
88 /*
89  * The yet supported machines all access the RTC index register via
90  * an ISA port access but the way to access the date register differs ...
91  */
92 #define CMOS_READ(addr) rtc_cmos_read(addr)
93 #define CMOS_WRITE(val, addr) rtc_cmos_write(val, addr)
94 unsigned char rtc_cmos_read(unsigned char addr);
95 void rtc_cmos_write(unsigned char val, unsigned char addr);
96 
97 extern int mach_set_rtc_mmss(const struct timespec *now);
98 extern void mach_get_cmos_time(struct timespec *now);
99 
100 #define RTC_IRQ 8
101 
102 #endif /* _ASM_X86_MC146818RTC_H */
103