xref: /openbmc/linux/arch/x86/include/asm/mc146818rtc.h (revision b627b4ed)
1 /*
2  * Machine dependent access functions for RTC registers.
3  */
4 #ifndef _ASM_X86_MC146818RTC_H
5 #define _ASM_X86_MC146818RTC_H
6 
7 #include <asm/io.h>
8 #include <asm/system.h>
9 #include <asm/processor.h>
10 #include <linux/mc146818rtc.h>
11 
12 #ifndef RTC_PORT
13 #define RTC_PORT(x)	(0x70 + (x))
14 #define RTC_ALWAYS_BCD	1	/* RTC operates in binary mode */
15 #endif
16 
17 #if defined(CONFIG_X86_32) && defined(__HAVE_ARCH_CMPXCHG)
18 /*
19  * This lock provides nmi access to the CMOS/RTC registers.  It has some
20  * special properties.  It is owned by a CPU and stores the index register
21  * currently being accessed (if owned).  The idea here is that it works
22  * like a normal lock (normally).  However, in an NMI, the NMI code will
23  * first check to see if its CPU owns the lock, meaning that the NMI
24  * interrupted during the read/write of the device.  If it does, it goes ahead
25  * and performs the access and then restores the index register.  If it does
26  * not, it locks normally.
27  *
28  * Note that since we are working with NMIs, we need this lock even in
29  * a non-SMP machine just to mark that the lock is owned.
30  *
31  * This only works with compare-and-swap.  There is no other way to
32  * atomically claim the lock and set the owner.
33  */
34 #include <linux/smp.h>
35 extern volatile unsigned long cmos_lock;
36 
37 /*
38  * All of these below must be called with interrupts off, preempt
39  * disabled, etc.
40  */
41 
42 static inline void lock_cmos(unsigned char reg)
43 {
44 	unsigned long new;
45 	new = ((smp_processor_id() + 1) << 8) | reg;
46 	for (;;) {
47 		if (cmos_lock) {
48 			cpu_relax();
49 			continue;
50 		}
51 		if (__cmpxchg(&cmos_lock, 0, new, sizeof(cmos_lock)) == 0)
52 			return;
53 	}
54 }
55 
56 static inline void unlock_cmos(void)
57 {
58 	cmos_lock = 0;
59 }
60 
61 static inline int do_i_have_lock_cmos(void)
62 {
63 	return (cmos_lock >> 8) == (smp_processor_id() + 1);
64 }
65 
66 static inline unsigned char current_lock_cmos_reg(void)
67 {
68 	return cmos_lock & 0xff;
69 }
70 
71 #define lock_cmos_prefix(reg)			\
72 	do {					\
73 		unsigned long cmos_flags;	\
74 		local_irq_save(cmos_flags);	\
75 		lock_cmos(reg)
76 
77 #define lock_cmos_suffix(reg)			\
78 	unlock_cmos();				\
79 	local_irq_restore(cmos_flags);		\
80 	} while (0)
81 #else
82 #define lock_cmos_prefix(reg) do {} while (0)
83 #define lock_cmos_suffix(reg) do {} while (0)
84 #define lock_cmos(reg)
85 #define unlock_cmos()
86 #define do_i_have_lock_cmos() 0
87 #define current_lock_cmos_reg() 0
88 #endif
89 
90 /*
91  * The yet supported machines all access the RTC index register via
92  * an ISA port access but the way to access the date register differs ...
93  */
94 #define CMOS_READ(addr) rtc_cmos_read(addr)
95 #define CMOS_WRITE(val, addr) rtc_cmos_write(val, addr)
96 unsigned char rtc_cmos_read(unsigned char addr);
97 void rtc_cmos_write(unsigned char val, unsigned char addr);
98 
99 extern int mach_set_rtc_mmss(unsigned long nowtime);
100 extern unsigned long mach_get_cmos_time(void);
101 
102 #define RTC_IRQ 8
103 
104 #endif /* _ASM_X86_MC146818RTC_H */
105