195c7b77dSSean Christopherson /* SPDX-License-Identifier: GPL-2.0 */ 295c7b77dSSean Christopherson #ifndef _ASM_X86_KVM_VCPU_REGS_H 395c7b77dSSean Christopherson #define _ASM_X86_KVM_VCPU_REGS_H 495c7b77dSSean Christopherson 595c7b77dSSean Christopherson #define __VCPU_REGS_RAX 0 695c7b77dSSean Christopherson #define __VCPU_REGS_RCX 1 795c7b77dSSean Christopherson #define __VCPU_REGS_RDX 2 895c7b77dSSean Christopherson #define __VCPU_REGS_RBX 3 995c7b77dSSean Christopherson #define __VCPU_REGS_RSP 4 1095c7b77dSSean Christopherson #define __VCPU_REGS_RBP 5 1195c7b77dSSean Christopherson #define __VCPU_REGS_RSI 6 1295c7b77dSSean Christopherson #define __VCPU_REGS_RDI 7 1395c7b77dSSean Christopherson 1495c7b77dSSean Christopherson #ifdef CONFIG_X86_64 1595c7b77dSSean Christopherson #define __VCPU_REGS_R8 8 1695c7b77dSSean Christopherson #define __VCPU_REGS_R9 9 1795c7b77dSSean Christopherson #define __VCPU_REGS_R10 10 1895c7b77dSSean Christopherson #define __VCPU_REGS_R11 11 1995c7b77dSSean Christopherson #define __VCPU_REGS_R12 12 2095c7b77dSSean Christopherson #define __VCPU_REGS_R13 13 2195c7b77dSSean Christopherson #define __VCPU_REGS_R14 14 2295c7b77dSSean Christopherson #define __VCPU_REGS_R15 15 2395c7b77dSSean Christopherson #endif 2495c7b77dSSean Christopherson 2595c7b77dSSean Christopherson #endif /* _ASM_X86_KVM_VCPU_REGS_H */ 26