1 /* SPDX-License-Identifier: GPL-2.0-only */ 2 /* 3 * Kernel-based Virtual Machine driver for Linux 4 * 5 * This header defines architecture specific interfaces, x86 version 6 */ 7 8 #ifndef _ASM_X86_KVM_HOST_H 9 #define _ASM_X86_KVM_HOST_H 10 11 #include <linux/types.h> 12 #include <linux/mm.h> 13 #include <linux/mmu_notifier.h> 14 #include <linux/tracepoint.h> 15 #include <linux/cpumask.h> 16 #include <linux/irq_work.h> 17 #include <linux/irq.h> 18 19 #include <linux/kvm.h> 20 #include <linux/kvm_para.h> 21 #include <linux/kvm_types.h> 22 #include <linux/perf_event.h> 23 #include <linux/pvclock_gtod.h> 24 #include <linux/clocksource.h> 25 #include <linux/irqbypass.h> 26 #include <linux/hyperv.h> 27 28 #include <asm/apic.h> 29 #include <asm/pvclock-abi.h> 30 #include <asm/desc.h> 31 #include <asm/mtrr.h> 32 #include <asm/msr-index.h> 33 #include <asm/asm.h> 34 #include <asm/kvm_page_track.h> 35 #include <asm/kvm_vcpu_regs.h> 36 #include <asm/hyperv-tlfs.h> 37 38 #define __KVM_HAVE_ARCH_VCPU_DEBUGFS 39 40 #define KVM_MAX_VCPUS 288 41 #define KVM_SOFT_MAX_VCPUS 240 42 #define KVM_MAX_VCPU_ID 1023 43 #define KVM_USER_MEM_SLOTS 509 44 /* memory slots that are not exposed to userspace */ 45 #define KVM_PRIVATE_MEM_SLOTS 3 46 #define KVM_MEM_SLOTS_NUM (KVM_USER_MEM_SLOTS + KVM_PRIVATE_MEM_SLOTS) 47 48 #define KVM_HALT_POLL_NS_DEFAULT 200000 49 50 #define KVM_IRQCHIP_NUM_PINS KVM_IOAPIC_NUM_PINS 51 52 #define KVM_DIRTY_LOG_MANUAL_CAPS (KVM_DIRTY_LOG_MANUAL_PROTECT_ENABLE | \ 53 KVM_DIRTY_LOG_INITIALLY_SET) 54 55 /* x86-specific vcpu->requests bit members */ 56 #define KVM_REQ_MIGRATE_TIMER KVM_ARCH_REQ(0) 57 #define KVM_REQ_REPORT_TPR_ACCESS KVM_ARCH_REQ(1) 58 #define KVM_REQ_TRIPLE_FAULT KVM_ARCH_REQ(2) 59 #define KVM_REQ_MMU_SYNC KVM_ARCH_REQ(3) 60 #define KVM_REQ_CLOCK_UPDATE KVM_ARCH_REQ(4) 61 #define KVM_REQ_LOAD_MMU_PGD KVM_ARCH_REQ(5) 62 #define KVM_REQ_EVENT KVM_ARCH_REQ(6) 63 #define KVM_REQ_APF_HALT KVM_ARCH_REQ(7) 64 #define KVM_REQ_STEAL_UPDATE KVM_ARCH_REQ(8) 65 #define KVM_REQ_NMI KVM_ARCH_REQ(9) 66 #define KVM_REQ_PMU KVM_ARCH_REQ(10) 67 #define KVM_REQ_PMI KVM_ARCH_REQ(11) 68 #define KVM_REQ_SMI KVM_ARCH_REQ(12) 69 #define KVM_REQ_MASTERCLOCK_UPDATE KVM_ARCH_REQ(13) 70 #define KVM_REQ_MCLOCK_INPROGRESS \ 71 KVM_ARCH_REQ_FLAGS(14, KVM_REQUEST_WAIT | KVM_REQUEST_NO_WAKEUP) 72 #define KVM_REQ_SCAN_IOAPIC \ 73 KVM_ARCH_REQ_FLAGS(15, KVM_REQUEST_WAIT | KVM_REQUEST_NO_WAKEUP) 74 #define KVM_REQ_GLOBAL_CLOCK_UPDATE KVM_ARCH_REQ(16) 75 #define KVM_REQ_APIC_PAGE_RELOAD \ 76 KVM_ARCH_REQ_FLAGS(17, KVM_REQUEST_WAIT | KVM_REQUEST_NO_WAKEUP) 77 #define KVM_REQ_HV_CRASH KVM_ARCH_REQ(18) 78 #define KVM_REQ_IOAPIC_EOI_EXIT KVM_ARCH_REQ(19) 79 #define KVM_REQ_HV_RESET KVM_ARCH_REQ(20) 80 #define KVM_REQ_HV_EXIT KVM_ARCH_REQ(21) 81 #define KVM_REQ_HV_STIMER KVM_ARCH_REQ(22) 82 #define KVM_REQ_LOAD_EOI_EXITMAP KVM_ARCH_REQ(23) 83 #define KVM_REQ_GET_VMCS12_PAGES KVM_ARCH_REQ(24) 84 #define KVM_REQ_APICV_UPDATE \ 85 KVM_ARCH_REQ_FLAGS(25, KVM_REQUEST_WAIT | KVM_REQUEST_NO_WAKEUP) 86 #define KVM_REQ_TLB_FLUSH_CURRENT KVM_ARCH_REQ(26) 87 #define KVM_REQ_HV_TLB_FLUSH \ 88 KVM_ARCH_REQ_FLAGS(27, KVM_REQUEST_NO_WAKEUP) 89 #define KVM_REQ_APF_READY KVM_ARCH_REQ(28) 90 91 #define CR0_RESERVED_BITS \ 92 (~(unsigned long)(X86_CR0_PE | X86_CR0_MP | X86_CR0_EM | X86_CR0_TS \ 93 | X86_CR0_ET | X86_CR0_NE | X86_CR0_WP | X86_CR0_AM \ 94 | X86_CR0_NW | X86_CR0_CD | X86_CR0_PG)) 95 96 #define CR4_RESERVED_BITS \ 97 (~(unsigned long)(X86_CR4_VME | X86_CR4_PVI | X86_CR4_TSD | X86_CR4_DE\ 98 | X86_CR4_PSE | X86_CR4_PAE | X86_CR4_MCE \ 99 | X86_CR4_PGE | X86_CR4_PCE | X86_CR4_OSFXSR | X86_CR4_PCIDE \ 100 | X86_CR4_OSXSAVE | X86_CR4_SMEP | X86_CR4_FSGSBASE \ 101 | X86_CR4_OSXMMEXCPT | X86_CR4_LA57 | X86_CR4_VMXE \ 102 | X86_CR4_SMAP | X86_CR4_PKE | X86_CR4_UMIP)) 103 104 #define CR8_RESERVED_BITS (~(unsigned long)X86_CR8_TPR) 105 106 107 108 #define INVALID_PAGE (~(hpa_t)0) 109 #define VALID_PAGE(x) ((x) != INVALID_PAGE) 110 111 #define UNMAPPED_GVA (~(gpa_t)0) 112 113 /* KVM Hugepage definitions for x86 */ 114 #define KVM_MAX_HUGEPAGE_LEVEL PG_LEVEL_1G 115 #define KVM_NR_PAGE_SIZES (KVM_MAX_HUGEPAGE_LEVEL - PG_LEVEL_4K + 1) 116 #define KVM_HPAGE_GFN_SHIFT(x) (((x) - 1) * 9) 117 #define KVM_HPAGE_SHIFT(x) (PAGE_SHIFT + KVM_HPAGE_GFN_SHIFT(x)) 118 #define KVM_HPAGE_SIZE(x) (1UL << KVM_HPAGE_SHIFT(x)) 119 #define KVM_HPAGE_MASK(x) (~(KVM_HPAGE_SIZE(x) - 1)) 120 #define KVM_PAGES_PER_HPAGE(x) (KVM_HPAGE_SIZE(x) / PAGE_SIZE) 121 122 static inline gfn_t gfn_to_index(gfn_t gfn, gfn_t base_gfn, int level) 123 { 124 /* KVM_HPAGE_GFN_SHIFT(PG_LEVEL_4K) must be 0. */ 125 return (gfn >> KVM_HPAGE_GFN_SHIFT(level)) - 126 (base_gfn >> KVM_HPAGE_GFN_SHIFT(level)); 127 } 128 129 #define KVM_PERMILLE_MMU_PAGES 20 130 #define KVM_MIN_ALLOC_MMU_PAGES 64UL 131 #define KVM_MMU_HASH_SHIFT 12 132 #define KVM_NUM_MMU_PAGES (1 << KVM_MMU_HASH_SHIFT) 133 #define KVM_MIN_FREE_MMU_PAGES 5 134 #define KVM_REFILL_PAGES 25 135 #define KVM_MAX_CPUID_ENTRIES 80 136 #define KVM_NR_FIXED_MTRR_REGION 88 137 #define KVM_NR_VAR_MTRR 8 138 139 #define ASYNC_PF_PER_VCPU 64 140 141 enum kvm_reg { 142 VCPU_REGS_RAX = __VCPU_REGS_RAX, 143 VCPU_REGS_RCX = __VCPU_REGS_RCX, 144 VCPU_REGS_RDX = __VCPU_REGS_RDX, 145 VCPU_REGS_RBX = __VCPU_REGS_RBX, 146 VCPU_REGS_RSP = __VCPU_REGS_RSP, 147 VCPU_REGS_RBP = __VCPU_REGS_RBP, 148 VCPU_REGS_RSI = __VCPU_REGS_RSI, 149 VCPU_REGS_RDI = __VCPU_REGS_RDI, 150 #ifdef CONFIG_X86_64 151 VCPU_REGS_R8 = __VCPU_REGS_R8, 152 VCPU_REGS_R9 = __VCPU_REGS_R9, 153 VCPU_REGS_R10 = __VCPU_REGS_R10, 154 VCPU_REGS_R11 = __VCPU_REGS_R11, 155 VCPU_REGS_R12 = __VCPU_REGS_R12, 156 VCPU_REGS_R13 = __VCPU_REGS_R13, 157 VCPU_REGS_R14 = __VCPU_REGS_R14, 158 VCPU_REGS_R15 = __VCPU_REGS_R15, 159 #endif 160 VCPU_REGS_RIP, 161 NR_VCPU_REGS, 162 163 VCPU_EXREG_PDPTR = NR_VCPU_REGS, 164 VCPU_EXREG_CR0, 165 VCPU_EXREG_CR3, 166 VCPU_EXREG_CR4, 167 VCPU_EXREG_RFLAGS, 168 VCPU_EXREG_SEGMENTS, 169 VCPU_EXREG_EXIT_INFO_1, 170 VCPU_EXREG_EXIT_INFO_2, 171 }; 172 173 enum { 174 VCPU_SREG_ES, 175 VCPU_SREG_CS, 176 VCPU_SREG_SS, 177 VCPU_SREG_DS, 178 VCPU_SREG_FS, 179 VCPU_SREG_GS, 180 VCPU_SREG_TR, 181 VCPU_SREG_LDTR, 182 }; 183 184 enum exit_fastpath_completion { 185 EXIT_FASTPATH_NONE, 186 EXIT_FASTPATH_REENTER_GUEST, 187 EXIT_FASTPATH_EXIT_HANDLED, 188 }; 189 typedef enum exit_fastpath_completion fastpath_t; 190 191 struct x86_emulate_ctxt; 192 struct x86_exception; 193 enum x86_intercept; 194 enum x86_intercept_stage; 195 196 #define KVM_NR_DB_REGS 4 197 198 #define DR6_BD (1 << 13) 199 #define DR6_BS (1 << 14) 200 #define DR6_BT (1 << 15) 201 #define DR6_RTM (1 << 16) 202 #define DR6_FIXED_1 0xfffe0ff0 203 #define DR6_INIT 0xffff0ff0 204 #define DR6_VOLATILE 0x0001e00f 205 206 #define DR7_BP_EN_MASK 0x000000ff 207 #define DR7_GE (1 << 9) 208 #define DR7_GD (1 << 13) 209 #define DR7_FIXED_1 0x00000400 210 #define DR7_VOLATILE 0xffff2bff 211 212 #define PFERR_PRESENT_BIT 0 213 #define PFERR_WRITE_BIT 1 214 #define PFERR_USER_BIT 2 215 #define PFERR_RSVD_BIT 3 216 #define PFERR_FETCH_BIT 4 217 #define PFERR_PK_BIT 5 218 #define PFERR_GUEST_FINAL_BIT 32 219 #define PFERR_GUEST_PAGE_BIT 33 220 221 #define PFERR_PRESENT_MASK (1U << PFERR_PRESENT_BIT) 222 #define PFERR_WRITE_MASK (1U << PFERR_WRITE_BIT) 223 #define PFERR_USER_MASK (1U << PFERR_USER_BIT) 224 #define PFERR_RSVD_MASK (1U << PFERR_RSVD_BIT) 225 #define PFERR_FETCH_MASK (1U << PFERR_FETCH_BIT) 226 #define PFERR_PK_MASK (1U << PFERR_PK_BIT) 227 #define PFERR_GUEST_FINAL_MASK (1ULL << PFERR_GUEST_FINAL_BIT) 228 #define PFERR_GUEST_PAGE_MASK (1ULL << PFERR_GUEST_PAGE_BIT) 229 230 #define PFERR_NESTED_GUEST_PAGE (PFERR_GUEST_PAGE_MASK | \ 231 PFERR_WRITE_MASK | \ 232 PFERR_PRESENT_MASK) 233 234 /* apic attention bits */ 235 #define KVM_APIC_CHECK_VAPIC 0 236 /* 237 * The following bit is set with PV-EOI, unset on EOI. 238 * We detect PV-EOI changes by guest by comparing 239 * this bit with PV-EOI in guest memory. 240 * See the implementation in apic_update_pv_eoi. 241 */ 242 #define KVM_APIC_PV_EOI_PENDING 1 243 244 struct kvm_kernel_irq_routing_entry; 245 246 /* 247 * the pages used as guest page table on soft mmu are tracked by 248 * kvm_memory_slot.arch.gfn_track which is 16 bits, so the role bits used 249 * by indirect shadow page can not be more than 15 bits. 250 * 251 * Currently, we used 14 bits that are @level, @gpte_is_8_bytes, @quadrant, @access, 252 * @nxe, @cr0_wp, @smep_andnot_wp and @smap_andnot_wp. 253 */ 254 union kvm_mmu_page_role { 255 u32 word; 256 struct { 257 unsigned level:4; 258 unsigned gpte_is_8_bytes:1; 259 unsigned quadrant:2; 260 unsigned direct:1; 261 unsigned access:3; 262 unsigned invalid:1; 263 unsigned nxe:1; 264 unsigned cr0_wp:1; 265 unsigned smep_andnot_wp:1; 266 unsigned smap_andnot_wp:1; 267 unsigned ad_disabled:1; 268 unsigned guest_mode:1; 269 unsigned :6; 270 271 /* 272 * This is left at the top of the word so that 273 * kvm_memslots_for_spte_role can extract it with a 274 * simple shift. While there is room, give it a whole 275 * byte so it is also faster to load it from memory. 276 */ 277 unsigned smm:8; 278 }; 279 }; 280 281 union kvm_mmu_extended_role { 282 /* 283 * This structure complements kvm_mmu_page_role caching everything needed for 284 * MMU configuration. If nothing in both these structures changed, MMU 285 * re-configuration can be skipped. @valid bit is set on first usage so we don't 286 * treat all-zero structure as valid data. 287 */ 288 u32 word; 289 struct { 290 unsigned int valid:1; 291 unsigned int execonly:1; 292 unsigned int cr0_pg:1; 293 unsigned int cr4_pae:1; 294 unsigned int cr4_pse:1; 295 unsigned int cr4_pke:1; 296 unsigned int cr4_smap:1; 297 unsigned int cr4_smep:1; 298 unsigned int maxphyaddr:6; 299 }; 300 }; 301 302 union kvm_mmu_role { 303 u64 as_u64; 304 struct { 305 union kvm_mmu_page_role base; 306 union kvm_mmu_extended_role ext; 307 }; 308 }; 309 310 struct kvm_rmap_head { 311 unsigned long val; 312 }; 313 314 struct kvm_pio_request { 315 unsigned long linear_rip; 316 unsigned long count; 317 int in; 318 int port; 319 int size; 320 }; 321 322 #define PT64_ROOT_MAX_LEVEL 5 323 324 struct rsvd_bits_validate { 325 u64 rsvd_bits_mask[2][PT64_ROOT_MAX_LEVEL]; 326 u64 bad_mt_xwr; 327 }; 328 329 struct kvm_mmu_root_info { 330 gpa_t pgd; 331 hpa_t hpa; 332 }; 333 334 #define KVM_MMU_ROOT_INFO_INVALID \ 335 ((struct kvm_mmu_root_info) { .pgd = INVALID_PAGE, .hpa = INVALID_PAGE }) 336 337 #define KVM_MMU_NUM_PREV_ROOTS 3 338 339 struct kvm_mmu_page; 340 341 /* 342 * x86 supports 4 paging modes (5-level 64-bit, 4-level 64-bit, 3-level 32-bit, 343 * and 2-level 32-bit). The kvm_mmu structure abstracts the details of the 344 * current mmu mode. 345 */ 346 struct kvm_mmu { 347 unsigned long (*get_guest_pgd)(struct kvm_vcpu *vcpu); 348 u64 (*get_pdptr)(struct kvm_vcpu *vcpu, int index); 349 int (*page_fault)(struct kvm_vcpu *vcpu, gpa_t cr2_or_gpa, u32 err, 350 bool prefault); 351 void (*inject_page_fault)(struct kvm_vcpu *vcpu, 352 struct x86_exception *fault); 353 gpa_t (*gva_to_gpa)(struct kvm_vcpu *vcpu, gpa_t gva_or_gpa, 354 u32 access, struct x86_exception *exception); 355 gpa_t (*translate_gpa)(struct kvm_vcpu *vcpu, gpa_t gpa, u32 access, 356 struct x86_exception *exception); 357 int (*sync_page)(struct kvm_vcpu *vcpu, 358 struct kvm_mmu_page *sp); 359 void (*invlpg)(struct kvm_vcpu *vcpu, gva_t gva, hpa_t root_hpa); 360 void (*update_pte)(struct kvm_vcpu *vcpu, struct kvm_mmu_page *sp, 361 u64 *spte, const void *pte); 362 hpa_t root_hpa; 363 gpa_t root_pgd; 364 union kvm_mmu_role mmu_role; 365 u8 root_level; 366 u8 shadow_root_level; 367 u8 ept_ad; 368 bool direct_map; 369 struct kvm_mmu_root_info prev_roots[KVM_MMU_NUM_PREV_ROOTS]; 370 371 /* 372 * Bitmap; bit set = permission fault 373 * Byte index: page fault error code [4:1] 374 * Bit index: pte permissions in ACC_* format 375 */ 376 u8 permissions[16]; 377 378 /* 379 * The pkru_mask indicates if protection key checks are needed. It 380 * consists of 16 domains indexed by page fault error code bits [4:1], 381 * with PFEC.RSVD replaced by ACC_USER_MASK from the page tables. 382 * Each domain has 2 bits which are ANDed with AD and WD from PKRU. 383 */ 384 u32 pkru_mask; 385 386 u64 *pae_root; 387 u64 *lm_root; 388 389 /* 390 * check zero bits on shadow page table entries, these 391 * bits include not only hardware reserved bits but also 392 * the bits spte never used. 393 */ 394 struct rsvd_bits_validate shadow_zero_check; 395 396 struct rsvd_bits_validate guest_rsvd_check; 397 398 /* Can have large pages at levels 2..last_nonleaf_level-1. */ 399 u8 last_nonleaf_level; 400 401 bool nx; 402 403 u64 pdptrs[4]; /* pae */ 404 }; 405 406 struct kvm_tlb_range { 407 u64 start_gfn; 408 u64 pages; 409 }; 410 411 enum pmc_type { 412 KVM_PMC_GP = 0, 413 KVM_PMC_FIXED, 414 }; 415 416 struct kvm_pmc { 417 enum pmc_type type; 418 u8 idx; 419 u64 counter; 420 u64 eventsel; 421 struct perf_event *perf_event; 422 struct kvm_vcpu *vcpu; 423 /* 424 * eventsel value for general purpose counters, 425 * ctrl value for fixed counters. 426 */ 427 u64 current_config; 428 }; 429 430 struct kvm_pmu { 431 unsigned nr_arch_gp_counters; 432 unsigned nr_arch_fixed_counters; 433 unsigned available_event_types; 434 u64 fixed_ctr_ctrl; 435 u64 global_ctrl; 436 u64 global_status; 437 u64 global_ovf_ctrl; 438 u64 counter_bitmask[2]; 439 u64 global_ctrl_mask; 440 u64 global_ovf_ctrl_mask; 441 u64 reserved_bits; 442 u8 version; 443 struct kvm_pmc gp_counters[INTEL_PMC_MAX_GENERIC]; 444 struct kvm_pmc fixed_counters[INTEL_PMC_MAX_FIXED]; 445 struct irq_work irq_work; 446 DECLARE_BITMAP(reprogram_pmi, X86_PMC_IDX_MAX); 447 DECLARE_BITMAP(all_valid_pmc_idx, X86_PMC_IDX_MAX); 448 DECLARE_BITMAP(pmc_in_use, X86_PMC_IDX_MAX); 449 450 /* 451 * The gate to release perf_events not marked in 452 * pmc_in_use only once in a vcpu time slice. 453 */ 454 bool need_cleanup; 455 456 /* 457 * The total number of programmed perf_events and it helps to avoid 458 * redundant check before cleanup if guest don't use vPMU at all. 459 */ 460 u8 event_count; 461 }; 462 463 struct kvm_pmu_ops; 464 465 enum { 466 KVM_DEBUGREG_BP_ENABLED = 1, 467 KVM_DEBUGREG_WONT_EXIT = 2, 468 KVM_DEBUGREG_RELOAD = 4, 469 }; 470 471 struct kvm_mtrr_range { 472 u64 base; 473 u64 mask; 474 struct list_head node; 475 }; 476 477 struct kvm_mtrr { 478 struct kvm_mtrr_range var_ranges[KVM_NR_VAR_MTRR]; 479 mtrr_type fixed_ranges[KVM_NR_FIXED_MTRR_REGION]; 480 u64 deftype; 481 482 struct list_head head; 483 }; 484 485 /* Hyper-V SynIC timer */ 486 struct kvm_vcpu_hv_stimer { 487 struct hrtimer timer; 488 int index; 489 union hv_stimer_config config; 490 u64 count; 491 u64 exp_time; 492 struct hv_message msg; 493 bool msg_pending; 494 }; 495 496 /* Hyper-V synthetic interrupt controller (SynIC)*/ 497 struct kvm_vcpu_hv_synic { 498 u64 version; 499 u64 control; 500 u64 msg_page; 501 u64 evt_page; 502 atomic64_t sint[HV_SYNIC_SINT_COUNT]; 503 atomic_t sint_to_gsi[HV_SYNIC_SINT_COUNT]; 504 DECLARE_BITMAP(auto_eoi_bitmap, 256); 505 DECLARE_BITMAP(vec_bitmap, 256); 506 bool active; 507 bool dont_zero_synic_pages; 508 }; 509 510 /* Hyper-V per vcpu emulation context */ 511 struct kvm_vcpu_hv { 512 u32 vp_index; 513 u64 hv_vapic; 514 s64 runtime_offset; 515 struct kvm_vcpu_hv_synic synic; 516 struct kvm_hyperv_exit exit; 517 struct kvm_vcpu_hv_stimer stimer[HV_SYNIC_STIMER_COUNT]; 518 DECLARE_BITMAP(stimer_pending_bitmap, HV_SYNIC_STIMER_COUNT); 519 cpumask_t tlb_flush; 520 }; 521 522 struct kvm_vcpu_arch { 523 /* 524 * rip and regs accesses must go through 525 * kvm_{register,rip}_{read,write} functions. 526 */ 527 unsigned long regs[NR_VCPU_REGS]; 528 u32 regs_avail; 529 u32 regs_dirty; 530 531 unsigned long cr0; 532 unsigned long cr0_guest_owned_bits; 533 unsigned long cr2; 534 unsigned long cr3; 535 unsigned long cr4; 536 unsigned long cr4_guest_owned_bits; 537 unsigned long cr4_guest_rsvd_bits; 538 unsigned long cr8; 539 u32 host_pkru; 540 u32 pkru; 541 u32 hflags; 542 u64 efer; 543 u64 apic_base; 544 struct kvm_lapic *apic; /* kernel irqchip context */ 545 bool apicv_active; 546 bool load_eoi_exitmap_pending; 547 DECLARE_BITMAP(ioapic_handled_vectors, 256); 548 unsigned long apic_attention; 549 int32_t apic_arb_prio; 550 int mp_state; 551 u64 ia32_misc_enable_msr; 552 u64 smbase; 553 u64 smi_count; 554 bool tpr_access_reporting; 555 bool xsaves_enabled; 556 u64 ia32_xss; 557 u64 microcode_version; 558 u64 arch_capabilities; 559 u64 perf_capabilities; 560 561 /* 562 * Paging state of the vcpu 563 * 564 * If the vcpu runs in guest mode with two level paging this still saves 565 * the paging mode of the l1 guest. This context is always used to 566 * handle faults. 567 */ 568 struct kvm_mmu *mmu; 569 570 /* Non-nested MMU for L1 */ 571 struct kvm_mmu root_mmu; 572 573 /* L1 MMU when running nested */ 574 struct kvm_mmu guest_mmu; 575 576 /* 577 * Paging state of an L2 guest (used for nested npt) 578 * 579 * This context will save all necessary information to walk page tables 580 * of an L2 guest. This context is only initialized for page table 581 * walking and not for faulting since we never handle l2 page faults on 582 * the host. 583 */ 584 struct kvm_mmu nested_mmu; 585 586 /* 587 * Pointer to the mmu context currently used for 588 * gva_to_gpa translations. 589 */ 590 struct kvm_mmu *walk_mmu; 591 592 struct kvm_mmu_memory_cache mmu_pte_list_desc_cache; 593 struct kvm_mmu_memory_cache mmu_shadow_page_cache; 594 struct kvm_mmu_memory_cache mmu_gfn_array_cache; 595 struct kvm_mmu_memory_cache mmu_page_header_cache; 596 597 /* 598 * QEMU userspace and the guest each have their own FPU state. 599 * In vcpu_run, we switch between the user and guest FPU contexts. 600 * While running a VCPU, the VCPU thread will have the guest FPU 601 * context. 602 * 603 * Note that while the PKRU state lives inside the fpu registers, 604 * it is switched out separately at VMENTER and VMEXIT time. The 605 * "guest_fpu" state here contains the guest FPU context, with the 606 * host PRKU bits. 607 */ 608 struct fpu *user_fpu; 609 struct fpu *guest_fpu; 610 611 u64 xcr0; 612 u64 guest_supported_xcr0; 613 614 struct kvm_pio_request pio; 615 void *pio_data; 616 617 u8 event_exit_inst_len; 618 619 struct kvm_queued_exception { 620 bool pending; 621 bool injected; 622 bool has_error_code; 623 u8 nr; 624 u32 error_code; 625 unsigned long payload; 626 bool has_payload; 627 u8 nested_apf; 628 } exception; 629 630 struct kvm_queued_interrupt { 631 bool injected; 632 bool soft; 633 u8 nr; 634 } interrupt; 635 636 int halt_request; /* real mode on Intel only */ 637 638 int cpuid_nent; 639 struct kvm_cpuid_entry2 cpuid_entries[KVM_MAX_CPUID_ENTRIES]; 640 641 int maxphyaddr; 642 int max_tdp_level; 643 644 /* emulate context */ 645 646 struct x86_emulate_ctxt *emulate_ctxt; 647 bool emulate_regs_need_sync_to_vcpu; 648 bool emulate_regs_need_sync_from_vcpu; 649 int (*complete_userspace_io)(struct kvm_vcpu *vcpu); 650 651 gpa_t time; 652 struct pvclock_vcpu_time_info hv_clock; 653 unsigned int hw_tsc_khz; 654 struct gfn_to_hva_cache pv_time; 655 bool pv_time_enabled; 656 /* set guest stopped flag in pvclock flags field */ 657 bool pvclock_set_guest_stopped_request; 658 659 struct { 660 u8 preempted; 661 u64 msr_val; 662 u64 last_steal; 663 struct gfn_to_pfn_cache cache; 664 } st; 665 666 u64 l1_tsc_offset; 667 u64 tsc_offset; 668 u64 last_guest_tsc; 669 u64 last_host_tsc; 670 u64 tsc_offset_adjustment; 671 u64 this_tsc_nsec; 672 u64 this_tsc_write; 673 u64 this_tsc_generation; 674 bool tsc_catchup; 675 bool tsc_always_catchup; 676 s8 virtual_tsc_shift; 677 u32 virtual_tsc_mult; 678 u32 virtual_tsc_khz; 679 s64 ia32_tsc_adjust_msr; 680 u64 msr_ia32_power_ctl; 681 u64 tsc_scaling_ratio; 682 683 atomic_t nmi_queued; /* unprocessed asynchronous NMIs */ 684 unsigned nmi_pending; /* NMI queued after currently running handler */ 685 bool nmi_injected; /* Trying to inject an NMI this entry */ 686 bool smi_pending; /* SMI queued after currently running handler */ 687 688 struct kvm_mtrr mtrr_state; 689 u64 pat; 690 691 unsigned switch_db_regs; 692 unsigned long db[KVM_NR_DB_REGS]; 693 unsigned long dr6; 694 unsigned long dr7; 695 unsigned long eff_db[KVM_NR_DB_REGS]; 696 unsigned long guest_debug_dr7; 697 u64 msr_platform_info; 698 u64 msr_misc_features_enables; 699 700 u64 mcg_cap; 701 u64 mcg_status; 702 u64 mcg_ctl; 703 u64 mcg_ext_ctl; 704 u64 *mce_banks; 705 706 /* Cache MMIO info */ 707 u64 mmio_gva; 708 unsigned mmio_access; 709 gfn_t mmio_gfn; 710 u64 mmio_gen; 711 712 struct kvm_pmu pmu; 713 714 /* used for guest single stepping over the given code position */ 715 unsigned long singlestep_rip; 716 717 struct kvm_vcpu_hv hyperv; 718 719 cpumask_var_t wbinvd_dirty_mask; 720 721 unsigned long last_retry_eip; 722 unsigned long last_retry_addr; 723 724 struct { 725 bool halted; 726 gfn_t gfns[ASYNC_PF_PER_VCPU]; 727 struct gfn_to_hva_cache data; 728 u64 msr_en_val; /* MSR_KVM_ASYNC_PF_EN */ 729 u64 msr_int_val; /* MSR_KVM_ASYNC_PF_INT */ 730 u16 vec; 731 u32 id; 732 bool send_user_only; 733 u32 host_apf_flags; 734 unsigned long nested_apf_token; 735 bool delivery_as_pf_vmexit; 736 bool pageready_pending; 737 } apf; 738 739 /* OSVW MSRs (AMD only) */ 740 struct { 741 u64 length; 742 u64 status; 743 } osvw; 744 745 struct { 746 u64 msr_val; 747 struct gfn_to_hva_cache data; 748 } pv_eoi; 749 750 u64 msr_kvm_poll_control; 751 752 /* 753 * Indicates the guest is trying to write a gfn that contains one or 754 * more of the PTEs used to translate the write itself, i.e. the access 755 * is changing its own translation in the guest page tables. KVM exits 756 * to userspace if emulation of the faulting instruction fails and this 757 * flag is set, as KVM cannot make forward progress. 758 * 759 * If emulation fails for a write to guest page tables, KVM unprotects 760 * (zaps) the shadow page for the target gfn and resumes the guest to 761 * retry the non-emulatable instruction (on hardware). Unprotecting the 762 * gfn doesn't allow forward progress for a self-changing access because 763 * doing so also zaps the translation for the gfn, i.e. retrying the 764 * instruction will hit a !PRESENT fault, which results in a new shadow 765 * page and sends KVM back to square one. 766 */ 767 bool write_fault_to_shadow_pgtable; 768 769 /* set at EPT violation at this point */ 770 unsigned long exit_qualification; 771 772 /* pv related host specific info */ 773 struct { 774 bool pv_unhalted; 775 } pv; 776 777 int pending_ioapic_eoi; 778 int pending_external_vector; 779 780 /* be preempted when it's in kernel-mode(cpl=0) */ 781 bool preempted_in_kernel; 782 783 /* Flush the L1 Data cache for L1TF mitigation on VMENTER */ 784 bool l1tf_flush_l1d; 785 786 /* Host CPU on which VM-entry was most recently attempted */ 787 unsigned int last_vmentry_cpu; 788 789 /* AMD MSRC001_0015 Hardware Configuration */ 790 u64 msr_hwcr; 791 }; 792 793 struct kvm_lpage_info { 794 int disallow_lpage; 795 }; 796 797 struct kvm_arch_memory_slot { 798 struct kvm_rmap_head *rmap[KVM_NR_PAGE_SIZES]; 799 struct kvm_lpage_info *lpage_info[KVM_NR_PAGE_SIZES - 1]; 800 unsigned short *gfn_track[KVM_PAGE_TRACK_MAX]; 801 }; 802 803 /* 804 * We use as the mode the number of bits allocated in the LDR for the 805 * logical processor ID. It happens that these are all powers of two. 806 * This makes it is very easy to detect cases where the APICs are 807 * configured for multiple modes; in that case, we cannot use the map and 808 * hence cannot use kvm_irq_delivery_to_apic_fast either. 809 */ 810 #define KVM_APIC_MODE_XAPIC_CLUSTER 4 811 #define KVM_APIC_MODE_XAPIC_FLAT 8 812 #define KVM_APIC_MODE_X2APIC 16 813 814 struct kvm_apic_map { 815 struct rcu_head rcu; 816 u8 mode; 817 u32 max_apic_id; 818 union { 819 struct kvm_lapic *xapic_flat_map[8]; 820 struct kvm_lapic *xapic_cluster_map[16][4]; 821 }; 822 struct kvm_lapic *phys_map[]; 823 }; 824 825 /* Hyper-V synthetic debugger (SynDbg)*/ 826 struct kvm_hv_syndbg { 827 struct { 828 u64 control; 829 u64 status; 830 u64 send_page; 831 u64 recv_page; 832 u64 pending_page; 833 } control; 834 u64 options; 835 }; 836 837 /* Hyper-V emulation context */ 838 struct kvm_hv { 839 struct mutex hv_lock; 840 u64 hv_guest_os_id; 841 u64 hv_hypercall; 842 u64 hv_tsc_page; 843 844 /* Hyper-v based guest crash (NT kernel bugcheck) parameters */ 845 u64 hv_crash_param[HV_X64_MSR_CRASH_PARAMS]; 846 u64 hv_crash_ctl; 847 848 struct ms_hyperv_tsc_page tsc_ref; 849 850 struct idr conn_to_evt; 851 852 u64 hv_reenlightenment_control; 853 u64 hv_tsc_emulation_control; 854 u64 hv_tsc_emulation_status; 855 856 /* How many vCPUs have VP index != vCPU index */ 857 atomic_t num_mismatched_vp_indexes; 858 859 struct hv_partition_assist_pg *hv_pa_pg; 860 struct kvm_hv_syndbg hv_syndbg; 861 }; 862 863 enum kvm_irqchip_mode { 864 KVM_IRQCHIP_NONE, 865 KVM_IRQCHIP_KERNEL, /* created with KVM_CREATE_IRQCHIP */ 866 KVM_IRQCHIP_SPLIT, /* created with KVM_CAP_SPLIT_IRQCHIP */ 867 }; 868 869 #define APICV_INHIBIT_REASON_DISABLE 0 870 #define APICV_INHIBIT_REASON_HYPERV 1 871 #define APICV_INHIBIT_REASON_NESTED 2 872 #define APICV_INHIBIT_REASON_IRQWIN 3 873 #define APICV_INHIBIT_REASON_PIT_REINJ 4 874 #define APICV_INHIBIT_REASON_X2APIC 5 875 876 struct kvm_arch { 877 unsigned long n_used_mmu_pages; 878 unsigned long n_requested_mmu_pages; 879 unsigned long n_max_mmu_pages; 880 unsigned int indirect_shadow_pages; 881 u8 mmu_valid_gen; 882 struct hlist_head mmu_page_hash[KVM_NUM_MMU_PAGES]; 883 /* 884 * Hash table of struct kvm_mmu_page. 885 */ 886 struct list_head active_mmu_pages; 887 struct list_head zapped_obsolete_pages; 888 struct list_head lpage_disallowed_mmu_pages; 889 struct kvm_page_track_notifier_node mmu_sp_tracker; 890 struct kvm_page_track_notifier_head track_notifier_head; 891 892 struct list_head assigned_dev_head; 893 struct iommu_domain *iommu_domain; 894 bool iommu_noncoherent; 895 #define __KVM_HAVE_ARCH_NONCOHERENT_DMA 896 atomic_t noncoherent_dma_count; 897 #define __KVM_HAVE_ARCH_ASSIGNED_DEVICE 898 atomic_t assigned_device_count; 899 struct kvm_pic *vpic; 900 struct kvm_ioapic *vioapic; 901 struct kvm_pit *vpit; 902 atomic_t vapics_in_nmi_mode; 903 struct mutex apic_map_lock; 904 struct kvm_apic_map *apic_map; 905 atomic_t apic_map_dirty; 906 907 bool apic_access_page_done; 908 unsigned long apicv_inhibit_reasons; 909 910 gpa_t wall_clock; 911 912 bool mwait_in_guest; 913 bool hlt_in_guest; 914 bool pause_in_guest; 915 bool cstate_in_guest; 916 917 unsigned long irq_sources_bitmap; 918 s64 kvmclock_offset; 919 raw_spinlock_t tsc_write_lock; 920 u64 last_tsc_nsec; 921 u64 last_tsc_write; 922 u32 last_tsc_khz; 923 u64 cur_tsc_nsec; 924 u64 cur_tsc_write; 925 u64 cur_tsc_offset; 926 u64 cur_tsc_generation; 927 int nr_vcpus_matched_tsc; 928 929 spinlock_t pvclock_gtod_sync_lock; 930 bool use_master_clock; 931 u64 master_kernel_ns; 932 u64 master_cycle_now; 933 struct delayed_work kvmclock_update_work; 934 struct delayed_work kvmclock_sync_work; 935 936 struct kvm_xen_hvm_config xen_hvm_config; 937 938 /* reads protected by irq_srcu, writes by irq_lock */ 939 struct hlist_head mask_notifier_list; 940 941 struct kvm_hv hyperv; 942 943 #ifdef CONFIG_KVM_MMU_AUDIT 944 int audit_point; 945 #endif 946 947 bool backwards_tsc_observed; 948 bool boot_vcpu_runs_old_kvmclock; 949 u32 bsp_vcpu_id; 950 951 u64 disabled_quirks; 952 953 enum kvm_irqchip_mode irqchip_mode; 954 u8 nr_reserved_ioapic_pins; 955 956 bool disabled_lapic_found; 957 958 bool x2apic_format; 959 bool x2apic_broadcast_quirk_disabled; 960 961 bool guest_can_read_msr_platform_info; 962 bool exception_payload_enabled; 963 964 struct kvm_pmu_event_filter *pmu_event_filter; 965 struct task_struct *nx_lpage_recovery_thread; 966 }; 967 968 struct kvm_vm_stat { 969 ulong mmu_shadow_zapped; 970 ulong mmu_pte_write; 971 ulong mmu_pte_updated; 972 ulong mmu_pde_zapped; 973 ulong mmu_flooded; 974 ulong mmu_recycled; 975 ulong mmu_cache_miss; 976 ulong mmu_unsync; 977 ulong remote_tlb_flush; 978 ulong lpages; 979 ulong nx_lpage_splits; 980 ulong max_mmu_page_hash_collisions; 981 }; 982 983 struct kvm_vcpu_stat { 984 u64 pf_fixed; 985 u64 pf_guest; 986 u64 tlb_flush; 987 u64 invlpg; 988 989 u64 exits; 990 u64 io_exits; 991 u64 mmio_exits; 992 u64 signal_exits; 993 u64 irq_window_exits; 994 u64 nmi_window_exits; 995 u64 l1d_flush; 996 u64 halt_exits; 997 u64 halt_successful_poll; 998 u64 halt_attempted_poll; 999 u64 halt_poll_invalid; 1000 u64 halt_wakeup; 1001 u64 request_irq_exits; 1002 u64 irq_exits; 1003 u64 host_state_reload; 1004 u64 fpu_reload; 1005 u64 insn_emulation; 1006 u64 insn_emulation_fail; 1007 u64 hypercalls; 1008 u64 irq_injections; 1009 u64 nmi_injections; 1010 u64 req_event; 1011 u64 halt_poll_success_ns; 1012 u64 halt_poll_fail_ns; 1013 }; 1014 1015 struct x86_instruction_info; 1016 1017 struct msr_data { 1018 bool host_initiated; 1019 u32 index; 1020 u64 data; 1021 }; 1022 1023 struct kvm_lapic_irq { 1024 u32 vector; 1025 u16 delivery_mode; 1026 u16 dest_mode; 1027 bool level; 1028 u16 trig_mode; 1029 u32 shorthand; 1030 u32 dest_id; 1031 bool msi_redir_hint; 1032 }; 1033 1034 static inline u16 kvm_lapic_irq_dest_mode(bool dest_mode_logical) 1035 { 1036 return dest_mode_logical ? APIC_DEST_LOGICAL : APIC_DEST_PHYSICAL; 1037 } 1038 1039 struct kvm_x86_ops { 1040 int (*hardware_enable)(void); 1041 void (*hardware_disable)(void); 1042 void (*hardware_unsetup)(void); 1043 bool (*cpu_has_accelerated_tpr)(void); 1044 bool (*has_emulated_msr)(u32 index); 1045 void (*vcpu_after_set_cpuid)(struct kvm_vcpu *vcpu); 1046 1047 unsigned int vm_size; 1048 int (*vm_init)(struct kvm *kvm); 1049 void (*vm_destroy)(struct kvm *kvm); 1050 1051 /* Create, but do not attach this VCPU */ 1052 int (*vcpu_create)(struct kvm_vcpu *vcpu); 1053 void (*vcpu_free)(struct kvm_vcpu *vcpu); 1054 void (*vcpu_reset)(struct kvm_vcpu *vcpu, bool init_event); 1055 1056 void (*prepare_guest_switch)(struct kvm_vcpu *vcpu); 1057 void (*vcpu_load)(struct kvm_vcpu *vcpu, int cpu); 1058 void (*vcpu_put)(struct kvm_vcpu *vcpu); 1059 1060 void (*update_exception_bitmap)(struct kvm_vcpu *vcpu); 1061 int (*get_msr)(struct kvm_vcpu *vcpu, struct msr_data *msr); 1062 int (*set_msr)(struct kvm_vcpu *vcpu, struct msr_data *msr); 1063 u64 (*get_segment_base)(struct kvm_vcpu *vcpu, int seg); 1064 void (*get_segment)(struct kvm_vcpu *vcpu, 1065 struct kvm_segment *var, int seg); 1066 int (*get_cpl)(struct kvm_vcpu *vcpu); 1067 void (*set_segment)(struct kvm_vcpu *vcpu, 1068 struct kvm_segment *var, int seg); 1069 void (*get_cs_db_l_bits)(struct kvm_vcpu *vcpu, int *db, int *l); 1070 void (*set_cr0)(struct kvm_vcpu *vcpu, unsigned long cr0); 1071 int (*set_cr4)(struct kvm_vcpu *vcpu, unsigned long cr4); 1072 void (*set_efer)(struct kvm_vcpu *vcpu, u64 efer); 1073 void (*get_idt)(struct kvm_vcpu *vcpu, struct desc_ptr *dt); 1074 void (*set_idt)(struct kvm_vcpu *vcpu, struct desc_ptr *dt); 1075 void (*get_gdt)(struct kvm_vcpu *vcpu, struct desc_ptr *dt); 1076 void (*set_gdt)(struct kvm_vcpu *vcpu, struct desc_ptr *dt); 1077 void (*sync_dirty_debug_regs)(struct kvm_vcpu *vcpu); 1078 void (*set_dr7)(struct kvm_vcpu *vcpu, unsigned long value); 1079 void (*cache_reg)(struct kvm_vcpu *vcpu, enum kvm_reg reg); 1080 unsigned long (*get_rflags)(struct kvm_vcpu *vcpu); 1081 void (*set_rflags)(struct kvm_vcpu *vcpu, unsigned long rflags); 1082 1083 void (*tlb_flush_all)(struct kvm_vcpu *vcpu); 1084 void (*tlb_flush_current)(struct kvm_vcpu *vcpu); 1085 int (*tlb_remote_flush)(struct kvm *kvm); 1086 int (*tlb_remote_flush_with_range)(struct kvm *kvm, 1087 struct kvm_tlb_range *range); 1088 1089 /* 1090 * Flush any TLB entries associated with the given GVA. 1091 * Does not need to flush GPA->HPA mappings. 1092 * Can potentially get non-canonical addresses through INVLPGs, which 1093 * the implementation may choose to ignore if appropriate. 1094 */ 1095 void (*tlb_flush_gva)(struct kvm_vcpu *vcpu, gva_t addr); 1096 1097 /* 1098 * Flush any TLB entries created by the guest. Like tlb_flush_gva(), 1099 * does not need to flush GPA->HPA mappings. 1100 */ 1101 void (*tlb_flush_guest)(struct kvm_vcpu *vcpu); 1102 1103 enum exit_fastpath_completion (*run)(struct kvm_vcpu *vcpu); 1104 int (*handle_exit)(struct kvm_vcpu *vcpu, 1105 enum exit_fastpath_completion exit_fastpath); 1106 int (*skip_emulated_instruction)(struct kvm_vcpu *vcpu); 1107 void (*update_emulated_instruction)(struct kvm_vcpu *vcpu); 1108 void (*set_interrupt_shadow)(struct kvm_vcpu *vcpu, int mask); 1109 u32 (*get_interrupt_shadow)(struct kvm_vcpu *vcpu); 1110 void (*patch_hypercall)(struct kvm_vcpu *vcpu, 1111 unsigned char *hypercall_addr); 1112 void (*set_irq)(struct kvm_vcpu *vcpu); 1113 void (*set_nmi)(struct kvm_vcpu *vcpu); 1114 void (*queue_exception)(struct kvm_vcpu *vcpu); 1115 void (*cancel_injection)(struct kvm_vcpu *vcpu); 1116 int (*interrupt_allowed)(struct kvm_vcpu *vcpu, bool for_injection); 1117 int (*nmi_allowed)(struct kvm_vcpu *vcpu, bool for_injection); 1118 bool (*get_nmi_mask)(struct kvm_vcpu *vcpu); 1119 void (*set_nmi_mask)(struct kvm_vcpu *vcpu, bool masked); 1120 void (*enable_nmi_window)(struct kvm_vcpu *vcpu); 1121 void (*enable_irq_window)(struct kvm_vcpu *vcpu); 1122 void (*update_cr8_intercept)(struct kvm_vcpu *vcpu, int tpr, int irr); 1123 bool (*check_apicv_inhibit_reasons)(ulong bit); 1124 void (*pre_update_apicv_exec_ctrl)(struct kvm *kvm, bool activate); 1125 void (*refresh_apicv_exec_ctrl)(struct kvm_vcpu *vcpu); 1126 void (*hwapic_irr_update)(struct kvm_vcpu *vcpu, int max_irr); 1127 void (*hwapic_isr_update)(struct kvm_vcpu *vcpu, int isr); 1128 bool (*guest_apic_has_interrupt)(struct kvm_vcpu *vcpu); 1129 void (*load_eoi_exitmap)(struct kvm_vcpu *vcpu, u64 *eoi_exit_bitmap); 1130 void (*set_virtual_apic_mode)(struct kvm_vcpu *vcpu); 1131 void (*set_apic_access_page_addr)(struct kvm_vcpu *vcpu); 1132 int (*deliver_posted_interrupt)(struct kvm_vcpu *vcpu, int vector); 1133 int (*sync_pir_to_irr)(struct kvm_vcpu *vcpu); 1134 int (*set_tss_addr)(struct kvm *kvm, unsigned int addr); 1135 int (*set_identity_map_addr)(struct kvm *kvm, u64 ident_addr); 1136 u64 (*get_mt_mask)(struct kvm_vcpu *vcpu, gfn_t gfn, bool is_mmio); 1137 1138 void (*load_mmu_pgd)(struct kvm_vcpu *vcpu, unsigned long pgd, 1139 int pgd_level); 1140 1141 bool (*has_wbinvd_exit)(void); 1142 1143 /* Returns actual tsc_offset set in active VMCS */ 1144 u64 (*write_l1_tsc_offset)(struct kvm_vcpu *vcpu, u64 offset); 1145 1146 void (*get_exit_info)(struct kvm_vcpu *vcpu, u64 *info1, u64 *info2); 1147 1148 int (*check_intercept)(struct kvm_vcpu *vcpu, 1149 struct x86_instruction_info *info, 1150 enum x86_intercept_stage stage, 1151 struct x86_exception *exception); 1152 void (*handle_exit_irqoff)(struct kvm_vcpu *vcpu); 1153 1154 void (*request_immediate_exit)(struct kvm_vcpu *vcpu); 1155 1156 void (*sched_in)(struct kvm_vcpu *kvm, int cpu); 1157 1158 /* 1159 * Arch-specific dirty logging hooks. These hooks are only supposed to 1160 * be valid if the specific arch has hardware-accelerated dirty logging 1161 * mechanism. Currently only for PML on VMX. 1162 * 1163 * - slot_enable_log_dirty: 1164 * called when enabling log dirty mode for the slot. 1165 * - slot_disable_log_dirty: 1166 * called when disabling log dirty mode for the slot. 1167 * also called when slot is created with log dirty disabled. 1168 * - flush_log_dirty: 1169 * called before reporting dirty_bitmap to userspace. 1170 * - enable_log_dirty_pt_masked: 1171 * called when reenabling log dirty for the GFNs in the mask after 1172 * corresponding bits are cleared in slot->dirty_bitmap. 1173 */ 1174 void (*slot_enable_log_dirty)(struct kvm *kvm, 1175 struct kvm_memory_slot *slot); 1176 void (*slot_disable_log_dirty)(struct kvm *kvm, 1177 struct kvm_memory_slot *slot); 1178 void (*flush_log_dirty)(struct kvm *kvm); 1179 void (*enable_log_dirty_pt_masked)(struct kvm *kvm, 1180 struct kvm_memory_slot *slot, 1181 gfn_t offset, unsigned long mask); 1182 1183 /* pmu operations of sub-arch */ 1184 const struct kvm_pmu_ops *pmu_ops; 1185 const struct kvm_x86_nested_ops *nested_ops; 1186 1187 /* 1188 * Architecture specific hooks for vCPU blocking due to 1189 * HLT instruction. 1190 * Returns for .pre_block(): 1191 * - 0 means continue to block the vCPU. 1192 * - 1 means we cannot block the vCPU since some event 1193 * happens during this period, such as, 'ON' bit in 1194 * posted-interrupts descriptor is set. 1195 */ 1196 int (*pre_block)(struct kvm_vcpu *vcpu); 1197 void (*post_block)(struct kvm_vcpu *vcpu); 1198 1199 void (*vcpu_blocking)(struct kvm_vcpu *vcpu); 1200 void (*vcpu_unblocking)(struct kvm_vcpu *vcpu); 1201 1202 int (*update_pi_irte)(struct kvm *kvm, unsigned int host_irq, 1203 uint32_t guest_irq, bool set); 1204 void (*apicv_post_state_restore)(struct kvm_vcpu *vcpu); 1205 bool (*dy_apicv_has_pending_interrupt)(struct kvm_vcpu *vcpu); 1206 1207 int (*set_hv_timer)(struct kvm_vcpu *vcpu, u64 guest_deadline_tsc, 1208 bool *expired); 1209 void (*cancel_hv_timer)(struct kvm_vcpu *vcpu); 1210 1211 void (*setup_mce)(struct kvm_vcpu *vcpu); 1212 1213 int (*smi_allowed)(struct kvm_vcpu *vcpu, bool for_injection); 1214 int (*pre_enter_smm)(struct kvm_vcpu *vcpu, char *smstate); 1215 int (*pre_leave_smm)(struct kvm_vcpu *vcpu, const char *smstate); 1216 void (*enable_smi_window)(struct kvm_vcpu *vcpu); 1217 1218 int (*mem_enc_op)(struct kvm *kvm, void __user *argp); 1219 int (*mem_enc_reg_region)(struct kvm *kvm, struct kvm_enc_region *argp); 1220 int (*mem_enc_unreg_region)(struct kvm *kvm, struct kvm_enc_region *argp); 1221 1222 int (*get_msr_feature)(struct kvm_msr_entry *entry); 1223 1224 bool (*need_emulation_on_page_fault)(struct kvm_vcpu *vcpu); 1225 1226 bool (*apic_init_signal_blocked)(struct kvm_vcpu *vcpu); 1227 int (*enable_direct_tlbflush)(struct kvm_vcpu *vcpu); 1228 1229 void (*migrate_timers)(struct kvm_vcpu *vcpu); 1230 }; 1231 1232 struct kvm_x86_nested_ops { 1233 int (*check_events)(struct kvm_vcpu *vcpu); 1234 bool (*hv_timer_pending)(struct kvm_vcpu *vcpu); 1235 int (*get_state)(struct kvm_vcpu *vcpu, 1236 struct kvm_nested_state __user *user_kvm_nested_state, 1237 unsigned user_data_size); 1238 int (*set_state)(struct kvm_vcpu *vcpu, 1239 struct kvm_nested_state __user *user_kvm_nested_state, 1240 struct kvm_nested_state *kvm_state); 1241 bool (*get_vmcs12_pages)(struct kvm_vcpu *vcpu); 1242 int (*write_log_dirty)(struct kvm_vcpu *vcpu, gpa_t l2_gpa); 1243 1244 int (*enable_evmcs)(struct kvm_vcpu *vcpu, 1245 uint16_t *vmcs_version); 1246 uint16_t (*get_evmcs_version)(struct kvm_vcpu *vcpu); 1247 }; 1248 1249 struct kvm_x86_init_ops { 1250 int (*cpu_has_kvm_support)(void); 1251 int (*disabled_by_bios)(void); 1252 int (*check_processor_compatibility)(void); 1253 int (*hardware_setup)(void); 1254 1255 struct kvm_x86_ops *runtime_ops; 1256 }; 1257 1258 struct kvm_arch_async_pf { 1259 u32 token; 1260 gfn_t gfn; 1261 unsigned long cr3; 1262 bool direct_map; 1263 }; 1264 1265 extern u64 __read_mostly host_efer; 1266 extern bool __read_mostly allow_smaller_maxphyaddr; 1267 extern struct kvm_x86_ops kvm_x86_ops; 1268 1269 #define __KVM_HAVE_ARCH_VM_ALLOC 1270 static inline struct kvm *kvm_arch_alloc_vm(void) 1271 { 1272 return __vmalloc(kvm_x86_ops.vm_size, GFP_KERNEL_ACCOUNT | __GFP_ZERO); 1273 } 1274 void kvm_arch_free_vm(struct kvm *kvm); 1275 1276 #define __KVM_HAVE_ARCH_FLUSH_REMOTE_TLB 1277 static inline int kvm_arch_flush_remote_tlb(struct kvm *kvm) 1278 { 1279 if (kvm_x86_ops.tlb_remote_flush && 1280 !kvm_x86_ops.tlb_remote_flush(kvm)) 1281 return 0; 1282 else 1283 return -ENOTSUPP; 1284 } 1285 1286 int kvm_mmu_module_init(void); 1287 void kvm_mmu_module_exit(void); 1288 1289 void kvm_mmu_destroy(struct kvm_vcpu *vcpu); 1290 int kvm_mmu_create(struct kvm_vcpu *vcpu); 1291 void kvm_mmu_init_vm(struct kvm *kvm); 1292 void kvm_mmu_uninit_vm(struct kvm *kvm); 1293 void kvm_mmu_set_mask_ptes(u64 user_mask, u64 accessed_mask, 1294 u64 dirty_mask, u64 nx_mask, u64 x_mask, u64 p_mask, 1295 u64 acc_track_mask, u64 me_mask); 1296 1297 void kvm_mmu_reset_context(struct kvm_vcpu *vcpu); 1298 void kvm_mmu_slot_remove_write_access(struct kvm *kvm, 1299 struct kvm_memory_slot *memslot, 1300 int start_level); 1301 void kvm_mmu_zap_collapsible_sptes(struct kvm *kvm, 1302 const struct kvm_memory_slot *memslot); 1303 void kvm_mmu_slot_leaf_clear_dirty(struct kvm *kvm, 1304 struct kvm_memory_slot *memslot); 1305 void kvm_mmu_slot_largepage_remove_write_access(struct kvm *kvm, 1306 struct kvm_memory_slot *memslot); 1307 void kvm_mmu_slot_set_dirty(struct kvm *kvm, 1308 struct kvm_memory_slot *memslot); 1309 void kvm_mmu_clear_dirty_pt_masked(struct kvm *kvm, 1310 struct kvm_memory_slot *slot, 1311 gfn_t gfn_offset, unsigned long mask); 1312 void kvm_mmu_zap_all(struct kvm *kvm); 1313 void kvm_mmu_invalidate_mmio_sptes(struct kvm *kvm, u64 gen); 1314 unsigned long kvm_mmu_calculate_default_mmu_pages(struct kvm *kvm); 1315 void kvm_mmu_change_mmu_pages(struct kvm *kvm, unsigned long kvm_nr_mmu_pages); 1316 1317 int load_pdptrs(struct kvm_vcpu *vcpu, struct kvm_mmu *mmu, unsigned long cr3); 1318 bool pdptrs_changed(struct kvm_vcpu *vcpu); 1319 1320 int emulator_write_phys(struct kvm_vcpu *vcpu, gpa_t gpa, 1321 const void *val, int bytes); 1322 1323 struct kvm_irq_mask_notifier { 1324 void (*func)(struct kvm_irq_mask_notifier *kimn, bool masked); 1325 int irq; 1326 struct hlist_node link; 1327 }; 1328 1329 void kvm_register_irq_mask_notifier(struct kvm *kvm, int irq, 1330 struct kvm_irq_mask_notifier *kimn); 1331 void kvm_unregister_irq_mask_notifier(struct kvm *kvm, int irq, 1332 struct kvm_irq_mask_notifier *kimn); 1333 void kvm_fire_mask_notifiers(struct kvm *kvm, unsigned irqchip, unsigned pin, 1334 bool mask); 1335 1336 extern bool tdp_enabled; 1337 1338 u64 vcpu_tsc_khz(struct kvm_vcpu *vcpu); 1339 1340 /* control of guest tsc rate supported? */ 1341 extern bool kvm_has_tsc_control; 1342 /* maximum supported tsc_khz for guests */ 1343 extern u32 kvm_max_guest_tsc_khz; 1344 /* number of bits of the fractional part of the TSC scaling ratio */ 1345 extern u8 kvm_tsc_scaling_ratio_frac_bits; 1346 /* maximum allowed value of TSC scaling ratio */ 1347 extern u64 kvm_max_tsc_scaling_ratio; 1348 /* 1ull << kvm_tsc_scaling_ratio_frac_bits */ 1349 extern u64 kvm_default_tsc_scaling_ratio; 1350 1351 extern u64 kvm_mce_cap_supported; 1352 1353 /* 1354 * EMULTYPE_NO_DECODE - Set when re-emulating an instruction (after completing 1355 * userspace I/O) to indicate that the emulation context 1356 * should be resued as is, i.e. skip initialization of 1357 * emulation context, instruction fetch and decode. 1358 * 1359 * EMULTYPE_TRAP_UD - Set when emulating an intercepted #UD from hardware. 1360 * Indicates that only select instructions (tagged with 1361 * EmulateOnUD) should be emulated (to minimize the emulator 1362 * attack surface). See also EMULTYPE_TRAP_UD_FORCED. 1363 * 1364 * EMULTYPE_SKIP - Set when emulating solely to skip an instruction, i.e. to 1365 * decode the instruction length. For use *only* by 1366 * kvm_x86_ops.skip_emulated_instruction() implementations. 1367 * 1368 * EMULTYPE_ALLOW_RETRY_PF - Set when the emulator should resume the guest to 1369 * retry native execution under certain conditions, 1370 * Can only be set in conjunction with EMULTYPE_PF. 1371 * 1372 * EMULTYPE_TRAP_UD_FORCED - Set when emulating an intercepted #UD that was 1373 * triggered by KVM's magic "force emulation" prefix, 1374 * which is opt in via module param (off by default). 1375 * Bypasses EmulateOnUD restriction despite emulating 1376 * due to an intercepted #UD (see EMULTYPE_TRAP_UD). 1377 * Used to test the full emulator from userspace. 1378 * 1379 * EMULTYPE_VMWARE_GP - Set when emulating an intercepted #GP for VMware 1380 * backdoor emulation, which is opt in via module param. 1381 * VMware backoor emulation handles select instructions 1382 * and reinjects the #GP for all other cases. 1383 * 1384 * EMULTYPE_PF - Set when emulating MMIO by way of an intercepted #PF, in which 1385 * case the CR2/GPA value pass on the stack is valid. 1386 */ 1387 #define EMULTYPE_NO_DECODE (1 << 0) 1388 #define EMULTYPE_TRAP_UD (1 << 1) 1389 #define EMULTYPE_SKIP (1 << 2) 1390 #define EMULTYPE_ALLOW_RETRY_PF (1 << 3) 1391 #define EMULTYPE_TRAP_UD_FORCED (1 << 4) 1392 #define EMULTYPE_VMWARE_GP (1 << 5) 1393 #define EMULTYPE_PF (1 << 6) 1394 1395 int kvm_emulate_instruction(struct kvm_vcpu *vcpu, int emulation_type); 1396 int kvm_emulate_instruction_from_buffer(struct kvm_vcpu *vcpu, 1397 void *insn, int insn_len); 1398 1399 void kvm_enable_efer_bits(u64); 1400 bool kvm_valid_efer(struct kvm_vcpu *vcpu, u64 efer); 1401 int __kvm_get_msr(struct kvm_vcpu *vcpu, u32 index, u64 *data, bool host_initiated); 1402 int kvm_get_msr(struct kvm_vcpu *vcpu, u32 index, u64 *data); 1403 int kvm_set_msr(struct kvm_vcpu *vcpu, u32 index, u64 data); 1404 int kvm_emulate_rdmsr(struct kvm_vcpu *vcpu); 1405 int kvm_emulate_wrmsr(struct kvm_vcpu *vcpu); 1406 1407 int kvm_fast_pio(struct kvm_vcpu *vcpu, int size, unsigned short port, int in); 1408 int kvm_emulate_cpuid(struct kvm_vcpu *vcpu); 1409 int kvm_emulate_halt(struct kvm_vcpu *vcpu); 1410 int kvm_vcpu_halt(struct kvm_vcpu *vcpu); 1411 int kvm_emulate_wbinvd(struct kvm_vcpu *vcpu); 1412 1413 void kvm_get_segment(struct kvm_vcpu *vcpu, struct kvm_segment *var, int seg); 1414 int kvm_load_segment_descriptor(struct kvm_vcpu *vcpu, u16 selector, int seg); 1415 void kvm_vcpu_deliver_sipi_vector(struct kvm_vcpu *vcpu, u8 vector); 1416 1417 int kvm_task_switch(struct kvm_vcpu *vcpu, u16 tss_selector, int idt_index, 1418 int reason, bool has_error_code, u32 error_code); 1419 1420 int kvm_set_cr0(struct kvm_vcpu *vcpu, unsigned long cr0); 1421 int kvm_set_cr3(struct kvm_vcpu *vcpu, unsigned long cr3); 1422 int kvm_set_cr4(struct kvm_vcpu *vcpu, unsigned long cr4); 1423 int kvm_set_cr8(struct kvm_vcpu *vcpu, unsigned long cr8); 1424 int kvm_set_dr(struct kvm_vcpu *vcpu, int dr, unsigned long val); 1425 int kvm_get_dr(struct kvm_vcpu *vcpu, int dr, unsigned long *val); 1426 unsigned long kvm_get_cr8(struct kvm_vcpu *vcpu); 1427 void kvm_lmsw(struct kvm_vcpu *vcpu, unsigned long msw); 1428 void kvm_get_cs_db_l_bits(struct kvm_vcpu *vcpu, int *db, int *l); 1429 int kvm_set_xcr(struct kvm_vcpu *vcpu, u32 index, u64 xcr); 1430 1431 int kvm_get_msr_common(struct kvm_vcpu *vcpu, struct msr_data *msr); 1432 int kvm_set_msr_common(struct kvm_vcpu *vcpu, struct msr_data *msr); 1433 1434 unsigned long kvm_get_rflags(struct kvm_vcpu *vcpu); 1435 void kvm_set_rflags(struct kvm_vcpu *vcpu, unsigned long rflags); 1436 bool kvm_rdpmc(struct kvm_vcpu *vcpu); 1437 1438 void kvm_queue_exception(struct kvm_vcpu *vcpu, unsigned nr); 1439 void kvm_queue_exception_e(struct kvm_vcpu *vcpu, unsigned nr, u32 error_code); 1440 void kvm_queue_exception_p(struct kvm_vcpu *vcpu, unsigned nr, unsigned long payload); 1441 void kvm_requeue_exception(struct kvm_vcpu *vcpu, unsigned nr); 1442 void kvm_requeue_exception_e(struct kvm_vcpu *vcpu, unsigned nr, u32 error_code); 1443 void kvm_inject_page_fault(struct kvm_vcpu *vcpu, struct x86_exception *fault); 1444 bool kvm_inject_emulated_page_fault(struct kvm_vcpu *vcpu, 1445 struct x86_exception *fault); 1446 int kvm_read_guest_page_mmu(struct kvm_vcpu *vcpu, struct kvm_mmu *mmu, 1447 gfn_t gfn, void *data, int offset, int len, 1448 u32 access); 1449 bool kvm_require_cpl(struct kvm_vcpu *vcpu, int required_cpl); 1450 bool kvm_require_dr(struct kvm_vcpu *vcpu, int dr); 1451 1452 static inline int __kvm_irq_line_state(unsigned long *irq_state, 1453 int irq_source_id, int level) 1454 { 1455 /* Logical OR for level trig interrupt */ 1456 if (level) 1457 __set_bit(irq_source_id, irq_state); 1458 else 1459 __clear_bit(irq_source_id, irq_state); 1460 1461 return !!(*irq_state); 1462 } 1463 1464 #define KVM_MMU_ROOT_CURRENT BIT(0) 1465 #define KVM_MMU_ROOT_PREVIOUS(i) BIT(1+i) 1466 #define KVM_MMU_ROOTS_ALL (~0UL) 1467 1468 int kvm_pic_set_irq(struct kvm_pic *pic, int irq, int irq_source_id, int level); 1469 void kvm_pic_clear_all(struct kvm_pic *pic, int irq_source_id); 1470 1471 void kvm_inject_nmi(struct kvm_vcpu *vcpu); 1472 1473 void kvm_update_dr7(struct kvm_vcpu *vcpu); 1474 1475 int kvm_mmu_unprotect_page(struct kvm *kvm, gfn_t gfn); 1476 int kvm_mmu_unprotect_page_virt(struct kvm_vcpu *vcpu, gva_t gva); 1477 void __kvm_mmu_free_some_pages(struct kvm_vcpu *vcpu); 1478 int kvm_mmu_load(struct kvm_vcpu *vcpu); 1479 void kvm_mmu_unload(struct kvm_vcpu *vcpu); 1480 void kvm_mmu_sync_roots(struct kvm_vcpu *vcpu); 1481 void kvm_mmu_free_roots(struct kvm_vcpu *vcpu, struct kvm_mmu *mmu, 1482 ulong roots_to_free); 1483 gpa_t translate_nested_gpa(struct kvm_vcpu *vcpu, gpa_t gpa, u32 access, 1484 struct x86_exception *exception); 1485 gpa_t kvm_mmu_gva_to_gpa_read(struct kvm_vcpu *vcpu, gva_t gva, 1486 struct x86_exception *exception); 1487 gpa_t kvm_mmu_gva_to_gpa_fetch(struct kvm_vcpu *vcpu, gva_t gva, 1488 struct x86_exception *exception); 1489 gpa_t kvm_mmu_gva_to_gpa_write(struct kvm_vcpu *vcpu, gva_t gva, 1490 struct x86_exception *exception); 1491 gpa_t kvm_mmu_gva_to_gpa_system(struct kvm_vcpu *vcpu, gva_t gva, 1492 struct x86_exception *exception); 1493 1494 bool kvm_apicv_activated(struct kvm *kvm); 1495 void kvm_apicv_init(struct kvm *kvm, bool enable); 1496 void kvm_vcpu_update_apicv(struct kvm_vcpu *vcpu); 1497 void kvm_request_apicv_update(struct kvm *kvm, bool activate, 1498 unsigned long bit); 1499 1500 int kvm_emulate_hypercall(struct kvm_vcpu *vcpu); 1501 1502 int kvm_mmu_page_fault(struct kvm_vcpu *vcpu, gpa_t cr2_or_gpa, u64 error_code, 1503 void *insn, int insn_len); 1504 void kvm_mmu_invlpg(struct kvm_vcpu *vcpu, gva_t gva); 1505 void kvm_mmu_invalidate_gva(struct kvm_vcpu *vcpu, struct kvm_mmu *mmu, 1506 gva_t gva, hpa_t root_hpa); 1507 void kvm_mmu_invpcid_gva(struct kvm_vcpu *vcpu, gva_t gva, unsigned long pcid); 1508 void kvm_mmu_new_pgd(struct kvm_vcpu *vcpu, gpa_t new_pgd, bool skip_tlb_flush, 1509 bool skip_mmu_sync); 1510 1511 void kvm_configure_mmu(bool enable_tdp, int tdp_max_root_level, 1512 int tdp_huge_page_level); 1513 1514 static inline u16 kvm_read_ldt(void) 1515 { 1516 u16 ldt; 1517 asm("sldt %0" : "=g"(ldt)); 1518 return ldt; 1519 } 1520 1521 static inline void kvm_load_ldt(u16 sel) 1522 { 1523 asm("lldt %0" : : "rm"(sel)); 1524 } 1525 1526 #ifdef CONFIG_X86_64 1527 static inline unsigned long read_msr(unsigned long msr) 1528 { 1529 u64 value; 1530 1531 rdmsrl(msr, value); 1532 return value; 1533 } 1534 #endif 1535 1536 static inline u32 get_rdx_init_val(void) 1537 { 1538 return 0x600; /* P6 family */ 1539 } 1540 1541 static inline void kvm_inject_gp(struct kvm_vcpu *vcpu, u32 error_code) 1542 { 1543 kvm_queue_exception_e(vcpu, GP_VECTOR, error_code); 1544 } 1545 1546 #define TSS_IOPB_BASE_OFFSET 0x66 1547 #define TSS_BASE_SIZE 0x68 1548 #define TSS_IOPB_SIZE (65536 / 8) 1549 #define TSS_REDIRECTION_SIZE (256 / 8) 1550 #define RMODE_TSS_SIZE \ 1551 (TSS_BASE_SIZE + TSS_REDIRECTION_SIZE + TSS_IOPB_SIZE + 1) 1552 1553 enum { 1554 TASK_SWITCH_CALL = 0, 1555 TASK_SWITCH_IRET = 1, 1556 TASK_SWITCH_JMP = 2, 1557 TASK_SWITCH_GATE = 3, 1558 }; 1559 1560 #define HF_GIF_MASK (1 << 0) 1561 #define HF_NMI_MASK (1 << 3) 1562 #define HF_IRET_MASK (1 << 4) 1563 #define HF_GUEST_MASK (1 << 5) /* VCPU is in guest-mode */ 1564 #define HF_SMM_MASK (1 << 6) 1565 #define HF_SMM_INSIDE_NMI_MASK (1 << 7) 1566 1567 #define __KVM_VCPU_MULTIPLE_ADDRESS_SPACE 1568 #define KVM_ADDRESS_SPACE_NUM 2 1569 1570 #define kvm_arch_vcpu_memslots_id(vcpu) ((vcpu)->arch.hflags & HF_SMM_MASK ? 1 : 0) 1571 #define kvm_memslots_for_spte_role(kvm, role) __kvm_memslots(kvm, (role).smm) 1572 1573 asmlinkage void kvm_spurious_fault(void); 1574 1575 /* 1576 * Hardware virtualization extension instructions may fault if a 1577 * reboot turns off virtualization while processes are running. 1578 * Usually after catching the fault we just panic; during reboot 1579 * instead the instruction is ignored. 1580 */ 1581 #define __kvm_handle_fault_on_reboot(insn) \ 1582 "666: \n\t" \ 1583 insn "\n\t" \ 1584 "jmp 668f \n\t" \ 1585 "667: \n\t" \ 1586 "1: \n\t" \ 1587 ".pushsection .discard.instr_begin \n\t" \ 1588 ".long 1b - . \n\t" \ 1589 ".popsection \n\t" \ 1590 "call kvm_spurious_fault \n\t" \ 1591 "1: \n\t" \ 1592 ".pushsection .discard.instr_end \n\t" \ 1593 ".long 1b - . \n\t" \ 1594 ".popsection \n\t" \ 1595 "668: \n\t" \ 1596 _ASM_EXTABLE(666b, 667b) 1597 1598 #define KVM_ARCH_WANT_MMU_NOTIFIER 1599 int kvm_unmap_hva_range(struct kvm *kvm, unsigned long start, unsigned long end, 1600 unsigned flags); 1601 int kvm_age_hva(struct kvm *kvm, unsigned long start, unsigned long end); 1602 int kvm_test_age_hva(struct kvm *kvm, unsigned long hva); 1603 int kvm_set_spte_hva(struct kvm *kvm, unsigned long hva, pte_t pte); 1604 int kvm_cpu_has_injectable_intr(struct kvm_vcpu *v); 1605 int kvm_cpu_has_interrupt(struct kvm_vcpu *vcpu); 1606 int kvm_arch_interrupt_allowed(struct kvm_vcpu *vcpu); 1607 int kvm_cpu_get_interrupt(struct kvm_vcpu *v); 1608 void kvm_vcpu_reset(struct kvm_vcpu *vcpu, bool init_event); 1609 void kvm_vcpu_reload_apic_access_page(struct kvm_vcpu *vcpu); 1610 1611 int kvm_pv_send_ipi(struct kvm *kvm, unsigned long ipi_bitmap_low, 1612 unsigned long ipi_bitmap_high, u32 min, 1613 unsigned long icr, int op_64_bit); 1614 1615 void kvm_define_shared_msr(unsigned index, u32 msr); 1616 int kvm_set_shared_msr(unsigned index, u64 val, u64 mask); 1617 1618 u64 kvm_scale_tsc(struct kvm_vcpu *vcpu, u64 tsc); 1619 u64 kvm_read_l1_tsc(struct kvm_vcpu *vcpu, u64 host_tsc); 1620 1621 unsigned long kvm_get_linear_rip(struct kvm_vcpu *vcpu); 1622 bool kvm_is_linear_rip(struct kvm_vcpu *vcpu, unsigned long linear_rip); 1623 1624 void kvm_make_mclock_inprogress_request(struct kvm *kvm); 1625 void kvm_make_scan_ioapic_request(struct kvm *kvm); 1626 void kvm_make_scan_ioapic_request_mask(struct kvm *kvm, 1627 unsigned long *vcpu_bitmap); 1628 1629 bool kvm_arch_async_page_not_present(struct kvm_vcpu *vcpu, 1630 struct kvm_async_pf *work); 1631 void kvm_arch_async_page_present(struct kvm_vcpu *vcpu, 1632 struct kvm_async_pf *work); 1633 void kvm_arch_async_page_ready(struct kvm_vcpu *vcpu, 1634 struct kvm_async_pf *work); 1635 void kvm_arch_async_page_present_queued(struct kvm_vcpu *vcpu); 1636 bool kvm_arch_can_dequeue_async_page_present(struct kvm_vcpu *vcpu); 1637 extern bool kvm_find_async_pf_gfn(struct kvm_vcpu *vcpu, gfn_t gfn); 1638 1639 int kvm_skip_emulated_instruction(struct kvm_vcpu *vcpu); 1640 int kvm_complete_insn_gp(struct kvm_vcpu *vcpu, int err); 1641 void __kvm_request_immediate_exit(struct kvm_vcpu *vcpu); 1642 1643 int kvm_is_in_guest(void); 1644 1645 int __x86_set_memory_region(struct kvm *kvm, int id, gpa_t gpa, u32 size); 1646 bool kvm_vcpu_is_reset_bsp(struct kvm_vcpu *vcpu); 1647 bool kvm_vcpu_is_bsp(struct kvm_vcpu *vcpu); 1648 1649 bool kvm_intr_is_single_vcpu(struct kvm *kvm, struct kvm_lapic_irq *irq, 1650 struct kvm_vcpu **dest_vcpu); 1651 1652 void kvm_set_msi_irq(struct kvm *kvm, struct kvm_kernel_irq_routing_entry *e, 1653 struct kvm_lapic_irq *irq); 1654 1655 static inline bool kvm_irq_is_postable(struct kvm_lapic_irq *irq) 1656 { 1657 /* We can only post Fixed and LowPrio IRQs */ 1658 return (irq->delivery_mode == APIC_DM_FIXED || 1659 irq->delivery_mode == APIC_DM_LOWEST); 1660 } 1661 1662 static inline void kvm_arch_vcpu_blocking(struct kvm_vcpu *vcpu) 1663 { 1664 if (kvm_x86_ops.vcpu_blocking) 1665 kvm_x86_ops.vcpu_blocking(vcpu); 1666 } 1667 1668 static inline void kvm_arch_vcpu_unblocking(struct kvm_vcpu *vcpu) 1669 { 1670 if (kvm_x86_ops.vcpu_unblocking) 1671 kvm_x86_ops.vcpu_unblocking(vcpu); 1672 } 1673 1674 static inline void kvm_arch_vcpu_block_finish(struct kvm_vcpu *vcpu) {} 1675 1676 static inline int kvm_cpu_get_apicid(int mps_cpu) 1677 { 1678 #ifdef CONFIG_X86_LOCAL_APIC 1679 return default_cpu_present_to_apicid(mps_cpu); 1680 #else 1681 WARN_ON_ONCE(1); 1682 return BAD_APICID; 1683 #endif 1684 } 1685 1686 #define put_smstate(type, buf, offset, val) \ 1687 *(type *)((buf) + (offset) - 0x7e00) = val 1688 1689 #define GET_SMSTATE(type, buf, offset) \ 1690 (*(type *)((buf) + (offset) - 0x7e00)) 1691 1692 #endif /* _ASM_X86_KVM_HOST_H */ 1693