xref: /openbmc/linux/arch/x86/include/asm/kvm_host.h (revision eb3fcf00)
1 /*
2  * Kernel-based Virtual Machine driver for Linux
3  *
4  * This header defines architecture specific interfaces, x86 version
5  *
6  * This work is licensed under the terms of the GNU GPL, version 2.  See
7  * the COPYING file in the top-level directory.
8  *
9  */
10 
11 #ifndef _ASM_X86_KVM_HOST_H
12 #define _ASM_X86_KVM_HOST_H
13 
14 #include <linux/types.h>
15 #include <linux/mm.h>
16 #include <linux/mmu_notifier.h>
17 #include <linux/tracepoint.h>
18 #include <linux/cpumask.h>
19 #include <linux/irq_work.h>
20 
21 #include <linux/kvm.h>
22 #include <linux/kvm_para.h>
23 #include <linux/kvm_types.h>
24 #include <linux/perf_event.h>
25 #include <linux/pvclock_gtod.h>
26 #include <linux/clocksource.h>
27 
28 #include <asm/pvclock-abi.h>
29 #include <asm/desc.h>
30 #include <asm/mtrr.h>
31 #include <asm/msr-index.h>
32 #include <asm/asm.h>
33 
34 #define KVM_MAX_VCPUS 255
35 #define KVM_SOFT_MAX_VCPUS 160
36 #define KVM_USER_MEM_SLOTS 509
37 /* memory slots that are not exposed to userspace */
38 #define KVM_PRIVATE_MEM_SLOTS 3
39 #define KVM_MEM_SLOTS_NUM (KVM_USER_MEM_SLOTS + KVM_PRIVATE_MEM_SLOTS)
40 
41 #define KVM_PIO_PAGE_OFFSET 1
42 #define KVM_COALESCED_MMIO_PAGE_OFFSET 2
43 #define KVM_HALT_POLL_NS_DEFAULT 500000
44 
45 #define KVM_IRQCHIP_NUM_PINS  KVM_IOAPIC_NUM_PINS
46 
47 #define CR0_RESERVED_BITS                                               \
48 	(~(unsigned long)(X86_CR0_PE | X86_CR0_MP | X86_CR0_EM | X86_CR0_TS \
49 			  | X86_CR0_ET | X86_CR0_NE | X86_CR0_WP | X86_CR0_AM \
50 			  | X86_CR0_NW | X86_CR0_CD | X86_CR0_PG))
51 
52 #define CR3_L_MODE_RESERVED_BITS 0xFFFFFF0000000000ULL
53 #define CR3_PCID_INVD		 BIT_64(63)
54 #define CR4_RESERVED_BITS                                               \
55 	(~(unsigned long)(X86_CR4_VME | X86_CR4_PVI | X86_CR4_TSD | X86_CR4_DE\
56 			  | X86_CR4_PSE | X86_CR4_PAE | X86_CR4_MCE     \
57 			  | X86_CR4_PGE | X86_CR4_PCE | X86_CR4_OSFXSR | X86_CR4_PCIDE \
58 			  | X86_CR4_OSXSAVE | X86_CR4_SMEP | X86_CR4_FSGSBASE \
59 			  | X86_CR4_OSXMMEXCPT | X86_CR4_VMXE | X86_CR4_SMAP))
60 
61 #define CR8_RESERVED_BITS (~(unsigned long)X86_CR8_TPR)
62 
63 
64 
65 #define INVALID_PAGE (~(hpa_t)0)
66 #define VALID_PAGE(x) ((x) != INVALID_PAGE)
67 
68 #define UNMAPPED_GVA (~(gpa_t)0)
69 
70 /* KVM Hugepage definitions for x86 */
71 #define KVM_NR_PAGE_SIZES	3
72 #define KVM_HPAGE_GFN_SHIFT(x)	(((x) - 1) * 9)
73 #define KVM_HPAGE_SHIFT(x)	(PAGE_SHIFT + KVM_HPAGE_GFN_SHIFT(x))
74 #define KVM_HPAGE_SIZE(x)	(1UL << KVM_HPAGE_SHIFT(x))
75 #define KVM_HPAGE_MASK(x)	(~(KVM_HPAGE_SIZE(x) - 1))
76 #define KVM_PAGES_PER_HPAGE(x)	(KVM_HPAGE_SIZE(x) / PAGE_SIZE)
77 
78 static inline gfn_t gfn_to_index(gfn_t gfn, gfn_t base_gfn, int level)
79 {
80 	/* KVM_HPAGE_GFN_SHIFT(PT_PAGE_TABLE_LEVEL) must be 0. */
81 	return (gfn >> KVM_HPAGE_GFN_SHIFT(level)) -
82 		(base_gfn >> KVM_HPAGE_GFN_SHIFT(level));
83 }
84 
85 #define KVM_PERMILLE_MMU_PAGES 20
86 #define KVM_MIN_ALLOC_MMU_PAGES 64
87 #define KVM_MMU_HASH_SHIFT 10
88 #define KVM_NUM_MMU_PAGES (1 << KVM_MMU_HASH_SHIFT)
89 #define KVM_MIN_FREE_MMU_PAGES 5
90 #define KVM_REFILL_PAGES 25
91 #define KVM_MAX_CPUID_ENTRIES 80
92 #define KVM_NR_FIXED_MTRR_REGION 88
93 #define KVM_NR_VAR_MTRR 8
94 
95 #define ASYNC_PF_PER_VCPU 64
96 
97 enum kvm_reg {
98 	VCPU_REGS_RAX = 0,
99 	VCPU_REGS_RCX = 1,
100 	VCPU_REGS_RDX = 2,
101 	VCPU_REGS_RBX = 3,
102 	VCPU_REGS_RSP = 4,
103 	VCPU_REGS_RBP = 5,
104 	VCPU_REGS_RSI = 6,
105 	VCPU_REGS_RDI = 7,
106 #ifdef CONFIG_X86_64
107 	VCPU_REGS_R8 = 8,
108 	VCPU_REGS_R9 = 9,
109 	VCPU_REGS_R10 = 10,
110 	VCPU_REGS_R11 = 11,
111 	VCPU_REGS_R12 = 12,
112 	VCPU_REGS_R13 = 13,
113 	VCPU_REGS_R14 = 14,
114 	VCPU_REGS_R15 = 15,
115 #endif
116 	VCPU_REGS_RIP,
117 	NR_VCPU_REGS
118 };
119 
120 enum kvm_reg_ex {
121 	VCPU_EXREG_PDPTR = NR_VCPU_REGS,
122 	VCPU_EXREG_CR3,
123 	VCPU_EXREG_RFLAGS,
124 	VCPU_EXREG_SEGMENTS,
125 };
126 
127 enum {
128 	VCPU_SREG_ES,
129 	VCPU_SREG_CS,
130 	VCPU_SREG_SS,
131 	VCPU_SREG_DS,
132 	VCPU_SREG_FS,
133 	VCPU_SREG_GS,
134 	VCPU_SREG_TR,
135 	VCPU_SREG_LDTR,
136 };
137 
138 #include <asm/kvm_emulate.h>
139 
140 #define KVM_NR_MEM_OBJS 40
141 
142 #define KVM_NR_DB_REGS	4
143 
144 #define DR6_BD		(1 << 13)
145 #define DR6_BS		(1 << 14)
146 #define DR6_RTM		(1 << 16)
147 #define DR6_FIXED_1	0xfffe0ff0
148 #define DR6_INIT	0xffff0ff0
149 #define DR6_VOLATILE	0x0001e00f
150 
151 #define DR7_BP_EN_MASK	0x000000ff
152 #define DR7_GE		(1 << 9)
153 #define DR7_GD		(1 << 13)
154 #define DR7_FIXED_1	0x00000400
155 #define DR7_VOLATILE	0xffff2bff
156 
157 #define PFERR_PRESENT_BIT 0
158 #define PFERR_WRITE_BIT 1
159 #define PFERR_USER_BIT 2
160 #define PFERR_RSVD_BIT 3
161 #define PFERR_FETCH_BIT 4
162 
163 #define PFERR_PRESENT_MASK (1U << PFERR_PRESENT_BIT)
164 #define PFERR_WRITE_MASK (1U << PFERR_WRITE_BIT)
165 #define PFERR_USER_MASK (1U << PFERR_USER_BIT)
166 #define PFERR_RSVD_MASK (1U << PFERR_RSVD_BIT)
167 #define PFERR_FETCH_MASK (1U << PFERR_FETCH_BIT)
168 
169 /* apic attention bits */
170 #define KVM_APIC_CHECK_VAPIC	0
171 /*
172  * The following bit is set with PV-EOI, unset on EOI.
173  * We detect PV-EOI changes by guest by comparing
174  * this bit with PV-EOI in guest memory.
175  * See the implementation in apic_update_pv_eoi.
176  */
177 #define KVM_APIC_PV_EOI_PENDING	1
178 
179 /*
180  * We don't want allocation failures within the mmu code, so we preallocate
181  * enough memory for a single page fault in a cache.
182  */
183 struct kvm_mmu_memory_cache {
184 	int nobjs;
185 	void *objects[KVM_NR_MEM_OBJS];
186 };
187 
188 union kvm_mmu_page_role {
189 	unsigned word;
190 	struct {
191 		unsigned level:4;
192 		unsigned cr4_pae:1;
193 		unsigned quadrant:2;
194 		unsigned direct:1;
195 		unsigned access:3;
196 		unsigned invalid:1;
197 		unsigned nxe:1;
198 		unsigned cr0_wp:1;
199 		unsigned smep_andnot_wp:1;
200 		unsigned smap_andnot_wp:1;
201 		unsigned :8;
202 
203 		/*
204 		 * This is left at the top of the word so that
205 		 * kvm_memslots_for_spte_role can extract it with a
206 		 * simple shift.  While there is room, give it a whole
207 		 * byte so it is also faster to load it from memory.
208 		 */
209 		unsigned smm:8;
210 	};
211 };
212 
213 struct kvm_mmu_page {
214 	struct list_head link;
215 	struct hlist_node hash_link;
216 
217 	/*
218 	 * The following two entries are used to key the shadow page in the
219 	 * hash table.
220 	 */
221 	gfn_t gfn;
222 	union kvm_mmu_page_role role;
223 
224 	u64 *spt;
225 	/* hold the gfn of each spte inside spt */
226 	gfn_t *gfns;
227 	bool unsync;
228 	int root_count;          /* Currently serving as active root */
229 	unsigned int unsync_children;
230 	unsigned long parent_ptes;	/* Reverse mapping for parent_pte */
231 
232 	/* The page is obsolete if mmu_valid_gen != kvm->arch.mmu_valid_gen.  */
233 	unsigned long mmu_valid_gen;
234 
235 	DECLARE_BITMAP(unsync_child_bitmap, 512);
236 
237 #ifdef CONFIG_X86_32
238 	/*
239 	 * Used out of the mmu-lock to avoid reading spte values while an
240 	 * update is in progress; see the comments in __get_spte_lockless().
241 	 */
242 	int clear_spte_count;
243 #endif
244 
245 	/* Number of writes since the last time traversal visited this page.  */
246 	int write_flooding_count;
247 };
248 
249 struct kvm_pio_request {
250 	unsigned long count;
251 	int in;
252 	int port;
253 	int size;
254 };
255 
256 struct rsvd_bits_validate {
257 	u64 rsvd_bits_mask[2][4];
258 	u64 bad_mt_xwr;
259 };
260 
261 /*
262  * x86 supports 3 paging modes (4-level 64-bit, 3-level 64-bit, and 2-level
263  * 32-bit).  The kvm_mmu structure abstracts the details of the current mmu
264  * mode.
265  */
266 struct kvm_mmu {
267 	void (*set_cr3)(struct kvm_vcpu *vcpu, unsigned long root);
268 	unsigned long (*get_cr3)(struct kvm_vcpu *vcpu);
269 	u64 (*get_pdptr)(struct kvm_vcpu *vcpu, int index);
270 	int (*page_fault)(struct kvm_vcpu *vcpu, gva_t gva, u32 err,
271 			  bool prefault);
272 	void (*inject_page_fault)(struct kvm_vcpu *vcpu,
273 				  struct x86_exception *fault);
274 	gpa_t (*gva_to_gpa)(struct kvm_vcpu *vcpu, gva_t gva, u32 access,
275 			    struct x86_exception *exception);
276 	gpa_t (*translate_gpa)(struct kvm_vcpu *vcpu, gpa_t gpa, u32 access,
277 			       struct x86_exception *exception);
278 	int (*sync_page)(struct kvm_vcpu *vcpu,
279 			 struct kvm_mmu_page *sp);
280 	void (*invlpg)(struct kvm_vcpu *vcpu, gva_t gva);
281 	void (*update_pte)(struct kvm_vcpu *vcpu, struct kvm_mmu_page *sp,
282 			   u64 *spte, const void *pte);
283 	hpa_t root_hpa;
284 	int root_level;
285 	int shadow_root_level;
286 	union kvm_mmu_page_role base_role;
287 	bool direct_map;
288 
289 	/*
290 	 * Bitmap; bit set = permission fault
291 	 * Byte index: page fault error code [4:1]
292 	 * Bit index: pte permissions in ACC_* format
293 	 */
294 	u8 permissions[16];
295 
296 	u64 *pae_root;
297 	u64 *lm_root;
298 
299 	/*
300 	 * check zero bits on shadow page table entries, these
301 	 * bits include not only hardware reserved bits but also
302 	 * the bits spte never used.
303 	 */
304 	struct rsvd_bits_validate shadow_zero_check;
305 
306 	struct rsvd_bits_validate guest_rsvd_check;
307 
308 	/*
309 	 * Bitmap: bit set = last pte in walk
310 	 * index[0:1]: level (zero-based)
311 	 * index[2]: pte.ps
312 	 */
313 	u8 last_pte_bitmap;
314 
315 	bool nx;
316 
317 	u64 pdptrs[4]; /* pae */
318 };
319 
320 enum pmc_type {
321 	KVM_PMC_GP = 0,
322 	KVM_PMC_FIXED,
323 };
324 
325 struct kvm_pmc {
326 	enum pmc_type type;
327 	u8 idx;
328 	u64 counter;
329 	u64 eventsel;
330 	struct perf_event *perf_event;
331 	struct kvm_vcpu *vcpu;
332 };
333 
334 struct kvm_pmu {
335 	unsigned nr_arch_gp_counters;
336 	unsigned nr_arch_fixed_counters;
337 	unsigned available_event_types;
338 	u64 fixed_ctr_ctrl;
339 	u64 global_ctrl;
340 	u64 global_status;
341 	u64 global_ovf_ctrl;
342 	u64 counter_bitmask[2];
343 	u64 global_ctrl_mask;
344 	u64 reserved_bits;
345 	u8 version;
346 	struct kvm_pmc gp_counters[INTEL_PMC_MAX_GENERIC];
347 	struct kvm_pmc fixed_counters[INTEL_PMC_MAX_FIXED];
348 	struct irq_work irq_work;
349 	u64 reprogram_pmi;
350 };
351 
352 struct kvm_pmu_ops;
353 
354 enum {
355 	KVM_DEBUGREG_BP_ENABLED = 1,
356 	KVM_DEBUGREG_WONT_EXIT = 2,
357 	KVM_DEBUGREG_RELOAD = 4,
358 };
359 
360 struct kvm_mtrr_range {
361 	u64 base;
362 	u64 mask;
363 	struct list_head node;
364 };
365 
366 struct kvm_mtrr {
367 	struct kvm_mtrr_range var_ranges[KVM_NR_VAR_MTRR];
368 	mtrr_type fixed_ranges[KVM_NR_FIXED_MTRR_REGION];
369 	u64 deftype;
370 
371 	struct list_head head;
372 };
373 
374 /* Hyper-V per vcpu emulation context */
375 struct kvm_vcpu_hv {
376 	u64 hv_vapic;
377 };
378 
379 struct kvm_vcpu_arch {
380 	/*
381 	 * rip and regs accesses must go through
382 	 * kvm_{register,rip}_{read,write} functions.
383 	 */
384 	unsigned long regs[NR_VCPU_REGS];
385 	u32 regs_avail;
386 	u32 regs_dirty;
387 
388 	unsigned long cr0;
389 	unsigned long cr0_guest_owned_bits;
390 	unsigned long cr2;
391 	unsigned long cr3;
392 	unsigned long cr4;
393 	unsigned long cr4_guest_owned_bits;
394 	unsigned long cr8;
395 	u32 hflags;
396 	u64 efer;
397 	u64 apic_base;
398 	struct kvm_lapic *apic;    /* kernel irqchip context */
399 	unsigned long apic_attention;
400 	int32_t apic_arb_prio;
401 	int mp_state;
402 	u64 ia32_misc_enable_msr;
403 	u64 smbase;
404 	bool tpr_access_reporting;
405 	u64 ia32_xss;
406 
407 	/*
408 	 * Paging state of the vcpu
409 	 *
410 	 * If the vcpu runs in guest mode with two level paging this still saves
411 	 * the paging mode of the l1 guest. This context is always used to
412 	 * handle faults.
413 	 */
414 	struct kvm_mmu mmu;
415 
416 	/*
417 	 * Paging state of an L2 guest (used for nested npt)
418 	 *
419 	 * This context will save all necessary information to walk page tables
420 	 * of the an L2 guest. This context is only initialized for page table
421 	 * walking and not for faulting since we never handle l2 page faults on
422 	 * the host.
423 	 */
424 	struct kvm_mmu nested_mmu;
425 
426 	/*
427 	 * Pointer to the mmu context currently used for
428 	 * gva_to_gpa translations.
429 	 */
430 	struct kvm_mmu *walk_mmu;
431 
432 	struct kvm_mmu_memory_cache mmu_pte_list_desc_cache;
433 	struct kvm_mmu_memory_cache mmu_page_cache;
434 	struct kvm_mmu_memory_cache mmu_page_header_cache;
435 
436 	struct fpu guest_fpu;
437 	bool eager_fpu;
438 	u64 xcr0;
439 	u64 guest_supported_xcr0;
440 	u32 guest_xstate_size;
441 
442 	struct kvm_pio_request pio;
443 	void *pio_data;
444 
445 	u8 event_exit_inst_len;
446 
447 	struct kvm_queued_exception {
448 		bool pending;
449 		bool has_error_code;
450 		bool reinject;
451 		u8 nr;
452 		u32 error_code;
453 	} exception;
454 
455 	struct kvm_queued_interrupt {
456 		bool pending;
457 		bool soft;
458 		u8 nr;
459 	} interrupt;
460 
461 	int halt_request; /* real mode on Intel only */
462 
463 	int cpuid_nent;
464 	struct kvm_cpuid_entry2 cpuid_entries[KVM_MAX_CPUID_ENTRIES];
465 
466 	int maxphyaddr;
467 
468 	/* emulate context */
469 
470 	struct x86_emulate_ctxt emulate_ctxt;
471 	bool emulate_regs_need_sync_to_vcpu;
472 	bool emulate_regs_need_sync_from_vcpu;
473 	int (*complete_userspace_io)(struct kvm_vcpu *vcpu);
474 
475 	gpa_t time;
476 	struct pvclock_vcpu_time_info hv_clock;
477 	unsigned int hw_tsc_khz;
478 	struct gfn_to_hva_cache pv_time;
479 	bool pv_time_enabled;
480 	/* set guest stopped flag in pvclock flags field */
481 	bool pvclock_set_guest_stopped_request;
482 
483 	struct {
484 		u64 msr_val;
485 		u64 last_steal;
486 		u64 accum_steal;
487 		struct gfn_to_hva_cache stime;
488 		struct kvm_steal_time steal;
489 	} st;
490 
491 	u64 last_guest_tsc;
492 	u64 last_host_tsc;
493 	u64 tsc_offset_adjustment;
494 	u64 this_tsc_nsec;
495 	u64 this_tsc_write;
496 	u64 this_tsc_generation;
497 	bool tsc_catchup;
498 	bool tsc_always_catchup;
499 	s8 virtual_tsc_shift;
500 	u32 virtual_tsc_mult;
501 	u32 virtual_tsc_khz;
502 	s64 ia32_tsc_adjust_msr;
503 
504 	atomic_t nmi_queued;  /* unprocessed asynchronous NMIs */
505 	unsigned nmi_pending; /* NMI queued after currently running handler */
506 	bool nmi_injected;    /* Trying to inject an NMI this entry */
507 	bool smi_pending;    /* SMI queued after currently running handler */
508 
509 	struct kvm_mtrr mtrr_state;
510 	u64 pat;
511 
512 	unsigned switch_db_regs;
513 	unsigned long db[KVM_NR_DB_REGS];
514 	unsigned long dr6;
515 	unsigned long dr7;
516 	unsigned long eff_db[KVM_NR_DB_REGS];
517 	unsigned long guest_debug_dr7;
518 
519 	u64 mcg_cap;
520 	u64 mcg_status;
521 	u64 mcg_ctl;
522 	u64 *mce_banks;
523 
524 	/* Cache MMIO info */
525 	u64 mmio_gva;
526 	unsigned access;
527 	gfn_t mmio_gfn;
528 	u64 mmio_gen;
529 
530 	struct kvm_pmu pmu;
531 
532 	/* used for guest single stepping over the given code position */
533 	unsigned long singlestep_rip;
534 
535 	struct kvm_vcpu_hv hyperv;
536 
537 	cpumask_var_t wbinvd_dirty_mask;
538 
539 	unsigned long last_retry_eip;
540 	unsigned long last_retry_addr;
541 
542 	struct {
543 		bool halted;
544 		gfn_t gfns[roundup_pow_of_two(ASYNC_PF_PER_VCPU)];
545 		struct gfn_to_hva_cache data;
546 		u64 msr_val;
547 		u32 id;
548 		bool send_user_only;
549 	} apf;
550 
551 	/* OSVW MSRs (AMD only) */
552 	struct {
553 		u64 length;
554 		u64 status;
555 	} osvw;
556 
557 	struct {
558 		u64 msr_val;
559 		struct gfn_to_hva_cache data;
560 	} pv_eoi;
561 
562 	/*
563 	 * Indicate whether the access faults on its page table in guest
564 	 * which is set when fix page fault and used to detect unhandeable
565 	 * instruction.
566 	 */
567 	bool write_fault_to_shadow_pgtable;
568 
569 	/* set at EPT violation at this point */
570 	unsigned long exit_qualification;
571 
572 	/* pv related host specific info */
573 	struct {
574 		bool pv_unhalted;
575 	} pv;
576 };
577 
578 struct kvm_lpage_info {
579 	int write_count;
580 };
581 
582 struct kvm_arch_memory_slot {
583 	unsigned long *rmap[KVM_NR_PAGE_SIZES];
584 	struct kvm_lpage_info *lpage_info[KVM_NR_PAGE_SIZES - 1];
585 };
586 
587 /*
588  * We use as the mode the number of bits allocated in the LDR for the
589  * logical processor ID.  It happens that these are all powers of two.
590  * This makes it is very easy to detect cases where the APICs are
591  * configured for multiple modes; in that case, we cannot use the map and
592  * hence cannot use kvm_irq_delivery_to_apic_fast either.
593  */
594 #define KVM_APIC_MODE_XAPIC_CLUSTER          4
595 #define KVM_APIC_MODE_XAPIC_FLAT             8
596 #define KVM_APIC_MODE_X2APIC                16
597 
598 struct kvm_apic_map {
599 	struct rcu_head rcu;
600 	u8 mode;
601 	struct kvm_lapic *phys_map[256];
602 	/* first index is cluster id second is cpu id in a cluster */
603 	struct kvm_lapic *logical_map[16][16];
604 };
605 
606 /* Hyper-V emulation context */
607 struct kvm_hv {
608 	u64 hv_guest_os_id;
609 	u64 hv_hypercall;
610 	u64 hv_tsc_page;
611 
612 	/* Hyper-v based guest crash (NT kernel bugcheck) parameters */
613 	u64 hv_crash_param[HV_X64_MSR_CRASH_PARAMS];
614 	u64 hv_crash_ctl;
615 };
616 
617 struct kvm_arch {
618 	unsigned int n_used_mmu_pages;
619 	unsigned int n_requested_mmu_pages;
620 	unsigned int n_max_mmu_pages;
621 	unsigned int indirect_shadow_pages;
622 	unsigned long mmu_valid_gen;
623 	struct hlist_head mmu_page_hash[KVM_NUM_MMU_PAGES];
624 	/*
625 	 * Hash table of struct kvm_mmu_page.
626 	 */
627 	struct list_head active_mmu_pages;
628 	struct list_head zapped_obsolete_pages;
629 
630 	struct list_head assigned_dev_head;
631 	struct iommu_domain *iommu_domain;
632 	bool iommu_noncoherent;
633 #define __KVM_HAVE_ARCH_NONCOHERENT_DMA
634 	atomic_t noncoherent_dma_count;
635 #define __KVM_HAVE_ARCH_ASSIGNED_DEVICE
636 	atomic_t assigned_device_count;
637 	struct kvm_pic *vpic;
638 	struct kvm_ioapic *vioapic;
639 	struct kvm_pit *vpit;
640 	atomic_t vapics_in_nmi_mode;
641 	struct mutex apic_map_lock;
642 	struct kvm_apic_map *apic_map;
643 
644 	unsigned int tss_addr;
645 	bool apic_access_page_done;
646 
647 	gpa_t wall_clock;
648 
649 	bool ept_identity_pagetable_done;
650 	gpa_t ept_identity_map_addr;
651 
652 	unsigned long irq_sources_bitmap;
653 	s64 kvmclock_offset;
654 	raw_spinlock_t tsc_write_lock;
655 	u64 last_tsc_nsec;
656 	u64 last_tsc_write;
657 	u32 last_tsc_khz;
658 	u64 cur_tsc_nsec;
659 	u64 cur_tsc_write;
660 	u64 cur_tsc_offset;
661 	u64 cur_tsc_generation;
662 	int nr_vcpus_matched_tsc;
663 
664 	spinlock_t pvclock_gtod_sync_lock;
665 	bool use_master_clock;
666 	u64 master_kernel_ns;
667 	cycle_t master_cycle_now;
668 	struct delayed_work kvmclock_update_work;
669 	struct delayed_work kvmclock_sync_work;
670 
671 	struct kvm_xen_hvm_config xen_hvm_config;
672 
673 	/* reads protected by irq_srcu, writes by irq_lock */
674 	struct hlist_head mask_notifier_list;
675 
676 	struct kvm_hv hyperv;
677 
678 	#ifdef CONFIG_KVM_MMU_AUDIT
679 	int audit_point;
680 	#endif
681 
682 	bool boot_vcpu_runs_old_kvmclock;
683 	u32 bsp_vcpu_id;
684 
685 	u64 disabled_quirks;
686 };
687 
688 struct kvm_vm_stat {
689 	u32 mmu_shadow_zapped;
690 	u32 mmu_pte_write;
691 	u32 mmu_pte_updated;
692 	u32 mmu_pde_zapped;
693 	u32 mmu_flooded;
694 	u32 mmu_recycled;
695 	u32 mmu_cache_miss;
696 	u32 mmu_unsync;
697 	u32 remote_tlb_flush;
698 	u32 lpages;
699 };
700 
701 struct kvm_vcpu_stat {
702 	u32 pf_fixed;
703 	u32 pf_guest;
704 	u32 tlb_flush;
705 	u32 invlpg;
706 
707 	u32 exits;
708 	u32 io_exits;
709 	u32 mmio_exits;
710 	u32 signal_exits;
711 	u32 irq_window_exits;
712 	u32 nmi_window_exits;
713 	u32 halt_exits;
714 	u32 halt_successful_poll;
715 	u32 halt_attempted_poll;
716 	u32 halt_wakeup;
717 	u32 request_irq_exits;
718 	u32 irq_exits;
719 	u32 host_state_reload;
720 	u32 efer_reload;
721 	u32 fpu_reload;
722 	u32 insn_emulation;
723 	u32 insn_emulation_fail;
724 	u32 hypercalls;
725 	u32 irq_injections;
726 	u32 nmi_injections;
727 };
728 
729 struct x86_instruction_info;
730 
731 struct msr_data {
732 	bool host_initiated;
733 	u32 index;
734 	u64 data;
735 };
736 
737 struct kvm_lapic_irq {
738 	u32 vector;
739 	u16 delivery_mode;
740 	u16 dest_mode;
741 	bool level;
742 	u16 trig_mode;
743 	u32 shorthand;
744 	u32 dest_id;
745 	bool msi_redir_hint;
746 };
747 
748 struct kvm_x86_ops {
749 	int (*cpu_has_kvm_support)(void);          /* __init */
750 	int (*disabled_by_bios)(void);             /* __init */
751 	int (*hardware_enable)(void);
752 	void (*hardware_disable)(void);
753 	void (*check_processor_compatibility)(void *rtn);
754 	int (*hardware_setup)(void);               /* __init */
755 	void (*hardware_unsetup)(void);            /* __exit */
756 	bool (*cpu_has_accelerated_tpr)(void);
757 	bool (*cpu_has_high_real_mode_segbase)(void);
758 	void (*cpuid_update)(struct kvm_vcpu *vcpu);
759 
760 	/* Create, but do not attach this VCPU */
761 	struct kvm_vcpu *(*vcpu_create)(struct kvm *kvm, unsigned id);
762 	void (*vcpu_free)(struct kvm_vcpu *vcpu);
763 	void (*vcpu_reset)(struct kvm_vcpu *vcpu, bool init_event);
764 
765 	void (*prepare_guest_switch)(struct kvm_vcpu *vcpu);
766 	void (*vcpu_load)(struct kvm_vcpu *vcpu, int cpu);
767 	void (*vcpu_put)(struct kvm_vcpu *vcpu);
768 
769 	void (*update_db_bp_intercept)(struct kvm_vcpu *vcpu);
770 	int (*get_msr)(struct kvm_vcpu *vcpu, struct msr_data *msr);
771 	int (*set_msr)(struct kvm_vcpu *vcpu, struct msr_data *msr);
772 	u64 (*get_segment_base)(struct kvm_vcpu *vcpu, int seg);
773 	void (*get_segment)(struct kvm_vcpu *vcpu,
774 			    struct kvm_segment *var, int seg);
775 	int (*get_cpl)(struct kvm_vcpu *vcpu);
776 	void (*set_segment)(struct kvm_vcpu *vcpu,
777 			    struct kvm_segment *var, int seg);
778 	void (*get_cs_db_l_bits)(struct kvm_vcpu *vcpu, int *db, int *l);
779 	void (*decache_cr0_guest_bits)(struct kvm_vcpu *vcpu);
780 	void (*decache_cr3)(struct kvm_vcpu *vcpu);
781 	void (*decache_cr4_guest_bits)(struct kvm_vcpu *vcpu);
782 	void (*set_cr0)(struct kvm_vcpu *vcpu, unsigned long cr0);
783 	void (*set_cr3)(struct kvm_vcpu *vcpu, unsigned long cr3);
784 	int (*set_cr4)(struct kvm_vcpu *vcpu, unsigned long cr4);
785 	void (*set_efer)(struct kvm_vcpu *vcpu, u64 efer);
786 	void (*get_idt)(struct kvm_vcpu *vcpu, struct desc_ptr *dt);
787 	void (*set_idt)(struct kvm_vcpu *vcpu, struct desc_ptr *dt);
788 	void (*get_gdt)(struct kvm_vcpu *vcpu, struct desc_ptr *dt);
789 	void (*set_gdt)(struct kvm_vcpu *vcpu, struct desc_ptr *dt);
790 	u64 (*get_dr6)(struct kvm_vcpu *vcpu);
791 	void (*set_dr6)(struct kvm_vcpu *vcpu, unsigned long value);
792 	void (*sync_dirty_debug_regs)(struct kvm_vcpu *vcpu);
793 	void (*set_dr7)(struct kvm_vcpu *vcpu, unsigned long value);
794 	void (*cache_reg)(struct kvm_vcpu *vcpu, enum kvm_reg reg);
795 	unsigned long (*get_rflags)(struct kvm_vcpu *vcpu);
796 	void (*set_rflags)(struct kvm_vcpu *vcpu, unsigned long rflags);
797 	void (*fpu_activate)(struct kvm_vcpu *vcpu);
798 	void (*fpu_deactivate)(struct kvm_vcpu *vcpu);
799 
800 	void (*tlb_flush)(struct kvm_vcpu *vcpu);
801 
802 	void (*run)(struct kvm_vcpu *vcpu);
803 	int (*handle_exit)(struct kvm_vcpu *vcpu);
804 	void (*skip_emulated_instruction)(struct kvm_vcpu *vcpu);
805 	void (*set_interrupt_shadow)(struct kvm_vcpu *vcpu, int mask);
806 	u32 (*get_interrupt_shadow)(struct kvm_vcpu *vcpu);
807 	void (*patch_hypercall)(struct kvm_vcpu *vcpu,
808 				unsigned char *hypercall_addr);
809 	void (*set_irq)(struct kvm_vcpu *vcpu);
810 	void (*set_nmi)(struct kvm_vcpu *vcpu);
811 	void (*queue_exception)(struct kvm_vcpu *vcpu, unsigned nr,
812 				bool has_error_code, u32 error_code,
813 				bool reinject);
814 	void (*cancel_injection)(struct kvm_vcpu *vcpu);
815 	int (*interrupt_allowed)(struct kvm_vcpu *vcpu);
816 	int (*nmi_allowed)(struct kvm_vcpu *vcpu);
817 	bool (*get_nmi_mask)(struct kvm_vcpu *vcpu);
818 	void (*set_nmi_mask)(struct kvm_vcpu *vcpu, bool masked);
819 	void (*enable_nmi_window)(struct kvm_vcpu *vcpu);
820 	void (*enable_irq_window)(struct kvm_vcpu *vcpu);
821 	void (*update_cr8_intercept)(struct kvm_vcpu *vcpu, int tpr, int irr);
822 	int (*vm_has_apicv)(struct kvm *kvm);
823 	void (*hwapic_irr_update)(struct kvm_vcpu *vcpu, int max_irr);
824 	void (*hwapic_isr_update)(struct kvm *kvm, int isr);
825 	void (*load_eoi_exitmap)(struct kvm_vcpu *vcpu, u64 *eoi_exit_bitmap);
826 	void (*set_virtual_x2apic_mode)(struct kvm_vcpu *vcpu, bool set);
827 	void (*set_apic_access_page_addr)(struct kvm_vcpu *vcpu, hpa_t hpa);
828 	void (*deliver_posted_interrupt)(struct kvm_vcpu *vcpu, int vector);
829 	void (*sync_pir_to_irr)(struct kvm_vcpu *vcpu);
830 	int (*set_tss_addr)(struct kvm *kvm, unsigned int addr);
831 	int (*get_tdp_level)(void);
832 	u64 (*get_mt_mask)(struct kvm_vcpu *vcpu, gfn_t gfn, bool is_mmio);
833 	int (*get_lpage_level)(void);
834 	bool (*rdtscp_supported)(void);
835 	bool (*invpcid_supported)(void);
836 	void (*adjust_tsc_offset)(struct kvm_vcpu *vcpu, s64 adjustment, bool host);
837 
838 	void (*set_tdp_cr3)(struct kvm_vcpu *vcpu, unsigned long cr3);
839 
840 	void (*set_supported_cpuid)(u32 func, struct kvm_cpuid_entry2 *entry);
841 
842 	bool (*has_wbinvd_exit)(void);
843 
844 	void (*set_tsc_khz)(struct kvm_vcpu *vcpu, u32 user_tsc_khz, bool scale);
845 	u64 (*read_tsc_offset)(struct kvm_vcpu *vcpu);
846 	void (*write_tsc_offset)(struct kvm_vcpu *vcpu, u64 offset);
847 
848 	u64 (*compute_tsc_offset)(struct kvm_vcpu *vcpu, u64 target_tsc);
849 	u64 (*read_l1_tsc)(struct kvm_vcpu *vcpu, u64 host_tsc);
850 
851 	void (*get_exit_info)(struct kvm_vcpu *vcpu, u64 *info1, u64 *info2);
852 
853 	int (*check_intercept)(struct kvm_vcpu *vcpu,
854 			       struct x86_instruction_info *info,
855 			       enum x86_intercept_stage stage);
856 	void (*handle_external_intr)(struct kvm_vcpu *vcpu);
857 	bool (*mpx_supported)(void);
858 	bool (*xsaves_supported)(void);
859 
860 	int (*check_nested_events)(struct kvm_vcpu *vcpu, bool external_intr);
861 
862 	void (*sched_in)(struct kvm_vcpu *kvm, int cpu);
863 
864 	/*
865 	 * Arch-specific dirty logging hooks. These hooks are only supposed to
866 	 * be valid if the specific arch has hardware-accelerated dirty logging
867 	 * mechanism. Currently only for PML on VMX.
868 	 *
869 	 *  - slot_enable_log_dirty:
870 	 *	called when enabling log dirty mode for the slot.
871 	 *  - slot_disable_log_dirty:
872 	 *	called when disabling log dirty mode for the slot.
873 	 *	also called when slot is created with log dirty disabled.
874 	 *  - flush_log_dirty:
875 	 *	called before reporting dirty_bitmap to userspace.
876 	 *  - enable_log_dirty_pt_masked:
877 	 *	called when reenabling log dirty for the GFNs in the mask after
878 	 *	corresponding bits are cleared in slot->dirty_bitmap.
879 	 */
880 	void (*slot_enable_log_dirty)(struct kvm *kvm,
881 				      struct kvm_memory_slot *slot);
882 	void (*slot_disable_log_dirty)(struct kvm *kvm,
883 				       struct kvm_memory_slot *slot);
884 	void (*flush_log_dirty)(struct kvm *kvm);
885 	void (*enable_log_dirty_pt_masked)(struct kvm *kvm,
886 					   struct kvm_memory_slot *slot,
887 					   gfn_t offset, unsigned long mask);
888 	/* pmu operations of sub-arch */
889 	const struct kvm_pmu_ops *pmu_ops;
890 };
891 
892 struct kvm_arch_async_pf {
893 	u32 token;
894 	gfn_t gfn;
895 	unsigned long cr3;
896 	bool direct_map;
897 };
898 
899 extern struct kvm_x86_ops *kvm_x86_ops;
900 
901 static inline void adjust_tsc_offset_guest(struct kvm_vcpu *vcpu,
902 					   s64 adjustment)
903 {
904 	kvm_x86_ops->adjust_tsc_offset(vcpu, adjustment, false);
905 }
906 
907 static inline void adjust_tsc_offset_host(struct kvm_vcpu *vcpu, s64 adjustment)
908 {
909 	kvm_x86_ops->adjust_tsc_offset(vcpu, adjustment, true);
910 }
911 
912 int kvm_mmu_module_init(void);
913 void kvm_mmu_module_exit(void);
914 
915 void kvm_mmu_destroy(struct kvm_vcpu *vcpu);
916 int kvm_mmu_create(struct kvm_vcpu *vcpu);
917 void kvm_mmu_setup(struct kvm_vcpu *vcpu);
918 void kvm_mmu_set_mask_ptes(u64 user_mask, u64 accessed_mask,
919 		u64 dirty_mask, u64 nx_mask, u64 x_mask);
920 
921 void kvm_mmu_reset_context(struct kvm_vcpu *vcpu);
922 void kvm_mmu_slot_remove_write_access(struct kvm *kvm,
923 				      struct kvm_memory_slot *memslot);
924 void kvm_mmu_zap_collapsible_sptes(struct kvm *kvm,
925 				   const struct kvm_memory_slot *memslot);
926 void kvm_mmu_slot_leaf_clear_dirty(struct kvm *kvm,
927 				   struct kvm_memory_slot *memslot);
928 void kvm_mmu_slot_largepage_remove_write_access(struct kvm *kvm,
929 					struct kvm_memory_slot *memslot);
930 void kvm_mmu_slot_set_dirty(struct kvm *kvm,
931 			    struct kvm_memory_slot *memslot);
932 void kvm_mmu_clear_dirty_pt_masked(struct kvm *kvm,
933 				   struct kvm_memory_slot *slot,
934 				   gfn_t gfn_offset, unsigned long mask);
935 void kvm_mmu_zap_all(struct kvm *kvm);
936 void kvm_mmu_invalidate_mmio_sptes(struct kvm *kvm, struct kvm_memslots *slots);
937 unsigned int kvm_mmu_calculate_mmu_pages(struct kvm *kvm);
938 void kvm_mmu_change_mmu_pages(struct kvm *kvm, unsigned int kvm_nr_mmu_pages);
939 
940 int load_pdptrs(struct kvm_vcpu *vcpu, struct kvm_mmu *mmu, unsigned long cr3);
941 
942 int emulator_write_phys(struct kvm_vcpu *vcpu, gpa_t gpa,
943 			  const void *val, int bytes);
944 
945 struct kvm_irq_mask_notifier {
946 	void (*func)(struct kvm_irq_mask_notifier *kimn, bool masked);
947 	int irq;
948 	struct hlist_node link;
949 };
950 
951 void kvm_register_irq_mask_notifier(struct kvm *kvm, int irq,
952 				    struct kvm_irq_mask_notifier *kimn);
953 void kvm_unregister_irq_mask_notifier(struct kvm *kvm, int irq,
954 				      struct kvm_irq_mask_notifier *kimn);
955 void kvm_fire_mask_notifiers(struct kvm *kvm, unsigned irqchip, unsigned pin,
956 			     bool mask);
957 
958 extern bool tdp_enabled;
959 
960 u64 vcpu_tsc_khz(struct kvm_vcpu *vcpu);
961 
962 /* control of guest tsc rate supported? */
963 extern bool kvm_has_tsc_control;
964 /* minimum supported tsc_khz for guests */
965 extern u32  kvm_min_guest_tsc_khz;
966 /* maximum supported tsc_khz for guests */
967 extern u32  kvm_max_guest_tsc_khz;
968 
969 enum emulation_result {
970 	EMULATE_DONE,         /* no further processing */
971 	EMULATE_USER_EXIT,    /* kvm_run ready for userspace exit */
972 	EMULATE_FAIL,         /* can't emulate this instruction */
973 };
974 
975 #define EMULTYPE_NO_DECODE	    (1 << 0)
976 #define EMULTYPE_TRAP_UD	    (1 << 1)
977 #define EMULTYPE_SKIP		    (1 << 2)
978 #define EMULTYPE_RETRY		    (1 << 3)
979 #define EMULTYPE_NO_REEXECUTE	    (1 << 4)
980 int x86_emulate_instruction(struct kvm_vcpu *vcpu, unsigned long cr2,
981 			    int emulation_type, void *insn, int insn_len);
982 
983 static inline int emulate_instruction(struct kvm_vcpu *vcpu,
984 			int emulation_type)
985 {
986 	return x86_emulate_instruction(vcpu, 0, emulation_type, NULL, 0);
987 }
988 
989 void kvm_enable_efer_bits(u64);
990 bool kvm_valid_efer(struct kvm_vcpu *vcpu, u64 efer);
991 int kvm_get_msr(struct kvm_vcpu *vcpu, struct msr_data *msr);
992 int kvm_set_msr(struct kvm_vcpu *vcpu, struct msr_data *msr);
993 
994 struct x86_emulate_ctxt;
995 
996 int kvm_fast_pio_out(struct kvm_vcpu *vcpu, int size, unsigned short port);
997 void kvm_emulate_cpuid(struct kvm_vcpu *vcpu);
998 int kvm_emulate_halt(struct kvm_vcpu *vcpu);
999 int kvm_vcpu_halt(struct kvm_vcpu *vcpu);
1000 int kvm_emulate_wbinvd(struct kvm_vcpu *vcpu);
1001 
1002 void kvm_get_segment(struct kvm_vcpu *vcpu, struct kvm_segment *var, int seg);
1003 int kvm_load_segment_descriptor(struct kvm_vcpu *vcpu, u16 selector, int seg);
1004 void kvm_vcpu_deliver_sipi_vector(struct kvm_vcpu *vcpu, u8 vector);
1005 
1006 int kvm_task_switch(struct kvm_vcpu *vcpu, u16 tss_selector, int idt_index,
1007 		    int reason, bool has_error_code, u32 error_code);
1008 
1009 int kvm_set_cr0(struct kvm_vcpu *vcpu, unsigned long cr0);
1010 int kvm_set_cr3(struct kvm_vcpu *vcpu, unsigned long cr3);
1011 int kvm_set_cr4(struct kvm_vcpu *vcpu, unsigned long cr4);
1012 int kvm_set_cr8(struct kvm_vcpu *vcpu, unsigned long cr8);
1013 int kvm_set_dr(struct kvm_vcpu *vcpu, int dr, unsigned long val);
1014 int kvm_get_dr(struct kvm_vcpu *vcpu, int dr, unsigned long *val);
1015 unsigned long kvm_get_cr8(struct kvm_vcpu *vcpu);
1016 void kvm_lmsw(struct kvm_vcpu *vcpu, unsigned long msw);
1017 void kvm_get_cs_db_l_bits(struct kvm_vcpu *vcpu, int *db, int *l);
1018 int kvm_set_xcr(struct kvm_vcpu *vcpu, u32 index, u64 xcr);
1019 
1020 int kvm_get_msr_common(struct kvm_vcpu *vcpu, struct msr_data *msr);
1021 int kvm_set_msr_common(struct kvm_vcpu *vcpu, struct msr_data *msr);
1022 
1023 unsigned long kvm_get_rflags(struct kvm_vcpu *vcpu);
1024 void kvm_set_rflags(struct kvm_vcpu *vcpu, unsigned long rflags);
1025 bool kvm_rdpmc(struct kvm_vcpu *vcpu);
1026 
1027 void kvm_queue_exception(struct kvm_vcpu *vcpu, unsigned nr);
1028 void kvm_queue_exception_e(struct kvm_vcpu *vcpu, unsigned nr, u32 error_code);
1029 void kvm_requeue_exception(struct kvm_vcpu *vcpu, unsigned nr);
1030 void kvm_requeue_exception_e(struct kvm_vcpu *vcpu, unsigned nr, u32 error_code);
1031 void kvm_inject_page_fault(struct kvm_vcpu *vcpu, struct x86_exception *fault);
1032 int kvm_read_guest_page_mmu(struct kvm_vcpu *vcpu, struct kvm_mmu *mmu,
1033 			    gfn_t gfn, void *data, int offset, int len,
1034 			    u32 access);
1035 bool kvm_require_cpl(struct kvm_vcpu *vcpu, int required_cpl);
1036 bool kvm_require_dr(struct kvm_vcpu *vcpu, int dr);
1037 
1038 static inline int __kvm_irq_line_state(unsigned long *irq_state,
1039 				       int irq_source_id, int level)
1040 {
1041 	/* Logical OR for level trig interrupt */
1042 	if (level)
1043 		__set_bit(irq_source_id, irq_state);
1044 	else
1045 		__clear_bit(irq_source_id, irq_state);
1046 
1047 	return !!(*irq_state);
1048 }
1049 
1050 int kvm_pic_set_irq(struct kvm_pic *pic, int irq, int irq_source_id, int level);
1051 void kvm_pic_clear_all(struct kvm_pic *pic, int irq_source_id);
1052 
1053 void kvm_inject_nmi(struct kvm_vcpu *vcpu);
1054 
1055 void kvm_mmu_pte_write(struct kvm_vcpu *vcpu, gpa_t gpa,
1056 		       const u8 *new, int bytes);
1057 int kvm_mmu_unprotect_page(struct kvm *kvm, gfn_t gfn);
1058 int kvm_mmu_unprotect_page_virt(struct kvm_vcpu *vcpu, gva_t gva);
1059 void __kvm_mmu_free_some_pages(struct kvm_vcpu *vcpu);
1060 int kvm_mmu_load(struct kvm_vcpu *vcpu);
1061 void kvm_mmu_unload(struct kvm_vcpu *vcpu);
1062 void kvm_mmu_sync_roots(struct kvm_vcpu *vcpu);
1063 gpa_t translate_nested_gpa(struct kvm_vcpu *vcpu, gpa_t gpa, u32 access,
1064 			   struct x86_exception *exception);
1065 gpa_t kvm_mmu_gva_to_gpa_read(struct kvm_vcpu *vcpu, gva_t gva,
1066 			      struct x86_exception *exception);
1067 gpa_t kvm_mmu_gva_to_gpa_fetch(struct kvm_vcpu *vcpu, gva_t gva,
1068 			       struct x86_exception *exception);
1069 gpa_t kvm_mmu_gva_to_gpa_write(struct kvm_vcpu *vcpu, gva_t gva,
1070 			       struct x86_exception *exception);
1071 gpa_t kvm_mmu_gva_to_gpa_system(struct kvm_vcpu *vcpu, gva_t gva,
1072 				struct x86_exception *exception);
1073 
1074 int kvm_emulate_hypercall(struct kvm_vcpu *vcpu);
1075 
1076 int kvm_mmu_page_fault(struct kvm_vcpu *vcpu, gva_t gva, u32 error_code,
1077 		       void *insn, int insn_len);
1078 void kvm_mmu_invlpg(struct kvm_vcpu *vcpu, gva_t gva);
1079 void kvm_mmu_new_cr3(struct kvm_vcpu *vcpu);
1080 
1081 void kvm_enable_tdp(void);
1082 void kvm_disable_tdp(void);
1083 
1084 static inline gpa_t translate_gpa(struct kvm_vcpu *vcpu, gpa_t gpa, u32 access,
1085 				  struct x86_exception *exception)
1086 {
1087 	return gpa;
1088 }
1089 
1090 static inline struct kvm_mmu_page *page_header(hpa_t shadow_page)
1091 {
1092 	struct page *page = pfn_to_page(shadow_page >> PAGE_SHIFT);
1093 
1094 	return (struct kvm_mmu_page *)page_private(page);
1095 }
1096 
1097 static inline u16 kvm_read_ldt(void)
1098 {
1099 	u16 ldt;
1100 	asm("sldt %0" : "=g"(ldt));
1101 	return ldt;
1102 }
1103 
1104 static inline void kvm_load_ldt(u16 sel)
1105 {
1106 	asm("lldt %0" : : "rm"(sel));
1107 }
1108 
1109 #ifdef CONFIG_X86_64
1110 static inline unsigned long read_msr(unsigned long msr)
1111 {
1112 	u64 value;
1113 
1114 	rdmsrl(msr, value);
1115 	return value;
1116 }
1117 #endif
1118 
1119 static inline u32 get_rdx_init_val(void)
1120 {
1121 	return 0x600; /* P6 family */
1122 }
1123 
1124 static inline void kvm_inject_gp(struct kvm_vcpu *vcpu, u32 error_code)
1125 {
1126 	kvm_queue_exception_e(vcpu, GP_VECTOR, error_code);
1127 }
1128 
1129 static inline u64 get_canonical(u64 la)
1130 {
1131 	return ((int64_t)la << 16) >> 16;
1132 }
1133 
1134 static inline bool is_noncanonical_address(u64 la)
1135 {
1136 #ifdef CONFIG_X86_64
1137 	return get_canonical(la) != la;
1138 #else
1139 	return false;
1140 #endif
1141 }
1142 
1143 #define TSS_IOPB_BASE_OFFSET 0x66
1144 #define TSS_BASE_SIZE 0x68
1145 #define TSS_IOPB_SIZE (65536 / 8)
1146 #define TSS_REDIRECTION_SIZE (256 / 8)
1147 #define RMODE_TSS_SIZE							\
1148 	(TSS_BASE_SIZE + TSS_REDIRECTION_SIZE + TSS_IOPB_SIZE + 1)
1149 
1150 enum {
1151 	TASK_SWITCH_CALL = 0,
1152 	TASK_SWITCH_IRET = 1,
1153 	TASK_SWITCH_JMP = 2,
1154 	TASK_SWITCH_GATE = 3,
1155 };
1156 
1157 #define HF_GIF_MASK		(1 << 0)
1158 #define HF_HIF_MASK		(1 << 1)
1159 #define HF_VINTR_MASK		(1 << 2)
1160 #define HF_NMI_MASK		(1 << 3)
1161 #define HF_IRET_MASK		(1 << 4)
1162 #define HF_GUEST_MASK		(1 << 5) /* VCPU is in guest-mode */
1163 #define HF_SMM_MASK		(1 << 6)
1164 #define HF_SMM_INSIDE_NMI_MASK	(1 << 7)
1165 
1166 #define __KVM_VCPU_MULTIPLE_ADDRESS_SPACE
1167 #define KVM_ADDRESS_SPACE_NUM 2
1168 
1169 #define kvm_arch_vcpu_memslots_id(vcpu) ((vcpu)->arch.hflags & HF_SMM_MASK ? 1 : 0)
1170 #define kvm_memslots_for_spte_role(kvm, role) __kvm_memslots(kvm, (role).smm)
1171 
1172 /*
1173  * Hardware virtualization extension instructions may fault if a
1174  * reboot turns off virtualization while processes are running.
1175  * Trap the fault and ignore the instruction if that happens.
1176  */
1177 asmlinkage void kvm_spurious_fault(void);
1178 
1179 #define ____kvm_handle_fault_on_reboot(insn, cleanup_insn)	\
1180 	"666: " insn "\n\t" \
1181 	"668: \n\t"                           \
1182 	".pushsection .fixup, \"ax\" \n" \
1183 	"667: \n\t" \
1184 	cleanup_insn "\n\t"		      \
1185 	"cmpb $0, kvm_rebooting \n\t"	      \
1186 	"jne 668b \n\t"      		      \
1187 	__ASM_SIZE(push) " $666b \n\t"	      \
1188 	"call kvm_spurious_fault \n\t"	      \
1189 	".popsection \n\t" \
1190 	_ASM_EXTABLE(666b, 667b)
1191 
1192 #define __kvm_handle_fault_on_reboot(insn)		\
1193 	____kvm_handle_fault_on_reboot(insn, "")
1194 
1195 #define KVM_ARCH_WANT_MMU_NOTIFIER
1196 int kvm_unmap_hva(struct kvm *kvm, unsigned long hva);
1197 int kvm_unmap_hva_range(struct kvm *kvm, unsigned long start, unsigned long end);
1198 int kvm_age_hva(struct kvm *kvm, unsigned long start, unsigned long end);
1199 int kvm_test_age_hva(struct kvm *kvm, unsigned long hva);
1200 void kvm_set_spte_hva(struct kvm *kvm, unsigned long hva, pte_t pte);
1201 int kvm_cpu_has_injectable_intr(struct kvm_vcpu *v);
1202 int kvm_cpu_has_interrupt(struct kvm_vcpu *vcpu);
1203 int kvm_arch_interrupt_allowed(struct kvm_vcpu *vcpu);
1204 int kvm_cpu_get_interrupt(struct kvm_vcpu *v);
1205 void kvm_vcpu_reset(struct kvm_vcpu *vcpu, bool init_event);
1206 void kvm_vcpu_reload_apic_access_page(struct kvm_vcpu *vcpu);
1207 void kvm_arch_mmu_notifier_invalidate_page(struct kvm *kvm,
1208 					   unsigned long address);
1209 
1210 void kvm_define_shared_msr(unsigned index, u32 msr);
1211 int kvm_set_shared_msr(unsigned index, u64 val, u64 mask);
1212 
1213 unsigned long kvm_get_linear_rip(struct kvm_vcpu *vcpu);
1214 bool kvm_is_linear_rip(struct kvm_vcpu *vcpu, unsigned long linear_rip);
1215 
1216 void kvm_arch_async_page_not_present(struct kvm_vcpu *vcpu,
1217 				     struct kvm_async_pf *work);
1218 void kvm_arch_async_page_present(struct kvm_vcpu *vcpu,
1219 				 struct kvm_async_pf *work);
1220 void kvm_arch_async_page_ready(struct kvm_vcpu *vcpu,
1221 			       struct kvm_async_pf *work);
1222 bool kvm_arch_can_inject_async_page_present(struct kvm_vcpu *vcpu);
1223 extern bool kvm_find_async_pf_gfn(struct kvm_vcpu *vcpu, gfn_t gfn);
1224 
1225 void kvm_complete_insn_gp(struct kvm_vcpu *vcpu, int err);
1226 
1227 int kvm_is_in_guest(void);
1228 
1229 int __x86_set_memory_region(struct kvm *kvm,
1230 			    const struct kvm_userspace_memory_region *mem);
1231 int x86_set_memory_region(struct kvm *kvm,
1232 			  const struct kvm_userspace_memory_region *mem);
1233 bool kvm_vcpu_is_reset_bsp(struct kvm_vcpu *vcpu);
1234 bool kvm_vcpu_is_bsp(struct kvm_vcpu *vcpu);
1235 
1236 #endif /* _ASM_X86_KVM_HOST_H */
1237