1 /* 2 * Kernel-based Virtual Machine driver for Linux 3 * 4 * This header defines architecture specific interfaces, x86 version 5 * 6 * This work is licensed under the terms of the GNU GPL, version 2. See 7 * the COPYING file in the top-level directory. 8 * 9 */ 10 11 #ifndef _ASM_X86_KVM_HOST_H 12 #define _ASM_X86_KVM_HOST_H 13 14 #include <linux/types.h> 15 #include <linux/mm.h> 16 #include <linux/mmu_notifier.h> 17 #include <linux/tracepoint.h> 18 #include <linux/cpumask.h> 19 #include <linux/irq_work.h> 20 21 #include <linux/kvm.h> 22 #include <linux/kvm_para.h> 23 #include <linux/kvm_types.h> 24 #include <linux/perf_event.h> 25 #include <linux/pvclock_gtod.h> 26 #include <linux/clocksource.h> 27 28 #include <asm/pvclock-abi.h> 29 #include <asm/desc.h> 30 #include <asm/mtrr.h> 31 #include <asm/msr-index.h> 32 #include <asm/asm.h> 33 34 #define KVM_MAX_VCPUS 255 35 #define KVM_SOFT_MAX_VCPUS 160 36 #define KVM_USER_MEM_SLOTS 509 37 /* memory slots that are not exposed to userspace */ 38 #define KVM_PRIVATE_MEM_SLOTS 3 39 #define KVM_MEM_SLOTS_NUM (KVM_USER_MEM_SLOTS + KVM_PRIVATE_MEM_SLOTS) 40 41 #define KVM_MMIO_SIZE 16 42 43 #define KVM_PIO_PAGE_OFFSET 1 44 #define KVM_COALESCED_MMIO_PAGE_OFFSET 2 45 46 #define KVM_IRQCHIP_NUM_PINS KVM_IOAPIC_NUM_PINS 47 48 #define CR0_RESERVED_BITS \ 49 (~(unsigned long)(X86_CR0_PE | X86_CR0_MP | X86_CR0_EM | X86_CR0_TS \ 50 | X86_CR0_ET | X86_CR0_NE | X86_CR0_WP | X86_CR0_AM \ 51 | X86_CR0_NW | X86_CR0_CD | X86_CR0_PG)) 52 53 #define CR3_L_MODE_RESERVED_BITS 0xFFFFFF0000000000ULL 54 #define CR3_PCID_INVD (1UL << 63) 55 #define CR4_RESERVED_BITS \ 56 (~(unsigned long)(X86_CR4_VME | X86_CR4_PVI | X86_CR4_TSD | X86_CR4_DE\ 57 | X86_CR4_PSE | X86_CR4_PAE | X86_CR4_MCE \ 58 | X86_CR4_PGE | X86_CR4_PCE | X86_CR4_OSFXSR | X86_CR4_PCIDE \ 59 | X86_CR4_OSXSAVE | X86_CR4_SMEP | X86_CR4_FSGSBASE \ 60 | X86_CR4_OSXMMEXCPT | X86_CR4_VMXE | X86_CR4_SMAP)) 61 62 #define CR8_RESERVED_BITS (~(unsigned long)X86_CR8_TPR) 63 64 65 66 #define INVALID_PAGE (~(hpa_t)0) 67 #define VALID_PAGE(x) ((x) != INVALID_PAGE) 68 69 #define UNMAPPED_GVA (~(gpa_t)0) 70 71 /* KVM Hugepage definitions for x86 */ 72 #define KVM_NR_PAGE_SIZES 3 73 #define KVM_HPAGE_GFN_SHIFT(x) (((x) - 1) * 9) 74 #define KVM_HPAGE_SHIFT(x) (PAGE_SHIFT + KVM_HPAGE_GFN_SHIFT(x)) 75 #define KVM_HPAGE_SIZE(x) (1UL << KVM_HPAGE_SHIFT(x)) 76 #define KVM_HPAGE_MASK(x) (~(KVM_HPAGE_SIZE(x) - 1)) 77 #define KVM_PAGES_PER_HPAGE(x) (KVM_HPAGE_SIZE(x) / PAGE_SIZE) 78 79 static inline gfn_t gfn_to_index(gfn_t gfn, gfn_t base_gfn, int level) 80 { 81 /* KVM_HPAGE_GFN_SHIFT(PT_PAGE_TABLE_LEVEL) must be 0. */ 82 return (gfn >> KVM_HPAGE_GFN_SHIFT(level)) - 83 (base_gfn >> KVM_HPAGE_GFN_SHIFT(level)); 84 } 85 86 #define SELECTOR_TI_MASK (1 << 2) 87 #define SELECTOR_RPL_MASK 0x03 88 89 #define IOPL_SHIFT 12 90 91 #define KVM_PERMILLE_MMU_PAGES 20 92 #define KVM_MIN_ALLOC_MMU_PAGES 64 93 #define KVM_MMU_HASH_SHIFT 10 94 #define KVM_NUM_MMU_PAGES (1 << KVM_MMU_HASH_SHIFT) 95 #define KVM_MIN_FREE_MMU_PAGES 5 96 #define KVM_REFILL_PAGES 25 97 #define KVM_MAX_CPUID_ENTRIES 80 98 #define KVM_NR_FIXED_MTRR_REGION 88 99 #define KVM_NR_VAR_MTRR 8 100 101 #define ASYNC_PF_PER_VCPU 64 102 103 enum kvm_reg { 104 VCPU_REGS_RAX = 0, 105 VCPU_REGS_RCX = 1, 106 VCPU_REGS_RDX = 2, 107 VCPU_REGS_RBX = 3, 108 VCPU_REGS_RSP = 4, 109 VCPU_REGS_RBP = 5, 110 VCPU_REGS_RSI = 6, 111 VCPU_REGS_RDI = 7, 112 #ifdef CONFIG_X86_64 113 VCPU_REGS_R8 = 8, 114 VCPU_REGS_R9 = 9, 115 VCPU_REGS_R10 = 10, 116 VCPU_REGS_R11 = 11, 117 VCPU_REGS_R12 = 12, 118 VCPU_REGS_R13 = 13, 119 VCPU_REGS_R14 = 14, 120 VCPU_REGS_R15 = 15, 121 #endif 122 VCPU_REGS_RIP, 123 NR_VCPU_REGS 124 }; 125 126 enum kvm_reg_ex { 127 VCPU_EXREG_PDPTR = NR_VCPU_REGS, 128 VCPU_EXREG_CR3, 129 VCPU_EXREG_RFLAGS, 130 VCPU_EXREG_SEGMENTS, 131 }; 132 133 enum { 134 VCPU_SREG_ES, 135 VCPU_SREG_CS, 136 VCPU_SREG_SS, 137 VCPU_SREG_DS, 138 VCPU_SREG_FS, 139 VCPU_SREG_GS, 140 VCPU_SREG_TR, 141 VCPU_SREG_LDTR, 142 }; 143 144 #include <asm/kvm_emulate.h> 145 146 #define KVM_NR_MEM_OBJS 40 147 148 #define KVM_NR_DB_REGS 4 149 150 #define DR6_BD (1 << 13) 151 #define DR6_BS (1 << 14) 152 #define DR6_RTM (1 << 16) 153 #define DR6_FIXED_1 0xfffe0ff0 154 #define DR6_INIT 0xffff0ff0 155 #define DR6_VOLATILE 0x0001e00f 156 157 #define DR7_BP_EN_MASK 0x000000ff 158 #define DR7_GE (1 << 9) 159 #define DR7_GD (1 << 13) 160 #define DR7_FIXED_1 0x00000400 161 #define DR7_VOLATILE 0xffff2bff 162 163 /* apic attention bits */ 164 #define KVM_APIC_CHECK_VAPIC 0 165 /* 166 * The following bit is set with PV-EOI, unset on EOI. 167 * We detect PV-EOI changes by guest by comparing 168 * this bit with PV-EOI in guest memory. 169 * See the implementation in apic_update_pv_eoi. 170 */ 171 #define KVM_APIC_PV_EOI_PENDING 1 172 173 /* 174 * We don't want allocation failures within the mmu code, so we preallocate 175 * enough memory for a single page fault in a cache. 176 */ 177 struct kvm_mmu_memory_cache { 178 int nobjs; 179 void *objects[KVM_NR_MEM_OBJS]; 180 }; 181 182 /* 183 * kvm_mmu_page_role, below, is defined as: 184 * 185 * bits 0:3 - total guest paging levels (2-4, or zero for real mode) 186 * bits 4:7 - page table level for this shadow (1-4) 187 * bits 8:9 - page table quadrant for 2-level guests 188 * bit 16 - direct mapping of virtual to physical mapping at gfn 189 * used for real mode and two-dimensional paging 190 * bits 17:19 - common access permissions for all ptes in this shadow page 191 */ 192 union kvm_mmu_page_role { 193 unsigned word; 194 struct { 195 unsigned level:4; 196 unsigned cr4_pae:1; 197 unsigned quadrant:2; 198 unsigned pad_for_nice_hex_output:6; 199 unsigned direct:1; 200 unsigned access:3; 201 unsigned invalid:1; 202 unsigned nxe:1; 203 unsigned cr0_wp:1; 204 unsigned smep_andnot_wp:1; 205 }; 206 }; 207 208 struct kvm_mmu_page { 209 struct list_head link; 210 struct hlist_node hash_link; 211 212 /* 213 * The following two entries are used to key the shadow page in the 214 * hash table. 215 */ 216 gfn_t gfn; 217 union kvm_mmu_page_role role; 218 219 u64 *spt; 220 /* hold the gfn of each spte inside spt */ 221 gfn_t *gfns; 222 bool unsync; 223 int root_count; /* Currently serving as active root */ 224 unsigned int unsync_children; 225 unsigned long parent_ptes; /* Reverse mapping for parent_pte */ 226 227 /* The page is obsolete if mmu_valid_gen != kvm->arch.mmu_valid_gen. */ 228 unsigned long mmu_valid_gen; 229 230 DECLARE_BITMAP(unsync_child_bitmap, 512); 231 232 #ifdef CONFIG_X86_32 233 /* 234 * Used out of the mmu-lock to avoid reading spte values while an 235 * update is in progress; see the comments in __get_spte_lockless(). 236 */ 237 int clear_spte_count; 238 #endif 239 240 /* Number of writes since the last time traversal visited this page. */ 241 int write_flooding_count; 242 }; 243 244 struct kvm_pio_request { 245 unsigned long count; 246 int in; 247 int port; 248 int size; 249 }; 250 251 /* 252 * x86 supports 3 paging modes (4-level 64-bit, 3-level 64-bit, and 2-level 253 * 32-bit). The kvm_mmu structure abstracts the details of the current mmu 254 * mode. 255 */ 256 struct kvm_mmu { 257 void (*set_cr3)(struct kvm_vcpu *vcpu, unsigned long root); 258 unsigned long (*get_cr3)(struct kvm_vcpu *vcpu); 259 u64 (*get_pdptr)(struct kvm_vcpu *vcpu, int index); 260 int (*page_fault)(struct kvm_vcpu *vcpu, gva_t gva, u32 err, 261 bool prefault); 262 void (*inject_page_fault)(struct kvm_vcpu *vcpu, 263 struct x86_exception *fault); 264 gpa_t (*gva_to_gpa)(struct kvm_vcpu *vcpu, gva_t gva, u32 access, 265 struct x86_exception *exception); 266 gpa_t (*translate_gpa)(struct kvm_vcpu *vcpu, gpa_t gpa, u32 access, 267 struct x86_exception *exception); 268 int (*sync_page)(struct kvm_vcpu *vcpu, 269 struct kvm_mmu_page *sp); 270 void (*invlpg)(struct kvm_vcpu *vcpu, gva_t gva); 271 void (*update_pte)(struct kvm_vcpu *vcpu, struct kvm_mmu_page *sp, 272 u64 *spte, const void *pte); 273 hpa_t root_hpa; 274 int root_level; 275 int shadow_root_level; 276 union kvm_mmu_page_role base_role; 277 bool direct_map; 278 279 /* 280 * Bitmap; bit set = permission fault 281 * Byte index: page fault error code [4:1] 282 * Bit index: pte permissions in ACC_* format 283 */ 284 u8 permissions[16]; 285 286 u64 *pae_root; 287 u64 *lm_root; 288 u64 rsvd_bits_mask[2][4]; 289 u64 bad_mt_xwr; 290 291 /* 292 * Bitmap: bit set = last pte in walk 293 * index[0:1]: level (zero-based) 294 * index[2]: pte.ps 295 */ 296 u8 last_pte_bitmap; 297 298 bool nx; 299 300 u64 pdptrs[4]; /* pae */ 301 }; 302 303 enum pmc_type { 304 KVM_PMC_GP = 0, 305 KVM_PMC_FIXED, 306 }; 307 308 struct kvm_pmc { 309 enum pmc_type type; 310 u8 idx; 311 u64 counter; 312 u64 eventsel; 313 struct perf_event *perf_event; 314 struct kvm_vcpu *vcpu; 315 }; 316 317 struct kvm_pmu { 318 unsigned nr_arch_gp_counters; 319 unsigned nr_arch_fixed_counters; 320 unsigned available_event_types; 321 u64 fixed_ctr_ctrl; 322 u64 global_ctrl; 323 u64 global_status; 324 u64 global_ovf_ctrl; 325 u64 counter_bitmask[2]; 326 u64 global_ctrl_mask; 327 u64 reserved_bits; 328 u8 version; 329 struct kvm_pmc gp_counters[INTEL_PMC_MAX_GENERIC]; 330 struct kvm_pmc fixed_counters[INTEL_PMC_MAX_FIXED]; 331 struct irq_work irq_work; 332 u64 reprogram_pmi; 333 }; 334 335 enum { 336 KVM_DEBUGREG_BP_ENABLED = 1, 337 KVM_DEBUGREG_WONT_EXIT = 2, 338 }; 339 340 struct kvm_vcpu_arch { 341 /* 342 * rip and regs accesses must go through 343 * kvm_{register,rip}_{read,write} functions. 344 */ 345 unsigned long regs[NR_VCPU_REGS]; 346 u32 regs_avail; 347 u32 regs_dirty; 348 349 unsigned long cr0; 350 unsigned long cr0_guest_owned_bits; 351 unsigned long cr2; 352 unsigned long cr3; 353 unsigned long cr4; 354 unsigned long cr4_guest_owned_bits; 355 unsigned long cr8; 356 u32 hflags; 357 u64 efer; 358 u64 apic_base; 359 struct kvm_lapic *apic; /* kernel irqchip context */ 360 unsigned long apic_attention; 361 int32_t apic_arb_prio; 362 int mp_state; 363 u64 ia32_misc_enable_msr; 364 bool tpr_access_reporting; 365 u64 ia32_xss; 366 367 /* 368 * Paging state of the vcpu 369 * 370 * If the vcpu runs in guest mode with two level paging this still saves 371 * the paging mode of the l1 guest. This context is always used to 372 * handle faults. 373 */ 374 struct kvm_mmu mmu; 375 376 /* 377 * Paging state of an L2 guest (used for nested npt) 378 * 379 * This context will save all necessary information to walk page tables 380 * of the an L2 guest. This context is only initialized for page table 381 * walking and not for faulting since we never handle l2 page faults on 382 * the host. 383 */ 384 struct kvm_mmu nested_mmu; 385 386 /* 387 * Pointer to the mmu context currently used for 388 * gva_to_gpa translations. 389 */ 390 struct kvm_mmu *walk_mmu; 391 392 struct kvm_mmu_memory_cache mmu_pte_list_desc_cache; 393 struct kvm_mmu_memory_cache mmu_page_cache; 394 struct kvm_mmu_memory_cache mmu_page_header_cache; 395 396 struct fpu guest_fpu; 397 u64 xcr0; 398 u64 guest_supported_xcr0; 399 u32 guest_xstate_size; 400 401 struct kvm_pio_request pio; 402 void *pio_data; 403 404 u8 event_exit_inst_len; 405 406 struct kvm_queued_exception { 407 bool pending; 408 bool has_error_code; 409 bool reinject; 410 u8 nr; 411 u32 error_code; 412 } exception; 413 414 struct kvm_queued_interrupt { 415 bool pending; 416 bool soft; 417 u8 nr; 418 } interrupt; 419 420 int halt_request; /* real mode on Intel only */ 421 422 int cpuid_nent; 423 struct kvm_cpuid_entry2 cpuid_entries[KVM_MAX_CPUID_ENTRIES]; 424 /* emulate context */ 425 426 struct x86_emulate_ctxt emulate_ctxt; 427 bool emulate_regs_need_sync_to_vcpu; 428 bool emulate_regs_need_sync_from_vcpu; 429 int (*complete_userspace_io)(struct kvm_vcpu *vcpu); 430 431 gpa_t time; 432 struct pvclock_vcpu_time_info hv_clock; 433 unsigned int hw_tsc_khz; 434 struct gfn_to_hva_cache pv_time; 435 bool pv_time_enabled; 436 /* set guest stopped flag in pvclock flags field */ 437 bool pvclock_set_guest_stopped_request; 438 439 struct { 440 u64 msr_val; 441 u64 last_steal; 442 u64 accum_steal; 443 struct gfn_to_hva_cache stime; 444 struct kvm_steal_time steal; 445 } st; 446 447 u64 last_guest_tsc; 448 u64 last_host_tsc; 449 u64 tsc_offset_adjustment; 450 u64 this_tsc_nsec; 451 u64 this_tsc_write; 452 u64 this_tsc_generation; 453 bool tsc_catchup; 454 bool tsc_always_catchup; 455 s8 virtual_tsc_shift; 456 u32 virtual_tsc_mult; 457 u32 virtual_tsc_khz; 458 s64 ia32_tsc_adjust_msr; 459 460 atomic_t nmi_queued; /* unprocessed asynchronous NMIs */ 461 unsigned nmi_pending; /* NMI queued after currently running handler */ 462 bool nmi_injected; /* Trying to inject an NMI this entry */ 463 464 struct mtrr_state_type mtrr_state; 465 u64 pat; 466 467 unsigned switch_db_regs; 468 unsigned long db[KVM_NR_DB_REGS]; 469 unsigned long dr6; 470 unsigned long dr7; 471 unsigned long eff_db[KVM_NR_DB_REGS]; 472 unsigned long guest_debug_dr7; 473 474 u64 mcg_cap; 475 u64 mcg_status; 476 u64 mcg_ctl; 477 u64 *mce_banks; 478 479 /* Cache MMIO info */ 480 u64 mmio_gva; 481 unsigned access; 482 gfn_t mmio_gfn; 483 u64 mmio_gen; 484 485 struct kvm_pmu pmu; 486 487 /* used for guest single stepping over the given code position */ 488 unsigned long singlestep_rip; 489 490 /* fields used by HYPER-V emulation */ 491 u64 hv_vapic; 492 493 cpumask_var_t wbinvd_dirty_mask; 494 495 unsigned long last_retry_eip; 496 unsigned long last_retry_addr; 497 498 struct { 499 bool halted; 500 gfn_t gfns[roundup_pow_of_two(ASYNC_PF_PER_VCPU)]; 501 struct gfn_to_hva_cache data; 502 u64 msr_val; 503 u32 id; 504 bool send_user_only; 505 } apf; 506 507 /* OSVW MSRs (AMD only) */ 508 struct { 509 u64 length; 510 u64 status; 511 } osvw; 512 513 struct { 514 u64 msr_val; 515 struct gfn_to_hva_cache data; 516 } pv_eoi; 517 518 /* 519 * Indicate whether the access faults on its page table in guest 520 * which is set when fix page fault and used to detect unhandeable 521 * instruction. 522 */ 523 bool write_fault_to_shadow_pgtable; 524 525 /* set at EPT violation at this point */ 526 unsigned long exit_qualification; 527 528 /* pv related host specific info */ 529 struct { 530 bool pv_unhalted; 531 } pv; 532 }; 533 534 struct kvm_lpage_info { 535 int write_count; 536 }; 537 538 struct kvm_arch_memory_slot { 539 unsigned long *rmap[KVM_NR_PAGE_SIZES]; 540 struct kvm_lpage_info *lpage_info[KVM_NR_PAGE_SIZES - 1]; 541 }; 542 543 struct kvm_apic_map { 544 struct rcu_head rcu; 545 u8 ldr_bits; 546 /* fields bellow are used to decode ldr values in different modes */ 547 u32 cid_shift, cid_mask, lid_mask, broadcast; 548 struct kvm_lapic *phys_map[256]; 549 /* first index is cluster id second is cpu id in a cluster */ 550 struct kvm_lapic *logical_map[16][16]; 551 }; 552 553 struct kvm_arch { 554 unsigned int n_used_mmu_pages; 555 unsigned int n_requested_mmu_pages; 556 unsigned int n_max_mmu_pages; 557 unsigned int indirect_shadow_pages; 558 unsigned long mmu_valid_gen; 559 struct hlist_head mmu_page_hash[KVM_NUM_MMU_PAGES]; 560 /* 561 * Hash table of struct kvm_mmu_page. 562 */ 563 struct list_head active_mmu_pages; 564 struct list_head zapped_obsolete_pages; 565 566 struct list_head assigned_dev_head; 567 struct iommu_domain *iommu_domain; 568 bool iommu_noncoherent; 569 #define __KVM_HAVE_ARCH_NONCOHERENT_DMA 570 atomic_t noncoherent_dma_count; 571 struct kvm_pic *vpic; 572 struct kvm_ioapic *vioapic; 573 struct kvm_pit *vpit; 574 int vapics_in_nmi_mode; 575 struct mutex apic_map_lock; 576 struct kvm_apic_map *apic_map; 577 578 unsigned int tss_addr; 579 bool apic_access_page_done; 580 581 gpa_t wall_clock; 582 583 bool ept_identity_pagetable_done; 584 gpa_t ept_identity_map_addr; 585 586 unsigned long irq_sources_bitmap; 587 s64 kvmclock_offset; 588 raw_spinlock_t tsc_write_lock; 589 u64 last_tsc_nsec; 590 u64 last_tsc_write; 591 u32 last_tsc_khz; 592 u64 cur_tsc_nsec; 593 u64 cur_tsc_write; 594 u64 cur_tsc_offset; 595 u64 cur_tsc_generation; 596 int nr_vcpus_matched_tsc; 597 598 spinlock_t pvclock_gtod_sync_lock; 599 bool use_master_clock; 600 u64 master_kernel_ns; 601 cycle_t master_cycle_now; 602 struct delayed_work kvmclock_update_work; 603 struct delayed_work kvmclock_sync_work; 604 605 struct kvm_xen_hvm_config xen_hvm_config; 606 607 /* reads protected by irq_srcu, writes by irq_lock */ 608 struct hlist_head mask_notifier_list; 609 610 /* fields used by HYPER-V emulation */ 611 u64 hv_guest_os_id; 612 u64 hv_hypercall; 613 u64 hv_tsc_page; 614 615 #ifdef CONFIG_KVM_MMU_AUDIT 616 int audit_point; 617 #endif 618 }; 619 620 struct kvm_vm_stat { 621 u32 mmu_shadow_zapped; 622 u32 mmu_pte_write; 623 u32 mmu_pte_updated; 624 u32 mmu_pde_zapped; 625 u32 mmu_flooded; 626 u32 mmu_recycled; 627 u32 mmu_cache_miss; 628 u32 mmu_unsync; 629 u32 remote_tlb_flush; 630 u32 lpages; 631 }; 632 633 struct kvm_vcpu_stat { 634 u32 pf_fixed; 635 u32 pf_guest; 636 u32 tlb_flush; 637 u32 invlpg; 638 639 u32 exits; 640 u32 io_exits; 641 u32 mmio_exits; 642 u32 signal_exits; 643 u32 irq_window_exits; 644 u32 nmi_window_exits; 645 u32 halt_exits; 646 u32 halt_wakeup; 647 u32 request_irq_exits; 648 u32 irq_exits; 649 u32 host_state_reload; 650 u32 efer_reload; 651 u32 fpu_reload; 652 u32 insn_emulation; 653 u32 insn_emulation_fail; 654 u32 hypercalls; 655 u32 irq_injections; 656 u32 nmi_injections; 657 }; 658 659 struct x86_instruction_info; 660 661 struct msr_data { 662 bool host_initiated; 663 u32 index; 664 u64 data; 665 }; 666 667 struct kvm_lapic_irq { 668 u32 vector; 669 u32 delivery_mode; 670 u32 dest_mode; 671 u32 level; 672 u32 trig_mode; 673 u32 shorthand; 674 u32 dest_id; 675 }; 676 677 struct kvm_x86_ops { 678 int (*cpu_has_kvm_support)(void); /* __init */ 679 int (*disabled_by_bios)(void); /* __init */ 680 int (*hardware_enable)(void); 681 void (*hardware_disable)(void); 682 void (*check_processor_compatibility)(void *rtn); 683 int (*hardware_setup)(void); /* __init */ 684 void (*hardware_unsetup)(void); /* __exit */ 685 bool (*cpu_has_accelerated_tpr)(void); 686 void (*cpuid_update)(struct kvm_vcpu *vcpu); 687 688 /* Create, but do not attach this VCPU */ 689 struct kvm_vcpu *(*vcpu_create)(struct kvm *kvm, unsigned id); 690 void (*vcpu_free)(struct kvm_vcpu *vcpu); 691 void (*vcpu_reset)(struct kvm_vcpu *vcpu); 692 693 void (*prepare_guest_switch)(struct kvm_vcpu *vcpu); 694 void (*vcpu_load)(struct kvm_vcpu *vcpu, int cpu); 695 void (*vcpu_put)(struct kvm_vcpu *vcpu); 696 697 void (*update_db_bp_intercept)(struct kvm_vcpu *vcpu); 698 int (*get_msr)(struct kvm_vcpu *vcpu, u32 msr_index, u64 *pdata); 699 int (*set_msr)(struct kvm_vcpu *vcpu, struct msr_data *msr); 700 u64 (*get_segment_base)(struct kvm_vcpu *vcpu, int seg); 701 void (*get_segment)(struct kvm_vcpu *vcpu, 702 struct kvm_segment *var, int seg); 703 int (*get_cpl)(struct kvm_vcpu *vcpu); 704 void (*set_segment)(struct kvm_vcpu *vcpu, 705 struct kvm_segment *var, int seg); 706 void (*get_cs_db_l_bits)(struct kvm_vcpu *vcpu, int *db, int *l); 707 void (*decache_cr0_guest_bits)(struct kvm_vcpu *vcpu); 708 void (*decache_cr3)(struct kvm_vcpu *vcpu); 709 void (*decache_cr4_guest_bits)(struct kvm_vcpu *vcpu); 710 void (*set_cr0)(struct kvm_vcpu *vcpu, unsigned long cr0); 711 void (*set_cr3)(struct kvm_vcpu *vcpu, unsigned long cr3); 712 int (*set_cr4)(struct kvm_vcpu *vcpu, unsigned long cr4); 713 void (*set_efer)(struct kvm_vcpu *vcpu, u64 efer); 714 void (*get_idt)(struct kvm_vcpu *vcpu, struct desc_ptr *dt); 715 void (*set_idt)(struct kvm_vcpu *vcpu, struct desc_ptr *dt); 716 void (*get_gdt)(struct kvm_vcpu *vcpu, struct desc_ptr *dt); 717 void (*set_gdt)(struct kvm_vcpu *vcpu, struct desc_ptr *dt); 718 u64 (*get_dr6)(struct kvm_vcpu *vcpu); 719 void (*set_dr6)(struct kvm_vcpu *vcpu, unsigned long value); 720 void (*sync_dirty_debug_regs)(struct kvm_vcpu *vcpu); 721 void (*set_dr7)(struct kvm_vcpu *vcpu, unsigned long value); 722 void (*cache_reg)(struct kvm_vcpu *vcpu, enum kvm_reg reg); 723 unsigned long (*get_rflags)(struct kvm_vcpu *vcpu); 724 void (*set_rflags)(struct kvm_vcpu *vcpu, unsigned long rflags); 725 void (*fpu_deactivate)(struct kvm_vcpu *vcpu); 726 727 void (*tlb_flush)(struct kvm_vcpu *vcpu); 728 729 void (*run)(struct kvm_vcpu *vcpu); 730 int (*handle_exit)(struct kvm_vcpu *vcpu); 731 void (*skip_emulated_instruction)(struct kvm_vcpu *vcpu); 732 void (*set_interrupt_shadow)(struct kvm_vcpu *vcpu, int mask); 733 u32 (*get_interrupt_shadow)(struct kvm_vcpu *vcpu); 734 void (*patch_hypercall)(struct kvm_vcpu *vcpu, 735 unsigned char *hypercall_addr); 736 void (*set_irq)(struct kvm_vcpu *vcpu); 737 void (*set_nmi)(struct kvm_vcpu *vcpu); 738 void (*queue_exception)(struct kvm_vcpu *vcpu, unsigned nr, 739 bool has_error_code, u32 error_code, 740 bool reinject); 741 void (*cancel_injection)(struct kvm_vcpu *vcpu); 742 int (*interrupt_allowed)(struct kvm_vcpu *vcpu); 743 int (*nmi_allowed)(struct kvm_vcpu *vcpu); 744 bool (*get_nmi_mask)(struct kvm_vcpu *vcpu); 745 void (*set_nmi_mask)(struct kvm_vcpu *vcpu, bool masked); 746 void (*enable_nmi_window)(struct kvm_vcpu *vcpu); 747 void (*enable_irq_window)(struct kvm_vcpu *vcpu); 748 void (*update_cr8_intercept)(struct kvm_vcpu *vcpu, int tpr, int irr); 749 int (*vm_has_apicv)(struct kvm *kvm); 750 void (*hwapic_irr_update)(struct kvm_vcpu *vcpu, int max_irr); 751 void (*hwapic_isr_update)(struct kvm *kvm, int isr); 752 void (*load_eoi_exitmap)(struct kvm_vcpu *vcpu, u64 *eoi_exit_bitmap); 753 void (*set_virtual_x2apic_mode)(struct kvm_vcpu *vcpu, bool set); 754 void (*set_apic_access_page_addr)(struct kvm_vcpu *vcpu, hpa_t hpa); 755 void (*deliver_posted_interrupt)(struct kvm_vcpu *vcpu, int vector); 756 void (*sync_pir_to_irr)(struct kvm_vcpu *vcpu); 757 int (*set_tss_addr)(struct kvm *kvm, unsigned int addr); 758 int (*get_tdp_level)(void); 759 u64 (*get_mt_mask)(struct kvm_vcpu *vcpu, gfn_t gfn, bool is_mmio); 760 int (*get_lpage_level)(void); 761 bool (*rdtscp_supported)(void); 762 bool (*invpcid_supported)(void); 763 void (*adjust_tsc_offset)(struct kvm_vcpu *vcpu, s64 adjustment, bool host); 764 765 void (*set_tdp_cr3)(struct kvm_vcpu *vcpu, unsigned long cr3); 766 767 void (*set_supported_cpuid)(u32 func, struct kvm_cpuid_entry2 *entry); 768 769 bool (*has_wbinvd_exit)(void); 770 771 void (*set_tsc_khz)(struct kvm_vcpu *vcpu, u32 user_tsc_khz, bool scale); 772 u64 (*read_tsc_offset)(struct kvm_vcpu *vcpu); 773 void (*write_tsc_offset)(struct kvm_vcpu *vcpu, u64 offset); 774 775 u64 (*compute_tsc_offset)(struct kvm_vcpu *vcpu, u64 target_tsc); 776 u64 (*read_l1_tsc)(struct kvm_vcpu *vcpu, u64 host_tsc); 777 778 void (*get_exit_info)(struct kvm_vcpu *vcpu, u64 *info1, u64 *info2); 779 780 int (*check_intercept)(struct kvm_vcpu *vcpu, 781 struct x86_instruction_info *info, 782 enum x86_intercept_stage stage); 783 void (*handle_external_intr)(struct kvm_vcpu *vcpu); 784 bool (*mpx_supported)(void); 785 bool (*xsaves_supported)(void); 786 787 int (*check_nested_events)(struct kvm_vcpu *vcpu, bool external_intr); 788 789 void (*sched_in)(struct kvm_vcpu *kvm, int cpu); 790 }; 791 792 struct kvm_arch_async_pf { 793 u32 token; 794 gfn_t gfn; 795 unsigned long cr3; 796 bool direct_map; 797 }; 798 799 extern struct kvm_x86_ops *kvm_x86_ops; 800 801 static inline void adjust_tsc_offset_guest(struct kvm_vcpu *vcpu, 802 s64 adjustment) 803 { 804 kvm_x86_ops->adjust_tsc_offset(vcpu, adjustment, false); 805 } 806 807 static inline void adjust_tsc_offset_host(struct kvm_vcpu *vcpu, s64 adjustment) 808 { 809 kvm_x86_ops->adjust_tsc_offset(vcpu, adjustment, true); 810 } 811 812 int kvm_mmu_module_init(void); 813 void kvm_mmu_module_exit(void); 814 815 void kvm_mmu_destroy(struct kvm_vcpu *vcpu); 816 int kvm_mmu_create(struct kvm_vcpu *vcpu); 817 void kvm_mmu_setup(struct kvm_vcpu *vcpu); 818 void kvm_mmu_set_mask_ptes(u64 user_mask, u64 accessed_mask, 819 u64 dirty_mask, u64 nx_mask, u64 x_mask); 820 821 void kvm_mmu_reset_context(struct kvm_vcpu *vcpu); 822 void kvm_mmu_slot_remove_write_access(struct kvm *kvm, int slot); 823 void kvm_mmu_write_protect_pt_masked(struct kvm *kvm, 824 struct kvm_memory_slot *slot, 825 gfn_t gfn_offset, unsigned long mask); 826 void kvm_mmu_zap_all(struct kvm *kvm); 827 void kvm_mmu_invalidate_mmio_sptes(struct kvm *kvm); 828 unsigned int kvm_mmu_calculate_mmu_pages(struct kvm *kvm); 829 void kvm_mmu_change_mmu_pages(struct kvm *kvm, unsigned int kvm_nr_mmu_pages); 830 831 int load_pdptrs(struct kvm_vcpu *vcpu, struct kvm_mmu *mmu, unsigned long cr3); 832 833 int emulator_write_phys(struct kvm_vcpu *vcpu, gpa_t gpa, 834 const void *val, int bytes); 835 u8 kvm_get_guest_memory_type(struct kvm_vcpu *vcpu, gfn_t gfn); 836 837 struct kvm_irq_mask_notifier { 838 void (*func)(struct kvm_irq_mask_notifier *kimn, bool masked); 839 int irq; 840 struct hlist_node link; 841 }; 842 843 void kvm_register_irq_mask_notifier(struct kvm *kvm, int irq, 844 struct kvm_irq_mask_notifier *kimn); 845 void kvm_unregister_irq_mask_notifier(struct kvm *kvm, int irq, 846 struct kvm_irq_mask_notifier *kimn); 847 void kvm_fire_mask_notifiers(struct kvm *kvm, unsigned irqchip, unsigned pin, 848 bool mask); 849 850 extern bool tdp_enabled; 851 852 u64 vcpu_tsc_khz(struct kvm_vcpu *vcpu); 853 854 /* control of guest tsc rate supported? */ 855 extern bool kvm_has_tsc_control; 856 /* minimum supported tsc_khz for guests */ 857 extern u32 kvm_min_guest_tsc_khz; 858 /* maximum supported tsc_khz for guests */ 859 extern u32 kvm_max_guest_tsc_khz; 860 861 enum emulation_result { 862 EMULATE_DONE, /* no further processing */ 863 EMULATE_USER_EXIT, /* kvm_run ready for userspace exit */ 864 EMULATE_FAIL, /* can't emulate this instruction */ 865 }; 866 867 #define EMULTYPE_NO_DECODE (1 << 0) 868 #define EMULTYPE_TRAP_UD (1 << 1) 869 #define EMULTYPE_SKIP (1 << 2) 870 #define EMULTYPE_RETRY (1 << 3) 871 #define EMULTYPE_NO_REEXECUTE (1 << 4) 872 int x86_emulate_instruction(struct kvm_vcpu *vcpu, unsigned long cr2, 873 int emulation_type, void *insn, int insn_len); 874 875 static inline int emulate_instruction(struct kvm_vcpu *vcpu, 876 int emulation_type) 877 { 878 return x86_emulate_instruction(vcpu, 0, emulation_type, NULL, 0); 879 } 880 881 void kvm_enable_efer_bits(u64); 882 bool kvm_valid_efer(struct kvm_vcpu *vcpu, u64 efer); 883 int kvm_get_msr(struct kvm_vcpu *vcpu, u32 msr_index, u64 *data); 884 int kvm_set_msr(struct kvm_vcpu *vcpu, struct msr_data *msr); 885 886 struct x86_emulate_ctxt; 887 888 int kvm_fast_pio_out(struct kvm_vcpu *vcpu, int size, unsigned short port); 889 void kvm_emulate_cpuid(struct kvm_vcpu *vcpu); 890 int kvm_emulate_halt(struct kvm_vcpu *vcpu); 891 int kvm_emulate_wbinvd(struct kvm_vcpu *vcpu); 892 893 void kvm_get_segment(struct kvm_vcpu *vcpu, struct kvm_segment *var, int seg); 894 int kvm_load_segment_descriptor(struct kvm_vcpu *vcpu, u16 selector, int seg); 895 void kvm_vcpu_deliver_sipi_vector(struct kvm_vcpu *vcpu, u8 vector); 896 897 int kvm_task_switch(struct kvm_vcpu *vcpu, u16 tss_selector, int idt_index, 898 int reason, bool has_error_code, u32 error_code); 899 900 int kvm_set_cr0(struct kvm_vcpu *vcpu, unsigned long cr0); 901 int kvm_set_cr3(struct kvm_vcpu *vcpu, unsigned long cr3); 902 int kvm_set_cr4(struct kvm_vcpu *vcpu, unsigned long cr4); 903 int kvm_set_cr8(struct kvm_vcpu *vcpu, unsigned long cr8); 904 int kvm_set_dr(struct kvm_vcpu *vcpu, int dr, unsigned long val); 905 int kvm_get_dr(struct kvm_vcpu *vcpu, int dr, unsigned long *val); 906 unsigned long kvm_get_cr8(struct kvm_vcpu *vcpu); 907 void kvm_lmsw(struct kvm_vcpu *vcpu, unsigned long msw); 908 void kvm_get_cs_db_l_bits(struct kvm_vcpu *vcpu, int *db, int *l); 909 int kvm_set_xcr(struct kvm_vcpu *vcpu, u32 index, u64 xcr); 910 911 int kvm_get_msr_common(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata); 912 int kvm_set_msr_common(struct kvm_vcpu *vcpu, struct msr_data *msr); 913 914 unsigned long kvm_get_rflags(struct kvm_vcpu *vcpu); 915 void kvm_set_rflags(struct kvm_vcpu *vcpu, unsigned long rflags); 916 bool kvm_rdpmc(struct kvm_vcpu *vcpu); 917 918 void kvm_queue_exception(struct kvm_vcpu *vcpu, unsigned nr); 919 void kvm_queue_exception_e(struct kvm_vcpu *vcpu, unsigned nr, u32 error_code); 920 void kvm_requeue_exception(struct kvm_vcpu *vcpu, unsigned nr); 921 void kvm_requeue_exception_e(struct kvm_vcpu *vcpu, unsigned nr, u32 error_code); 922 void kvm_inject_page_fault(struct kvm_vcpu *vcpu, struct x86_exception *fault); 923 int kvm_read_guest_page_mmu(struct kvm_vcpu *vcpu, struct kvm_mmu *mmu, 924 gfn_t gfn, void *data, int offset, int len, 925 u32 access); 926 bool kvm_require_cpl(struct kvm_vcpu *vcpu, int required_cpl); 927 bool kvm_require_dr(struct kvm_vcpu *vcpu, int dr); 928 929 static inline int __kvm_irq_line_state(unsigned long *irq_state, 930 int irq_source_id, int level) 931 { 932 /* Logical OR for level trig interrupt */ 933 if (level) 934 __set_bit(irq_source_id, irq_state); 935 else 936 __clear_bit(irq_source_id, irq_state); 937 938 return !!(*irq_state); 939 } 940 941 int kvm_pic_set_irq(struct kvm_pic *pic, int irq, int irq_source_id, int level); 942 void kvm_pic_clear_all(struct kvm_pic *pic, int irq_source_id); 943 944 void kvm_inject_nmi(struct kvm_vcpu *vcpu); 945 946 int fx_init(struct kvm_vcpu *vcpu); 947 948 void kvm_mmu_pte_write(struct kvm_vcpu *vcpu, gpa_t gpa, 949 const u8 *new, int bytes); 950 int kvm_mmu_unprotect_page(struct kvm *kvm, gfn_t gfn); 951 int kvm_mmu_unprotect_page_virt(struct kvm_vcpu *vcpu, gva_t gva); 952 void __kvm_mmu_free_some_pages(struct kvm_vcpu *vcpu); 953 int kvm_mmu_load(struct kvm_vcpu *vcpu); 954 void kvm_mmu_unload(struct kvm_vcpu *vcpu); 955 void kvm_mmu_sync_roots(struct kvm_vcpu *vcpu); 956 gpa_t translate_nested_gpa(struct kvm_vcpu *vcpu, gpa_t gpa, u32 access, 957 struct x86_exception *exception); 958 gpa_t kvm_mmu_gva_to_gpa_read(struct kvm_vcpu *vcpu, gva_t gva, 959 struct x86_exception *exception); 960 gpa_t kvm_mmu_gva_to_gpa_fetch(struct kvm_vcpu *vcpu, gva_t gva, 961 struct x86_exception *exception); 962 gpa_t kvm_mmu_gva_to_gpa_write(struct kvm_vcpu *vcpu, gva_t gva, 963 struct x86_exception *exception); 964 gpa_t kvm_mmu_gva_to_gpa_system(struct kvm_vcpu *vcpu, gva_t gva, 965 struct x86_exception *exception); 966 967 int kvm_emulate_hypercall(struct kvm_vcpu *vcpu); 968 969 int kvm_mmu_page_fault(struct kvm_vcpu *vcpu, gva_t gva, u32 error_code, 970 void *insn, int insn_len); 971 void kvm_mmu_invlpg(struct kvm_vcpu *vcpu, gva_t gva); 972 void kvm_mmu_new_cr3(struct kvm_vcpu *vcpu); 973 974 void kvm_enable_tdp(void); 975 void kvm_disable_tdp(void); 976 977 static inline gpa_t translate_gpa(struct kvm_vcpu *vcpu, gpa_t gpa, u32 access, 978 struct x86_exception *exception) 979 { 980 return gpa; 981 } 982 983 static inline struct kvm_mmu_page *page_header(hpa_t shadow_page) 984 { 985 struct page *page = pfn_to_page(shadow_page >> PAGE_SHIFT); 986 987 return (struct kvm_mmu_page *)page_private(page); 988 } 989 990 static inline u16 kvm_read_ldt(void) 991 { 992 u16 ldt; 993 asm("sldt %0" : "=g"(ldt)); 994 return ldt; 995 } 996 997 static inline void kvm_load_ldt(u16 sel) 998 { 999 asm("lldt %0" : : "rm"(sel)); 1000 } 1001 1002 #ifdef CONFIG_X86_64 1003 static inline unsigned long read_msr(unsigned long msr) 1004 { 1005 u64 value; 1006 1007 rdmsrl(msr, value); 1008 return value; 1009 } 1010 #endif 1011 1012 static inline u32 get_rdx_init_val(void) 1013 { 1014 return 0x600; /* P6 family */ 1015 } 1016 1017 static inline void kvm_inject_gp(struct kvm_vcpu *vcpu, u32 error_code) 1018 { 1019 kvm_queue_exception_e(vcpu, GP_VECTOR, error_code); 1020 } 1021 1022 static inline u64 get_canonical(u64 la) 1023 { 1024 return ((int64_t)la << 16) >> 16; 1025 } 1026 1027 static inline bool is_noncanonical_address(u64 la) 1028 { 1029 #ifdef CONFIG_X86_64 1030 return get_canonical(la) != la; 1031 #else 1032 return false; 1033 #endif 1034 } 1035 1036 #define TSS_IOPB_BASE_OFFSET 0x66 1037 #define TSS_BASE_SIZE 0x68 1038 #define TSS_IOPB_SIZE (65536 / 8) 1039 #define TSS_REDIRECTION_SIZE (256 / 8) 1040 #define RMODE_TSS_SIZE \ 1041 (TSS_BASE_SIZE + TSS_REDIRECTION_SIZE + TSS_IOPB_SIZE + 1) 1042 1043 enum { 1044 TASK_SWITCH_CALL = 0, 1045 TASK_SWITCH_IRET = 1, 1046 TASK_SWITCH_JMP = 2, 1047 TASK_SWITCH_GATE = 3, 1048 }; 1049 1050 #define HF_GIF_MASK (1 << 0) 1051 #define HF_HIF_MASK (1 << 1) 1052 #define HF_VINTR_MASK (1 << 2) 1053 #define HF_NMI_MASK (1 << 3) 1054 #define HF_IRET_MASK (1 << 4) 1055 #define HF_GUEST_MASK (1 << 5) /* VCPU is in guest-mode */ 1056 1057 /* 1058 * Hardware virtualization extension instructions may fault if a 1059 * reboot turns off virtualization while processes are running. 1060 * Trap the fault and ignore the instruction if that happens. 1061 */ 1062 asmlinkage void kvm_spurious_fault(void); 1063 1064 #define ____kvm_handle_fault_on_reboot(insn, cleanup_insn) \ 1065 "666: " insn "\n\t" \ 1066 "668: \n\t" \ 1067 ".pushsection .fixup, \"ax\" \n" \ 1068 "667: \n\t" \ 1069 cleanup_insn "\n\t" \ 1070 "cmpb $0, kvm_rebooting \n\t" \ 1071 "jne 668b \n\t" \ 1072 __ASM_SIZE(push) " $666b \n\t" \ 1073 "call kvm_spurious_fault \n\t" \ 1074 ".popsection \n\t" \ 1075 _ASM_EXTABLE(666b, 667b) 1076 1077 #define __kvm_handle_fault_on_reboot(insn) \ 1078 ____kvm_handle_fault_on_reboot(insn, "") 1079 1080 #define KVM_ARCH_WANT_MMU_NOTIFIER 1081 int kvm_unmap_hva(struct kvm *kvm, unsigned long hva); 1082 int kvm_unmap_hva_range(struct kvm *kvm, unsigned long start, unsigned long end); 1083 int kvm_age_hva(struct kvm *kvm, unsigned long start, unsigned long end); 1084 int kvm_test_age_hva(struct kvm *kvm, unsigned long hva); 1085 void kvm_set_spte_hva(struct kvm *kvm, unsigned long hva, pte_t pte); 1086 int cpuid_maxphyaddr(struct kvm_vcpu *vcpu); 1087 int kvm_cpu_has_injectable_intr(struct kvm_vcpu *v); 1088 int kvm_cpu_has_interrupt(struct kvm_vcpu *vcpu); 1089 int kvm_arch_interrupt_allowed(struct kvm_vcpu *vcpu); 1090 int kvm_cpu_get_interrupt(struct kvm_vcpu *v); 1091 void kvm_vcpu_reset(struct kvm_vcpu *vcpu); 1092 void kvm_vcpu_reload_apic_access_page(struct kvm_vcpu *vcpu); 1093 void kvm_arch_mmu_notifier_invalidate_page(struct kvm *kvm, 1094 unsigned long address); 1095 1096 void kvm_define_shared_msr(unsigned index, u32 msr); 1097 int kvm_set_shared_msr(unsigned index, u64 val, u64 mask); 1098 1099 unsigned long kvm_get_linear_rip(struct kvm_vcpu *vcpu); 1100 bool kvm_is_linear_rip(struct kvm_vcpu *vcpu, unsigned long linear_rip); 1101 1102 void kvm_arch_async_page_not_present(struct kvm_vcpu *vcpu, 1103 struct kvm_async_pf *work); 1104 void kvm_arch_async_page_present(struct kvm_vcpu *vcpu, 1105 struct kvm_async_pf *work); 1106 void kvm_arch_async_page_ready(struct kvm_vcpu *vcpu, 1107 struct kvm_async_pf *work); 1108 bool kvm_arch_can_inject_async_page_present(struct kvm_vcpu *vcpu); 1109 extern bool kvm_find_async_pf_gfn(struct kvm_vcpu *vcpu, gfn_t gfn); 1110 1111 void kvm_complete_insn_gp(struct kvm_vcpu *vcpu, int err); 1112 1113 int kvm_is_in_guest(void); 1114 1115 void kvm_pmu_init(struct kvm_vcpu *vcpu); 1116 void kvm_pmu_destroy(struct kvm_vcpu *vcpu); 1117 void kvm_pmu_reset(struct kvm_vcpu *vcpu); 1118 void kvm_pmu_cpuid_update(struct kvm_vcpu *vcpu); 1119 bool kvm_pmu_msr(struct kvm_vcpu *vcpu, u32 msr); 1120 int kvm_pmu_get_msr(struct kvm_vcpu *vcpu, u32 msr, u64 *data); 1121 int kvm_pmu_set_msr(struct kvm_vcpu *vcpu, struct msr_data *msr_info); 1122 int kvm_pmu_check_pmc(struct kvm_vcpu *vcpu, unsigned pmc); 1123 int kvm_pmu_read_pmc(struct kvm_vcpu *vcpu, unsigned pmc, u64 *data); 1124 void kvm_handle_pmu_event(struct kvm_vcpu *vcpu); 1125 void kvm_deliver_pmi(struct kvm_vcpu *vcpu); 1126 1127 #endif /* _ASM_X86_KVM_HOST_H */ 1128