1 /* SPDX-License-Identifier: GPL-2.0-only */ 2 /* 3 * Kernel-based Virtual Machine driver for Linux 4 * 5 * This header defines architecture specific interfaces, x86 version 6 */ 7 8 #ifndef _ASM_X86_KVM_HOST_H 9 #define _ASM_X86_KVM_HOST_H 10 11 #include <linux/types.h> 12 #include <linux/mm.h> 13 #include <linux/mmu_notifier.h> 14 #include <linux/tracepoint.h> 15 #include <linux/cpumask.h> 16 #include <linux/irq_work.h> 17 #include <linux/irq.h> 18 19 #include <linux/kvm.h> 20 #include <linux/kvm_para.h> 21 #include <linux/kvm_types.h> 22 #include <linux/perf_event.h> 23 #include <linux/pvclock_gtod.h> 24 #include <linux/clocksource.h> 25 #include <linux/irqbypass.h> 26 #include <linux/hyperv.h> 27 28 #include <asm/apic.h> 29 #include <asm/pvclock-abi.h> 30 #include <asm/desc.h> 31 #include <asm/mtrr.h> 32 #include <asm/msr-index.h> 33 #include <asm/asm.h> 34 #include <asm/kvm_page_track.h> 35 #include <asm/kvm_vcpu_regs.h> 36 #include <asm/hyperv-tlfs.h> 37 38 #define __KVM_HAVE_ARCH_VCPU_DEBUGFS 39 40 #define KVM_MAX_VCPUS 288 41 #define KVM_SOFT_MAX_VCPUS 240 42 #define KVM_MAX_VCPU_ID 1023 43 /* memory slots that are not exposed to userspace */ 44 #define KVM_PRIVATE_MEM_SLOTS 3 45 46 #define KVM_HALT_POLL_NS_DEFAULT 200000 47 48 #define KVM_IRQCHIP_NUM_PINS KVM_IOAPIC_NUM_PINS 49 50 #define KVM_DIRTY_LOG_MANUAL_CAPS (KVM_DIRTY_LOG_MANUAL_PROTECT_ENABLE | \ 51 KVM_DIRTY_LOG_INITIALLY_SET) 52 53 #define KVM_BUS_LOCK_DETECTION_VALID_MODE (KVM_BUS_LOCK_DETECTION_OFF | \ 54 KVM_BUS_LOCK_DETECTION_EXIT) 55 56 /* x86-specific vcpu->requests bit members */ 57 #define KVM_REQ_MIGRATE_TIMER KVM_ARCH_REQ(0) 58 #define KVM_REQ_REPORT_TPR_ACCESS KVM_ARCH_REQ(1) 59 #define KVM_REQ_TRIPLE_FAULT KVM_ARCH_REQ(2) 60 #define KVM_REQ_MMU_SYNC KVM_ARCH_REQ(3) 61 #define KVM_REQ_CLOCK_UPDATE KVM_ARCH_REQ(4) 62 #define KVM_REQ_LOAD_MMU_PGD KVM_ARCH_REQ(5) 63 #define KVM_REQ_EVENT KVM_ARCH_REQ(6) 64 #define KVM_REQ_APF_HALT KVM_ARCH_REQ(7) 65 #define KVM_REQ_STEAL_UPDATE KVM_ARCH_REQ(8) 66 #define KVM_REQ_NMI KVM_ARCH_REQ(9) 67 #define KVM_REQ_PMU KVM_ARCH_REQ(10) 68 #define KVM_REQ_PMI KVM_ARCH_REQ(11) 69 #define KVM_REQ_SMI KVM_ARCH_REQ(12) 70 #define KVM_REQ_MASTERCLOCK_UPDATE KVM_ARCH_REQ(13) 71 #define KVM_REQ_MCLOCK_INPROGRESS \ 72 KVM_ARCH_REQ_FLAGS(14, KVM_REQUEST_WAIT | KVM_REQUEST_NO_WAKEUP) 73 #define KVM_REQ_SCAN_IOAPIC \ 74 KVM_ARCH_REQ_FLAGS(15, KVM_REQUEST_WAIT | KVM_REQUEST_NO_WAKEUP) 75 #define KVM_REQ_GLOBAL_CLOCK_UPDATE KVM_ARCH_REQ(16) 76 #define KVM_REQ_APIC_PAGE_RELOAD \ 77 KVM_ARCH_REQ_FLAGS(17, KVM_REQUEST_WAIT | KVM_REQUEST_NO_WAKEUP) 78 #define KVM_REQ_HV_CRASH KVM_ARCH_REQ(18) 79 #define KVM_REQ_IOAPIC_EOI_EXIT KVM_ARCH_REQ(19) 80 #define KVM_REQ_HV_RESET KVM_ARCH_REQ(20) 81 #define KVM_REQ_HV_EXIT KVM_ARCH_REQ(21) 82 #define KVM_REQ_HV_STIMER KVM_ARCH_REQ(22) 83 #define KVM_REQ_LOAD_EOI_EXITMAP KVM_ARCH_REQ(23) 84 #define KVM_REQ_GET_NESTED_STATE_PAGES KVM_ARCH_REQ(24) 85 #define KVM_REQ_APICV_UPDATE \ 86 KVM_ARCH_REQ_FLAGS(25, KVM_REQUEST_WAIT | KVM_REQUEST_NO_WAKEUP) 87 #define KVM_REQ_TLB_FLUSH_CURRENT KVM_ARCH_REQ(26) 88 #define KVM_REQ_TLB_FLUSH_GUEST \ 89 KVM_ARCH_REQ_FLAGS(27, KVM_REQUEST_NO_WAKEUP) 90 #define KVM_REQ_APF_READY KVM_ARCH_REQ(28) 91 #define KVM_REQ_MSR_FILTER_CHANGED KVM_ARCH_REQ(29) 92 #define KVM_REQ_UPDATE_CPU_DIRTY_LOGGING \ 93 KVM_ARCH_REQ_FLAGS(30, KVM_REQUEST_WAIT | KVM_REQUEST_NO_WAKEUP) 94 95 #define CR0_RESERVED_BITS \ 96 (~(unsigned long)(X86_CR0_PE | X86_CR0_MP | X86_CR0_EM | X86_CR0_TS \ 97 | X86_CR0_ET | X86_CR0_NE | X86_CR0_WP | X86_CR0_AM \ 98 | X86_CR0_NW | X86_CR0_CD | X86_CR0_PG)) 99 100 #define CR4_RESERVED_BITS \ 101 (~(unsigned long)(X86_CR4_VME | X86_CR4_PVI | X86_CR4_TSD | X86_CR4_DE\ 102 | X86_CR4_PSE | X86_CR4_PAE | X86_CR4_MCE \ 103 | X86_CR4_PGE | X86_CR4_PCE | X86_CR4_OSFXSR | X86_CR4_PCIDE \ 104 | X86_CR4_OSXSAVE | X86_CR4_SMEP | X86_CR4_FSGSBASE \ 105 | X86_CR4_OSXMMEXCPT | X86_CR4_LA57 | X86_CR4_VMXE \ 106 | X86_CR4_SMAP | X86_CR4_PKE | X86_CR4_UMIP)) 107 108 #define CR8_RESERVED_BITS (~(unsigned long)X86_CR8_TPR) 109 110 111 112 #define INVALID_PAGE (~(hpa_t)0) 113 #define VALID_PAGE(x) ((x) != INVALID_PAGE) 114 115 #define UNMAPPED_GVA (~(gpa_t)0) 116 #define INVALID_GPA (~(gpa_t)0) 117 118 /* KVM Hugepage definitions for x86 */ 119 #define KVM_MAX_HUGEPAGE_LEVEL PG_LEVEL_1G 120 #define KVM_NR_PAGE_SIZES (KVM_MAX_HUGEPAGE_LEVEL - PG_LEVEL_4K + 1) 121 #define KVM_HPAGE_GFN_SHIFT(x) (((x) - 1) * 9) 122 #define KVM_HPAGE_SHIFT(x) (PAGE_SHIFT + KVM_HPAGE_GFN_SHIFT(x)) 123 #define KVM_HPAGE_SIZE(x) (1UL << KVM_HPAGE_SHIFT(x)) 124 #define KVM_HPAGE_MASK(x) (~(KVM_HPAGE_SIZE(x) - 1)) 125 #define KVM_PAGES_PER_HPAGE(x) (KVM_HPAGE_SIZE(x) / PAGE_SIZE) 126 127 static inline gfn_t gfn_to_index(gfn_t gfn, gfn_t base_gfn, int level) 128 { 129 /* KVM_HPAGE_GFN_SHIFT(PG_LEVEL_4K) must be 0. */ 130 return (gfn >> KVM_HPAGE_GFN_SHIFT(level)) - 131 (base_gfn >> KVM_HPAGE_GFN_SHIFT(level)); 132 } 133 134 #define KVM_PERMILLE_MMU_PAGES 20 135 #define KVM_MIN_ALLOC_MMU_PAGES 64UL 136 #define KVM_MMU_HASH_SHIFT 12 137 #define KVM_NUM_MMU_PAGES (1 << KVM_MMU_HASH_SHIFT) 138 #define KVM_MIN_FREE_MMU_PAGES 5 139 #define KVM_REFILL_PAGES 25 140 #define KVM_MAX_CPUID_ENTRIES 256 141 #define KVM_NR_FIXED_MTRR_REGION 88 142 #define KVM_NR_VAR_MTRR 8 143 144 #define ASYNC_PF_PER_VCPU 64 145 146 enum kvm_reg { 147 VCPU_REGS_RAX = __VCPU_REGS_RAX, 148 VCPU_REGS_RCX = __VCPU_REGS_RCX, 149 VCPU_REGS_RDX = __VCPU_REGS_RDX, 150 VCPU_REGS_RBX = __VCPU_REGS_RBX, 151 VCPU_REGS_RSP = __VCPU_REGS_RSP, 152 VCPU_REGS_RBP = __VCPU_REGS_RBP, 153 VCPU_REGS_RSI = __VCPU_REGS_RSI, 154 VCPU_REGS_RDI = __VCPU_REGS_RDI, 155 #ifdef CONFIG_X86_64 156 VCPU_REGS_R8 = __VCPU_REGS_R8, 157 VCPU_REGS_R9 = __VCPU_REGS_R9, 158 VCPU_REGS_R10 = __VCPU_REGS_R10, 159 VCPU_REGS_R11 = __VCPU_REGS_R11, 160 VCPU_REGS_R12 = __VCPU_REGS_R12, 161 VCPU_REGS_R13 = __VCPU_REGS_R13, 162 VCPU_REGS_R14 = __VCPU_REGS_R14, 163 VCPU_REGS_R15 = __VCPU_REGS_R15, 164 #endif 165 VCPU_REGS_RIP, 166 NR_VCPU_REGS, 167 168 VCPU_EXREG_PDPTR = NR_VCPU_REGS, 169 VCPU_EXREG_CR0, 170 VCPU_EXREG_CR3, 171 VCPU_EXREG_CR4, 172 VCPU_EXREG_RFLAGS, 173 VCPU_EXREG_SEGMENTS, 174 VCPU_EXREG_EXIT_INFO_1, 175 VCPU_EXREG_EXIT_INFO_2, 176 }; 177 178 enum { 179 VCPU_SREG_ES, 180 VCPU_SREG_CS, 181 VCPU_SREG_SS, 182 VCPU_SREG_DS, 183 VCPU_SREG_FS, 184 VCPU_SREG_GS, 185 VCPU_SREG_TR, 186 VCPU_SREG_LDTR, 187 }; 188 189 enum exit_fastpath_completion { 190 EXIT_FASTPATH_NONE, 191 EXIT_FASTPATH_REENTER_GUEST, 192 EXIT_FASTPATH_EXIT_HANDLED, 193 }; 194 typedef enum exit_fastpath_completion fastpath_t; 195 196 struct x86_emulate_ctxt; 197 struct x86_exception; 198 enum x86_intercept; 199 enum x86_intercept_stage; 200 201 #define KVM_NR_DB_REGS 4 202 203 #define DR6_BUS_LOCK (1 << 11) 204 #define DR6_BD (1 << 13) 205 #define DR6_BS (1 << 14) 206 #define DR6_BT (1 << 15) 207 #define DR6_RTM (1 << 16) 208 /* 209 * DR6_ACTIVE_LOW combines fixed-1 and active-low bits. 210 * We can regard all the bits in DR6_FIXED_1 as active_low bits; 211 * they will never be 0 for now, but when they are defined 212 * in the future it will require no code change. 213 * 214 * DR6_ACTIVE_LOW is also used as the init/reset value for DR6. 215 */ 216 #define DR6_ACTIVE_LOW 0xffff0ff0 217 #define DR6_VOLATILE 0x0001e80f 218 #define DR6_FIXED_1 (DR6_ACTIVE_LOW & ~DR6_VOLATILE) 219 220 #define DR7_BP_EN_MASK 0x000000ff 221 #define DR7_GE (1 << 9) 222 #define DR7_GD (1 << 13) 223 #define DR7_FIXED_1 0x00000400 224 #define DR7_VOLATILE 0xffff2bff 225 226 #define KVM_GUESTDBG_VALID_MASK \ 227 (KVM_GUESTDBG_ENABLE | \ 228 KVM_GUESTDBG_SINGLESTEP | \ 229 KVM_GUESTDBG_USE_HW_BP | \ 230 KVM_GUESTDBG_USE_SW_BP | \ 231 KVM_GUESTDBG_INJECT_BP | \ 232 KVM_GUESTDBG_INJECT_DB) 233 234 235 #define PFERR_PRESENT_BIT 0 236 #define PFERR_WRITE_BIT 1 237 #define PFERR_USER_BIT 2 238 #define PFERR_RSVD_BIT 3 239 #define PFERR_FETCH_BIT 4 240 #define PFERR_PK_BIT 5 241 #define PFERR_SGX_BIT 15 242 #define PFERR_GUEST_FINAL_BIT 32 243 #define PFERR_GUEST_PAGE_BIT 33 244 245 #define PFERR_PRESENT_MASK (1U << PFERR_PRESENT_BIT) 246 #define PFERR_WRITE_MASK (1U << PFERR_WRITE_BIT) 247 #define PFERR_USER_MASK (1U << PFERR_USER_BIT) 248 #define PFERR_RSVD_MASK (1U << PFERR_RSVD_BIT) 249 #define PFERR_FETCH_MASK (1U << PFERR_FETCH_BIT) 250 #define PFERR_PK_MASK (1U << PFERR_PK_BIT) 251 #define PFERR_SGX_MASK (1U << PFERR_SGX_BIT) 252 #define PFERR_GUEST_FINAL_MASK (1ULL << PFERR_GUEST_FINAL_BIT) 253 #define PFERR_GUEST_PAGE_MASK (1ULL << PFERR_GUEST_PAGE_BIT) 254 255 #define PFERR_NESTED_GUEST_PAGE (PFERR_GUEST_PAGE_MASK | \ 256 PFERR_WRITE_MASK | \ 257 PFERR_PRESENT_MASK) 258 259 /* apic attention bits */ 260 #define KVM_APIC_CHECK_VAPIC 0 261 /* 262 * The following bit is set with PV-EOI, unset on EOI. 263 * We detect PV-EOI changes by guest by comparing 264 * this bit with PV-EOI in guest memory. 265 * See the implementation in apic_update_pv_eoi. 266 */ 267 #define KVM_APIC_PV_EOI_PENDING 1 268 269 struct kvm_kernel_irq_routing_entry; 270 271 /* 272 * kvm_mmu_page_role tracks the properties of a shadow page (where shadow page 273 * also includes TDP pages) to determine whether or not a page can be used in 274 * the given MMU context. This is a subset of the overall kvm_mmu_role to 275 * minimize the size of kvm_memory_slot.arch.gfn_track, i.e. allows allocating 276 * 2 bytes per gfn instead of 4 bytes per gfn. 277 * 278 * Indirect upper-level shadow pages are tracked for write-protection via 279 * gfn_track. As above, gfn_track is a 16 bit counter, so KVM must not create 280 * more than 2^16-1 upper-level shadow pages at a single gfn, otherwise 281 * gfn_track will overflow and explosions will ensure. 282 * 283 * A unique shadow page (SP) for a gfn is created if and only if an existing SP 284 * cannot be reused. The ability to reuse a SP is tracked by its role, which 285 * incorporates various mode bits and properties of the SP. Roughly speaking, 286 * the number of unique SPs that can theoretically be created is 2^n, where n 287 * is the number of bits that are used to compute the role. 288 * 289 * But, even though there are 18 bits in the mask below, not all combinations 290 * of modes and flags are possible. The maximum number of possible upper-level 291 * shadow pages for a single gfn is in the neighborhood of 2^13. 292 * 293 * - invalid shadow pages are not accounted. 294 * - level is effectively limited to four combinations, not 16 as the number 295 * bits would imply, as 4k SPs are not tracked (allowed to go unsync). 296 * - level is effectively unused for non-PAE paging because there is exactly 297 * one upper level (see 4k SP exception above). 298 * - quadrant is used only for non-PAE paging and is exclusive with 299 * gpte_is_8_bytes. 300 * - execonly and ad_disabled are used only for nested EPT, which makes it 301 * exclusive with quadrant. 302 */ 303 union kvm_mmu_page_role { 304 u32 word; 305 struct { 306 unsigned level:4; 307 unsigned gpte_is_8_bytes:1; 308 unsigned quadrant:2; 309 unsigned direct:1; 310 unsigned access:3; 311 unsigned invalid:1; 312 unsigned efer_nx:1; 313 unsigned cr0_wp:1; 314 unsigned smep_andnot_wp:1; 315 unsigned smap_andnot_wp:1; 316 unsigned ad_disabled:1; 317 unsigned guest_mode:1; 318 unsigned :6; 319 320 /* 321 * This is left at the top of the word so that 322 * kvm_memslots_for_spte_role can extract it with a 323 * simple shift. While there is room, give it a whole 324 * byte so it is also faster to load it from memory. 325 */ 326 unsigned smm:8; 327 }; 328 }; 329 330 /* 331 * kvm_mmu_extended_role complements kvm_mmu_page_role, tracking properties 332 * relevant to the current MMU configuration. When loading CR0, CR4, or EFER, 333 * including on nested transitions, if nothing in the full role changes then 334 * MMU re-configuration can be skipped. @valid bit is set on first usage so we 335 * don't treat all-zero structure as valid data. 336 * 337 * The properties that are tracked in the extended role but not the page role 338 * are for things that either (a) do not affect the validity of the shadow page 339 * or (b) are indirectly reflected in the shadow page's role. For example, 340 * CR4.PKE only affects permission checks for software walks of the guest page 341 * tables (because KVM doesn't support Protection Keys with shadow paging), and 342 * CR0.PG, CR4.PAE, and CR4.PSE are indirectly reflected in role.level. 343 * 344 * Note, SMEP and SMAP are not redundant with sm*p_andnot_wp in the page role. 345 * If CR0.WP=1, KVM can reuse shadow pages for the guest regardless of SMEP and 346 * SMAP, but the MMU's permission checks for software walks need to be SMEP and 347 * SMAP aware regardless of CR0.WP. 348 */ 349 union kvm_mmu_extended_role { 350 u32 word; 351 struct { 352 unsigned int valid:1; 353 unsigned int execonly:1; 354 unsigned int cr0_pg:1; 355 unsigned int cr4_pae:1; 356 unsigned int cr4_pse:1; 357 unsigned int cr4_pke:1; 358 unsigned int cr4_smap:1; 359 unsigned int cr4_smep:1; 360 unsigned int cr4_la57:1; 361 }; 362 }; 363 364 union kvm_mmu_role { 365 u64 as_u64; 366 struct { 367 union kvm_mmu_page_role base; 368 union kvm_mmu_extended_role ext; 369 }; 370 }; 371 372 struct kvm_rmap_head { 373 unsigned long val; 374 }; 375 376 struct kvm_pio_request { 377 unsigned long linear_rip; 378 unsigned long count; 379 int in; 380 int port; 381 int size; 382 }; 383 384 #define PT64_ROOT_MAX_LEVEL 5 385 386 struct rsvd_bits_validate { 387 u64 rsvd_bits_mask[2][PT64_ROOT_MAX_LEVEL]; 388 u64 bad_mt_xwr; 389 }; 390 391 struct kvm_mmu_root_info { 392 gpa_t pgd; 393 hpa_t hpa; 394 }; 395 396 #define KVM_MMU_ROOT_INFO_INVALID \ 397 ((struct kvm_mmu_root_info) { .pgd = INVALID_PAGE, .hpa = INVALID_PAGE }) 398 399 #define KVM_MMU_NUM_PREV_ROOTS 3 400 401 #define KVM_HAVE_MMU_RWLOCK 402 403 struct kvm_mmu_page; 404 405 /* 406 * x86 supports 4 paging modes (5-level 64-bit, 4-level 64-bit, 3-level 32-bit, 407 * and 2-level 32-bit). The kvm_mmu structure abstracts the details of the 408 * current mmu mode. 409 */ 410 struct kvm_mmu { 411 unsigned long (*get_guest_pgd)(struct kvm_vcpu *vcpu); 412 u64 (*get_pdptr)(struct kvm_vcpu *vcpu, int index); 413 int (*page_fault)(struct kvm_vcpu *vcpu, gpa_t cr2_or_gpa, u32 err, 414 bool prefault); 415 void (*inject_page_fault)(struct kvm_vcpu *vcpu, 416 struct x86_exception *fault); 417 gpa_t (*gva_to_gpa)(struct kvm_vcpu *vcpu, gpa_t gva_or_gpa, 418 u32 access, struct x86_exception *exception); 419 gpa_t (*translate_gpa)(struct kvm_vcpu *vcpu, gpa_t gpa, u32 access, 420 struct x86_exception *exception); 421 int (*sync_page)(struct kvm_vcpu *vcpu, 422 struct kvm_mmu_page *sp); 423 void (*invlpg)(struct kvm_vcpu *vcpu, gva_t gva, hpa_t root_hpa); 424 hpa_t root_hpa; 425 gpa_t root_pgd; 426 union kvm_mmu_role mmu_role; 427 u8 root_level; 428 u8 shadow_root_level; 429 u8 ept_ad; 430 bool direct_map; 431 struct kvm_mmu_root_info prev_roots[KVM_MMU_NUM_PREV_ROOTS]; 432 433 /* 434 * Bitmap; bit set = permission fault 435 * Byte index: page fault error code [4:1] 436 * Bit index: pte permissions in ACC_* format 437 */ 438 u8 permissions[16]; 439 440 /* 441 * The pkru_mask indicates if protection key checks are needed. It 442 * consists of 16 domains indexed by page fault error code bits [4:1], 443 * with PFEC.RSVD replaced by ACC_USER_MASK from the page tables. 444 * Each domain has 2 bits which are ANDed with AD and WD from PKRU. 445 */ 446 u32 pkru_mask; 447 448 u64 *pae_root; 449 u64 *pml4_root; 450 451 /* 452 * check zero bits on shadow page table entries, these 453 * bits include not only hardware reserved bits but also 454 * the bits spte never used. 455 */ 456 struct rsvd_bits_validate shadow_zero_check; 457 458 struct rsvd_bits_validate guest_rsvd_check; 459 460 u64 pdptrs[4]; /* pae */ 461 }; 462 463 struct kvm_tlb_range { 464 u64 start_gfn; 465 u64 pages; 466 }; 467 468 enum pmc_type { 469 KVM_PMC_GP = 0, 470 KVM_PMC_FIXED, 471 }; 472 473 struct kvm_pmc { 474 enum pmc_type type; 475 u8 idx; 476 u64 counter; 477 u64 eventsel; 478 struct perf_event *perf_event; 479 struct kvm_vcpu *vcpu; 480 /* 481 * eventsel value for general purpose counters, 482 * ctrl value for fixed counters. 483 */ 484 u64 current_config; 485 }; 486 487 struct kvm_pmu { 488 unsigned nr_arch_gp_counters; 489 unsigned nr_arch_fixed_counters; 490 unsigned available_event_types; 491 u64 fixed_ctr_ctrl; 492 u64 global_ctrl; 493 u64 global_status; 494 u64 global_ovf_ctrl; 495 u64 counter_bitmask[2]; 496 u64 global_ctrl_mask; 497 u64 global_ovf_ctrl_mask; 498 u64 reserved_bits; 499 u8 version; 500 struct kvm_pmc gp_counters[INTEL_PMC_MAX_GENERIC]; 501 struct kvm_pmc fixed_counters[INTEL_PMC_MAX_FIXED]; 502 struct irq_work irq_work; 503 DECLARE_BITMAP(reprogram_pmi, X86_PMC_IDX_MAX); 504 DECLARE_BITMAP(all_valid_pmc_idx, X86_PMC_IDX_MAX); 505 DECLARE_BITMAP(pmc_in_use, X86_PMC_IDX_MAX); 506 507 /* 508 * The gate to release perf_events not marked in 509 * pmc_in_use only once in a vcpu time slice. 510 */ 511 bool need_cleanup; 512 513 /* 514 * The total number of programmed perf_events and it helps to avoid 515 * redundant check before cleanup if guest don't use vPMU at all. 516 */ 517 u8 event_count; 518 }; 519 520 struct kvm_pmu_ops; 521 522 enum { 523 KVM_DEBUGREG_BP_ENABLED = 1, 524 KVM_DEBUGREG_WONT_EXIT = 2, 525 KVM_DEBUGREG_RELOAD = 4, 526 }; 527 528 struct kvm_mtrr_range { 529 u64 base; 530 u64 mask; 531 struct list_head node; 532 }; 533 534 struct kvm_mtrr { 535 struct kvm_mtrr_range var_ranges[KVM_NR_VAR_MTRR]; 536 mtrr_type fixed_ranges[KVM_NR_FIXED_MTRR_REGION]; 537 u64 deftype; 538 539 struct list_head head; 540 }; 541 542 /* Hyper-V SynIC timer */ 543 struct kvm_vcpu_hv_stimer { 544 struct hrtimer timer; 545 int index; 546 union hv_stimer_config config; 547 u64 count; 548 u64 exp_time; 549 struct hv_message msg; 550 bool msg_pending; 551 }; 552 553 /* Hyper-V synthetic interrupt controller (SynIC)*/ 554 struct kvm_vcpu_hv_synic { 555 u64 version; 556 u64 control; 557 u64 msg_page; 558 u64 evt_page; 559 atomic64_t sint[HV_SYNIC_SINT_COUNT]; 560 atomic_t sint_to_gsi[HV_SYNIC_SINT_COUNT]; 561 DECLARE_BITMAP(auto_eoi_bitmap, 256); 562 DECLARE_BITMAP(vec_bitmap, 256); 563 bool active; 564 bool dont_zero_synic_pages; 565 }; 566 567 /* Hyper-V per vcpu emulation context */ 568 struct kvm_vcpu_hv { 569 struct kvm_vcpu *vcpu; 570 u32 vp_index; 571 u64 hv_vapic; 572 s64 runtime_offset; 573 struct kvm_vcpu_hv_synic synic; 574 struct kvm_hyperv_exit exit; 575 struct kvm_vcpu_hv_stimer stimer[HV_SYNIC_STIMER_COUNT]; 576 DECLARE_BITMAP(stimer_pending_bitmap, HV_SYNIC_STIMER_COUNT); 577 cpumask_t tlb_flush; 578 bool enforce_cpuid; 579 struct { 580 u32 features_eax; /* HYPERV_CPUID_FEATURES.EAX */ 581 u32 features_ebx; /* HYPERV_CPUID_FEATURES.EBX */ 582 u32 features_edx; /* HYPERV_CPUID_FEATURES.EDX */ 583 u32 enlightenments_eax; /* HYPERV_CPUID_ENLIGHTMENT_INFO.EAX */ 584 u32 enlightenments_ebx; /* HYPERV_CPUID_ENLIGHTMENT_INFO.EBX */ 585 u32 syndbg_cap_eax; /* HYPERV_CPUID_SYNDBG_PLATFORM_CAPABILITIES.EAX */ 586 } cpuid_cache; 587 }; 588 589 /* Xen HVM per vcpu emulation context */ 590 struct kvm_vcpu_xen { 591 u64 hypercall_rip; 592 u32 current_runstate; 593 bool vcpu_info_set; 594 bool vcpu_time_info_set; 595 bool runstate_set; 596 struct gfn_to_hva_cache vcpu_info_cache; 597 struct gfn_to_hva_cache vcpu_time_info_cache; 598 struct gfn_to_hva_cache runstate_cache; 599 u64 last_steal; 600 u64 runstate_entry_time; 601 u64 runstate_times[4]; 602 }; 603 604 struct kvm_vcpu_arch { 605 /* 606 * rip and regs accesses must go through 607 * kvm_{register,rip}_{read,write} functions. 608 */ 609 unsigned long regs[NR_VCPU_REGS]; 610 u32 regs_avail; 611 u32 regs_dirty; 612 613 unsigned long cr0; 614 unsigned long cr0_guest_owned_bits; 615 unsigned long cr2; 616 unsigned long cr3; 617 unsigned long cr4; 618 unsigned long cr4_guest_owned_bits; 619 unsigned long cr4_guest_rsvd_bits; 620 unsigned long cr8; 621 u32 host_pkru; 622 u32 pkru; 623 u32 hflags; 624 u64 efer; 625 u64 apic_base; 626 struct kvm_lapic *apic; /* kernel irqchip context */ 627 bool apicv_active; 628 bool load_eoi_exitmap_pending; 629 DECLARE_BITMAP(ioapic_handled_vectors, 256); 630 unsigned long apic_attention; 631 int32_t apic_arb_prio; 632 int mp_state; 633 u64 ia32_misc_enable_msr; 634 u64 smbase; 635 u64 smi_count; 636 bool tpr_access_reporting; 637 bool xsaves_enabled; 638 u64 ia32_xss; 639 u64 microcode_version; 640 u64 arch_capabilities; 641 u64 perf_capabilities; 642 643 /* 644 * Paging state of the vcpu 645 * 646 * If the vcpu runs in guest mode with two level paging this still saves 647 * the paging mode of the l1 guest. This context is always used to 648 * handle faults. 649 */ 650 struct kvm_mmu *mmu; 651 652 /* Non-nested MMU for L1 */ 653 struct kvm_mmu root_mmu; 654 655 /* L1 MMU when running nested */ 656 struct kvm_mmu guest_mmu; 657 658 /* 659 * Paging state of an L2 guest (used for nested npt) 660 * 661 * This context will save all necessary information to walk page tables 662 * of an L2 guest. This context is only initialized for page table 663 * walking and not for faulting since we never handle l2 page faults on 664 * the host. 665 */ 666 struct kvm_mmu nested_mmu; 667 668 /* 669 * Pointer to the mmu context currently used for 670 * gva_to_gpa translations. 671 */ 672 struct kvm_mmu *walk_mmu; 673 674 struct kvm_mmu_memory_cache mmu_pte_list_desc_cache; 675 struct kvm_mmu_memory_cache mmu_shadow_page_cache; 676 struct kvm_mmu_memory_cache mmu_gfn_array_cache; 677 struct kvm_mmu_memory_cache mmu_page_header_cache; 678 679 /* 680 * QEMU userspace and the guest each have their own FPU state. 681 * In vcpu_run, we switch between the user and guest FPU contexts. 682 * While running a VCPU, the VCPU thread will have the guest FPU 683 * context. 684 * 685 * Note that while the PKRU state lives inside the fpu registers, 686 * it is switched out separately at VMENTER and VMEXIT time. The 687 * "guest_fpu" state here contains the guest FPU context, with the 688 * host PRKU bits. 689 */ 690 struct fpu *user_fpu; 691 struct fpu *guest_fpu; 692 693 u64 xcr0; 694 u64 guest_supported_xcr0; 695 696 struct kvm_pio_request pio; 697 void *pio_data; 698 void *guest_ins_data; 699 700 u8 event_exit_inst_len; 701 702 struct kvm_queued_exception { 703 bool pending; 704 bool injected; 705 bool has_error_code; 706 u8 nr; 707 u32 error_code; 708 unsigned long payload; 709 bool has_payload; 710 u8 nested_apf; 711 } exception; 712 713 struct kvm_queued_interrupt { 714 bool injected; 715 bool soft; 716 u8 nr; 717 } interrupt; 718 719 int halt_request; /* real mode on Intel only */ 720 721 int cpuid_nent; 722 struct kvm_cpuid_entry2 *cpuid_entries; 723 724 u64 reserved_gpa_bits; 725 int maxphyaddr; 726 int max_tdp_level; 727 728 /* emulate context */ 729 730 struct x86_emulate_ctxt *emulate_ctxt; 731 bool emulate_regs_need_sync_to_vcpu; 732 bool emulate_regs_need_sync_from_vcpu; 733 int (*complete_userspace_io)(struct kvm_vcpu *vcpu); 734 735 gpa_t time; 736 struct pvclock_vcpu_time_info hv_clock; 737 unsigned int hw_tsc_khz; 738 struct gfn_to_hva_cache pv_time; 739 bool pv_time_enabled; 740 /* set guest stopped flag in pvclock flags field */ 741 bool pvclock_set_guest_stopped_request; 742 743 struct { 744 u8 preempted; 745 u64 msr_val; 746 u64 last_steal; 747 struct gfn_to_pfn_cache cache; 748 } st; 749 750 u64 l1_tsc_offset; 751 u64 tsc_offset; /* current tsc offset */ 752 u64 last_guest_tsc; 753 u64 last_host_tsc; 754 u64 tsc_offset_adjustment; 755 u64 this_tsc_nsec; 756 u64 this_tsc_write; 757 u64 this_tsc_generation; 758 bool tsc_catchup; 759 bool tsc_always_catchup; 760 s8 virtual_tsc_shift; 761 u32 virtual_tsc_mult; 762 u32 virtual_tsc_khz; 763 s64 ia32_tsc_adjust_msr; 764 u64 msr_ia32_power_ctl; 765 u64 l1_tsc_scaling_ratio; 766 u64 tsc_scaling_ratio; /* current scaling ratio */ 767 768 atomic_t nmi_queued; /* unprocessed asynchronous NMIs */ 769 unsigned nmi_pending; /* NMI queued after currently running handler */ 770 bool nmi_injected; /* Trying to inject an NMI this entry */ 771 bool smi_pending; /* SMI queued after currently running handler */ 772 773 struct kvm_mtrr mtrr_state; 774 u64 pat; 775 776 unsigned switch_db_regs; 777 unsigned long db[KVM_NR_DB_REGS]; 778 unsigned long dr6; 779 unsigned long dr7; 780 unsigned long eff_db[KVM_NR_DB_REGS]; 781 unsigned long guest_debug_dr7; 782 u64 msr_platform_info; 783 u64 msr_misc_features_enables; 784 785 u64 mcg_cap; 786 u64 mcg_status; 787 u64 mcg_ctl; 788 u64 mcg_ext_ctl; 789 u64 *mce_banks; 790 791 /* Cache MMIO info */ 792 u64 mmio_gva; 793 unsigned mmio_access; 794 gfn_t mmio_gfn; 795 u64 mmio_gen; 796 797 struct kvm_pmu pmu; 798 799 /* used for guest single stepping over the given code position */ 800 unsigned long singlestep_rip; 801 802 bool hyperv_enabled; 803 struct kvm_vcpu_hv *hyperv; 804 struct kvm_vcpu_xen xen; 805 806 cpumask_var_t wbinvd_dirty_mask; 807 808 unsigned long last_retry_eip; 809 unsigned long last_retry_addr; 810 811 struct { 812 bool halted; 813 gfn_t gfns[ASYNC_PF_PER_VCPU]; 814 struct gfn_to_hva_cache data; 815 u64 msr_en_val; /* MSR_KVM_ASYNC_PF_EN */ 816 u64 msr_int_val; /* MSR_KVM_ASYNC_PF_INT */ 817 u16 vec; 818 u32 id; 819 bool send_user_only; 820 u32 host_apf_flags; 821 unsigned long nested_apf_token; 822 bool delivery_as_pf_vmexit; 823 bool pageready_pending; 824 } apf; 825 826 /* OSVW MSRs (AMD only) */ 827 struct { 828 u64 length; 829 u64 status; 830 } osvw; 831 832 struct { 833 u64 msr_val; 834 struct gfn_to_hva_cache data; 835 } pv_eoi; 836 837 u64 msr_kvm_poll_control; 838 839 /* 840 * Indicates the guest is trying to write a gfn that contains one or 841 * more of the PTEs used to translate the write itself, i.e. the access 842 * is changing its own translation in the guest page tables. KVM exits 843 * to userspace if emulation of the faulting instruction fails and this 844 * flag is set, as KVM cannot make forward progress. 845 * 846 * If emulation fails for a write to guest page tables, KVM unprotects 847 * (zaps) the shadow page for the target gfn and resumes the guest to 848 * retry the non-emulatable instruction (on hardware). Unprotecting the 849 * gfn doesn't allow forward progress for a self-changing access because 850 * doing so also zaps the translation for the gfn, i.e. retrying the 851 * instruction will hit a !PRESENT fault, which results in a new shadow 852 * page and sends KVM back to square one. 853 */ 854 bool write_fault_to_shadow_pgtable; 855 856 /* set at EPT violation at this point */ 857 unsigned long exit_qualification; 858 859 /* pv related host specific info */ 860 struct { 861 bool pv_unhalted; 862 } pv; 863 864 int pending_ioapic_eoi; 865 int pending_external_vector; 866 867 /* be preempted when it's in kernel-mode(cpl=0) */ 868 bool preempted_in_kernel; 869 870 /* Flush the L1 Data cache for L1TF mitigation on VMENTER */ 871 bool l1tf_flush_l1d; 872 873 /* Host CPU on which VM-entry was most recently attempted */ 874 int last_vmentry_cpu; 875 876 /* AMD MSRC001_0015 Hardware Configuration */ 877 u64 msr_hwcr; 878 879 /* pv related cpuid info */ 880 struct { 881 /* 882 * value of the eax register in the KVM_CPUID_FEATURES CPUID 883 * leaf. 884 */ 885 u32 features; 886 887 /* 888 * indicates whether pv emulation should be disabled if features 889 * are not present in the guest's cpuid 890 */ 891 bool enforce; 892 } pv_cpuid; 893 894 /* Protected Guests */ 895 bool guest_state_protected; 896 897 /* 898 * Set when PDPTS were loaded directly by the userspace without 899 * reading the guest memory 900 */ 901 bool pdptrs_from_userspace; 902 903 #if IS_ENABLED(CONFIG_HYPERV) 904 hpa_t hv_root_tdp; 905 #endif 906 }; 907 908 struct kvm_lpage_info { 909 int disallow_lpage; 910 }; 911 912 struct kvm_arch_memory_slot { 913 struct kvm_rmap_head *rmap[KVM_NR_PAGE_SIZES]; 914 struct kvm_lpage_info *lpage_info[KVM_NR_PAGE_SIZES - 1]; 915 unsigned short *gfn_track[KVM_PAGE_TRACK_MAX]; 916 }; 917 918 /* 919 * We use as the mode the number of bits allocated in the LDR for the 920 * logical processor ID. It happens that these are all powers of two. 921 * This makes it is very easy to detect cases where the APICs are 922 * configured for multiple modes; in that case, we cannot use the map and 923 * hence cannot use kvm_irq_delivery_to_apic_fast either. 924 */ 925 #define KVM_APIC_MODE_XAPIC_CLUSTER 4 926 #define KVM_APIC_MODE_XAPIC_FLAT 8 927 #define KVM_APIC_MODE_X2APIC 16 928 929 struct kvm_apic_map { 930 struct rcu_head rcu; 931 u8 mode; 932 u32 max_apic_id; 933 union { 934 struct kvm_lapic *xapic_flat_map[8]; 935 struct kvm_lapic *xapic_cluster_map[16][4]; 936 }; 937 struct kvm_lapic *phys_map[]; 938 }; 939 940 /* Hyper-V synthetic debugger (SynDbg)*/ 941 struct kvm_hv_syndbg { 942 struct { 943 u64 control; 944 u64 status; 945 u64 send_page; 946 u64 recv_page; 947 u64 pending_page; 948 } control; 949 u64 options; 950 }; 951 952 /* Current state of Hyper-V TSC page clocksource */ 953 enum hv_tsc_page_status { 954 /* TSC page was not set up or disabled */ 955 HV_TSC_PAGE_UNSET = 0, 956 /* TSC page MSR was written by the guest, update pending */ 957 HV_TSC_PAGE_GUEST_CHANGED, 958 /* TSC page MSR was written by KVM userspace, update pending */ 959 HV_TSC_PAGE_HOST_CHANGED, 960 /* TSC page was properly set up and is currently active */ 961 HV_TSC_PAGE_SET, 962 /* TSC page is currently being updated and therefore is inactive */ 963 HV_TSC_PAGE_UPDATING, 964 /* TSC page was set up with an inaccessible GPA */ 965 HV_TSC_PAGE_BROKEN, 966 }; 967 968 /* Hyper-V emulation context */ 969 struct kvm_hv { 970 struct mutex hv_lock; 971 u64 hv_guest_os_id; 972 u64 hv_hypercall; 973 u64 hv_tsc_page; 974 enum hv_tsc_page_status hv_tsc_page_status; 975 976 /* Hyper-v based guest crash (NT kernel bugcheck) parameters */ 977 u64 hv_crash_param[HV_X64_MSR_CRASH_PARAMS]; 978 u64 hv_crash_ctl; 979 980 struct ms_hyperv_tsc_page tsc_ref; 981 982 struct idr conn_to_evt; 983 984 u64 hv_reenlightenment_control; 985 u64 hv_tsc_emulation_control; 986 u64 hv_tsc_emulation_status; 987 988 /* How many vCPUs have VP index != vCPU index */ 989 atomic_t num_mismatched_vp_indexes; 990 991 struct hv_partition_assist_pg *hv_pa_pg; 992 struct kvm_hv_syndbg hv_syndbg; 993 }; 994 995 struct msr_bitmap_range { 996 u32 flags; 997 u32 nmsrs; 998 u32 base; 999 unsigned long *bitmap; 1000 }; 1001 1002 /* Xen emulation context */ 1003 struct kvm_xen { 1004 bool long_mode; 1005 bool shinfo_set; 1006 u8 upcall_vector; 1007 struct gfn_to_hva_cache shinfo_cache; 1008 }; 1009 1010 enum kvm_irqchip_mode { 1011 KVM_IRQCHIP_NONE, 1012 KVM_IRQCHIP_KERNEL, /* created with KVM_CREATE_IRQCHIP */ 1013 KVM_IRQCHIP_SPLIT, /* created with KVM_CAP_SPLIT_IRQCHIP */ 1014 }; 1015 1016 struct kvm_x86_msr_filter { 1017 u8 count; 1018 bool default_allow:1; 1019 struct msr_bitmap_range ranges[16]; 1020 }; 1021 1022 #define APICV_INHIBIT_REASON_DISABLE 0 1023 #define APICV_INHIBIT_REASON_HYPERV 1 1024 #define APICV_INHIBIT_REASON_NESTED 2 1025 #define APICV_INHIBIT_REASON_IRQWIN 3 1026 #define APICV_INHIBIT_REASON_PIT_REINJ 4 1027 #define APICV_INHIBIT_REASON_X2APIC 5 1028 1029 struct kvm_arch { 1030 unsigned long n_used_mmu_pages; 1031 unsigned long n_requested_mmu_pages; 1032 unsigned long n_max_mmu_pages; 1033 unsigned int indirect_shadow_pages; 1034 u8 mmu_valid_gen; 1035 struct hlist_head mmu_page_hash[KVM_NUM_MMU_PAGES]; 1036 struct list_head active_mmu_pages; 1037 struct list_head zapped_obsolete_pages; 1038 struct list_head lpage_disallowed_mmu_pages; 1039 struct kvm_page_track_notifier_node mmu_sp_tracker; 1040 struct kvm_page_track_notifier_head track_notifier_head; 1041 /* 1042 * Protects marking pages unsync during page faults, as TDP MMU page 1043 * faults only take mmu_lock for read. For simplicity, the unsync 1044 * pages lock is always taken when marking pages unsync regardless of 1045 * whether mmu_lock is held for read or write. 1046 */ 1047 spinlock_t mmu_unsync_pages_lock; 1048 1049 struct list_head assigned_dev_head; 1050 struct iommu_domain *iommu_domain; 1051 bool iommu_noncoherent; 1052 #define __KVM_HAVE_ARCH_NONCOHERENT_DMA 1053 atomic_t noncoherent_dma_count; 1054 #define __KVM_HAVE_ARCH_ASSIGNED_DEVICE 1055 atomic_t assigned_device_count; 1056 struct kvm_pic *vpic; 1057 struct kvm_ioapic *vioapic; 1058 struct kvm_pit *vpit; 1059 atomic_t vapics_in_nmi_mode; 1060 struct mutex apic_map_lock; 1061 struct kvm_apic_map __rcu *apic_map; 1062 atomic_t apic_map_dirty; 1063 1064 bool apic_access_memslot_enabled; 1065 unsigned long apicv_inhibit_reasons; 1066 1067 gpa_t wall_clock; 1068 1069 bool mwait_in_guest; 1070 bool hlt_in_guest; 1071 bool pause_in_guest; 1072 bool cstate_in_guest; 1073 1074 unsigned long irq_sources_bitmap; 1075 s64 kvmclock_offset; 1076 raw_spinlock_t tsc_write_lock; 1077 u64 last_tsc_nsec; 1078 u64 last_tsc_write; 1079 u32 last_tsc_khz; 1080 u64 cur_tsc_nsec; 1081 u64 cur_tsc_write; 1082 u64 cur_tsc_offset; 1083 u64 cur_tsc_generation; 1084 int nr_vcpus_matched_tsc; 1085 1086 spinlock_t pvclock_gtod_sync_lock; 1087 bool use_master_clock; 1088 u64 master_kernel_ns; 1089 u64 master_cycle_now; 1090 struct delayed_work kvmclock_update_work; 1091 struct delayed_work kvmclock_sync_work; 1092 1093 struct kvm_xen_hvm_config xen_hvm_config; 1094 1095 /* reads protected by irq_srcu, writes by irq_lock */ 1096 struct hlist_head mask_notifier_list; 1097 1098 struct kvm_hv hyperv; 1099 struct kvm_xen xen; 1100 1101 #ifdef CONFIG_KVM_MMU_AUDIT 1102 int audit_point; 1103 #endif 1104 1105 bool backwards_tsc_observed; 1106 bool boot_vcpu_runs_old_kvmclock; 1107 u32 bsp_vcpu_id; 1108 1109 u64 disabled_quirks; 1110 int cpu_dirty_logging_count; 1111 1112 enum kvm_irqchip_mode irqchip_mode; 1113 u8 nr_reserved_ioapic_pins; 1114 1115 bool disabled_lapic_found; 1116 1117 bool x2apic_format; 1118 bool x2apic_broadcast_quirk_disabled; 1119 1120 bool guest_can_read_msr_platform_info; 1121 bool exception_payload_enabled; 1122 1123 bool bus_lock_detection_enabled; 1124 /* 1125 * If exit_on_emulation_error is set, and the in-kernel instruction 1126 * emulator fails to emulate an instruction, allow userspace 1127 * the opportunity to look at it. 1128 */ 1129 bool exit_on_emulation_error; 1130 1131 /* Deflect RDMSR and WRMSR to user space when they trigger a #GP */ 1132 u32 user_space_msr_mask; 1133 struct kvm_x86_msr_filter __rcu *msr_filter; 1134 1135 u32 hypercall_exit_enabled; 1136 1137 /* Guest can access the SGX PROVISIONKEY. */ 1138 bool sgx_provisioning_allowed; 1139 1140 struct kvm_pmu_event_filter __rcu *pmu_event_filter; 1141 struct task_struct *nx_lpage_recovery_thread; 1142 1143 #ifdef CONFIG_X86_64 1144 /* 1145 * Whether the TDP MMU is enabled for this VM. This contains a 1146 * snapshot of the TDP MMU module parameter from when the VM was 1147 * created and remains unchanged for the life of the VM. If this is 1148 * true, TDP MMU handler functions will run for various MMU 1149 * operations. 1150 */ 1151 bool tdp_mmu_enabled; 1152 1153 /* 1154 * List of struct kvm_mmu_pages being used as roots. 1155 * All struct kvm_mmu_pages in the list should have 1156 * tdp_mmu_page set. 1157 * 1158 * For reads, this list is protected by: 1159 * the MMU lock in read mode + RCU or 1160 * the MMU lock in write mode 1161 * 1162 * For writes, this list is protected by: 1163 * the MMU lock in read mode + the tdp_mmu_pages_lock or 1164 * the MMU lock in write mode 1165 * 1166 * Roots will remain in the list until their tdp_mmu_root_count 1167 * drops to zero, at which point the thread that decremented the 1168 * count to zero should removed the root from the list and clean 1169 * it up, freeing the root after an RCU grace period. 1170 */ 1171 struct list_head tdp_mmu_roots; 1172 1173 /* 1174 * List of struct kvmp_mmu_pages not being used as roots. 1175 * All struct kvm_mmu_pages in the list should have 1176 * tdp_mmu_page set and a tdp_mmu_root_count of 0. 1177 */ 1178 struct list_head tdp_mmu_pages; 1179 1180 /* 1181 * Protects accesses to the following fields when the MMU lock 1182 * is held in read mode: 1183 * - tdp_mmu_roots (above) 1184 * - tdp_mmu_pages (above) 1185 * - the link field of struct kvm_mmu_pages used by the TDP MMU 1186 * - lpage_disallowed_mmu_pages 1187 * - the lpage_disallowed_link field of struct kvm_mmu_pages used 1188 * by the TDP MMU 1189 * It is acceptable, but not necessary, to acquire this lock when 1190 * the thread holds the MMU lock in write mode. 1191 */ 1192 spinlock_t tdp_mmu_pages_lock; 1193 #endif /* CONFIG_X86_64 */ 1194 1195 /* 1196 * If set, rmaps have been allocated for all memslots and should be 1197 * allocated for any newly created or modified memslots. 1198 */ 1199 bool memslots_have_rmaps; 1200 1201 #if IS_ENABLED(CONFIG_HYPERV) 1202 hpa_t hv_root_tdp; 1203 spinlock_t hv_root_tdp_lock; 1204 #endif 1205 }; 1206 1207 struct kvm_vm_stat { 1208 struct kvm_vm_stat_generic generic; 1209 u64 mmu_shadow_zapped; 1210 u64 mmu_pte_write; 1211 u64 mmu_pde_zapped; 1212 u64 mmu_flooded; 1213 u64 mmu_recycled; 1214 u64 mmu_cache_miss; 1215 u64 mmu_unsync; 1216 u64 lpages; 1217 u64 nx_lpage_splits; 1218 u64 max_mmu_page_hash_collisions; 1219 }; 1220 1221 struct kvm_vcpu_stat { 1222 struct kvm_vcpu_stat_generic generic; 1223 u64 pf_fixed; 1224 u64 pf_guest; 1225 u64 tlb_flush; 1226 u64 invlpg; 1227 1228 u64 exits; 1229 u64 io_exits; 1230 u64 mmio_exits; 1231 u64 signal_exits; 1232 u64 irq_window_exits; 1233 u64 nmi_window_exits; 1234 u64 l1d_flush; 1235 u64 halt_exits; 1236 u64 request_irq_exits; 1237 u64 irq_exits; 1238 u64 host_state_reload; 1239 u64 fpu_reload; 1240 u64 insn_emulation; 1241 u64 insn_emulation_fail; 1242 u64 hypercalls; 1243 u64 irq_injections; 1244 u64 nmi_injections; 1245 u64 req_event; 1246 u64 nested_run; 1247 u64 directed_yield_attempted; 1248 u64 directed_yield_successful; 1249 u64 guest_mode; 1250 }; 1251 1252 struct x86_instruction_info; 1253 1254 struct msr_data { 1255 bool host_initiated; 1256 u32 index; 1257 u64 data; 1258 }; 1259 1260 struct kvm_lapic_irq { 1261 u32 vector; 1262 u16 delivery_mode; 1263 u16 dest_mode; 1264 bool level; 1265 u16 trig_mode; 1266 u32 shorthand; 1267 u32 dest_id; 1268 bool msi_redir_hint; 1269 }; 1270 1271 static inline u16 kvm_lapic_irq_dest_mode(bool dest_mode_logical) 1272 { 1273 return dest_mode_logical ? APIC_DEST_LOGICAL : APIC_DEST_PHYSICAL; 1274 } 1275 1276 struct kvm_x86_ops { 1277 int (*hardware_enable)(void); 1278 void (*hardware_disable)(void); 1279 void (*hardware_unsetup)(void); 1280 bool (*cpu_has_accelerated_tpr)(void); 1281 bool (*has_emulated_msr)(struct kvm *kvm, u32 index); 1282 void (*vcpu_after_set_cpuid)(struct kvm_vcpu *vcpu); 1283 1284 unsigned int vm_size; 1285 int (*vm_init)(struct kvm *kvm); 1286 void (*vm_destroy)(struct kvm *kvm); 1287 1288 /* Create, but do not attach this VCPU */ 1289 int (*vcpu_create)(struct kvm_vcpu *vcpu); 1290 void (*vcpu_free)(struct kvm_vcpu *vcpu); 1291 void (*vcpu_reset)(struct kvm_vcpu *vcpu, bool init_event); 1292 1293 void (*prepare_guest_switch)(struct kvm_vcpu *vcpu); 1294 void (*vcpu_load)(struct kvm_vcpu *vcpu, int cpu); 1295 void (*vcpu_put)(struct kvm_vcpu *vcpu); 1296 1297 void (*update_exception_bitmap)(struct kvm_vcpu *vcpu); 1298 int (*get_msr)(struct kvm_vcpu *vcpu, struct msr_data *msr); 1299 int (*set_msr)(struct kvm_vcpu *vcpu, struct msr_data *msr); 1300 u64 (*get_segment_base)(struct kvm_vcpu *vcpu, int seg); 1301 void (*get_segment)(struct kvm_vcpu *vcpu, 1302 struct kvm_segment *var, int seg); 1303 int (*get_cpl)(struct kvm_vcpu *vcpu); 1304 void (*set_segment)(struct kvm_vcpu *vcpu, 1305 struct kvm_segment *var, int seg); 1306 void (*get_cs_db_l_bits)(struct kvm_vcpu *vcpu, int *db, int *l); 1307 void (*set_cr0)(struct kvm_vcpu *vcpu, unsigned long cr0); 1308 bool (*is_valid_cr4)(struct kvm_vcpu *vcpu, unsigned long cr0); 1309 void (*set_cr4)(struct kvm_vcpu *vcpu, unsigned long cr4); 1310 int (*set_efer)(struct kvm_vcpu *vcpu, u64 efer); 1311 void (*get_idt)(struct kvm_vcpu *vcpu, struct desc_ptr *dt); 1312 void (*set_idt)(struct kvm_vcpu *vcpu, struct desc_ptr *dt); 1313 void (*get_gdt)(struct kvm_vcpu *vcpu, struct desc_ptr *dt); 1314 void (*set_gdt)(struct kvm_vcpu *vcpu, struct desc_ptr *dt); 1315 void (*sync_dirty_debug_regs)(struct kvm_vcpu *vcpu); 1316 void (*set_dr7)(struct kvm_vcpu *vcpu, unsigned long value); 1317 void (*cache_reg)(struct kvm_vcpu *vcpu, enum kvm_reg reg); 1318 unsigned long (*get_rflags)(struct kvm_vcpu *vcpu); 1319 void (*set_rflags)(struct kvm_vcpu *vcpu, unsigned long rflags); 1320 1321 void (*tlb_flush_all)(struct kvm_vcpu *vcpu); 1322 void (*tlb_flush_current)(struct kvm_vcpu *vcpu); 1323 int (*tlb_remote_flush)(struct kvm *kvm); 1324 int (*tlb_remote_flush_with_range)(struct kvm *kvm, 1325 struct kvm_tlb_range *range); 1326 1327 /* 1328 * Flush any TLB entries associated with the given GVA. 1329 * Does not need to flush GPA->HPA mappings. 1330 * Can potentially get non-canonical addresses through INVLPGs, which 1331 * the implementation may choose to ignore if appropriate. 1332 */ 1333 void (*tlb_flush_gva)(struct kvm_vcpu *vcpu, gva_t addr); 1334 1335 /* 1336 * Flush any TLB entries created by the guest. Like tlb_flush_gva(), 1337 * does not need to flush GPA->HPA mappings. 1338 */ 1339 void (*tlb_flush_guest)(struct kvm_vcpu *vcpu); 1340 1341 enum exit_fastpath_completion (*run)(struct kvm_vcpu *vcpu); 1342 int (*handle_exit)(struct kvm_vcpu *vcpu, 1343 enum exit_fastpath_completion exit_fastpath); 1344 int (*skip_emulated_instruction)(struct kvm_vcpu *vcpu); 1345 void (*update_emulated_instruction)(struct kvm_vcpu *vcpu); 1346 void (*set_interrupt_shadow)(struct kvm_vcpu *vcpu, int mask); 1347 u32 (*get_interrupt_shadow)(struct kvm_vcpu *vcpu); 1348 void (*patch_hypercall)(struct kvm_vcpu *vcpu, 1349 unsigned char *hypercall_addr); 1350 void (*set_irq)(struct kvm_vcpu *vcpu); 1351 void (*set_nmi)(struct kvm_vcpu *vcpu); 1352 void (*queue_exception)(struct kvm_vcpu *vcpu); 1353 void (*cancel_injection)(struct kvm_vcpu *vcpu); 1354 int (*interrupt_allowed)(struct kvm_vcpu *vcpu, bool for_injection); 1355 int (*nmi_allowed)(struct kvm_vcpu *vcpu, bool for_injection); 1356 bool (*get_nmi_mask)(struct kvm_vcpu *vcpu); 1357 void (*set_nmi_mask)(struct kvm_vcpu *vcpu, bool masked); 1358 void (*enable_nmi_window)(struct kvm_vcpu *vcpu); 1359 void (*enable_irq_window)(struct kvm_vcpu *vcpu); 1360 void (*update_cr8_intercept)(struct kvm_vcpu *vcpu, int tpr, int irr); 1361 bool (*check_apicv_inhibit_reasons)(ulong bit); 1362 void (*pre_update_apicv_exec_ctrl)(struct kvm *kvm, bool activate); 1363 void (*refresh_apicv_exec_ctrl)(struct kvm_vcpu *vcpu); 1364 void (*hwapic_irr_update)(struct kvm_vcpu *vcpu, int max_irr); 1365 void (*hwapic_isr_update)(struct kvm_vcpu *vcpu, int isr); 1366 bool (*guest_apic_has_interrupt)(struct kvm_vcpu *vcpu); 1367 void (*load_eoi_exitmap)(struct kvm_vcpu *vcpu, u64 *eoi_exit_bitmap); 1368 void (*set_virtual_apic_mode)(struct kvm_vcpu *vcpu); 1369 void (*set_apic_access_page_addr)(struct kvm_vcpu *vcpu); 1370 int (*deliver_posted_interrupt)(struct kvm_vcpu *vcpu, int vector); 1371 int (*sync_pir_to_irr)(struct kvm_vcpu *vcpu); 1372 int (*set_tss_addr)(struct kvm *kvm, unsigned int addr); 1373 int (*set_identity_map_addr)(struct kvm *kvm, u64 ident_addr); 1374 u64 (*get_mt_mask)(struct kvm_vcpu *vcpu, gfn_t gfn, bool is_mmio); 1375 1376 void (*load_mmu_pgd)(struct kvm_vcpu *vcpu, hpa_t root_hpa, 1377 int root_level); 1378 1379 bool (*has_wbinvd_exit)(void); 1380 1381 u64 (*get_l2_tsc_offset)(struct kvm_vcpu *vcpu); 1382 u64 (*get_l2_tsc_multiplier)(struct kvm_vcpu *vcpu); 1383 void (*write_tsc_offset)(struct kvm_vcpu *vcpu, u64 offset); 1384 void (*write_tsc_multiplier)(struct kvm_vcpu *vcpu, u64 multiplier); 1385 1386 /* 1387 * Retrieve somewhat arbitrary exit information. Intended to be used 1388 * only from within tracepoints to avoid VMREADs when tracing is off. 1389 */ 1390 void (*get_exit_info)(struct kvm_vcpu *vcpu, u64 *info1, u64 *info2, 1391 u32 *exit_int_info, u32 *exit_int_info_err_code); 1392 1393 int (*check_intercept)(struct kvm_vcpu *vcpu, 1394 struct x86_instruction_info *info, 1395 enum x86_intercept_stage stage, 1396 struct x86_exception *exception); 1397 void (*handle_exit_irqoff)(struct kvm_vcpu *vcpu); 1398 1399 void (*request_immediate_exit)(struct kvm_vcpu *vcpu); 1400 1401 void (*sched_in)(struct kvm_vcpu *kvm, int cpu); 1402 1403 /* 1404 * Size of the CPU's dirty log buffer, i.e. VMX's PML buffer. A zero 1405 * value indicates CPU dirty logging is unsupported or disabled. 1406 */ 1407 int cpu_dirty_log_size; 1408 void (*update_cpu_dirty_logging)(struct kvm_vcpu *vcpu); 1409 1410 /* pmu operations of sub-arch */ 1411 const struct kvm_pmu_ops *pmu_ops; 1412 const struct kvm_x86_nested_ops *nested_ops; 1413 1414 /* 1415 * Architecture specific hooks for vCPU blocking due to 1416 * HLT instruction. 1417 * Returns for .pre_block(): 1418 * - 0 means continue to block the vCPU. 1419 * - 1 means we cannot block the vCPU since some event 1420 * happens during this period, such as, 'ON' bit in 1421 * posted-interrupts descriptor is set. 1422 */ 1423 int (*pre_block)(struct kvm_vcpu *vcpu); 1424 void (*post_block)(struct kvm_vcpu *vcpu); 1425 1426 void (*vcpu_blocking)(struct kvm_vcpu *vcpu); 1427 void (*vcpu_unblocking)(struct kvm_vcpu *vcpu); 1428 1429 int (*update_pi_irte)(struct kvm *kvm, unsigned int host_irq, 1430 uint32_t guest_irq, bool set); 1431 void (*start_assignment)(struct kvm *kvm); 1432 void (*apicv_post_state_restore)(struct kvm_vcpu *vcpu); 1433 bool (*dy_apicv_has_pending_interrupt)(struct kvm_vcpu *vcpu); 1434 1435 int (*set_hv_timer)(struct kvm_vcpu *vcpu, u64 guest_deadline_tsc, 1436 bool *expired); 1437 void (*cancel_hv_timer)(struct kvm_vcpu *vcpu); 1438 1439 void (*setup_mce)(struct kvm_vcpu *vcpu); 1440 1441 int (*smi_allowed)(struct kvm_vcpu *vcpu, bool for_injection); 1442 int (*enter_smm)(struct kvm_vcpu *vcpu, char *smstate); 1443 int (*leave_smm)(struct kvm_vcpu *vcpu, const char *smstate); 1444 void (*enable_smi_window)(struct kvm_vcpu *vcpu); 1445 1446 int (*mem_enc_op)(struct kvm *kvm, void __user *argp); 1447 int (*mem_enc_reg_region)(struct kvm *kvm, struct kvm_enc_region *argp); 1448 int (*mem_enc_unreg_region)(struct kvm *kvm, struct kvm_enc_region *argp); 1449 int (*vm_copy_enc_context_from)(struct kvm *kvm, unsigned int source_fd); 1450 1451 int (*get_msr_feature)(struct kvm_msr_entry *entry); 1452 1453 bool (*can_emulate_instruction)(struct kvm_vcpu *vcpu, void *insn, int insn_len); 1454 1455 bool (*apic_init_signal_blocked)(struct kvm_vcpu *vcpu); 1456 int (*enable_direct_tlbflush)(struct kvm_vcpu *vcpu); 1457 1458 void (*migrate_timers)(struct kvm_vcpu *vcpu); 1459 void (*msr_filter_changed)(struct kvm_vcpu *vcpu); 1460 int (*complete_emulated_msr)(struct kvm_vcpu *vcpu, int err); 1461 1462 void (*vcpu_deliver_sipi_vector)(struct kvm_vcpu *vcpu, u8 vector); 1463 }; 1464 1465 struct kvm_x86_nested_ops { 1466 int (*check_events)(struct kvm_vcpu *vcpu); 1467 bool (*hv_timer_pending)(struct kvm_vcpu *vcpu); 1468 void (*triple_fault)(struct kvm_vcpu *vcpu); 1469 int (*get_state)(struct kvm_vcpu *vcpu, 1470 struct kvm_nested_state __user *user_kvm_nested_state, 1471 unsigned user_data_size); 1472 int (*set_state)(struct kvm_vcpu *vcpu, 1473 struct kvm_nested_state __user *user_kvm_nested_state, 1474 struct kvm_nested_state *kvm_state); 1475 bool (*get_nested_state_pages)(struct kvm_vcpu *vcpu); 1476 int (*write_log_dirty)(struct kvm_vcpu *vcpu, gpa_t l2_gpa); 1477 1478 int (*enable_evmcs)(struct kvm_vcpu *vcpu, 1479 uint16_t *vmcs_version); 1480 uint16_t (*get_evmcs_version)(struct kvm_vcpu *vcpu); 1481 }; 1482 1483 struct kvm_x86_init_ops { 1484 int (*cpu_has_kvm_support)(void); 1485 int (*disabled_by_bios)(void); 1486 int (*check_processor_compatibility)(void); 1487 int (*hardware_setup)(void); 1488 1489 struct kvm_x86_ops *runtime_ops; 1490 }; 1491 1492 struct kvm_arch_async_pf { 1493 u32 token; 1494 gfn_t gfn; 1495 unsigned long cr3; 1496 bool direct_map; 1497 }; 1498 1499 extern u32 __read_mostly kvm_nr_uret_msrs; 1500 extern u64 __read_mostly host_efer; 1501 extern bool __read_mostly allow_smaller_maxphyaddr; 1502 extern bool __read_mostly enable_apicv; 1503 extern struct kvm_x86_ops kvm_x86_ops; 1504 1505 #define KVM_X86_OP(func) \ 1506 DECLARE_STATIC_CALL(kvm_x86_##func, *(((struct kvm_x86_ops *)0)->func)); 1507 #define KVM_X86_OP_NULL KVM_X86_OP 1508 #include <asm/kvm-x86-ops.h> 1509 1510 static inline void kvm_ops_static_call_update(void) 1511 { 1512 #define KVM_X86_OP(func) \ 1513 static_call_update(kvm_x86_##func, kvm_x86_ops.func); 1514 #define KVM_X86_OP_NULL KVM_X86_OP 1515 #include <asm/kvm-x86-ops.h> 1516 } 1517 1518 #define __KVM_HAVE_ARCH_VM_ALLOC 1519 static inline struct kvm *kvm_arch_alloc_vm(void) 1520 { 1521 return __vmalloc(kvm_x86_ops.vm_size, GFP_KERNEL_ACCOUNT | __GFP_ZERO); 1522 } 1523 void kvm_arch_free_vm(struct kvm *kvm); 1524 1525 #define __KVM_HAVE_ARCH_FLUSH_REMOTE_TLB 1526 static inline int kvm_arch_flush_remote_tlb(struct kvm *kvm) 1527 { 1528 if (kvm_x86_ops.tlb_remote_flush && 1529 !static_call(kvm_x86_tlb_remote_flush)(kvm)) 1530 return 0; 1531 else 1532 return -ENOTSUPP; 1533 } 1534 1535 int kvm_mmu_module_init(void); 1536 void kvm_mmu_module_exit(void); 1537 1538 void kvm_mmu_destroy(struct kvm_vcpu *vcpu); 1539 int kvm_mmu_create(struct kvm_vcpu *vcpu); 1540 void kvm_mmu_init_vm(struct kvm *kvm); 1541 void kvm_mmu_uninit_vm(struct kvm *kvm); 1542 1543 void kvm_mmu_after_set_cpuid(struct kvm_vcpu *vcpu); 1544 void kvm_mmu_reset_context(struct kvm_vcpu *vcpu); 1545 void kvm_mmu_slot_remove_write_access(struct kvm *kvm, 1546 struct kvm_memory_slot *memslot, 1547 int start_level); 1548 void kvm_mmu_zap_collapsible_sptes(struct kvm *kvm, 1549 const struct kvm_memory_slot *memslot); 1550 void kvm_mmu_slot_leaf_clear_dirty(struct kvm *kvm, 1551 struct kvm_memory_slot *memslot); 1552 void kvm_mmu_zap_all(struct kvm *kvm); 1553 void kvm_mmu_invalidate_mmio_sptes(struct kvm *kvm, u64 gen); 1554 unsigned long kvm_mmu_calculate_default_mmu_pages(struct kvm *kvm); 1555 void kvm_mmu_change_mmu_pages(struct kvm *kvm, unsigned long kvm_nr_mmu_pages); 1556 1557 int load_pdptrs(struct kvm_vcpu *vcpu, struct kvm_mmu *mmu, unsigned long cr3); 1558 1559 int emulator_write_phys(struct kvm_vcpu *vcpu, gpa_t gpa, 1560 const void *val, int bytes); 1561 1562 struct kvm_irq_mask_notifier { 1563 void (*func)(struct kvm_irq_mask_notifier *kimn, bool masked); 1564 int irq; 1565 struct hlist_node link; 1566 }; 1567 1568 void kvm_register_irq_mask_notifier(struct kvm *kvm, int irq, 1569 struct kvm_irq_mask_notifier *kimn); 1570 void kvm_unregister_irq_mask_notifier(struct kvm *kvm, int irq, 1571 struct kvm_irq_mask_notifier *kimn); 1572 void kvm_fire_mask_notifiers(struct kvm *kvm, unsigned irqchip, unsigned pin, 1573 bool mask); 1574 1575 extern bool tdp_enabled; 1576 1577 u64 vcpu_tsc_khz(struct kvm_vcpu *vcpu); 1578 1579 /* control of guest tsc rate supported? */ 1580 extern bool kvm_has_tsc_control; 1581 /* maximum supported tsc_khz for guests */ 1582 extern u32 kvm_max_guest_tsc_khz; 1583 /* number of bits of the fractional part of the TSC scaling ratio */ 1584 extern u8 kvm_tsc_scaling_ratio_frac_bits; 1585 /* maximum allowed value of TSC scaling ratio */ 1586 extern u64 kvm_max_tsc_scaling_ratio; 1587 /* 1ull << kvm_tsc_scaling_ratio_frac_bits */ 1588 extern u64 kvm_default_tsc_scaling_ratio; 1589 /* bus lock detection supported? */ 1590 extern bool kvm_has_bus_lock_exit; 1591 1592 extern u64 kvm_mce_cap_supported; 1593 1594 /* 1595 * EMULTYPE_NO_DECODE - Set when re-emulating an instruction (after completing 1596 * userspace I/O) to indicate that the emulation context 1597 * should be reused as is, i.e. skip initialization of 1598 * emulation context, instruction fetch and decode. 1599 * 1600 * EMULTYPE_TRAP_UD - Set when emulating an intercepted #UD from hardware. 1601 * Indicates that only select instructions (tagged with 1602 * EmulateOnUD) should be emulated (to minimize the emulator 1603 * attack surface). See also EMULTYPE_TRAP_UD_FORCED. 1604 * 1605 * EMULTYPE_SKIP - Set when emulating solely to skip an instruction, i.e. to 1606 * decode the instruction length. For use *only* by 1607 * kvm_x86_ops.skip_emulated_instruction() implementations. 1608 * 1609 * EMULTYPE_ALLOW_RETRY_PF - Set when the emulator should resume the guest to 1610 * retry native execution under certain conditions, 1611 * Can only be set in conjunction with EMULTYPE_PF. 1612 * 1613 * EMULTYPE_TRAP_UD_FORCED - Set when emulating an intercepted #UD that was 1614 * triggered by KVM's magic "force emulation" prefix, 1615 * which is opt in via module param (off by default). 1616 * Bypasses EmulateOnUD restriction despite emulating 1617 * due to an intercepted #UD (see EMULTYPE_TRAP_UD). 1618 * Used to test the full emulator from userspace. 1619 * 1620 * EMULTYPE_VMWARE_GP - Set when emulating an intercepted #GP for VMware 1621 * backdoor emulation, which is opt in via module param. 1622 * VMware backdoor emulation handles select instructions 1623 * and reinjects the #GP for all other cases. 1624 * 1625 * EMULTYPE_PF - Set when emulating MMIO by way of an intercepted #PF, in which 1626 * case the CR2/GPA value pass on the stack is valid. 1627 */ 1628 #define EMULTYPE_NO_DECODE (1 << 0) 1629 #define EMULTYPE_TRAP_UD (1 << 1) 1630 #define EMULTYPE_SKIP (1 << 2) 1631 #define EMULTYPE_ALLOW_RETRY_PF (1 << 3) 1632 #define EMULTYPE_TRAP_UD_FORCED (1 << 4) 1633 #define EMULTYPE_VMWARE_GP (1 << 5) 1634 #define EMULTYPE_PF (1 << 6) 1635 1636 int kvm_emulate_instruction(struct kvm_vcpu *vcpu, int emulation_type); 1637 int kvm_emulate_instruction_from_buffer(struct kvm_vcpu *vcpu, 1638 void *insn, int insn_len); 1639 1640 void kvm_enable_efer_bits(u64); 1641 bool kvm_valid_efer(struct kvm_vcpu *vcpu, u64 efer); 1642 int __kvm_get_msr(struct kvm_vcpu *vcpu, u32 index, u64 *data, bool host_initiated); 1643 int kvm_get_msr(struct kvm_vcpu *vcpu, u32 index, u64 *data); 1644 int kvm_set_msr(struct kvm_vcpu *vcpu, u32 index, u64 data); 1645 int kvm_emulate_rdmsr(struct kvm_vcpu *vcpu); 1646 int kvm_emulate_wrmsr(struct kvm_vcpu *vcpu); 1647 int kvm_emulate_as_nop(struct kvm_vcpu *vcpu); 1648 int kvm_emulate_invd(struct kvm_vcpu *vcpu); 1649 int kvm_emulate_mwait(struct kvm_vcpu *vcpu); 1650 int kvm_handle_invalid_op(struct kvm_vcpu *vcpu); 1651 int kvm_emulate_monitor(struct kvm_vcpu *vcpu); 1652 1653 int kvm_fast_pio(struct kvm_vcpu *vcpu, int size, unsigned short port, int in); 1654 int kvm_emulate_cpuid(struct kvm_vcpu *vcpu); 1655 int kvm_emulate_halt(struct kvm_vcpu *vcpu); 1656 int kvm_vcpu_halt(struct kvm_vcpu *vcpu); 1657 int kvm_emulate_ap_reset_hold(struct kvm_vcpu *vcpu); 1658 int kvm_emulate_wbinvd(struct kvm_vcpu *vcpu); 1659 1660 void kvm_get_segment(struct kvm_vcpu *vcpu, struct kvm_segment *var, int seg); 1661 int kvm_load_segment_descriptor(struct kvm_vcpu *vcpu, u16 selector, int seg); 1662 void kvm_vcpu_deliver_sipi_vector(struct kvm_vcpu *vcpu, u8 vector); 1663 1664 int kvm_task_switch(struct kvm_vcpu *vcpu, u16 tss_selector, int idt_index, 1665 int reason, bool has_error_code, u32 error_code); 1666 1667 void kvm_free_guest_fpu(struct kvm_vcpu *vcpu); 1668 1669 void kvm_post_set_cr0(struct kvm_vcpu *vcpu, unsigned long old_cr0, unsigned long cr0); 1670 void kvm_post_set_cr4(struct kvm_vcpu *vcpu, unsigned long old_cr4, unsigned long cr4); 1671 int kvm_set_cr0(struct kvm_vcpu *vcpu, unsigned long cr0); 1672 int kvm_set_cr3(struct kvm_vcpu *vcpu, unsigned long cr3); 1673 int kvm_set_cr4(struct kvm_vcpu *vcpu, unsigned long cr4); 1674 int kvm_set_cr8(struct kvm_vcpu *vcpu, unsigned long cr8); 1675 int kvm_set_dr(struct kvm_vcpu *vcpu, int dr, unsigned long val); 1676 void kvm_get_dr(struct kvm_vcpu *vcpu, int dr, unsigned long *val); 1677 unsigned long kvm_get_cr8(struct kvm_vcpu *vcpu); 1678 void kvm_lmsw(struct kvm_vcpu *vcpu, unsigned long msw); 1679 void kvm_get_cs_db_l_bits(struct kvm_vcpu *vcpu, int *db, int *l); 1680 int kvm_emulate_xsetbv(struct kvm_vcpu *vcpu); 1681 1682 int kvm_get_msr_common(struct kvm_vcpu *vcpu, struct msr_data *msr); 1683 int kvm_set_msr_common(struct kvm_vcpu *vcpu, struct msr_data *msr); 1684 1685 unsigned long kvm_get_rflags(struct kvm_vcpu *vcpu); 1686 void kvm_set_rflags(struct kvm_vcpu *vcpu, unsigned long rflags); 1687 int kvm_emulate_rdpmc(struct kvm_vcpu *vcpu); 1688 1689 void kvm_queue_exception(struct kvm_vcpu *vcpu, unsigned nr); 1690 void kvm_queue_exception_e(struct kvm_vcpu *vcpu, unsigned nr, u32 error_code); 1691 void kvm_queue_exception_p(struct kvm_vcpu *vcpu, unsigned nr, unsigned long payload); 1692 void kvm_requeue_exception(struct kvm_vcpu *vcpu, unsigned nr); 1693 void kvm_requeue_exception_e(struct kvm_vcpu *vcpu, unsigned nr, u32 error_code); 1694 void kvm_inject_page_fault(struct kvm_vcpu *vcpu, struct x86_exception *fault); 1695 bool kvm_inject_emulated_page_fault(struct kvm_vcpu *vcpu, 1696 struct x86_exception *fault); 1697 int kvm_read_guest_page_mmu(struct kvm_vcpu *vcpu, struct kvm_mmu *mmu, 1698 gfn_t gfn, void *data, int offset, int len, 1699 u32 access); 1700 bool kvm_require_cpl(struct kvm_vcpu *vcpu, int required_cpl); 1701 bool kvm_require_dr(struct kvm_vcpu *vcpu, int dr); 1702 1703 static inline int __kvm_irq_line_state(unsigned long *irq_state, 1704 int irq_source_id, int level) 1705 { 1706 /* Logical OR for level trig interrupt */ 1707 if (level) 1708 __set_bit(irq_source_id, irq_state); 1709 else 1710 __clear_bit(irq_source_id, irq_state); 1711 1712 return !!(*irq_state); 1713 } 1714 1715 #define KVM_MMU_ROOT_CURRENT BIT(0) 1716 #define KVM_MMU_ROOT_PREVIOUS(i) BIT(1+i) 1717 #define KVM_MMU_ROOTS_ALL (~0UL) 1718 1719 int kvm_pic_set_irq(struct kvm_pic *pic, int irq, int irq_source_id, int level); 1720 void kvm_pic_clear_all(struct kvm_pic *pic, int irq_source_id); 1721 1722 void kvm_inject_nmi(struct kvm_vcpu *vcpu); 1723 1724 void kvm_update_dr7(struct kvm_vcpu *vcpu); 1725 1726 int kvm_mmu_unprotect_page(struct kvm *kvm, gfn_t gfn); 1727 void __kvm_mmu_free_some_pages(struct kvm_vcpu *vcpu); 1728 void kvm_mmu_free_roots(struct kvm_vcpu *vcpu, struct kvm_mmu *mmu, 1729 ulong roots_to_free); 1730 void kvm_mmu_free_guest_mode_roots(struct kvm_vcpu *vcpu, struct kvm_mmu *mmu); 1731 gpa_t translate_nested_gpa(struct kvm_vcpu *vcpu, gpa_t gpa, u32 access, 1732 struct x86_exception *exception); 1733 gpa_t kvm_mmu_gva_to_gpa_read(struct kvm_vcpu *vcpu, gva_t gva, 1734 struct x86_exception *exception); 1735 gpa_t kvm_mmu_gva_to_gpa_fetch(struct kvm_vcpu *vcpu, gva_t gva, 1736 struct x86_exception *exception); 1737 gpa_t kvm_mmu_gva_to_gpa_write(struct kvm_vcpu *vcpu, gva_t gva, 1738 struct x86_exception *exception); 1739 gpa_t kvm_mmu_gva_to_gpa_system(struct kvm_vcpu *vcpu, gva_t gva, 1740 struct x86_exception *exception); 1741 1742 bool kvm_apicv_activated(struct kvm *kvm); 1743 void kvm_vcpu_update_apicv(struct kvm_vcpu *vcpu); 1744 void kvm_request_apicv_update(struct kvm *kvm, bool activate, 1745 unsigned long bit); 1746 1747 int kvm_emulate_hypercall(struct kvm_vcpu *vcpu); 1748 1749 int kvm_mmu_page_fault(struct kvm_vcpu *vcpu, gpa_t cr2_or_gpa, u64 error_code, 1750 void *insn, int insn_len); 1751 void kvm_mmu_invlpg(struct kvm_vcpu *vcpu, gva_t gva); 1752 void kvm_mmu_invalidate_gva(struct kvm_vcpu *vcpu, struct kvm_mmu *mmu, 1753 gva_t gva, hpa_t root_hpa); 1754 void kvm_mmu_invpcid_gva(struct kvm_vcpu *vcpu, gva_t gva, unsigned long pcid); 1755 void kvm_mmu_new_pgd(struct kvm_vcpu *vcpu, gpa_t new_pgd); 1756 1757 void kvm_configure_mmu(bool enable_tdp, int tdp_max_root_level, 1758 int tdp_huge_page_level); 1759 1760 static inline u16 kvm_read_ldt(void) 1761 { 1762 u16 ldt; 1763 asm("sldt %0" : "=g"(ldt)); 1764 return ldt; 1765 } 1766 1767 static inline void kvm_load_ldt(u16 sel) 1768 { 1769 asm("lldt %0" : : "rm"(sel)); 1770 } 1771 1772 #ifdef CONFIG_X86_64 1773 static inline unsigned long read_msr(unsigned long msr) 1774 { 1775 u64 value; 1776 1777 rdmsrl(msr, value); 1778 return value; 1779 } 1780 #endif 1781 1782 static inline u32 get_rdx_init_val(void) 1783 { 1784 return 0x600; /* P6 family */ 1785 } 1786 1787 static inline void kvm_inject_gp(struct kvm_vcpu *vcpu, u32 error_code) 1788 { 1789 kvm_queue_exception_e(vcpu, GP_VECTOR, error_code); 1790 } 1791 1792 #define TSS_IOPB_BASE_OFFSET 0x66 1793 #define TSS_BASE_SIZE 0x68 1794 #define TSS_IOPB_SIZE (65536 / 8) 1795 #define TSS_REDIRECTION_SIZE (256 / 8) 1796 #define RMODE_TSS_SIZE \ 1797 (TSS_BASE_SIZE + TSS_REDIRECTION_SIZE + TSS_IOPB_SIZE + 1) 1798 1799 enum { 1800 TASK_SWITCH_CALL = 0, 1801 TASK_SWITCH_IRET = 1, 1802 TASK_SWITCH_JMP = 2, 1803 TASK_SWITCH_GATE = 3, 1804 }; 1805 1806 #define HF_GIF_MASK (1 << 0) 1807 #define HF_NMI_MASK (1 << 3) 1808 #define HF_IRET_MASK (1 << 4) 1809 #define HF_GUEST_MASK (1 << 5) /* VCPU is in guest-mode */ 1810 #define HF_SMM_MASK (1 << 6) 1811 #define HF_SMM_INSIDE_NMI_MASK (1 << 7) 1812 1813 #define __KVM_VCPU_MULTIPLE_ADDRESS_SPACE 1814 #define KVM_ADDRESS_SPACE_NUM 2 1815 1816 #define kvm_arch_vcpu_memslots_id(vcpu) ((vcpu)->arch.hflags & HF_SMM_MASK ? 1 : 0) 1817 #define kvm_memslots_for_spte_role(kvm, role) __kvm_memslots(kvm, (role).smm) 1818 1819 asmlinkage void kvm_spurious_fault(void); 1820 1821 /* 1822 * Hardware virtualization extension instructions may fault if a 1823 * reboot turns off virtualization while processes are running. 1824 * Usually after catching the fault we just panic; during reboot 1825 * instead the instruction is ignored. 1826 */ 1827 #define __kvm_handle_fault_on_reboot(insn) \ 1828 "666: \n\t" \ 1829 insn "\n\t" \ 1830 "jmp 668f \n\t" \ 1831 "667: \n\t" \ 1832 "1: \n\t" \ 1833 ".pushsection .discard.instr_begin \n\t" \ 1834 ".long 1b - . \n\t" \ 1835 ".popsection \n\t" \ 1836 "call kvm_spurious_fault \n\t" \ 1837 "1: \n\t" \ 1838 ".pushsection .discard.instr_end \n\t" \ 1839 ".long 1b - . \n\t" \ 1840 ".popsection \n\t" \ 1841 "668: \n\t" \ 1842 _ASM_EXTABLE(666b, 667b) 1843 1844 #define KVM_ARCH_WANT_MMU_NOTIFIER 1845 1846 int kvm_cpu_has_injectable_intr(struct kvm_vcpu *v); 1847 int kvm_cpu_has_interrupt(struct kvm_vcpu *vcpu); 1848 int kvm_cpu_has_extint(struct kvm_vcpu *v); 1849 int kvm_arch_interrupt_allowed(struct kvm_vcpu *vcpu); 1850 int kvm_cpu_get_interrupt(struct kvm_vcpu *v); 1851 void kvm_vcpu_reset(struct kvm_vcpu *vcpu, bool init_event); 1852 void kvm_vcpu_reload_apic_access_page(struct kvm_vcpu *vcpu); 1853 1854 int kvm_pv_send_ipi(struct kvm *kvm, unsigned long ipi_bitmap_low, 1855 unsigned long ipi_bitmap_high, u32 min, 1856 unsigned long icr, int op_64_bit); 1857 1858 int kvm_add_user_return_msr(u32 msr); 1859 int kvm_find_user_return_msr(u32 msr); 1860 int kvm_set_user_return_msr(unsigned index, u64 val, u64 mask); 1861 1862 static inline bool kvm_is_supported_user_return_msr(u32 msr) 1863 { 1864 return kvm_find_user_return_msr(msr) >= 0; 1865 } 1866 1867 u64 kvm_scale_tsc(struct kvm_vcpu *vcpu, u64 tsc, u64 ratio); 1868 u64 kvm_read_l1_tsc(struct kvm_vcpu *vcpu, u64 host_tsc); 1869 u64 kvm_calc_nested_tsc_offset(u64 l1_offset, u64 l2_offset, u64 l2_multiplier); 1870 u64 kvm_calc_nested_tsc_multiplier(u64 l1_multiplier, u64 l2_multiplier); 1871 1872 unsigned long kvm_get_linear_rip(struct kvm_vcpu *vcpu); 1873 bool kvm_is_linear_rip(struct kvm_vcpu *vcpu, unsigned long linear_rip); 1874 1875 void kvm_make_mclock_inprogress_request(struct kvm *kvm); 1876 void kvm_make_scan_ioapic_request(struct kvm *kvm); 1877 void kvm_make_scan_ioapic_request_mask(struct kvm *kvm, 1878 unsigned long *vcpu_bitmap); 1879 1880 bool kvm_arch_async_page_not_present(struct kvm_vcpu *vcpu, 1881 struct kvm_async_pf *work); 1882 void kvm_arch_async_page_present(struct kvm_vcpu *vcpu, 1883 struct kvm_async_pf *work); 1884 void kvm_arch_async_page_ready(struct kvm_vcpu *vcpu, 1885 struct kvm_async_pf *work); 1886 void kvm_arch_async_page_present_queued(struct kvm_vcpu *vcpu); 1887 bool kvm_arch_can_dequeue_async_page_present(struct kvm_vcpu *vcpu); 1888 extern bool kvm_find_async_pf_gfn(struct kvm_vcpu *vcpu, gfn_t gfn); 1889 1890 int kvm_skip_emulated_instruction(struct kvm_vcpu *vcpu); 1891 int kvm_complete_insn_gp(struct kvm_vcpu *vcpu, int err); 1892 void __kvm_request_immediate_exit(struct kvm_vcpu *vcpu); 1893 1894 int kvm_is_in_guest(void); 1895 1896 void __user *__x86_set_memory_region(struct kvm *kvm, int id, gpa_t gpa, 1897 u32 size); 1898 bool kvm_vcpu_is_reset_bsp(struct kvm_vcpu *vcpu); 1899 bool kvm_vcpu_is_bsp(struct kvm_vcpu *vcpu); 1900 1901 bool kvm_intr_is_single_vcpu(struct kvm *kvm, struct kvm_lapic_irq *irq, 1902 struct kvm_vcpu **dest_vcpu); 1903 1904 void kvm_set_msi_irq(struct kvm *kvm, struct kvm_kernel_irq_routing_entry *e, 1905 struct kvm_lapic_irq *irq); 1906 1907 static inline bool kvm_irq_is_postable(struct kvm_lapic_irq *irq) 1908 { 1909 /* We can only post Fixed and LowPrio IRQs */ 1910 return (irq->delivery_mode == APIC_DM_FIXED || 1911 irq->delivery_mode == APIC_DM_LOWEST); 1912 } 1913 1914 static inline void kvm_arch_vcpu_blocking(struct kvm_vcpu *vcpu) 1915 { 1916 static_call_cond(kvm_x86_vcpu_blocking)(vcpu); 1917 } 1918 1919 static inline void kvm_arch_vcpu_unblocking(struct kvm_vcpu *vcpu) 1920 { 1921 static_call_cond(kvm_x86_vcpu_unblocking)(vcpu); 1922 } 1923 1924 static inline void kvm_arch_vcpu_block_finish(struct kvm_vcpu *vcpu) {} 1925 1926 static inline int kvm_cpu_get_apicid(int mps_cpu) 1927 { 1928 #ifdef CONFIG_X86_LOCAL_APIC 1929 return default_cpu_present_to_apicid(mps_cpu); 1930 #else 1931 WARN_ON_ONCE(1); 1932 return BAD_APICID; 1933 #endif 1934 } 1935 1936 #define put_smstate(type, buf, offset, val) \ 1937 *(type *)((buf) + (offset) - 0x7e00) = val 1938 1939 #define GET_SMSTATE(type, buf, offset) \ 1940 (*(type *)((buf) + (offset) - 0x7e00)) 1941 1942 int kvm_cpu_dirty_log_size(void); 1943 1944 int alloc_all_memslots_rmaps(struct kvm *kvm); 1945 1946 #endif /* _ASM_X86_KVM_HOST_H */ 1947