1 /* 2 * Kernel-based Virtual Machine driver for Linux 3 * 4 * This header defines architecture specific interfaces, x86 version 5 * 6 * This work is licensed under the terms of the GNU GPL, version 2. See 7 * the COPYING file in the top-level directory. 8 * 9 */ 10 11 #ifndef _ASM_X86_KVM_HOST_H 12 #define _ASM_X86_KVM_HOST_H 13 14 #include <linux/types.h> 15 #include <linux/mm.h> 16 #include <linux/mmu_notifier.h> 17 #include <linux/tracepoint.h> 18 #include <linux/cpumask.h> 19 #include <linux/irq_work.h> 20 21 #include <linux/kvm.h> 22 #include <linux/kvm_para.h> 23 #include <linux/kvm_types.h> 24 #include <linux/perf_event.h> 25 #include <linux/pvclock_gtod.h> 26 #include <linux/clocksource.h> 27 #include <linux/irqbypass.h> 28 #include <linux/hyperv.h> 29 30 #include <asm/apic.h> 31 #include <asm/pvclock-abi.h> 32 #include <asm/desc.h> 33 #include <asm/mtrr.h> 34 #include <asm/msr-index.h> 35 #include <asm/asm.h> 36 #include <asm/kvm_page_track.h> 37 #include <asm/hyperv-tlfs.h> 38 39 #define KVM_MAX_VCPUS 288 40 #define KVM_SOFT_MAX_VCPUS 240 41 #define KVM_MAX_VCPU_ID 1023 42 #define KVM_USER_MEM_SLOTS 509 43 /* memory slots that are not exposed to userspace */ 44 #define KVM_PRIVATE_MEM_SLOTS 3 45 #define KVM_MEM_SLOTS_NUM (KVM_USER_MEM_SLOTS + KVM_PRIVATE_MEM_SLOTS) 46 47 #define KVM_HALT_POLL_NS_DEFAULT 200000 48 49 #define KVM_IRQCHIP_NUM_PINS KVM_IOAPIC_NUM_PINS 50 51 /* x86-specific vcpu->requests bit members */ 52 #define KVM_REQ_MIGRATE_TIMER KVM_ARCH_REQ(0) 53 #define KVM_REQ_REPORT_TPR_ACCESS KVM_ARCH_REQ(1) 54 #define KVM_REQ_TRIPLE_FAULT KVM_ARCH_REQ(2) 55 #define KVM_REQ_MMU_SYNC KVM_ARCH_REQ(3) 56 #define KVM_REQ_CLOCK_UPDATE KVM_ARCH_REQ(4) 57 #define KVM_REQ_EVENT KVM_ARCH_REQ(6) 58 #define KVM_REQ_APF_HALT KVM_ARCH_REQ(7) 59 #define KVM_REQ_STEAL_UPDATE KVM_ARCH_REQ(8) 60 #define KVM_REQ_NMI KVM_ARCH_REQ(9) 61 #define KVM_REQ_PMU KVM_ARCH_REQ(10) 62 #define KVM_REQ_PMI KVM_ARCH_REQ(11) 63 #define KVM_REQ_SMI KVM_ARCH_REQ(12) 64 #define KVM_REQ_MASTERCLOCK_UPDATE KVM_ARCH_REQ(13) 65 #define KVM_REQ_MCLOCK_INPROGRESS \ 66 KVM_ARCH_REQ_FLAGS(14, KVM_REQUEST_WAIT | KVM_REQUEST_NO_WAKEUP) 67 #define KVM_REQ_SCAN_IOAPIC \ 68 KVM_ARCH_REQ_FLAGS(15, KVM_REQUEST_WAIT | KVM_REQUEST_NO_WAKEUP) 69 #define KVM_REQ_GLOBAL_CLOCK_UPDATE KVM_ARCH_REQ(16) 70 #define KVM_REQ_APIC_PAGE_RELOAD \ 71 KVM_ARCH_REQ_FLAGS(17, KVM_REQUEST_WAIT | KVM_REQUEST_NO_WAKEUP) 72 #define KVM_REQ_HV_CRASH KVM_ARCH_REQ(18) 73 #define KVM_REQ_IOAPIC_EOI_EXIT KVM_ARCH_REQ(19) 74 #define KVM_REQ_HV_RESET KVM_ARCH_REQ(20) 75 #define KVM_REQ_HV_EXIT KVM_ARCH_REQ(21) 76 #define KVM_REQ_HV_STIMER KVM_ARCH_REQ(22) 77 #define KVM_REQ_LOAD_EOI_EXITMAP KVM_ARCH_REQ(23) 78 79 #define CR0_RESERVED_BITS \ 80 (~(unsigned long)(X86_CR0_PE | X86_CR0_MP | X86_CR0_EM | X86_CR0_TS \ 81 | X86_CR0_ET | X86_CR0_NE | X86_CR0_WP | X86_CR0_AM \ 82 | X86_CR0_NW | X86_CR0_CD | X86_CR0_PG)) 83 84 #define CR3_PCID_INVD BIT_64(63) 85 #define CR4_RESERVED_BITS \ 86 (~(unsigned long)(X86_CR4_VME | X86_CR4_PVI | X86_CR4_TSD | X86_CR4_DE\ 87 | X86_CR4_PSE | X86_CR4_PAE | X86_CR4_MCE \ 88 | X86_CR4_PGE | X86_CR4_PCE | X86_CR4_OSFXSR | X86_CR4_PCIDE \ 89 | X86_CR4_OSXSAVE | X86_CR4_SMEP | X86_CR4_FSGSBASE \ 90 | X86_CR4_OSXMMEXCPT | X86_CR4_LA57 | X86_CR4_VMXE \ 91 | X86_CR4_SMAP | X86_CR4_PKE | X86_CR4_UMIP)) 92 93 #define CR8_RESERVED_BITS (~(unsigned long)X86_CR8_TPR) 94 95 96 97 #define INVALID_PAGE (~(hpa_t)0) 98 #define VALID_PAGE(x) ((x) != INVALID_PAGE) 99 100 #define UNMAPPED_GVA (~(gpa_t)0) 101 102 /* KVM Hugepage definitions for x86 */ 103 #define KVM_NR_PAGE_SIZES 3 104 #define KVM_HPAGE_GFN_SHIFT(x) (((x) - 1) * 9) 105 #define KVM_HPAGE_SHIFT(x) (PAGE_SHIFT + KVM_HPAGE_GFN_SHIFT(x)) 106 #define KVM_HPAGE_SIZE(x) (1UL << KVM_HPAGE_SHIFT(x)) 107 #define KVM_HPAGE_MASK(x) (~(KVM_HPAGE_SIZE(x) - 1)) 108 #define KVM_PAGES_PER_HPAGE(x) (KVM_HPAGE_SIZE(x) / PAGE_SIZE) 109 110 static inline gfn_t gfn_to_index(gfn_t gfn, gfn_t base_gfn, int level) 111 { 112 /* KVM_HPAGE_GFN_SHIFT(PT_PAGE_TABLE_LEVEL) must be 0. */ 113 return (gfn >> KVM_HPAGE_GFN_SHIFT(level)) - 114 (base_gfn >> KVM_HPAGE_GFN_SHIFT(level)); 115 } 116 117 #define KVM_PERMILLE_MMU_PAGES 20 118 #define KVM_MIN_ALLOC_MMU_PAGES 64 119 #define KVM_MMU_HASH_SHIFT 12 120 #define KVM_NUM_MMU_PAGES (1 << KVM_MMU_HASH_SHIFT) 121 #define KVM_MIN_FREE_MMU_PAGES 5 122 #define KVM_REFILL_PAGES 25 123 #define KVM_MAX_CPUID_ENTRIES 80 124 #define KVM_NR_FIXED_MTRR_REGION 88 125 #define KVM_NR_VAR_MTRR 8 126 127 #define ASYNC_PF_PER_VCPU 64 128 129 enum kvm_reg { 130 VCPU_REGS_RAX = 0, 131 VCPU_REGS_RCX = 1, 132 VCPU_REGS_RDX = 2, 133 VCPU_REGS_RBX = 3, 134 VCPU_REGS_RSP = 4, 135 VCPU_REGS_RBP = 5, 136 VCPU_REGS_RSI = 6, 137 VCPU_REGS_RDI = 7, 138 #ifdef CONFIG_X86_64 139 VCPU_REGS_R8 = 8, 140 VCPU_REGS_R9 = 9, 141 VCPU_REGS_R10 = 10, 142 VCPU_REGS_R11 = 11, 143 VCPU_REGS_R12 = 12, 144 VCPU_REGS_R13 = 13, 145 VCPU_REGS_R14 = 14, 146 VCPU_REGS_R15 = 15, 147 #endif 148 VCPU_REGS_RIP, 149 NR_VCPU_REGS 150 }; 151 152 enum kvm_reg_ex { 153 VCPU_EXREG_PDPTR = NR_VCPU_REGS, 154 VCPU_EXREG_CR3, 155 VCPU_EXREG_RFLAGS, 156 VCPU_EXREG_SEGMENTS, 157 }; 158 159 enum { 160 VCPU_SREG_ES, 161 VCPU_SREG_CS, 162 VCPU_SREG_SS, 163 VCPU_SREG_DS, 164 VCPU_SREG_FS, 165 VCPU_SREG_GS, 166 VCPU_SREG_TR, 167 VCPU_SREG_LDTR, 168 }; 169 170 #include <asm/kvm_emulate.h> 171 172 #define KVM_NR_MEM_OBJS 40 173 174 #define KVM_NR_DB_REGS 4 175 176 #define DR6_BD (1 << 13) 177 #define DR6_BS (1 << 14) 178 #define DR6_RTM (1 << 16) 179 #define DR6_FIXED_1 0xfffe0ff0 180 #define DR6_INIT 0xffff0ff0 181 #define DR6_VOLATILE 0x0001e00f 182 183 #define DR7_BP_EN_MASK 0x000000ff 184 #define DR7_GE (1 << 9) 185 #define DR7_GD (1 << 13) 186 #define DR7_FIXED_1 0x00000400 187 #define DR7_VOLATILE 0xffff2bff 188 189 #define PFERR_PRESENT_BIT 0 190 #define PFERR_WRITE_BIT 1 191 #define PFERR_USER_BIT 2 192 #define PFERR_RSVD_BIT 3 193 #define PFERR_FETCH_BIT 4 194 #define PFERR_PK_BIT 5 195 #define PFERR_GUEST_FINAL_BIT 32 196 #define PFERR_GUEST_PAGE_BIT 33 197 198 #define PFERR_PRESENT_MASK (1U << PFERR_PRESENT_BIT) 199 #define PFERR_WRITE_MASK (1U << PFERR_WRITE_BIT) 200 #define PFERR_USER_MASK (1U << PFERR_USER_BIT) 201 #define PFERR_RSVD_MASK (1U << PFERR_RSVD_BIT) 202 #define PFERR_FETCH_MASK (1U << PFERR_FETCH_BIT) 203 #define PFERR_PK_MASK (1U << PFERR_PK_BIT) 204 #define PFERR_GUEST_FINAL_MASK (1ULL << PFERR_GUEST_FINAL_BIT) 205 #define PFERR_GUEST_PAGE_MASK (1ULL << PFERR_GUEST_PAGE_BIT) 206 207 #define PFERR_NESTED_GUEST_PAGE (PFERR_GUEST_PAGE_MASK | \ 208 PFERR_WRITE_MASK | \ 209 PFERR_PRESENT_MASK) 210 211 /* 212 * The mask used to denote special SPTEs, which can be either MMIO SPTEs or 213 * Access Tracking SPTEs. We use bit 62 instead of bit 63 to avoid conflicting 214 * with the SVE bit in EPT PTEs. 215 */ 216 #define SPTE_SPECIAL_MASK (1ULL << 62) 217 218 /* apic attention bits */ 219 #define KVM_APIC_CHECK_VAPIC 0 220 /* 221 * The following bit is set with PV-EOI, unset on EOI. 222 * We detect PV-EOI changes by guest by comparing 223 * this bit with PV-EOI in guest memory. 224 * See the implementation in apic_update_pv_eoi. 225 */ 226 #define KVM_APIC_PV_EOI_PENDING 1 227 228 struct kvm_kernel_irq_routing_entry; 229 230 /* 231 * We don't want allocation failures within the mmu code, so we preallocate 232 * enough memory for a single page fault in a cache. 233 */ 234 struct kvm_mmu_memory_cache { 235 int nobjs; 236 void *objects[KVM_NR_MEM_OBJS]; 237 }; 238 239 /* 240 * the pages used as guest page table on soft mmu are tracked by 241 * kvm_memory_slot.arch.gfn_track which is 16 bits, so the role bits used 242 * by indirect shadow page can not be more than 15 bits. 243 * 244 * Currently, we used 14 bits that are @level, @cr4_pae, @quadrant, @access, 245 * @nxe, @cr0_wp, @smep_andnot_wp and @smap_andnot_wp. 246 */ 247 union kvm_mmu_page_role { 248 unsigned word; 249 struct { 250 unsigned level:4; 251 unsigned cr4_pae:1; 252 unsigned quadrant:2; 253 unsigned direct:1; 254 unsigned access:3; 255 unsigned invalid:1; 256 unsigned nxe:1; 257 unsigned cr0_wp:1; 258 unsigned smep_andnot_wp:1; 259 unsigned smap_andnot_wp:1; 260 unsigned ad_disabled:1; 261 unsigned guest_mode:1; 262 unsigned :6; 263 264 /* 265 * This is left at the top of the word so that 266 * kvm_memslots_for_spte_role can extract it with a 267 * simple shift. While there is room, give it a whole 268 * byte so it is also faster to load it from memory. 269 */ 270 unsigned smm:8; 271 }; 272 }; 273 274 struct kvm_rmap_head { 275 unsigned long val; 276 }; 277 278 struct kvm_mmu_page { 279 struct list_head link; 280 struct hlist_node hash_link; 281 282 /* 283 * The following two entries are used to key the shadow page in the 284 * hash table. 285 */ 286 gfn_t gfn; 287 union kvm_mmu_page_role role; 288 289 u64 *spt; 290 /* hold the gfn of each spte inside spt */ 291 gfn_t *gfns; 292 bool unsync; 293 int root_count; /* Currently serving as active root */ 294 unsigned int unsync_children; 295 struct kvm_rmap_head parent_ptes; /* rmap pointers to parent sptes */ 296 297 /* The page is obsolete if mmu_valid_gen != kvm->arch.mmu_valid_gen. */ 298 unsigned long mmu_valid_gen; 299 300 DECLARE_BITMAP(unsync_child_bitmap, 512); 301 302 #ifdef CONFIG_X86_32 303 /* 304 * Used out of the mmu-lock to avoid reading spte values while an 305 * update is in progress; see the comments in __get_spte_lockless(). 306 */ 307 int clear_spte_count; 308 #endif 309 310 /* Number of writes since the last time traversal visited this page. */ 311 atomic_t write_flooding_count; 312 }; 313 314 struct kvm_pio_request { 315 unsigned long count; 316 int in; 317 int port; 318 int size; 319 }; 320 321 #define PT64_ROOT_MAX_LEVEL 5 322 323 struct rsvd_bits_validate { 324 u64 rsvd_bits_mask[2][PT64_ROOT_MAX_LEVEL]; 325 u64 bad_mt_xwr; 326 }; 327 328 /* 329 * x86 supports 4 paging modes (5-level 64-bit, 4-level 64-bit, 3-level 32-bit, 330 * and 2-level 32-bit). The kvm_mmu structure abstracts the details of the 331 * current mmu mode. 332 */ 333 struct kvm_mmu { 334 void (*set_cr3)(struct kvm_vcpu *vcpu, unsigned long root); 335 unsigned long (*get_cr3)(struct kvm_vcpu *vcpu); 336 u64 (*get_pdptr)(struct kvm_vcpu *vcpu, int index); 337 int (*page_fault)(struct kvm_vcpu *vcpu, gva_t gva, u32 err, 338 bool prefault); 339 void (*inject_page_fault)(struct kvm_vcpu *vcpu, 340 struct x86_exception *fault); 341 gpa_t (*gva_to_gpa)(struct kvm_vcpu *vcpu, gva_t gva, u32 access, 342 struct x86_exception *exception); 343 gpa_t (*translate_gpa)(struct kvm_vcpu *vcpu, gpa_t gpa, u32 access, 344 struct x86_exception *exception); 345 int (*sync_page)(struct kvm_vcpu *vcpu, 346 struct kvm_mmu_page *sp); 347 void (*invlpg)(struct kvm_vcpu *vcpu, gva_t gva); 348 void (*update_pte)(struct kvm_vcpu *vcpu, struct kvm_mmu_page *sp, 349 u64 *spte, const void *pte); 350 hpa_t root_hpa; 351 union kvm_mmu_page_role base_role; 352 u8 root_level; 353 u8 shadow_root_level; 354 u8 ept_ad; 355 bool direct_map; 356 357 /* 358 * Bitmap; bit set = permission fault 359 * Byte index: page fault error code [4:1] 360 * Bit index: pte permissions in ACC_* format 361 */ 362 u8 permissions[16]; 363 364 /* 365 * The pkru_mask indicates if protection key checks are needed. It 366 * consists of 16 domains indexed by page fault error code bits [4:1], 367 * with PFEC.RSVD replaced by ACC_USER_MASK from the page tables. 368 * Each domain has 2 bits which are ANDed with AD and WD from PKRU. 369 */ 370 u32 pkru_mask; 371 372 u64 *pae_root; 373 u64 *lm_root; 374 375 /* 376 * check zero bits on shadow page table entries, these 377 * bits include not only hardware reserved bits but also 378 * the bits spte never used. 379 */ 380 struct rsvd_bits_validate shadow_zero_check; 381 382 struct rsvd_bits_validate guest_rsvd_check; 383 384 /* Can have large pages at levels 2..last_nonleaf_level-1. */ 385 u8 last_nonleaf_level; 386 387 bool nx; 388 389 u64 pdptrs[4]; /* pae */ 390 }; 391 392 enum pmc_type { 393 KVM_PMC_GP = 0, 394 KVM_PMC_FIXED, 395 }; 396 397 struct kvm_pmc { 398 enum pmc_type type; 399 u8 idx; 400 u64 counter; 401 u64 eventsel; 402 struct perf_event *perf_event; 403 struct kvm_vcpu *vcpu; 404 }; 405 406 struct kvm_pmu { 407 unsigned nr_arch_gp_counters; 408 unsigned nr_arch_fixed_counters; 409 unsigned available_event_types; 410 u64 fixed_ctr_ctrl; 411 u64 global_ctrl; 412 u64 global_status; 413 u64 global_ovf_ctrl; 414 u64 counter_bitmask[2]; 415 u64 global_ctrl_mask; 416 u64 reserved_bits; 417 u8 version; 418 struct kvm_pmc gp_counters[INTEL_PMC_MAX_GENERIC]; 419 struct kvm_pmc fixed_counters[INTEL_PMC_MAX_FIXED]; 420 struct irq_work irq_work; 421 u64 reprogram_pmi; 422 }; 423 424 struct kvm_pmu_ops; 425 426 enum { 427 KVM_DEBUGREG_BP_ENABLED = 1, 428 KVM_DEBUGREG_WONT_EXIT = 2, 429 KVM_DEBUGREG_RELOAD = 4, 430 }; 431 432 struct kvm_mtrr_range { 433 u64 base; 434 u64 mask; 435 struct list_head node; 436 }; 437 438 struct kvm_mtrr { 439 struct kvm_mtrr_range var_ranges[KVM_NR_VAR_MTRR]; 440 mtrr_type fixed_ranges[KVM_NR_FIXED_MTRR_REGION]; 441 u64 deftype; 442 443 struct list_head head; 444 }; 445 446 /* Hyper-V SynIC timer */ 447 struct kvm_vcpu_hv_stimer { 448 struct hrtimer timer; 449 int index; 450 u64 config; 451 u64 count; 452 u64 exp_time; 453 struct hv_message msg; 454 bool msg_pending; 455 }; 456 457 /* Hyper-V synthetic interrupt controller (SynIC)*/ 458 struct kvm_vcpu_hv_synic { 459 u64 version; 460 u64 control; 461 u64 msg_page; 462 u64 evt_page; 463 atomic64_t sint[HV_SYNIC_SINT_COUNT]; 464 atomic_t sint_to_gsi[HV_SYNIC_SINT_COUNT]; 465 DECLARE_BITMAP(auto_eoi_bitmap, 256); 466 DECLARE_BITMAP(vec_bitmap, 256); 467 bool active; 468 bool dont_zero_synic_pages; 469 }; 470 471 /* Hyper-V per vcpu emulation context */ 472 struct kvm_vcpu_hv { 473 u32 vp_index; 474 u64 hv_vapic; 475 s64 runtime_offset; 476 struct kvm_vcpu_hv_synic synic; 477 struct kvm_hyperv_exit exit; 478 struct kvm_vcpu_hv_stimer stimer[HV_SYNIC_STIMER_COUNT]; 479 DECLARE_BITMAP(stimer_pending_bitmap, HV_SYNIC_STIMER_COUNT); 480 cpumask_t tlb_lush; 481 }; 482 483 struct kvm_vcpu_arch { 484 /* 485 * rip and regs accesses must go through 486 * kvm_{register,rip}_{read,write} functions. 487 */ 488 unsigned long regs[NR_VCPU_REGS]; 489 u32 regs_avail; 490 u32 regs_dirty; 491 492 unsigned long cr0; 493 unsigned long cr0_guest_owned_bits; 494 unsigned long cr2; 495 unsigned long cr3; 496 unsigned long cr4; 497 unsigned long cr4_guest_owned_bits; 498 unsigned long cr8; 499 u32 pkru; 500 u32 hflags; 501 u64 efer; 502 u64 apic_base; 503 struct kvm_lapic *apic; /* kernel irqchip context */ 504 bool apicv_active; 505 bool load_eoi_exitmap_pending; 506 DECLARE_BITMAP(ioapic_handled_vectors, 256); 507 unsigned long apic_attention; 508 int32_t apic_arb_prio; 509 int mp_state; 510 u64 ia32_misc_enable_msr; 511 u64 smbase; 512 u64 smi_count; 513 bool tpr_access_reporting; 514 u64 ia32_xss; 515 u64 microcode_version; 516 517 /* 518 * Paging state of the vcpu 519 * 520 * If the vcpu runs in guest mode with two level paging this still saves 521 * the paging mode of the l1 guest. This context is always used to 522 * handle faults. 523 */ 524 struct kvm_mmu mmu; 525 526 /* 527 * Paging state of an L2 guest (used for nested npt) 528 * 529 * This context will save all necessary information to walk page tables 530 * of the an L2 guest. This context is only initialized for page table 531 * walking and not for faulting since we never handle l2 page faults on 532 * the host. 533 */ 534 struct kvm_mmu nested_mmu; 535 536 /* 537 * Pointer to the mmu context currently used for 538 * gva_to_gpa translations. 539 */ 540 struct kvm_mmu *walk_mmu; 541 542 struct kvm_mmu_memory_cache mmu_pte_list_desc_cache; 543 struct kvm_mmu_memory_cache mmu_page_cache; 544 struct kvm_mmu_memory_cache mmu_page_header_cache; 545 546 /* 547 * QEMU userspace and the guest each have their own FPU state. 548 * In vcpu_run, we switch between the user and guest FPU contexts. 549 * While running a VCPU, the VCPU thread will have the guest FPU 550 * context. 551 * 552 * Note that while the PKRU state lives inside the fpu registers, 553 * it is switched out separately at VMENTER and VMEXIT time. The 554 * "guest_fpu" state here contains the guest FPU context, with the 555 * host PRKU bits. 556 */ 557 struct fpu user_fpu; 558 struct fpu guest_fpu; 559 560 u64 xcr0; 561 u64 guest_supported_xcr0; 562 u32 guest_xstate_size; 563 564 struct kvm_pio_request pio; 565 void *pio_data; 566 567 u8 event_exit_inst_len; 568 569 struct kvm_queued_exception { 570 bool pending; 571 bool injected; 572 bool has_error_code; 573 u8 nr; 574 u32 error_code; 575 u8 nested_apf; 576 } exception; 577 578 struct kvm_queued_interrupt { 579 bool injected; 580 bool soft; 581 u8 nr; 582 } interrupt; 583 584 int halt_request; /* real mode on Intel only */ 585 586 int cpuid_nent; 587 struct kvm_cpuid_entry2 cpuid_entries[KVM_MAX_CPUID_ENTRIES]; 588 589 int maxphyaddr; 590 591 /* emulate context */ 592 593 struct x86_emulate_ctxt emulate_ctxt; 594 bool emulate_regs_need_sync_to_vcpu; 595 bool emulate_regs_need_sync_from_vcpu; 596 int (*complete_userspace_io)(struct kvm_vcpu *vcpu); 597 598 gpa_t time; 599 struct pvclock_vcpu_time_info hv_clock; 600 unsigned int hw_tsc_khz; 601 struct gfn_to_hva_cache pv_time; 602 bool pv_time_enabled; 603 /* set guest stopped flag in pvclock flags field */ 604 bool pvclock_set_guest_stopped_request; 605 606 struct { 607 u64 msr_val; 608 u64 last_steal; 609 struct gfn_to_hva_cache stime; 610 struct kvm_steal_time steal; 611 } st; 612 613 u64 tsc_offset; 614 u64 last_guest_tsc; 615 u64 last_host_tsc; 616 u64 tsc_offset_adjustment; 617 u64 this_tsc_nsec; 618 u64 this_tsc_write; 619 u64 this_tsc_generation; 620 bool tsc_catchup; 621 bool tsc_always_catchup; 622 s8 virtual_tsc_shift; 623 u32 virtual_tsc_mult; 624 u32 virtual_tsc_khz; 625 s64 ia32_tsc_adjust_msr; 626 u64 tsc_scaling_ratio; 627 628 atomic_t nmi_queued; /* unprocessed asynchronous NMIs */ 629 unsigned nmi_pending; /* NMI queued after currently running handler */ 630 bool nmi_injected; /* Trying to inject an NMI this entry */ 631 bool smi_pending; /* SMI queued after currently running handler */ 632 633 struct kvm_mtrr mtrr_state; 634 u64 pat; 635 636 unsigned switch_db_regs; 637 unsigned long db[KVM_NR_DB_REGS]; 638 unsigned long dr6; 639 unsigned long dr7; 640 unsigned long eff_db[KVM_NR_DB_REGS]; 641 unsigned long guest_debug_dr7; 642 u64 msr_platform_info; 643 u64 msr_misc_features_enables; 644 645 u64 mcg_cap; 646 u64 mcg_status; 647 u64 mcg_ctl; 648 u64 mcg_ext_ctl; 649 u64 *mce_banks; 650 651 /* Cache MMIO info */ 652 u64 mmio_gva; 653 unsigned access; 654 gfn_t mmio_gfn; 655 u64 mmio_gen; 656 657 struct kvm_pmu pmu; 658 659 /* used for guest single stepping over the given code position */ 660 unsigned long singlestep_rip; 661 662 struct kvm_vcpu_hv hyperv; 663 664 cpumask_var_t wbinvd_dirty_mask; 665 666 unsigned long last_retry_eip; 667 unsigned long last_retry_addr; 668 669 struct { 670 bool halted; 671 gfn_t gfns[roundup_pow_of_two(ASYNC_PF_PER_VCPU)]; 672 struct gfn_to_hva_cache data; 673 u64 msr_val; 674 u32 id; 675 bool send_user_only; 676 u32 host_apf_reason; 677 unsigned long nested_apf_token; 678 bool delivery_as_pf_vmexit; 679 } apf; 680 681 /* OSVW MSRs (AMD only) */ 682 struct { 683 u64 length; 684 u64 status; 685 } osvw; 686 687 struct { 688 u64 msr_val; 689 struct gfn_to_hva_cache data; 690 } pv_eoi; 691 692 /* 693 * Indicate whether the access faults on its page table in guest 694 * which is set when fix page fault and used to detect unhandeable 695 * instruction. 696 */ 697 bool write_fault_to_shadow_pgtable; 698 699 /* set at EPT violation at this point */ 700 unsigned long exit_qualification; 701 702 /* pv related host specific info */ 703 struct { 704 bool pv_unhalted; 705 } pv; 706 707 int pending_ioapic_eoi; 708 int pending_external_vector; 709 710 /* GPA available */ 711 bool gpa_available; 712 gpa_t gpa_val; 713 714 /* be preempted when it's in kernel-mode(cpl=0) */ 715 bool preempted_in_kernel; 716 }; 717 718 struct kvm_lpage_info { 719 int disallow_lpage; 720 }; 721 722 struct kvm_arch_memory_slot { 723 struct kvm_rmap_head *rmap[KVM_NR_PAGE_SIZES]; 724 struct kvm_lpage_info *lpage_info[KVM_NR_PAGE_SIZES - 1]; 725 unsigned short *gfn_track[KVM_PAGE_TRACK_MAX]; 726 }; 727 728 /* 729 * We use as the mode the number of bits allocated in the LDR for the 730 * logical processor ID. It happens that these are all powers of two. 731 * This makes it is very easy to detect cases where the APICs are 732 * configured for multiple modes; in that case, we cannot use the map and 733 * hence cannot use kvm_irq_delivery_to_apic_fast either. 734 */ 735 #define KVM_APIC_MODE_XAPIC_CLUSTER 4 736 #define KVM_APIC_MODE_XAPIC_FLAT 8 737 #define KVM_APIC_MODE_X2APIC 16 738 739 struct kvm_apic_map { 740 struct rcu_head rcu; 741 u8 mode; 742 u32 max_apic_id; 743 union { 744 struct kvm_lapic *xapic_flat_map[8]; 745 struct kvm_lapic *xapic_cluster_map[16][4]; 746 }; 747 struct kvm_lapic *phys_map[]; 748 }; 749 750 /* Hyper-V emulation context */ 751 struct kvm_hv { 752 struct mutex hv_lock; 753 u64 hv_guest_os_id; 754 u64 hv_hypercall; 755 u64 hv_tsc_page; 756 757 /* Hyper-v based guest crash (NT kernel bugcheck) parameters */ 758 u64 hv_crash_param[HV_X64_MSR_CRASH_PARAMS]; 759 u64 hv_crash_ctl; 760 761 HV_REFERENCE_TSC_PAGE tsc_ref; 762 763 struct idr conn_to_evt; 764 765 u64 hv_reenlightenment_control; 766 u64 hv_tsc_emulation_control; 767 u64 hv_tsc_emulation_status; 768 }; 769 770 enum kvm_irqchip_mode { 771 KVM_IRQCHIP_NONE, 772 KVM_IRQCHIP_KERNEL, /* created with KVM_CREATE_IRQCHIP */ 773 KVM_IRQCHIP_SPLIT, /* created with KVM_CAP_SPLIT_IRQCHIP */ 774 }; 775 776 struct kvm_arch { 777 unsigned int n_used_mmu_pages; 778 unsigned int n_requested_mmu_pages; 779 unsigned int n_max_mmu_pages; 780 unsigned int indirect_shadow_pages; 781 unsigned long mmu_valid_gen; 782 struct hlist_head mmu_page_hash[KVM_NUM_MMU_PAGES]; 783 /* 784 * Hash table of struct kvm_mmu_page. 785 */ 786 struct list_head active_mmu_pages; 787 struct list_head zapped_obsolete_pages; 788 struct kvm_page_track_notifier_node mmu_sp_tracker; 789 struct kvm_page_track_notifier_head track_notifier_head; 790 791 struct list_head assigned_dev_head; 792 struct iommu_domain *iommu_domain; 793 bool iommu_noncoherent; 794 #define __KVM_HAVE_ARCH_NONCOHERENT_DMA 795 atomic_t noncoherent_dma_count; 796 #define __KVM_HAVE_ARCH_ASSIGNED_DEVICE 797 atomic_t assigned_device_count; 798 struct kvm_pic *vpic; 799 struct kvm_ioapic *vioapic; 800 struct kvm_pit *vpit; 801 atomic_t vapics_in_nmi_mode; 802 struct mutex apic_map_lock; 803 struct kvm_apic_map *apic_map; 804 805 bool apic_access_page_done; 806 807 gpa_t wall_clock; 808 809 bool mwait_in_guest; 810 bool hlt_in_guest; 811 bool pause_in_guest; 812 813 unsigned long irq_sources_bitmap; 814 s64 kvmclock_offset; 815 raw_spinlock_t tsc_write_lock; 816 u64 last_tsc_nsec; 817 u64 last_tsc_write; 818 u32 last_tsc_khz; 819 u64 cur_tsc_nsec; 820 u64 cur_tsc_write; 821 u64 cur_tsc_offset; 822 u64 cur_tsc_generation; 823 int nr_vcpus_matched_tsc; 824 825 spinlock_t pvclock_gtod_sync_lock; 826 bool use_master_clock; 827 u64 master_kernel_ns; 828 u64 master_cycle_now; 829 struct delayed_work kvmclock_update_work; 830 struct delayed_work kvmclock_sync_work; 831 832 struct kvm_xen_hvm_config xen_hvm_config; 833 834 /* reads protected by irq_srcu, writes by irq_lock */ 835 struct hlist_head mask_notifier_list; 836 837 struct kvm_hv hyperv; 838 839 #ifdef CONFIG_KVM_MMU_AUDIT 840 int audit_point; 841 #endif 842 843 bool backwards_tsc_observed; 844 bool boot_vcpu_runs_old_kvmclock; 845 u32 bsp_vcpu_id; 846 847 u64 disabled_quirks; 848 849 enum kvm_irqchip_mode irqchip_mode; 850 u8 nr_reserved_ioapic_pins; 851 852 bool disabled_lapic_found; 853 854 bool x2apic_format; 855 bool x2apic_broadcast_quirk_disabled; 856 }; 857 858 struct kvm_vm_stat { 859 ulong mmu_shadow_zapped; 860 ulong mmu_pte_write; 861 ulong mmu_pte_updated; 862 ulong mmu_pde_zapped; 863 ulong mmu_flooded; 864 ulong mmu_recycled; 865 ulong mmu_cache_miss; 866 ulong mmu_unsync; 867 ulong remote_tlb_flush; 868 ulong lpages; 869 ulong max_mmu_page_hash_collisions; 870 }; 871 872 struct kvm_vcpu_stat { 873 u64 pf_fixed; 874 u64 pf_guest; 875 u64 tlb_flush; 876 u64 invlpg; 877 878 u64 exits; 879 u64 io_exits; 880 u64 mmio_exits; 881 u64 signal_exits; 882 u64 irq_window_exits; 883 u64 nmi_window_exits; 884 u64 halt_exits; 885 u64 halt_successful_poll; 886 u64 halt_attempted_poll; 887 u64 halt_poll_invalid; 888 u64 halt_wakeup; 889 u64 request_irq_exits; 890 u64 irq_exits; 891 u64 host_state_reload; 892 u64 fpu_reload; 893 u64 insn_emulation; 894 u64 insn_emulation_fail; 895 u64 hypercalls; 896 u64 irq_injections; 897 u64 nmi_injections; 898 u64 req_event; 899 }; 900 901 struct x86_instruction_info; 902 903 struct msr_data { 904 bool host_initiated; 905 u32 index; 906 u64 data; 907 }; 908 909 struct kvm_lapic_irq { 910 u32 vector; 911 u16 delivery_mode; 912 u16 dest_mode; 913 bool level; 914 u16 trig_mode; 915 u32 shorthand; 916 u32 dest_id; 917 bool msi_redir_hint; 918 }; 919 920 struct kvm_x86_ops { 921 int (*cpu_has_kvm_support)(void); /* __init */ 922 int (*disabled_by_bios)(void); /* __init */ 923 int (*hardware_enable)(void); 924 void (*hardware_disable)(void); 925 void (*check_processor_compatibility)(void *rtn); 926 int (*hardware_setup)(void); /* __init */ 927 void (*hardware_unsetup)(void); /* __exit */ 928 bool (*cpu_has_accelerated_tpr)(void); 929 bool (*has_emulated_msr)(int index); 930 void (*cpuid_update)(struct kvm_vcpu *vcpu); 931 932 struct kvm *(*vm_alloc)(void); 933 void (*vm_free)(struct kvm *); 934 int (*vm_init)(struct kvm *kvm); 935 void (*vm_destroy)(struct kvm *kvm); 936 937 /* Create, but do not attach this VCPU */ 938 struct kvm_vcpu *(*vcpu_create)(struct kvm *kvm, unsigned id); 939 void (*vcpu_free)(struct kvm_vcpu *vcpu); 940 void (*vcpu_reset)(struct kvm_vcpu *vcpu, bool init_event); 941 942 void (*prepare_guest_switch)(struct kvm_vcpu *vcpu); 943 void (*vcpu_load)(struct kvm_vcpu *vcpu, int cpu); 944 void (*vcpu_put)(struct kvm_vcpu *vcpu); 945 946 void (*update_bp_intercept)(struct kvm_vcpu *vcpu); 947 int (*get_msr)(struct kvm_vcpu *vcpu, struct msr_data *msr); 948 int (*set_msr)(struct kvm_vcpu *vcpu, struct msr_data *msr); 949 u64 (*get_segment_base)(struct kvm_vcpu *vcpu, int seg); 950 void (*get_segment)(struct kvm_vcpu *vcpu, 951 struct kvm_segment *var, int seg); 952 int (*get_cpl)(struct kvm_vcpu *vcpu); 953 void (*set_segment)(struct kvm_vcpu *vcpu, 954 struct kvm_segment *var, int seg); 955 void (*get_cs_db_l_bits)(struct kvm_vcpu *vcpu, int *db, int *l); 956 void (*decache_cr0_guest_bits)(struct kvm_vcpu *vcpu); 957 void (*decache_cr3)(struct kvm_vcpu *vcpu); 958 void (*decache_cr4_guest_bits)(struct kvm_vcpu *vcpu); 959 void (*set_cr0)(struct kvm_vcpu *vcpu, unsigned long cr0); 960 void (*set_cr3)(struct kvm_vcpu *vcpu, unsigned long cr3); 961 int (*set_cr4)(struct kvm_vcpu *vcpu, unsigned long cr4); 962 void (*set_efer)(struct kvm_vcpu *vcpu, u64 efer); 963 void (*get_idt)(struct kvm_vcpu *vcpu, struct desc_ptr *dt); 964 void (*set_idt)(struct kvm_vcpu *vcpu, struct desc_ptr *dt); 965 void (*get_gdt)(struct kvm_vcpu *vcpu, struct desc_ptr *dt); 966 void (*set_gdt)(struct kvm_vcpu *vcpu, struct desc_ptr *dt); 967 u64 (*get_dr6)(struct kvm_vcpu *vcpu); 968 void (*set_dr6)(struct kvm_vcpu *vcpu, unsigned long value); 969 void (*sync_dirty_debug_regs)(struct kvm_vcpu *vcpu); 970 void (*set_dr7)(struct kvm_vcpu *vcpu, unsigned long value); 971 void (*cache_reg)(struct kvm_vcpu *vcpu, enum kvm_reg reg); 972 unsigned long (*get_rflags)(struct kvm_vcpu *vcpu); 973 void (*set_rflags)(struct kvm_vcpu *vcpu, unsigned long rflags); 974 975 void (*tlb_flush)(struct kvm_vcpu *vcpu, bool invalidate_gpa); 976 977 void (*run)(struct kvm_vcpu *vcpu); 978 int (*handle_exit)(struct kvm_vcpu *vcpu); 979 void (*skip_emulated_instruction)(struct kvm_vcpu *vcpu); 980 void (*set_interrupt_shadow)(struct kvm_vcpu *vcpu, int mask); 981 u32 (*get_interrupt_shadow)(struct kvm_vcpu *vcpu); 982 void (*patch_hypercall)(struct kvm_vcpu *vcpu, 983 unsigned char *hypercall_addr); 984 void (*set_irq)(struct kvm_vcpu *vcpu); 985 void (*set_nmi)(struct kvm_vcpu *vcpu); 986 void (*queue_exception)(struct kvm_vcpu *vcpu); 987 void (*cancel_injection)(struct kvm_vcpu *vcpu); 988 int (*interrupt_allowed)(struct kvm_vcpu *vcpu); 989 int (*nmi_allowed)(struct kvm_vcpu *vcpu); 990 bool (*get_nmi_mask)(struct kvm_vcpu *vcpu); 991 void (*set_nmi_mask)(struct kvm_vcpu *vcpu, bool masked); 992 void (*enable_nmi_window)(struct kvm_vcpu *vcpu); 993 void (*enable_irq_window)(struct kvm_vcpu *vcpu); 994 void (*update_cr8_intercept)(struct kvm_vcpu *vcpu, int tpr, int irr); 995 bool (*get_enable_apicv)(struct kvm_vcpu *vcpu); 996 void (*refresh_apicv_exec_ctrl)(struct kvm_vcpu *vcpu); 997 void (*hwapic_irr_update)(struct kvm_vcpu *vcpu, int max_irr); 998 void (*hwapic_isr_update)(struct kvm_vcpu *vcpu, int isr); 999 void (*load_eoi_exitmap)(struct kvm_vcpu *vcpu, u64 *eoi_exit_bitmap); 1000 void (*set_virtual_apic_mode)(struct kvm_vcpu *vcpu); 1001 void (*set_apic_access_page_addr)(struct kvm_vcpu *vcpu, hpa_t hpa); 1002 void (*deliver_posted_interrupt)(struct kvm_vcpu *vcpu, int vector); 1003 int (*sync_pir_to_irr)(struct kvm_vcpu *vcpu); 1004 int (*set_tss_addr)(struct kvm *kvm, unsigned int addr); 1005 int (*set_identity_map_addr)(struct kvm *kvm, u64 ident_addr); 1006 int (*get_tdp_level)(struct kvm_vcpu *vcpu); 1007 u64 (*get_mt_mask)(struct kvm_vcpu *vcpu, gfn_t gfn, bool is_mmio); 1008 int (*get_lpage_level)(void); 1009 bool (*rdtscp_supported)(void); 1010 bool (*invpcid_supported)(void); 1011 1012 void (*set_tdp_cr3)(struct kvm_vcpu *vcpu, unsigned long cr3); 1013 1014 void (*set_supported_cpuid)(u32 func, struct kvm_cpuid_entry2 *entry); 1015 1016 bool (*has_wbinvd_exit)(void); 1017 1018 u64 (*read_l1_tsc_offset)(struct kvm_vcpu *vcpu); 1019 void (*write_tsc_offset)(struct kvm_vcpu *vcpu, u64 offset); 1020 1021 void (*get_exit_info)(struct kvm_vcpu *vcpu, u64 *info1, u64 *info2); 1022 1023 int (*check_intercept)(struct kvm_vcpu *vcpu, 1024 struct x86_instruction_info *info, 1025 enum x86_intercept_stage stage); 1026 void (*handle_external_intr)(struct kvm_vcpu *vcpu); 1027 bool (*mpx_supported)(void); 1028 bool (*xsaves_supported)(void); 1029 bool (*umip_emulated)(void); 1030 1031 int (*check_nested_events)(struct kvm_vcpu *vcpu, bool external_intr); 1032 1033 void (*sched_in)(struct kvm_vcpu *kvm, int cpu); 1034 1035 /* 1036 * Arch-specific dirty logging hooks. These hooks are only supposed to 1037 * be valid if the specific arch has hardware-accelerated dirty logging 1038 * mechanism. Currently only for PML on VMX. 1039 * 1040 * - slot_enable_log_dirty: 1041 * called when enabling log dirty mode for the slot. 1042 * - slot_disable_log_dirty: 1043 * called when disabling log dirty mode for the slot. 1044 * also called when slot is created with log dirty disabled. 1045 * - flush_log_dirty: 1046 * called before reporting dirty_bitmap to userspace. 1047 * - enable_log_dirty_pt_masked: 1048 * called when reenabling log dirty for the GFNs in the mask after 1049 * corresponding bits are cleared in slot->dirty_bitmap. 1050 */ 1051 void (*slot_enable_log_dirty)(struct kvm *kvm, 1052 struct kvm_memory_slot *slot); 1053 void (*slot_disable_log_dirty)(struct kvm *kvm, 1054 struct kvm_memory_slot *slot); 1055 void (*flush_log_dirty)(struct kvm *kvm); 1056 void (*enable_log_dirty_pt_masked)(struct kvm *kvm, 1057 struct kvm_memory_slot *slot, 1058 gfn_t offset, unsigned long mask); 1059 int (*write_log_dirty)(struct kvm_vcpu *vcpu); 1060 1061 /* pmu operations of sub-arch */ 1062 const struct kvm_pmu_ops *pmu_ops; 1063 1064 /* 1065 * Architecture specific hooks for vCPU blocking due to 1066 * HLT instruction. 1067 * Returns for .pre_block(): 1068 * - 0 means continue to block the vCPU. 1069 * - 1 means we cannot block the vCPU since some event 1070 * happens during this period, such as, 'ON' bit in 1071 * posted-interrupts descriptor is set. 1072 */ 1073 int (*pre_block)(struct kvm_vcpu *vcpu); 1074 void (*post_block)(struct kvm_vcpu *vcpu); 1075 1076 void (*vcpu_blocking)(struct kvm_vcpu *vcpu); 1077 void (*vcpu_unblocking)(struct kvm_vcpu *vcpu); 1078 1079 int (*update_pi_irte)(struct kvm *kvm, unsigned int host_irq, 1080 uint32_t guest_irq, bool set); 1081 void (*apicv_post_state_restore)(struct kvm_vcpu *vcpu); 1082 1083 int (*set_hv_timer)(struct kvm_vcpu *vcpu, u64 guest_deadline_tsc); 1084 void (*cancel_hv_timer)(struct kvm_vcpu *vcpu); 1085 1086 void (*setup_mce)(struct kvm_vcpu *vcpu); 1087 1088 int (*smi_allowed)(struct kvm_vcpu *vcpu); 1089 int (*pre_enter_smm)(struct kvm_vcpu *vcpu, char *smstate); 1090 int (*pre_leave_smm)(struct kvm_vcpu *vcpu, u64 smbase); 1091 int (*enable_smi_window)(struct kvm_vcpu *vcpu); 1092 1093 int (*mem_enc_op)(struct kvm *kvm, void __user *argp); 1094 int (*mem_enc_reg_region)(struct kvm *kvm, struct kvm_enc_region *argp); 1095 int (*mem_enc_unreg_region)(struct kvm *kvm, struct kvm_enc_region *argp); 1096 1097 int (*get_msr_feature)(struct kvm_msr_entry *entry); 1098 }; 1099 1100 struct kvm_arch_async_pf { 1101 u32 token; 1102 gfn_t gfn; 1103 unsigned long cr3; 1104 bool direct_map; 1105 }; 1106 1107 extern struct kvm_x86_ops *kvm_x86_ops; 1108 1109 #define __KVM_HAVE_ARCH_VM_ALLOC 1110 static inline struct kvm *kvm_arch_alloc_vm(void) 1111 { 1112 return kvm_x86_ops->vm_alloc(); 1113 } 1114 1115 static inline void kvm_arch_free_vm(struct kvm *kvm) 1116 { 1117 return kvm_x86_ops->vm_free(kvm); 1118 } 1119 1120 int kvm_mmu_module_init(void); 1121 void kvm_mmu_module_exit(void); 1122 1123 void kvm_mmu_destroy(struct kvm_vcpu *vcpu); 1124 int kvm_mmu_create(struct kvm_vcpu *vcpu); 1125 void kvm_mmu_setup(struct kvm_vcpu *vcpu); 1126 void kvm_mmu_init_vm(struct kvm *kvm); 1127 void kvm_mmu_uninit_vm(struct kvm *kvm); 1128 void kvm_mmu_set_mask_ptes(u64 user_mask, u64 accessed_mask, 1129 u64 dirty_mask, u64 nx_mask, u64 x_mask, u64 p_mask, 1130 u64 acc_track_mask, u64 me_mask); 1131 1132 void kvm_mmu_reset_context(struct kvm_vcpu *vcpu); 1133 void kvm_mmu_slot_remove_write_access(struct kvm *kvm, 1134 struct kvm_memory_slot *memslot); 1135 void kvm_mmu_zap_collapsible_sptes(struct kvm *kvm, 1136 const struct kvm_memory_slot *memslot); 1137 void kvm_mmu_slot_leaf_clear_dirty(struct kvm *kvm, 1138 struct kvm_memory_slot *memslot); 1139 void kvm_mmu_slot_largepage_remove_write_access(struct kvm *kvm, 1140 struct kvm_memory_slot *memslot); 1141 void kvm_mmu_slot_set_dirty(struct kvm *kvm, 1142 struct kvm_memory_slot *memslot); 1143 void kvm_mmu_clear_dirty_pt_masked(struct kvm *kvm, 1144 struct kvm_memory_slot *slot, 1145 gfn_t gfn_offset, unsigned long mask); 1146 void kvm_mmu_zap_all(struct kvm *kvm); 1147 void kvm_mmu_invalidate_mmio_sptes(struct kvm *kvm, struct kvm_memslots *slots); 1148 unsigned int kvm_mmu_calculate_mmu_pages(struct kvm *kvm); 1149 void kvm_mmu_change_mmu_pages(struct kvm *kvm, unsigned int kvm_nr_mmu_pages); 1150 1151 int load_pdptrs(struct kvm_vcpu *vcpu, struct kvm_mmu *mmu, unsigned long cr3); 1152 bool pdptrs_changed(struct kvm_vcpu *vcpu); 1153 1154 int emulator_write_phys(struct kvm_vcpu *vcpu, gpa_t gpa, 1155 const void *val, int bytes); 1156 1157 struct kvm_irq_mask_notifier { 1158 void (*func)(struct kvm_irq_mask_notifier *kimn, bool masked); 1159 int irq; 1160 struct hlist_node link; 1161 }; 1162 1163 void kvm_register_irq_mask_notifier(struct kvm *kvm, int irq, 1164 struct kvm_irq_mask_notifier *kimn); 1165 void kvm_unregister_irq_mask_notifier(struct kvm *kvm, int irq, 1166 struct kvm_irq_mask_notifier *kimn); 1167 void kvm_fire_mask_notifiers(struct kvm *kvm, unsigned irqchip, unsigned pin, 1168 bool mask); 1169 1170 extern bool tdp_enabled; 1171 1172 u64 vcpu_tsc_khz(struct kvm_vcpu *vcpu); 1173 1174 /* control of guest tsc rate supported? */ 1175 extern bool kvm_has_tsc_control; 1176 /* maximum supported tsc_khz for guests */ 1177 extern u32 kvm_max_guest_tsc_khz; 1178 /* number of bits of the fractional part of the TSC scaling ratio */ 1179 extern u8 kvm_tsc_scaling_ratio_frac_bits; 1180 /* maximum allowed value of TSC scaling ratio */ 1181 extern u64 kvm_max_tsc_scaling_ratio; 1182 /* 1ull << kvm_tsc_scaling_ratio_frac_bits */ 1183 extern u64 kvm_default_tsc_scaling_ratio; 1184 1185 extern u64 kvm_mce_cap_supported; 1186 1187 enum emulation_result { 1188 EMULATE_DONE, /* no further processing */ 1189 EMULATE_USER_EXIT, /* kvm_run ready for userspace exit */ 1190 EMULATE_FAIL, /* can't emulate this instruction */ 1191 }; 1192 1193 #define EMULTYPE_NO_DECODE (1 << 0) 1194 #define EMULTYPE_TRAP_UD (1 << 1) 1195 #define EMULTYPE_SKIP (1 << 2) 1196 #define EMULTYPE_RETRY (1 << 3) 1197 #define EMULTYPE_NO_REEXECUTE (1 << 4) 1198 #define EMULTYPE_NO_UD_ON_FAIL (1 << 5) 1199 #define EMULTYPE_VMWARE (1 << 6) 1200 int x86_emulate_instruction(struct kvm_vcpu *vcpu, unsigned long cr2, 1201 int emulation_type, void *insn, int insn_len); 1202 1203 static inline int emulate_instruction(struct kvm_vcpu *vcpu, 1204 int emulation_type) 1205 { 1206 return x86_emulate_instruction(vcpu, 0, 1207 emulation_type | EMULTYPE_NO_REEXECUTE, NULL, 0); 1208 } 1209 1210 void kvm_enable_efer_bits(u64); 1211 bool kvm_valid_efer(struct kvm_vcpu *vcpu, u64 efer); 1212 int kvm_get_msr(struct kvm_vcpu *vcpu, struct msr_data *msr); 1213 int kvm_set_msr(struct kvm_vcpu *vcpu, struct msr_data *msr); 1214 1215 struct x86_emulate_ctxt; 1216 1217 int kvm_fast_pio(struct kvm_vcpu *vcpu, int size, unsigned short port, int in); 1218 int kvm_emulate_cpuid(struct kvm_vcpu *vcpu); 1219 int kvm_emulate_halt(struct kvm_vcpu *vcpu); 1220 int kvm_vcpu_halt(struct kvm_vcpu *vcpu); 1221 int kvm_emulate_wbinvd(struct kvm_vcpu *vcpu); 1222 1223 void kvm_get_segment(struct kvm_vcpu *vcpu, struct kvm_segment *var, int seg); 1224 int kvm_load_segment_descriptor(struct kvm_vcpu *vcpu, u16 selector, int seg); 1225 void kvm_vcpu_deliver_sipi_vector(struct kvm_vcpu *vcpu, u8 vector); 1226 1227 int kvm_task_switch(struct kvm_vcpu *vcpu, u16 tss_selector, int idt_index, 1228 int reason, bool has_error_code, u32 error_code); 1229 1230 int kvm_set_cr0(struct kvm_vcpu *vcpu, unsigned long cr0); 1231 int kvm_set_cr3(struct kvm_vcpu *vcpu, unsigned long cr3); 1232 int kvm_set_cr4(struct kvm_vcpu *vcpu, unsigned long cr4); 1233 int kvm_set_cr8(struct kvm_vcpu *vcpu, unsigned long cr8); 1234 int kvm_set_dr(struct kvm_vcpu *vcpu, int dr, unsigned long val); 1235 int kvm_get_dr(struct kvm_vcpu *vcpu, int dr, unsigned long *val); 1236 unsigned long kvm_get_cr8(struct kvm_vcpu *vcpu); 1237 void kvm_lmsw(struct kvm_vcpu *vcpu, unsigned long msw); 1238 void kvm_get_cs_db_l_bits(struct kvm_vcpu *vcpu, int *db, int *l); 1239 int kvm_set_xcr(struct kvm_vcpu *vcpu, u32 index, u64 xcr); 1240 1241 int kvm_get_msr_common(struct kvm_vcpu *vcpu, struct msr_data *msr); 1242 int kvm_set_msr_common(struct kvm_vcpu *vcpu, struct msr_data *msr); 1243 1244 unsigned long kvm_get_rflags(struct kvm_vcpu *vcpu); 1245 void kvm_set_rflags(struct kvm_vcpu *vcpu, unsigned long rflags); 1246 bool kvm_rdpmc(struct kvm_vcpu *vcpu); 1247 1248 void kvm_queue_exception(struct kvm_vcpu *vcpu, unsigned nr); 1249 void kvm_queue_exception_e(struct kvm_vcpu *vcpu, unsigned nr, u32 error_code); 1250 void kvm_requeue_exception(struct kvm_vcpu *vcpu, unsigned nr); 1251 void kvm_requeue_exception_e(struct kvm_vcpu *vcpu, unsigned nr, u32 error_code); 1252 void kvm_inject_page_fault(struct kvm_vcpu *vcpu, struct x86_exception *fault); 1253 int kvm_read_guest_page_mmu(struct kvm_vcpu *vcpu, struct kvm_mmu *mmu, 1254 gfn_t gfn, void *data, int offset, int len, 1255 u32 access); 1256 bool kvm_require_cpl(struct kvm_vcpu *vcpu, int required_cpl); 1257 bool kvm_require_dr(struct kvm_vcpu *vcpu, int dr); 1258 1259 static inline int __kvm_irq_line_state(unsigned long *irq_state, 1260 int irq_source_id, int level) 1261 { 1262 /* Logical OR for level trig interrupt */ 1263 if (level) 1264 __set_bit(irq_source_id, irq_state); 1265 else 1266 __clear_bit(irq_source_id, irq_state); 1267 1268 return !!(*irq_state); 1269 } 1270 1271 int kvm_pic_set_irq(struct kvm_pic *pic, int irq, int irq_source_id, int level); 1272 void kvm_pic_clear_all(struct kvm_pic *pic, int irq_source_id); 1273 1274 void kvm_inject_nmi(struct kvm_vcpu *vcpu); 1275 1276 int kvm_mmu_unprotect_page(struct kvm *kvm, gfn_t gfn); 1277 int kvm_mmu_unprotect_page_virt(struct kvm_vcpu *vcpu, gva_t gva); 1278 void __kvm_mmu_free_some_pages(struct kvm_vcpu *vcpu); 1279 int kvm_mmu_load(struct kvm_vcpu *vcpu); 1280 void kvm_mmu_unload(struct kvm_vcpu *vcpu); 1281 void kvm_mmu_sync_roots(struct kvm_vcpu *vcpu); 1282 void kvm_mmu_free_roots(struct kvm_vcpu *vcpu); 1283 gpa_t translate_nested_gpa(struct kvm_vcpu *vcpu, gpa_t gpa, u32 access, 1284 struct x86_exception *exception); 1285 gpa_t kvm_mmu_gva_to_gpa_read(struct kvm_vcpu *vcpu, gva_t gva, 1286 struct x86_exception *exception); 1287 gpa_t kvm_mmu_gva_to_gpa_fetch(struct kvm_vcpu *vcpu, gva_t gva, 1288 struct x86_exception *exception); 1289 gpa_t kvm_mmu_gva_to_gpa_write(struct kvm_vcpu *vcpu, gva_t gva, 1290 struct x86_exception *exception); 1291 gpa_t kvm_mmu_gva_to_gpa_system(struct kvm_vcpu *vcpu, gva_t gva, 1292 struct x86_exception *exception); 1293 1294 void kvm_vcpu_deactivate_apicv(struct kvm_vcpu *vcpu); 1295 1296 int kvm_emulate_hypercall(struct kvm_vcpu *vcpu); 1297 1298 int kvm_mmu_page_fault(struct kvm_vcpu *vcpu, gva_t gva, u64 error_code, 1299 void *insn, int insn_len); 1300 void kvm_mmu_invlpg(struct kvm_vcpu *vcpu, gva_t gva); 1301 void kvm_mmu_new_cr3(struct kvm_vcpu *vcpu); 1302 1303 void kvm_enable_tdp(void); 1304 void kvm_disable_tdp(void); 1305 1306 static inline gpa_t translate_gpa(struct kvm_vcpu *vcpu, gpa_t gpa, u32 access, 1307 struct x86_exception *exception) 1308 { 1309 return gpa; 1310 } 1311 1312 static inline struct kvm_mmu_page *page_header(hpa_t shadow_page) 1313 { 1314 struct page *page = pfn_to_page(shadow_page >> PAGE_SHIFT); 1315 1316 return (struct kvm_mmu_page *)page_private(page); 1317 } 1318 1319 static inline u16 kvm_read_ldt(void) 1320 { 1321 u16 ldt; 1322 asm("sldt %0" : "=g"(ldt)); 1323 return ldt; 1324 } 1325 1326 static inline void kvm_load_ldt(u16 sel) 1327 { 1328 asm("lldt %0" : : "rm"(sel)); 1329 } 1330 1331 #ifdef CONFIG_X86_64 1332 static inline unsigned long read_msr(unsigned long msr) 1333 { 1334 u64 value; 1335 1336 rdmsrl(msr, value); 1337 return value; 1338 } 1339 #endif 1340 1341 static inline u32 get_rdx_init_val(void) 1342 { 1343 return 0x600; /* P6 family */ 1344 } 1345 1346 static inline void kvm_inject_gp(struct kvm_vcpu *vcpu, u32 error_code) 1347 { 1348 kvm_queue_exception_e(vcpu, GP_VECTOR, error_code); 1349 } 1350 1351 #define TSS_IOPB_BASE_OFFSET 0x66 1352 #define TSS_BASE_SIZE 0x68 1353 #define TSS_IOPB_SIZE (65536 / 8) 1354 #define TSS_REDIRECTION_SIZE (256 / 8) 1355 #define RMODE_TSS_SIZE \ 1356 (TSS_BASE_SIZE + TSS_REDIRECTION_SIZE + TSS_IOPB_SIZE + 1) 1357 1358 enum { 1359 TASK_SWITCH_CALL = 0, 1360 TASK_SWITCH_IRET = 1, 1361 TASK_SWITCH_JMP = 2, 1362 TASK_SWITCH_GATE = 3, 1363 }; 1364 1365 #define HF_GIF_MASK (1 << 0) 1366 #define HF_HIF_MASK (1 << 1) 1367 #define HF_VINTR_MASK (1 << 2) 1368 #define HF_NMI_MASK (1 << 3) 1369 #define HF_IRET_MASK (1 << 4) 1370 #define HF_GUEST_MASK (1 << 5) /* VCPU is in guest-mode */ 1371 #define HF_SMM_MASK (1 << 6) 1372 #define HF_SMM_INSIDE_NMI_MASK (1 << 7) 1373 1374 #define __KVM_VCPU_MULTIPLE_ADDRESS_SPACE 1375 #define KVM_ADDRESS_SPACE_NUM 2 1376 1377 #define kvm_arch_vcpu_memslots_id(vcpu) ((vcpu)->arch.hflags & HF_SMM_MASK ? 1 : 0) 1378 #define kvm_memslots_for_spte_role(kvm, role) __kvm_memslots(kvm, (role).smm) 1379 1380 /* 1381 * Hardware virtualization extension instructions may fault if a 1382 * reboot turns off virtualization while processes are running. 1383 * Trap the fault and ignore the instruction if that happens. 1384 */ 1385 asmlinkage void kvm_spurious_fault(void); 1386 1387 #define ____kvm_handle_fault_on_reboot(insn, cleanup_insn) \ 1388 "666: " insn "\n\t" \ 1389 "668: \n\t" \ 1390 ".pushsection .fixup, \"ax\" \n" \ 1391 "667: \n\t" \ 1392 cleanup_insn "\n\t" \ 1393 "cmpb $0, kvm_rebooting \n\t" \ 1394 "jne 668b \n\t" \ 1395 __ASM_SIZE(push) " $666b \n\t" \ 1396 "call kvm_spurious_fault \n\t" \ 1397 ".popsection \n\t" \ 1398 _ASM_EXTABLE(666b, 667b) 1399 1400 #define __kvm_handle_fault_on_reboot(insn) \ 1401 ____kvm_handle_fault_on_reboot(insn, "") 1402 1403 #define KVM_ARCH_WANT_MMU_NOTIFIER 1404 int kvm_unmap_hva(struct kvm *kvm, unsigned long hva); 1405 int kvm_unmap_hva_range(struct kvm *kvm, unsigned long start, unsigned long end); 1406 int kvm_age_hva(struct kvm *kvm, unsigned long start, unsigned long end); 1407 int kvm_test_age_hva(struct kvm *kvm, unsigned long hva); 1408 void kvm_set_spte_hva(struct kvm *kvm, unsigned long hva, pte_t pte); 1409 int kvm_cpu_has_injectable_intr(struct kvm_vcpu *v); 1410 int kvm_cpu_has_interrupt(struct kvm_vcpu *vcpu); 1411 int kvm_arch_interrupt_allowed(struct kvm_vcpu *vcpu); 1412 int kvm_cpu_get_interrupt(struct kvm_vcpu *v); 1413 void kvm_vcpu_reset(struct kvm_vcpu *vcpu, bool init_event); 1414 void kvm_vcpu_reload_apic_access_page(struct kvm_vcpu *vcpu); 1415 1416 void kvm_define_shared_msr(unsigned index, u32 msr); 1417 int kvm_set_shared_msr(unsigned index, u64 val, u64 mask); 1418 1419 u64 kvm_scale_tsc(struct kvm_vcpu *vcpu, u64 tsc); 1420 u64 kvm_read_l1_tsc(struct kvm_vcpu *vcpu, u64 host_tsc); 1421 1422 unsigned long kvm_get_linear_rip(struct kvm_vcpu *vcpu); 1423 bool kvm_is_linear_rip(struct kvm_vcpu *vcpu, unsigned long linear_rip); 1424 1425 void kvm_make_mclock_inprogress_request(struct kvm *kvm); 1426 void kvm_make_scan_ioapic_request(struct kvm *kvm); 1427 1428 void kvm_arch_async_page_not_present(struct kvm_vcpu *vcpu, 1429 struct kvm_async_pf *work); 1430 void kvm_arch_async_page_present(struct kvm_vcpu *vcpu, 1431 struct kvm_async_pf *work); 1432 void kvm_arch_async_page_ready(struct kvm_vcpu *vcpu, 1433 struct kvm_async_pf *work); 1434 bool kvm_arch_can_inject_async_page_present(struct kvm_vcpu *vcpu); 1435 extern bool kvm_find_async_pf_gfn(struct kvm_vcpu *vcpu, gfn_t gfn); 1436 1437 int kvm_skip_emulated_instruction(struct kvm_vcpu *vcpu); 1438 int kvm_complete_insn_gp(struct kvm_vcpu *vcpu, int err); 1439 1440 int kvm_is_in_guest(void); 1441 1442 int __x86_set_memory_region(struct kvm *kvm, int id, gpa_t gpa, u32 size); 1443 int x86_set_memory_region(struct kvm *kvm, int id, gpa_t gpa, u32 size); 1444 bool kvm_vcpu_is_reset_bsp(struct kvm_vcpu *vcpu); 1445 bool kvm_vcpu_is_bsp(struct kvm_vcpu *vcpu); 1446 1447 bool kvm_intr_is_single_vcpu(struct kvm *kvm, struct kvm_lapic_irq *irq, 1448 struct kvm_vcpu **dest_vcpu); 1449 1450 void kvm_set_msi_irq(struct kvm *kvm, struct kvm_kernel_irq_routing_entry *e, 1451 struct kvm_lapic_irq *irq); 1452 1453 static inline void kvm_arch_vcpu_blocking(struct kvm_vcpu *vcpu) 1454 { 1455 if (kvm_x86_ops->vcpu_blocking) 1456 kvm_x86_ops->vcpu_blocking(vcpu); 1457 } 1458 1459 static inline void kvm_arch_vcpu_unblocking(struct kvm_vcpu *vcpu) 1460 { 1461 if (kvm_x86_ops->vcpu_unblocking) 1462 kvm_x86_ops->vcpu_unblocking(vcpu); 1463 } 1464 1465 static inline void kvm_arch_vcpu_block_finish(struct kvm_vcpu *vcpu) {} 1466 1467 static inline int kvm_cpu_get_apicid(int mps_cpu) 1468 { 1469 #ifdef CONFIG_X86_LOCAL_APIC 1470 return default_cpu_present_to_apicid(mps_cpu); 1471 #else 1472 WARN_ON_ONCE(1); 1473 return BAD_APICID; 1474 #endif 1475 } 1476 1477 #define put_smstate(type, buf, offset, val) \ 1478 *(type *)((buf) + (offset) - 0x7e00) = val 1479 1480 #endif /* _ASM_X86_KVM_HOST_H */ 1481