1 /* SPDX-License-Identifier: GPL-2.0-only */ 2 /* 3 * Kernel-based Virtual Machine driver for Linux 4 * 5 * This header defines architecture specific interfaces, x86 version 6 */ 7 8 #ifndef _ASM_X86_KVM_HOST_H 9 #define _ASM_X86_KVM_HOST_H 10 11 #include <linux/types.h> 12 #include <linux/mm.h> 13 #include <linux/mmu_notifier.h> 14 #include <linux/tracepoint.h> 15 #include <linux/cpumask.h> 16 #include <linux/irq_work.h> 17 #include <linux/irq.h> 18 19 #include <linux/kvm.h> 20 #include <linux/kvm_para.h> 21 #include <linux/kvm_types.h> 22 #include <linux/perf_event.h> 23 #include <linux/pvclock_gtod.h> 24 #include <linux/clocksource.h> 25 #include <linux/irqbypass.h> 26 #include <linux/hyperv.h> 27 28 #include <asm/apic.h> 29 #include <asm/pvclock-abi.h> 30 #include <asm/desc.h> 31 #include <asm/mtrr.h> 32 #include <asm/msr-index.h> 33 #include <asm/asm.h> 34 #include <asm/kvm_page_track.h> 35 #include <asm/kvm_vcpu_regs.h> 36 #include <asm/hyperv-tlfs.h> 37 38 #define __KVM_HAVE_ARCH_VCPU_DEBUGFS 39 40 #define KVM_MAX_VCPUS 288 41 #define KVM_SOFT_MAX_VCPUS 240 42 #define KVM_MAX_VCPU_ID 1023 43 #define KVM_USER_MEM_SLOTS 509 44 /* memory slots that are not exposed to userspace */ 45 #define KVM_PRIVATE_MEM_SLOTS 3 46 #define KVM_MEM_SLOTS_NUM (KVM_USER_MEM_SLOTS + KVM_PRIVATE_MEM_SLOTS) 47 48 #define KVM_HALT_POLL_NS_DEFAULT 200000 49 50 #define KVM_IRQCHIP_NUM_PINS KVM_IOAPIC_NUM_PINS 51 52 #define KVM_DIRTY_LOG_MANUAL_CAPS (KVM_DIRTY_LOG_MANUAL_PROTECT_ENABLE | \ 53 KVM_DIRTY_LOG_INITIALLY_SET) 54 55 /* x86-specific vcpu->requests bit members */ 56 #define KVM_REQ_MIGRATE_TIMER KVM_ARCH_REQ(0) 57 #define KVM_REQ_REPORT_TPR_ACCESS KVM_ARCH_REQ(1) 58 #define KVM_REQ_TRIPLE_FAULT KVM_ARCH_REQ(2) 59 #define KVM_REQ_MMU_SYNC KVM_ARCH_REQ(3) 60 #define KVM_REQ_CLOCK_UPDATE KVM_ARCH_REQ(4) 61 #define KVM_REQ_LOAD_MMU_PGD KVM_ARCH_REQ(5) 62 #define KVM_REQ_EVENT KVM_ARCH_REQ(6) 63 #define KVM_REQ_APF_HALT KVM_ARCH_REQ(7) 64 #define KVM_REQ_STEAL_UPDATE KVM_ARCH_REQ(8) 65 #define KVM_REQ_NMI KVM_ARCH_REQ(9) 66 #define KVM_REQ_PMU KVM_ARCH_REQ(10) 67 #define KVM_REQ_PMI KVM_ARCH_REQ(11) 68 #define KVM_REQ_SMI KVM_ARCH_REQ(12) 69 #define KVM_REQ_MASTERCLOCK_UPDATE KVM_ARCH_REQ(13) 70 #define KVM_REQ_MCLOCK_INPROGRESS \ 71 KVM_ARCH_REQ_FLAGS(14, KVM_REQUEST_WAIT | KVM_REQUEST_NO_WAKEUP) 72 #define KVM_REQ_SCAN_IOAPIC \ 73 KVM_ARCH_REQ_FLAGS(15, KVM_REQUEST_WAIT | KVM_REQUEST_NO_WAKEUP) 74 #define KVM_REQ_GLOBAL_CLOCK_UPDATE KVM_ARCH_REQ(16) 75 #define KVM_REQ_APIC_PAGE_RELOAD \ 76 KVM_ARCH_REQ_FLAGS(17, KVM_REQUEST_WAIT | KVM_REQUEST_NO_WAKEUP) 77 #define KVM_REQ_HV_CRASH KVM_ARCH_REQ(18) 78 #define KVM_REQ_IOAPIC_EOI_EXIT KVM_ARCH_REQ(19) 79 #define KVM_REQ_HV_RESET KVM_ARCH_REQ(20) 80 #define KVM_REQ_HV_EXIT KVM_ARCH_REQ(21) 81 #define KVM_REQ_HV_STIMER KVM_ARCH_REQ(22) 82 #define KVM_REQ_LOAD_EOI_EXITMAP KVM_ARCH_REQ(23) 83 #define KVM_REQ_GET_NESTED_STATE_PAGES KVM_ARCH_REQ(24) 84 #define KVM_REQ_APICV_UPDATE \ 85 KVM_ARCH_REQ_FLAGS(25, KVM_REQUEST_WAIT | KVM_REQUEST_NO_WAKEUP) 86 #define KVM_REQ_TLB_FLUSH_CURRENT KVM_ARCH_REQ(26) 87 #define KVM_REQ_HV_TLB_FLUSH \ 88 KVM_ARCH_REQ_FLAGS(27, KVM_REQUEST_NO_WAKEUP) 89 #define KVM_REQ_APF_READY KVM_ARCH_REQ(28) 90 #define KVM_REQ_MSR_FILTER_CHANGED KVM_ARCH_REQ(29) 91 92 #define CR0_RESERVED_BITS \ 93 (~(unsigned long)(X86_CR0_PE | X86_CR0_MP | X86_CR0_EM | X86_CR0_TS \ 94 | X86_CR0_ET | X86_CR0_NE | X86_CR0_WP | X86_CR0_AM \ 95 | X86_CR0_NW | X86_CR0_CD | X86_CR0_PG)) 96 97 #define CR4_RESERVED_BITS \ 98 (~(unsigned long)(X86_CR4_VME | X86_CR4_PVI | X86_CR4_TSD | X86_CR4_DE\ 99 | X86_CR4_PSE | X86_CR4_PAE | X86_CR4_MCE \ 100 | X86_CR4_PGE | X86_CR4_PCE | X86_CR4_OSFXSR | X86_CR4_PCIDE \ 101 | X86_CR4_OSXSAVE | X86_CR4_SMEP | X86_CR4_FSGSBASE \ 102 | X86_CR4_OSXMMEXCPT | X86_CR4_LA57 | X86_CR4_VMXE \ 103 | X86_CR4_SMAP | X86_CR4_PKE | X86_CR4_UMIP)) 104 105 #define CR8_RESERVED_BITS (~(unsigned long)X86_CR8_TPR) 106 107 108 109 #define INVALID_PAGE (~(hpa_t)0) 110 #define VALID_PAGE(x) ((x) != INVALID_PAGE) 111 112 #define UNMAPPED_GVA (~(gpa_t)0) 113 114 /* KVM Hugepage definitions for x86 */ 115 #define KVM_MAX_HUGEPAGE_LEVEL PG_LEVEL_1G 116 #define KVM_NR_PAGE_SIZES (KVM_MAX_HUGEPAGE_LEVEL - PG_LEVEL_4K + 1) 117 #define KVM_HPAGE_GFN_SHIFT(x) (((x) - 1) * 9) 118 #define KVM_HPAGE_SHIFT(x) (PAGE_SHIFT + KVM_HPAGE_GFN_SHIFT(x)) 119 #define KVM_HPAGE_SIZE(x) (1UL << KVM_HPAGE_SHIFT(x)) 120 #define KVM_HPAGE_MASK(x) (~(KVM_HPAGE_SIZE(x) - 1)) 121 #define KVM_PAGES_PER_HPAGE(x) (KVM_HPAGE_SIZE(x) / PAGE_SIZE) 122 123 static inline gfn_t gfn_to_index(gfn_t gfn, gfn_t base_gfn, int level) 124 { 125 /* KVM_HPAGE_GFN_SHIFT(PG_LEVEL_4K) must be 0. */ 126 return (gfn >> KVM_HPAGE_GFN_SHIFT(level)) - 127 (base_gfn >> KVM_HPAGE_GFN_SHIFT(level)); 128 } 129 130 #define KVM_PERMILLE_MMU_PAGES 20 131 #define KVM_MIN_ALLOC_MMU_PAGES 64UL 132 #define KVM_MMU_HASH_SHIFT 12 133 #define KVM_NUM_MMU_PAGES (1 << KVM_MMU_HASH_SHIFT) 134 #define KVM_MIN_FREE_MMU_PAGES 5 135 #define KVM_REFILL_PAGES 25 136 #define KVM_MAX_CPUID_ENTRIES 256 137 #define KVM_NR_FIXED_MTRR_REGION 88 138 #define KVM_NR_VAR_MTRR 8 139 140 #define ASYNC_PF_PER_VCPU 64 141 142 enum kvm_reg { 143 VCPU_REGS_RAX = __VCPU_REGS_RAX, 144 VCPU_REGS_RCX = __VCPU_REGS_RCX, 145 VCPU_REGS_RDX = __VCPU_REGS_RDX, 146 VCPU_REGS_RBX = __VCPU_REGS_RBX, 147 VCPU_REGS_RSP = __VCPU_REGS_RSP, 148 VCPU_REGS_RBP = __VCPU_REGS_RBP, 149 VCPU_REGS_RSI = __VCPU_REGS_RSI, 150 VCPU_REGS_RDI = __VCPU_REGS_RDI, 151 #ifdef CONFIG_X86_64 152 VCPU_REGS_R8 = __VCPU_REGS_R8, 153 VCPU_REGS_R9 = __VCPU_REGS_R9, 154 VCPU_REGS_R10 = __VCPU_REGS_R10, 155 VCPU_REGS_R11 = __VCPU_REGS_R11, 156 VCPU_REGS_R12 = __VCPU_REGS_R12, 157 VCPU_REGS_R13 = __VCPU_REGS_R13, 158 VCPU_REGS_R14 = __VCPU_REGS_R14, 159 VCPU_REGS_R15 = __VCPU_REGS_R15, 160 #endif 161 VCPU_REGS_RIP, 162 NR_VCPU_REGS, 163 164 VCPU_EXREG_PDPTR = NR_VCPU_REGS, 165 VCPU_EXREG_CR0, 166 VCPU_EXREG_CR3, 167 VCPU_EXREG_CR4, 168 VCPU_EXREG_RFLAGS, 169 VCPU_EXREG_SEGMENTS, 170 VCPU_EXREG_EXIT_INFO_1, 171 VCPU_EXREG_EXIT_INFO_2, 172 }; 173 174 enum { 175 VCPU_SREG_ES, 176 VCPU_SREG_CS, 177 VCPU_SREG_SS, 178 VCPU_SREG_DS, 179 VCPU_SREG_FS, 180 VCPU_SREG_GS, 181 VCPU_SREG_TR, 182 VCPU_SREG_LDTR, 183 }; 184 185 enum exit_fastpath_completion { 186 EXIT_FASTPATH_NONE, 187 EXIT_FASTPATH_REENTER_GUEST, 188 EXIT_FASTPATH_EXIT_HANDLED, 189 }; 190 typedef enum exit_fastpath_completion fastpath_t; 191 192 struct x86_emulate_ctxt; 193 struct x86_exception; 194 enum x86_intercept; 195 enum x86_intercept_stage; 196 197 #define KVM_NR_DB_REGS 4 198 199 #define DR6_BD (1 << 13) 200 #define DR6_BS (1 << 14) 201 #define DR6_BT (1 << 15) 202 #define DR6_RTM (1 << 16) 203 #define DR6_FIXED_1 0xfffe0ff0 204 #define DR6_INIT 0xffff0ff0 205 #define DR6_VOLATILE 0x0001e00f 206 207 #define DR7_BP_EN_MASK 0x000000ff 208 #define DR7_GE (1 << 9) 209 #define DR7_GD (1 << 13) 210 #define DR7_FIXED_1 0x00000400 211 #define DR7_VOLATILE 0xffff2bff 212 213 #define PFERR_PRESENT_BIT 0 214 #define PFERR_WRITE_BIT 1 215 #define PFERR_USER_BIT 2 216 #define PFERR_RSVD_BIT 3 217 #define PFERR_FETCH_BIT 4 218 #define PFERR_PK_BIT 5 219 #define PFERR_GUEST_FINAL_BIT 32 220 #define PFERR_GUEST_PAGE_BIT 33 221 222 #define PFERR_PRESENT_MASK (1U << PFERR_PRESENT_BIT) 223 #define PFERR_WRITE_MASK (1U << PFERR_WRITE_BIT) 224 #define PFERR_USER_MASK (1U << PFERR_USER_BIT) 225 #define PFERR_RSVD_MASK (1U << PFERR_RSVD_BIT) 226 #define PFERR_FETCH_MASK (1U << PFERR_FETCH_BIT) 227 #define PFERR_PK_MASK (1U << PFERR_PK_BIT) 228 #define PFERR_GUEST_FINAL_MASK (1ULL << PFERR_GUEST_FINAL_BIT) 229 #define PFERR_GUEST_PAGE_MASK (1ULL << PFERR_GUEST_PAGE_BIT) 230 231 #define PFERR_NESTED_GUEST_PAGE (PFERR_GUEST_PAGE_MASK | \ 232 PFERR_WRITE_MASK | \ 233 PFERR_PRESENT_MASK) 234 235 /* apic attention bits */ 236 #define KVM_APIC_CHECK_VAPIC 0 237 /* 238 * The following bit is set with PV-EOI, unset on EOI. 239 * We detect PV-EOI changes by guest by comparing 240 * this bit with PV-EOI in guest memory. 241 * See the implementation in apic_update_pv_eoi. 242 */ 243 #define KVM_APIC_PV_EOI_PENDING 1 244 245 struct kvm_kernel_irq_routing_entry; 246 247 /* 248 * the pages used as guest page table on soft mmu are tracked by 249 * kvm_memory_slot.arch.gfn_track which is 16 bits, so the role bits used 250 * by indirect shadow page can not be more than 15 bits. 251 * 252 * Currently, we used 14 bits that are @level, @gpte_is_8_bytes, @quadrant, @access, 253 * @nxe, @cr0_wp, @smep_andnot_wp and @smap_andnot_wp. 254 */ 255 union kvm_mmu_page_role { 256 u32 word; 257 struct { 258 unsigned level:4; 259 unsigned gpte_is_8_bytes:1; 260 unsigned quadrant:2; 261 unsigned direct:1; 262 unsigned access:3; 263 unsigned invalid:1; 264 unsigned nxe:1; 265 unsigned cr0_wp:1; 266 unsigned smep_andnot_wp:1; 267 unsigned smap_andnot_wp:1; 268 unsigned ad_disabled:1; 269 unsigned guest_mode:1; 270 unsigned :6; 271 272 /* 273 * This is left at the top of the word so that 274 * kvm_memslots_for_spte_role can extract it with a 275 * simple shift. While there is room, give it a whole 276 * byte so it is also faster to load it from memory. 277 */ 278 unsigned smm:8; 279 }; 280 }; 281 282 union kvm_mmu_extended_role { 283 /* 284 * This structure complements kvm_mmu_page_role caching everything needed for 285 * MMU configuration. If nothing in both these structures changed, MMU 286 * re-configuration can be skipped. @valid bit is set on first usage so we don't 287 * treat all-zero structure as valid data. 288 */ 289 u32 word; 290 struct { 291 unsigned int valid:1; 292 unsigned int execonly:1; 293 unsigned int cr0_pg:1; 294 unsigned int cr4_pae:1; 295 unsigned int cr4_pse:1; 296 unsigned int cr4_pke:1; 297 unsigned int cr4_smap:1; 298 unsigned int cr4_smep:1; 299 unsigned int maxphyaddr:6; 300 }; 301 }; 302 303 union kvm_mmu_role { 304 u64 as_u64; 305 struct { 306 union kvm_mmu_page_role base; 307 union kvm_mmu_extended_role ext; 308 }; 309 }; 310 311 struct kvm_rmap_head { 312 unsigned long val; 313 }; 314 315 struct kvm_pio_request { 316 unsigned long linear_rip; 317 unsigned long count; 318 int in; 319 int port; 320 int size; 321 }; 322 323 #define PT64_ROOT_MAX_LEVEL 5 324 325 struct rsvd_bits_validate { 326 u64 rsvd_bits_mask[2][PT64_ROOT_MAX_LEVEL]; 327 u64 bad_mt_xwr; 328 }; 329 330 struct kvm_mmu_root_info { 331 gpa_t pgd; 332 hpa_t hpa; 333 }; 334 335 #define KVM_MMU_ROOT_INFO_INVALID \ 336 ((struct kvm_mmu_root_info) { .pgd = INVALID_PAGE, .hpa = INVALID_PAGE }) 337 338 #define KVM_MMU_NUM_PREV_ROOTS 3 339 340 struct kvm_mmu_page; 341 342 /* 343 * x86 supports 4 paging modes (5-level 64-bit, 4-level 64-bit, 3-level 32-bit, 344 * and 2-level 32-bit). The kvm_mmu structure abstracts the details of the 345 * current mmu mode. 346 */ 347 struct kvm_mmu { 348 unsigned long (*get_guest_pgd)(struct kvm_vcpu *vcpu); 349 u64 (*get_pdptr)(struct kvm_vcpu *vcpu, int index); 350 int (*page_fault)(struct kvm_vcpu *vcpu, gpa_t cr2_or_gpa, u32 err, 351 bool prefault); 352 void (*inject_page_fault)(struct kvm_vcpu *vcpu, 353 struct x86_exception *fault); 354 gpa_t (*gva_to_gpa)(struct kvm_vcpu *vcpu, gpa_t gva_or_gpa, 355 u32 access, struct x86_exception *exception); 356 gpa_t (*translate_gpa)(struct kvm_vcpu *vcpu, gpa_t gpa, u32 access, 357 struct x86_exception *exception); 358 int (*sync_page)(struct kvm_vcpu *vcpu, 359 struct kvm_mmu_page *sp); 360 void (*invlpg)(struct kvm_vcpu *vcpu, gva_t gva, hpa_t root_hpa); 361 void (*update_pte)(struct kvm_vcpu *vcpu, struct kvm_mmu_page *sp, 362 u64 *spte, const void *pte); 363 hpa_t root_hpa; 364 gpa_t root_pgd; 365 union kvm_mmu_role mmu_role; 366 u8 root_level; 367 u8 shadow_root_level; 368 u8 ept_ad; 369 bool direct_map; 370 struct kvm_mmu_root_info prev_roots[KVM_MMU_NUM_PREV_ROOTS]; 371 372 /* 373 * Bitmap; bit set = permission fault 374 * Byte index: page fault error code [4:1] 375 * Bit index: pte permissions in ACC_* format 376 */ 377 u8 permissions[16]; 378 379 /* 380 * The pkru_mask indicates if protection key checks are needed. It 381 * consists of 16 domains indexed by page fault error code bits [4:1], 382 * with PFEC.RSVD replaced by ACC_USER_MASK from the page tables. 383 * Each domain has 2 bits which are ANDed with AD and WD from PKRU. 384 */ 385 u32 pkru_mask; 386 387 u64 *pae_root; 388 u64 *lm_root; 389 390 /* 391 * check zero bits on shadow page table entries, these 392 * bits include not only hardware reserved bits but also 393 * the bits spte never used. 394 */ 395 struct rsvd_bits_validate shadow_zero_check; 396 397 struct rsvd_bits_validate guest_rsvd_check; 398 399 /* Can have large pages at levels 2..last_nonleaf_level-1. */ 400 u8 last_nonleaf_level; 401 402 bool nx; 403 404 u64 pdptrs[4]; /* pae */ 405 }; 406 407 struct kvm_tlb_range { 408 u64 start_gfn; 409 u64 pages; 410 }; 411 412 enum pmc_type { 413 KVM_PMC_GP = 0, 414 KVM_PMC_FIXED, 415 }; 416 417 struct kvm_pmc { 418 enum pmc_type type; 419 u8 idx; 420 u64 counter; 421 u64 eventsel; 422 struct perf_event *perf_event; 423 struct kvm_vcpu *vcpu; 424 /* 425 * eventsel value for general purpose counters, 426 * ctrl value for fixed counters. 427 */ 428 u64 current_config; 429 }; 430 431 struct kvm_pmu { 432 unsigned nr_arch_gp_counters; 433 unsigned nr_arch_fixed_counters; 434 unsigned available_event_types; 435 u64 fixed_ctr_ctrl; 436 u64 global_ctrl; 437 u64 global_status; 438 u64 global_ovf_ctrl; 439 u64 counter_bitmask[2]; 440 u64 global_ctrl_mask; 441 u64 global_ovf_ctrl_mask; 442 u64 reserved_bits; 443 u8 version; 444 struct kvm_pmc gp_counters[INTEL_PMC_MAX_GENERIC]; 445 struct kvm_pmc fixed_counters[INTEL_PMC_MAX_FIXED]; 446 struct irq_work irq_work; 447 DECLARE_BITMAP(reprogram_pmi, X86_PMC_IDX_MAX); 448 DECLARE_BITMAP(all_valid_pmc_idx, X86_PMC_IDX_MAX); 449 DECLARE_BITMAP(pmc_in_use, X86_PMC_IDX_MAX); 450 451 /* 452 * The gate to release perf_events not marked in 453 * pmc_in_use only once in a vcpu time slice. 454 */ 455 bool need_cleanup; 456 457 /* 458 * The total number of programmed perf_events and it helps to avoid 459 * redundant check before cleanup if guest don't use vPMU at all. 460 */ 461 u8 event_count; 462 }; 463 464 struct kvm_pmu_ops; 465 466 enum { 467 KVM_DEBUGREG_BP_ENABLED = 1, 468 KVM_DEBUGREG_WONT_EXIT = 2, 469 KVM_DEBUGREG_RELOAD = 4, 470 }; 471 472 struct kvm_mtrr_range { 473 u64 base; 474 u64 mask; 475 struct list_head node; 476 }; 477 478 struct kvm_mtrr { 479 struct kvm_mtrr_range var_ranges[KVM_NR_VAR_MTRR]; 480 mtrr_type fixed_ranges[KVM_NR_FIXED_MTRR_REGION]; 481 u64 deftype; 482 483 struct list_head head; 484 }; 485 486 /* Hyper-V SynIC timer */ 487 struct kvm_vcpu_hv_stimer { 488 struct hrtimer timer; 489 int index; 490 union hv_stimer_config config; 491 u64 count; 492 u64 exp_time; 493 struct hv_message msg; 494 bool msg_pending; 495 }; 496 497 /* Hyper-V synthetic interrupt controller (SynIC)*/ 498 struct kvm_vcpu_hv_synic { 499 u64 version; 500 u64 control; 501 u64 msg_page; 502 u64 evt_page; 503 atomic64_t sint[HV_SYNIC_SINT_COUNT]; 504 atomic_t sint_to_gsi[HV_SYNIC_SINT_COUNT]; 505 DECLARE_BITMAP(auto_eoi_bitmap, 256); 506 DECLARE_BITMAP(vec_bitmap, 256); 507 bool active; 508 bool dont_zero_synic_pages; 509 }; 510 511 /* Hyper-V per vcpu emulation context */ 512 struct kvm_vcpu_hv { 513 u32 vp_index; 514 u64 hv_vapic; 515 s64 runtime_offset; 516 struct kvm_vcpu_hv_synic synic; 517 struct kvm_hyperv_exit exit; 518 struct kvm_vcpu_hv_stimer stimer[HV_SYNIC_STIMER_COUNT]; 519 DECLARE_BITMAP(stimer_pending_bitmap, HV_SYNIC_STIMER_COUNT); 520 cpumask_t tlb_flush; 521 }; 522 523 struct kvm_vcpu_arch { 524 /* 525 * rip and regs accesses must go through 526 * kvm_{register,rip}_{read,write} functions. 527 */ 528 unsigned long regs[NR_VCPU_REGS]; 529 u32 regs_avail; 530 u32 regs_dirty; 531 532 unsigned long cr0; 533 unsigned long cr0_guest_owned_bits; 534 unsigned long cr2; 535 unsigned long cr3; 536 unsigned long cr4; 537 unsigned long cr4_guest_owned_bits; 538 unsigned long cr4_guest_rsvd_bits; 539 unsigned long cr8; 540 u32 host_pkru; 541 u32 pkru; 542 u32 hflags; 543 u64 efer; 544 u64 apic_base; 545 struct kvm_lapic *apic; /* kernel irqchip context */ 546 bool apicv_active; 547 bool load_eoi_exitmap_pending; 548 DECLARE_BITMAP(ioapic_handled_vectors, 256); 549 unsigned long apic_attention; 550 int32_t apic_arb_prio; 551 int mp_state; 552 u64 ia32_misc_enable_msr; 553 u64 smbase; 554 u64 smi_count; 555 bool tpr_access_reporting; 556 bool xsaves_enabled; 557 u64 ia32_xss; 558 u64 microcode_version; 559 u64 arch_capabilities; 560 u64 perf_capabilities; 561 562 /* 563 * Paging state of the vcpu 564 * 565 * If the vcpu runs in guest mode with two level paging this still saves 566 * the paging mode of the l1 guest. This context is always used to 567 * handle faults. 568 */ 569 struct kvm_mmu *mmu; 570 571 /* Non-nested MMU for L1 */ 572 struct kvm_mmu root_mmu; 573 574 /* L1 MMU when running nested */ 575 struct kvm_mmu guest_mmu; 576 577 /* 578 * Paging state of an L2 guest (used for nested npt) 579 * 580 * This context will save all necessary information to walk page tables 581 * of an L2 guest. This context is only initialized for page table 582 * walking and not for faulting since we never handle l2 page faults on 583 * the host. 584 */ 585 struct kvm_mmu nested_mmu; 586 587 /* 588 * Pointer to the mmu context currently used for 589 * gva_to_gpa translations. 590 */ 591 struct kvm_mmu *walk_mmu; 592 593 struct kvm_mmu_memory_cache mmu_pte_list_desc_cache; 594 struct kvm_mmu_memory_cache mmu_shadow_page_cache; 595 struct kvm_mmu_memory_cache mmu_gfn_array_cache; 596 struct kvm_mmu_memory_cache mmu_page_header_cache; 597 598 /* 599 * QEMU userspace and the guest each have their own FPU state. 600 * In vcpu_run, we switch between the user and guest FPU contexts. 601 * While running a VCPU, the VCPU thread will have the guest FPU 602 * context. 603 * 604 * Note that while the PKRU state lives inside the fpu registers, 605 * it is switched out separately at VMENTER and VMEXIT time. The 606 * "guest_fpu" state here contains the guest FPU context, with the 607 * host PRKU bits. 608 */ 609 struct fpu *user_fpu; 610 struct fpu *guest_fpu; 611 612 u64 xcr0; 613 u64 guest_supported_xcr0; 614 615 struct kvm_pio_request pio; 616 void *pio_data; 617 618 u8 event_exit_inst_len; 619 620 struct kvm_queued_exception { 621 bool pending; 622 bool injected; 623 bool has_error_code; 624 u8 nr; 625 u32 error_code; 626 unsigned long payload; 627 bool has_payload; 628 u8 nested_apf; 629 } exception; 630 631 struct kvm_queued_interrupt { 632 bool injected; 633 bool soft; 634 u8 nr; 635 } interrupt; 636 637 int halt_request; /* real mode on Intel only */ 638 639 int cpuid_nent; 640 struct kvm_cpuid_entry2 *cpuid_entries; 641 642 int maxphyaddr; 643 int max_tdp_level; 644 645 /* emulate context */ 646 647 struct x86_emulate_ctxt *emulate_ctxt; 648 bool emulate_regs_need_sync_to_vcpu; 649 bool emulate_regs_need_sync_from_vcpu; 650 int (*complete_userspace_io)(struct kvm_vcpu *vcpu); 651 652 gpa_t time; 653 struct pvclock_vcpu_time_info hv_clock; 654 unsigned int hw_tsc_khz; 655 struct gfn_to_hva_cache pv_time; 656 bool pv_time_enabled; 657 /* set guest stopped flag in pvclock flags field */ 658 bool pvclock_set_guest_stopped_request; 659 660 struct { 661 u8 preempted; 662 u64 msr_val; 663 u64 last_steal; 664 struct gfn_to_pfn_cache cache; 665 } st; 666 667 u64 l1_tsc_offset; 668 u64 tsc_offset; 669 u64 last_guest_tsc; 670 u64 last_host_tsc; 671 u64 tsc_offset_adjustment; 672 u64 this_tsc_nsec; 673 u64 this_tsc_write; 674 u64 this_tsc_generation; 675 bool tsc_catchup; 676 bool tsc_always_catchup; 677 s8 virtual_tsc_shift; 678 u32 virtual_tsc_mult; 679 u32 virtual_tsc_khz; 680 s64 ia32_tsc_adjust_msr; 681 u64 msr_ia32_power_ctl; 682 u64 tsc_scaling_ratio; 683 684 atomic_t nmi_queued; /* unprocessed asynchronous NMIs */ 685 unsigned nmi_pending; /* NMI queued after currently running handler */ 686 bool nmi_injected; /* Trying to inject an NMI this entry */ 687 bool smi_pending; /* SMI queued after currently running handler */ 688 689 struct kvm_mtrr mtrr_state; 690 u64 pat; 691 692 unsigned switch_db_regs; 693 unsigned long db[KVM_NR_DB_REGS]; 694 unsigned long dr6; 695 unsigned long dr7; 696 unsigned long eff_db[KVM_NR_DB_REGS]; 697 unsigned long guest_debug_dr7; 698 u64 msr_platform_info; 699 u64 msr_misc_features_enables; 700 701 u64 mcg_cap; 702 u64 mcg_status; 703 u64 mcg_ctl; 704 u64 mcg_ext_ctl; 705 u64 *mce_banks; 706 707 /* Cache MMIO info */ 708 u64 mmio_gva; 709 unsigned mmio_access; 710 gfn_t mmio_gfn; 711 u64 mmio_gen; 712 713 struct kvm_pmu pmu; 714 715 /* used for guest single stepping over the given code position */ 716 unsigned long singlestep_rip; 717 718 struct kvm_vcpu_hv hyperv; 719 720 cpumask_var_t wbinvd_dirty_mask; 721 722 unsigned long last_retry_eip; 723 unsigned long last_retry_addr; 724 725 struct { 726 bool halted; 727 gfn_t gfns[ASYNC_PF_PER_VCPU]; 728 struct gfn_to_hva_cache data; 729 u64 msr_en_val; /* MSR_KVM_ASYNC_PF_EN */ 730 u64 msr_int_val; /* MSR_KVM_ASYNC_PF_INT */ 731 u16 vec; 732 u32 id; 733 bool send_user_only; 734 u32 host_apf_flags; 735 unsigned long nested_apf_token; 736 bool delivery_as_pf_vmexit; 737 bool pageready_pending; 738 } apf; 739 740 /* OSVW MSRs (AMD only) */ 741 struct { 742 u64 length; 743 u64 status; 744 } osvw; 745 746 struct { 747 u64 msr_val; 748 struct gfn_to_hva_cache data; 749 } pv_eoi; 750 751 u64 msr_kvm_poll_control; 752 753 /* 754 * Indicates the guest is trying to write a gfn that contains one or 755 * more of the PTEs used to translate the write itself, i.e. the access 756 * is changing its own translation in the guest page tables. KVM exits 757 * to userspace if emulation of the faulting instruction fails and this 758 * flag is set, as KVM cannot make forward progress. 759 * 760 * If emulation fails for a write to guest page tables, KVM unprotects 761 * (zaps) the shadow page for the target gfn and resumes the guest to 762 * retry the non-emulatable instruction (on hardware). Unprotecting the 763 * gfn doesn't allow forward progress for a self-changing access because 764 * doing so also zaps the translation for the gfn, i.e. retrying the 765 * instruction will hit a !PRESENT fault, which results in a new shadow 766 * page and sends KVM back to square one. 767 */ 768 bool write_fault_to_shadow_pgtable; 769 770 /* set at EPT violation at this point */ 771 unsigned long exit_qualification; 772 773 /* pv related host specific info */ 774 struct { 775 bool pv_unhalted; 776 } pv; 777 778 int pending_ioapic_eoi; 779 int pending_external_vector; 780 781 /* be preempted when it's in kernel-mode(cpl=0) */ 782 bool preempted_in_kernel; 783 784 /* Flush the L1 Data cache for L1TF mitigation on VMENTER */ 785 bool l1tf_flush_l1d; 786 787 /* Host CPU on which VM-entry was most recently attempted */ 788 unsigned int last_vmentry_cpu; 789 790 /* AMD MSRC001_0015 Hardware Configuration */ 791 u64 msr_hwcr; 792 793 /* pv related cpuid info */ 794 struct { 795 /* 796 * value of the eax register in the KVM_CPUID_FEATURES CPUID 797 * leaf. 798 */ 799 u32 features; 800 801 /* 802 * indicates whether pv emulation should be disabled if features 803 * are not present in the guest's cpuid 804 */ 805 bool enforce; 806 } pv_cpuid; 807 }; 808 809 struct kvm_lpage_info { 810 int disallow_lpage; 811 }; 812 813 struct kvm_arch_memory_slot { 814 struct kvm_rmap_head *rmap[KVM_NR_PAGE_SIZES]; 815 struct kvm_lpage_info *lpage_info[KVM_NR_PAGE_SIZES - 1]; 816 unsigned short *gfn_track[KVM_PAGE_TRACK_MAX]; 817 }; 818 819 /* 820 * We use as the mode the number of bits allocated in the LDR for the 821 * logical processor ID. It happens that these are all powers of two. 822 * This makes it is very easy to detect cases where the APICs are 823 * configured for multiple modes; in that case, we cannot use the map and 824 * hence cannot use kvm_irq_delivery_to_apic_fast either. 825 */ 826 #define KVM_APIC_MODE_XAPIC_CLUSTER 4 827 #define KVM_APIC_MODE_XAPIC_FLAT 8 828 #define KVM_APIC_MODE_X2APIC 16 829 830 struct kvm_apic_map { 831 struct rcu_head rcu; 832 u8 mode; 833 u32 max_apic_id; 834 union { 835 struct kvm_lapic *xapic_flat_map[8]; 836 struct kvm_lapic *xapic_cluster_map[16][4]; 837 }; 838 struct kvm_lapic *phys_map[]; 839 }; 840 841 /* Hyper-V synthetic debugger (SynDbg)*/ 842 struct kvm_hv_syndbg { 843 struct { 844 u64 control; 845 u64 status; 846 u64 send_page; 847 u64 recv_page; 848 u64 pending_page; 849 } control; 850 u64 options; 851 }; 852 853 /* Hyper-V emulation context */ 854 struct kvm_hv { 855 struct mutex hv_lock; 856 u64 hv_guest_os_id; 857 u64 hv_hypercall; 858 u64 hv_tsc_page; 859 860 /* Hyper-v based guest crash (NT kernel bugcheck) parameters */ 861 u64 hv_crash_param[HV_X64_MSR_CRASH_PARAMS]; 862 u64 hv_crash_ctl; 863 864 struct ms_hyperv_tsc_page tsc_ref; 865 866 struct idr conn_to_evt; 867 868 u64 hv_reenlightenment_control; 869 u64 hv_tsc_emulation_control; 870 u64 hv_tsc_emulation_status; 871 872 /* How many vCPUs have VP index != vCPU index */ 873 atomic_t num_mismatched_vp_indexes; 874 875 struct hv_partition_assist_pg *hv_pa_pg; 876 struct kvm_hv_syndbg hv_syndbg; 877 }; 878 879 struct msr_bitmap_range { 880 u32 flags; 881 u32 nmsrs; 882 u32 base; 883 unsigned long *bitmap; 884 }; 885 886 enum kvm_irqchip_mode { 887 KVM_IRQCHIP_NONE, 888 KVM_IRQCHIP_KERNEL, /* created with KVM_CREATE_IRQCHIP */ 889 KVM_IRQCHIP_SPLIT, /* created with KVM_CAP_SPLIT_IRQCHIP */ 890 }; 891 892 #define APICV_INHIBIT_REASON_DISABLE 0 893 #define APICV_INHIBIT_REASON_HYPERV 1 894 #define APICV_INHIBIT_REASON_NESTED 2 895 #define APICV_INHIBIT_REASON_IRQWIN 3 896 #define APICV_INHIBIT_REASON_PIT_REINJ 4 897 #define APICV_INHIBIT_REASON_X2APIC 5 898 899 struct kvm_arch { 900 unsigned long n_used_mmu_pages; 901 unsigned long n_requested_mmu_pages; 902 unsigned long n_max_mmu_pages; 903 unsigned int indirect_shadow_pages; 904 u8 mmu_valid_gen; 905 struct hlist_head mmu_page_hash[KVM_NUM_MMU_PAGES]; 906 /* 907 * Hash table of struct kvm_mmu_page. 908 */ 909 struct list_head active_mmu_pages; 910 struct list_head zapped_obsolete_pages; 911 struct list_head lpage_disallowed_mmu_pages; 912 struct kvm_page_track_notifier_node mmu_sp_tracker; 913 struct kvm_page_track_notifier_head track_notifier_head; 914 915 struct list_head assigned_dev_head; 916 struct iommu_domain *iommu_domain; 917 bool iommu_noncoherent; 918 #define __KVM_HAVE_ARCH_NONCOHERENT_DMA 919 atomic_t noncoherent_dma_count; 920 #define __KVM_HAVE_ARCH_ASSIGNED_DEVICE 921 atomic_t assigned_device_count; 922 struct kvm_pic *vpic; 923 struct kvm_ioapic *vioapic; 924 struct kvm_pit *vpit; 925 atomic_t vapics_in_nmi_mode; 926 struct mutex apic_map_lock; 927 struct kvm_apic_map *apic_map; 928 atomic_t apic_map_dirty; 929 930 bool apic_access_page_done; 931 unsigned long apicv_inhibit_reasons; 932 933 gpa_t wall_clock; 934 935 bool mwait_in_guest; 936 bool hlt_in_guest; 937 bool pause_in_guest; 938 bool cstate_in_guest; 939 940 unsigned long irq_sources_bitmap; 941 s64 kvmclock_offset; 942 raw_spinlock_t tsc_write_lock; 943 u64 last_tsc_nsec; 944 u64 last_tsc_write; 945 u32 last_tsc_khz; 946 u64 cur_tsc_nsec; 947 u64 cur_tsc_write; 948 u64 cur_tsc_offset; 949 u64 cur_tsc_generation; 950 int nr_vcpus_matched_tsc; 951 952 spinlock_t pvclock_gtod_sync_lock; 953 bool use_master_clock; 954 u64 master_kernel_ns; 955 u64 master_cycle_now; 956 struct delayed_work kvmclock_update_work; 957 struct delayed_work kvmclock_sync_work; 958 959 struct kvm_xen_hvm_config xen_hvm_config; 960 961 /* reads protected by irq_srcu, writes by irq_lock */ 962 struct hlist_head mask_notifier_list; 963 964 struct kvm_hv hyperv; 965 966 #ifdef CONFIG_KVM_MMU_AUDIT 967 int audit_point; 968 #endif 969 970 bool backwards_tsc_observed; 971 bool boot_vcpu_runs_old_kvmclock; 972 u32 bsp_vcpu_id; 973 974 u64 disabled_quirks; 975 976 enum kvm_irqchip_mode irqchip_mode; 977 u8 nr_reserved_ioapic_pins; 978 979 bool disabled_lapic_found; 980 981 bool x2apic_format; 982 bool x2apic_broadcast_quirk_disabled; 983 984 bool guest_can_read_msr_platform_info; 985 bool exception_payload_enabled; 986 987 /* Deflect RDMSR and WRMSR to user space when they trigger a #GP */ 988 u32 user_space_msr_mask; 989 990 struct { 991 u8 count; 992 bool default_allow:1; 993 struct msr_bitmap_range ranges[16]; 994 } msr_filter; 995 996 struct kvm_pmu_event_filter *pmu_event_filter; 997 struct task_struct *nx_lpage_recovery_thread; 998 999 /* 1000 * Whether the TDP MMU is enabled for this VM. This contains a 1001 * snapshot of the TDP MMU module parameter from when the VM was 1002 * created and remains unchanged for the life of the VM. If this is 1003 * true, TDP MMU handler functions will run for various MMU 1004 * operations. 1005 */ 1006 bool tdp_mmu_enabled; 1007 1008 /* List of struct tdp_mmu_pages being used as roots */ 1009 struct list_head tdp_mmu_roots; 1010 /* List of struct tdp_mmu_pages not being used as roots */ 1011 struct list_head tdp_mmu_pages; 1012 }; 1013 1014 struct kvm_vm_stat { 1015 ulong mmu_shadow_zapped; 1016 ulong mmu_pte_write; 1017 ulong mmu_pte_updated; 1018 ulong mmu_pde_zapped; 1019 ulong mmu_flooded; 1020 ulong mmu_recycled; 1021 ulong mmu_cache_miss; 1022 ulong mmu_unsync; 1023 ulong remote_tlb_flush; 1024 ulong lpages; 1025 ulong nx_lpage_splits; 1026 ulong max_mmu_page_hash_collisions; 1027 }; 1028 1029 struct kvm_vcpu_stat { 1030 u64 pf_fixed; 1031 u64 pf_guest; 1032 u64 tlb_flush; 1033 u64 invlpg; 1034 1035 u64 exits; 1036 u64 io_exits; 1037 u64 mmio_exits; 1038 u64 signal_exits; 1039 u64 irq_window_exits; 1040 u64 nmi_window_exits; 1041 u64 l1d_flush; 1042 u64 halt_exits; 1043 u64 halt_successful_poll; 1044 u64 halt_attempted_poll; 1045 u64 halt_poll_invalid; 1046 u64 halt_wakeup; 1047 u64 request_irq_exits; 1048 u64 irq_exits; 1049 u64 host_state_reload; 1050 u64 fpu_reload; 1051 u64 insn_emulation; 1052 u64 insn_emulation_fail; 1053 u64 hypercalls; 1054 u64 irq_injections; 1055 u64 nmi_injections; 1056 u64 req_event; 1057 u64 halt_poll_success_ns; 1058 u64 halt_poll_fail_ns; 1059 }; 1060 1061 struct x86_instruction_info; 1062 1063 struct msr_data { 1064 bool host_initiated; 1065 u32 index; 1066 u64 data; 1067 }; 1068 1069 struct kvm_lapic_irq { 1070 u32 vector; 1071 u16 delivery_mode; 1072 u16 dest_mode; 1073 bool level; 1074 u16 trig_mode; 1075 u32 shorthand; 1076 u32 dest_id; 1077 bool msi_redir_hint; 1078 }; 1079 1080 static inline u16 kvm_lapic_irq_dest_mode(bool dest_mode_logical) 1081 { 1082 return dest_mode_logical ? APIC_DEST_LOGICAL : APIC_DEST_PHYSICAL; 1083 } 1084 1085 struct kvm_x86_ops { 1086 int (*hardware_enable)(void); 1087 void (*hardware_disable)(void); 1088 void (*hardware_unsetup)(void); 1089 bool (*cpu_has_accelerated_tpr)(void); 1090 bool (*has_emulated_msr)(u32 index); 1091 void (*vcpu_after_set_cpuid)(struct kvm_vcpu *vcpu); 1092 1093 unsigned int vm_size; 1094 int (*vm_init)(struct kvm *kvm); 1095 void (*vm_destroy)(struct kvm *kvm); 1096 1097 /* Create, but do not attach this VCPU */ 1098 int (*vcpu_create)(struct kvm_vcpu *vcpu); 1099 void (*vcpu_free)(struct kvm_vcpu *vcpu); 1100 void (*vcpu_reset)(struct kvm_vcpu *vcpu, bool init_event); 1101 1102 void (*prepare_guest_switch)(struct kvm_vcpu *vcpu); 1103 void (*vcpu_load)(struct kvm_vcpu *vcpu, int cpu); 1104 void (*vcpu_put)(struct kvm_vcpu *vcpu); 1105 1106 void (*update_exception_bitmap)(struct kvm_vcpu *vcpu); 1107 int (*get_msr)(struct kvm_vcpu *vcpu, struct msr_data *msr); 1108 int (*set_msr)(struct kvm_vcpu *vcpu, struct msr_data *msr); 1109 u64 (*get_segment_base)(struct kvm_vcpu *vcpu, int seg); 1110 void (*get_segment)(struct kvm_vcpu *vcpu, 1111 struct kvm_segment *var, int seg); 1112 int (*get_cpl)(struct kvm_vcpu *vcpu); 1113 void (*set_segment)(struct kvm_vcpu *vcpu, 1114 struct kvm_segment *var, int seg); 1115 void (*get_cs_db_l_bits)(struct kvm_vcpu *vcpu, int *db, int *l); 1116 void (*set_cr0)(struct kvm_vcpu *vcpu, unsigned long cr0); 1117 int (*set_cr4)(struct kvm_vcpu *vcpu, unsigned long cr4); 1118 int (*set_efer)(struct kvm_vcpu *vcpu, u64 efer); 1119 void (*get_idt)(struct kvm_vcpu *vcpu, struct desc_ptr *dt); 1120 void (*set_idt)(struct kvm_vcpu *vcpu, struct desc_ptr *dt); 1121 void (*get_gdt)(struct kvm_vcpu *vcpu, struct desc_ptr *dt); 1122 void (*set_gdt)(struct kvm_vcpu *vcpu, struct desc_ptr *dt); 1123 void (*sync_dirty_debug_regs)(struct kvm_vcpu *vcpu); 1124 void (*set_dr7)(struct kvm_vcpu *vcpu, unsigned long value); 1125 void (*cache_reg)(struct kvm_vcpu *vcpu, enum kvm_reg reg); 1126 unsigned long (*get_rflags)(struct kvm_vcpu *vcpu); 1127 void (*set_rflags)(struct kvm_vcpu *vcpu, unsigned long rflags); 1128 1129 void (*tlb_flush_all)(struct kvm_vcpu *vcpu); 1130 void (*tlb_flush_current)(struct kvm_vcpu *vcpu); 1131 int (*tlb_remote_flush)(struct kvm *kvm); 1132 int (*tlb_remote_flush_with_range)(struct kvm *kvm, 1133 struct kvm_tlb_range *range); 1134 1135 /* 1136 * Flush any TLB entries associated with the given GVA. 1137 * Does not need to flush GPA->HPA mappings. 1138 * Can potentially get non-canonical addresses through INVLPGs, which 1139 * the implementation may choose to ignore if appropriate. 1140 */ 1141 void (*tlb_flush_gva)(struct kvm_vcpu *vcpu, gva_t addr); 1142 1143 /* 1144 * Flush any TLB entries created by the guest. Like tlb_flush_gva(), 1145 * does not need to flush GPA->HPA mappings. 1146 */ 1147 void (*tlb_flush_guest)(struct kvm_vcpu *vcpu); 1148 1149 enum exit_fastpath_completion (*run)(struct kvm_vcpu *vcpu); 1150 int (*handle_exit)(struct kvm_vcpu *vcpu, 1151 enum exit_fastpath_completion exit_fastpath); 1152 int (*skip_emulated_instruction)(struct kvm_vcpu *vcpu); 1153 void (*update_emulated_instruction)(struct kvm_vcpu *vcpu); 1154 void (*set_interrupt_shadow)(struct kvm_vcpu *vcpu, int mask); 1155 u32 (*get_interrupt_shadow)(struct kvm_vcpu *vcpu); 1156 void (*patch_hypercall)(struct kvm_vcpu *vcpu, 1157 unsigned char *hypercall_addr); 1158 void (*set_irq)(struct kvm_vcpu *vcpu); 1159 void (*set_nmi)(struct kvm_vcpu *vcpu); 1160 void (*queue_exception)(struct kvm_vcpu *vcpu); 1161 void (*cancel_injection)(struct kvm_vcpu *vcpu); 1162 int (*interrupt_allowed)(struct kvm_vcpu *vcpu, bool for_injection); 1163 int (*nmi_allowed)(struct kvm_vcpu *vcpu, bool for_injection); 1164 bool (*get_nmi_mask)(struct kvm_vcpu *vcpu); 1165 void (*set_nmi_mask)(struct kvm_vcpu *vcpu, bool masked); 1166 void (*enable_nmi_window)(struct kvm_vcpu *vcpu); 1167 void (*enable_irq_window)(struct kvm_vcpu *vcpu); 1168 void (*update_cr8_intercept)(struct kvm_vcpu *vcpu, int tpr, int irr); 1169 bool (*check_apicv_inhibit_reasons)(ulong bit); 1170 void (*pre_update_apicv_exec_ctrl)(struct kvm *kvm, bool activate); 1171 void (*refresh_apicv_exec_ctrl)(struct kvm_vcpu *vcpu); 1172 void (*hwapic_irr_update)(struct kvm_vcpu *vcpu, int max_irr); 1173 void (*hwapic_isr_update)(struct kvm_vcpu *vcpu, int isr); 1174 bool (*guest_apic_has_interrupt)(struct kvm_vcpu *vcpu); 1175 void (*load_eoi_exitmap)(struct kvm_vcpu *vcpu, u64 *eoi_exit_bitmap); 1176 void (*set_virtual_apic_mode)(struct kvm_vcpu *vcpu); 1177 void (*set_apic_access_page_addr)(struct kvm_vcpu *vcpu); 1178 int (*deliver_posted_interrupt)(struct kvm_vcpu *vcpu, int vector); 1179 int (*sync_pir_to_irr)(struct kvm_vcpu *vcpu); 1180 int (*set_tss_addr)(struct kvm *kvm, unsigned int addr); 1181 int (*set_identity_map_addr)(struct kvm *kvm, u64 ident_addr); 1182 u64 (*get_mt_mask)(struct kvm_vcpu *vcpu, gfn_t gfn, bool is_mmio); 1183 1184 void (*load_mmu_pgd)(struct kvm_vcpu *vcpu, unsigned long pgd, 1185 int pgd_level); 1186 1187 bool (*has_wbinvd_exit)(void); 1188 1189 /* Returns actual tsc_offset set in active VMCS */ 1190 u64 (*write_l1_tsc_offset)(struct kvm_vcpu *vcpu, u64 offset); 1191 1192 /* 1193 * Retrieve somewhat arbitrary exit information. Intended to be used 1194 * only from within tracepoints to avoid VMREADs when tracing is off. 1195 */ 1196 void (*get_exit_info)(struct kvm_vcpu *vcpu, u64 *info1, u64 *info2, 1197 u32 *exit_int_info, u32 *exit_int_info_err_code); 1198 1199 int (*check_intercept)(struct kvm_vcpu *vcpu, 1200 struct x86_instruction_info *info, 1201 enum x86_intercept_stage stage, 1202 struct x86_exception *exception); 1203 void (*handle_exit_irqoff)(struct kvm_vcpu *vcpu); 1204 1205 void (*request_immediate_exit)(struct kvm_vcpu *vcpu); 1206 1207 void (*sched_in)(struct kvm_vcpu *kvm, int cpu); 1208 1209 /* 1210 * Arch-specific dirty logging hooks. These hooks are only supposed to 1211 * be valid if the specific arch has hardware-accelerated dirty logging 1212 * mechanism. Currently only for PML on VMX. 1213 * 1214 * - slot_enable_log_dirty: 1215 * called when enabling log dirty mode for the slot. 1216 * - slot_disable_log_dirty: 1217 * called when disabling log dirty mode for the slot. 1218 * also called when slot is created with log dirty disabled. 1219 * - flush_log_dirty: 1220 * called before reporting dirty_bitmap to userspace. 1221 * - enable_log_dirty_pt_masked: 1222 * called when reenabling log dirty for the GFNs in the mask after 1223 * corresponding bits are cleared in slot->dirty_bitmap. 1224 */ 1225 void (*slot_enable_log_dirty)(struct kvm *kvm, 1226 struct kvm_memory_slot *slot); 1227 void (*slot_disable_log_dirty)(struct kvm *kvm, 1228 struct kvm_memory_slot *slot); 1229 void (*flush_log_dirty)(struct kvm *kvm); 1230 void (*enable_log_dirty_pt_masked)(struct kvm *kvm, 1231 struct kvm_memory_slot *slot, 1232 gfn_t offset, unsigned long mask); 1233 1234 /* pmu operations of sub-arch */ 1235 const struct kvm_pmu_ops *pmu_ops; 1236 const struct kvm_x86_nested_ops *nested_ops; 1237 1238 /* 1239 * Architecture specific hooks for vCPU blocking due to 1240 * HLT instruction. 1241 * Returns for .pre_block(): 1242 * - 0 means continue to block the vCPU. 1243 * - 1 means we cannot block the vCPU since some event 1244 * happens during this period, such as, 'ON' bit in 1245 * posted-interrupts descriptor is set. 1246 */ 1247 int (*pre_block)(struct kvm_vcpu *vcpu); 1248 void (*post_block)(struct kvm_vcpu *vcpu); 1249 1250 void (*vcpu_blocking)(struct kvm_vcpu *vcpu); 1251 void (*vcpu_unblocking)(struct kvm_vcpu *vcpu); 1252 1253 int (*update_pi_irte)(struct kvm *kvm, unsigned int host_irq, 1254 uint32_t guest_irq, bool set); 1255 void (*apicv_post_state_restore)(struct kvm_vcpu *vcpu); 1256 bool (*dy_apicv_has_pending_interrupt)(struct kvm_vcpu *vcpu); 1257 1258 int (*set_hv_timer)(struct kvm_vcpu *vcpu, u64 guest_deadline_tsc, 1259 bool *expired); 1260 void (*cancel_hv_timer)(struct kvm_vcpu *vcpu); 1261 1262 void (*setup_mce)(struct kvm_vcpu *vcpu); 1263 1264 int (*smi_allowed)(struct kvm_vcpu *vcpu, bool for_injection); 1265 int (*pre_enter_smm)(struct kvm_vcpu *vcpu, char *smstate); 1266 int (*pre_leave_smm)(struct kvm_vcpu *vcpu, const char *smstate); 1267 void (*enable_smi_window)(struct kvm_vcpu *vcpu); 1268 1269 int (*mem_enc_op)(struct kvm *kvm, void __user *argp); 1270 int (*mem_enc_reg_region)(struct kvm *kvm, struct kvm_enc_region *argp); 1271 int (*mem_enc_unreg_region)(struct kvm *kvm, struct kvm_enc_region *argp); 1272 1273 int (*get_msr_feature)(struct kvm_msr_entry *entry); 1274 1275 bool (*can_emulate_instruction)(struct kvm_vcpu *vcpu, void *insn, int insn_len); 1276 1277 bool (*apic_init_signal_blocked)(struct kvm_vcpu *vcpu); 1278 int (*enable_direct_tlbflush)(struct kvm_vcpu *vcpu); 1279 1280 void (*migrate_timers)(struct kvm_vcpu *vcpu); 1281 void (*msr_filter_changed)(struct kvm_vcpu *vcpu); 1282 }; 1283 1284 struct kvm_x86_nested_ops { 1285 int (*check_events)(struct kvm_vcpu *vcpu); 1286 bool (*hv_timer_pending)(struct kvm_vcpu *vcpu); 1287 int (*get_state)(struct kvm_vcpu *vcpu, 1288 struct kvm_nested_state __user *user_kvm_nested_state, 1289 unsigned user_data_size); 1290 int (*set_state)(struct kvm_vcpu *vcpu, 1291 struct kvm_nested_state __user *user_kvm_nested_state, 1292 struct kvm_nested_state *kvm_state); 1293 bool (*get_nested_state_pages)(struct kvm_vcpu *vcpu); 1294 int (*write_log_dirty)(struct kvm_vcpu *vcpu, gpa_t l2_gpa); 1295 1296 int (*enable_evmcs)(struct kvm_vcpu *vcpu, 1297 uint16_t *vmcs_version); 1298 uint16_t (*get_evmcs_version)(struct kvm_vcpu *vcpu); 1299 }; 1300 1301 struct kvm_x86_init_ops { 1302 int (*cpu_has_kvm_support)(void); 1303 int (*disabled_by_bios)(void); 1304 int (*check_processor_compatibility)(void); 1305 int (*hardware_setup)(void); 1306 1307 struct kvm_x86_ops *runtime_ops; 1308 }; 1309 1310 struct kvm_arch_async_pf { 1311 u32 token; 1312 gfn_t gfn; 1313 unsigned long cr3; 1314 bool direct_map; 1315 }; 1316 1317 extern u64 __read_mostly host_efer; 1318 extern bool __read_mostly allow_smaller_maxphyaddr; 1319 extern struct kvm_x86_ops kvm_x86_ops; 1320 1321 #define __KVM_HAVE_ARCH_VM_ALLOC 1322 static inline struct kvm *kvm_arch_alloc_vm(void) 1323 { 1324 return __vmalloc(kvm_x86_ops.vm_size, GFP_KERNEL_ACCOUNT | __GFP_ZERO); 1325 } 1326 void kvm_arch_free_vm(struct kvm *kvm); 1327 1328 #define __KVM_HAVE_ARCH_FLUSH_REMOTE_TLB 1329 static inline int kvm_arch_flush_remote_tlb(struct kvm *kvm) 1330 { 1331 if (kvm_x86_ops.tlb_remote_flush && 1332 !kvm_x86_ops.tlb_remote_flush(kvm)) 1333 return 0; 1334 else 1335 return -ENOTSUPP; 1336 } 1337 1338 int kvm_mmu_module_init(void); 1339 void kvm_mmu_module_exit(void); 1340 1341 void kvm_mmu_destroy(struct kvm_vcpu *vcpu); 1342 int kvm_mmu_create(struct kvm_vcpu *vcpu); 1343 void kvm_mmu_init_vm(struct kvm *kvm); 1344 void kvm_mmu_uninit_vm(struct kvm *kvm); 1345 void kvm_mmu_set_mask_ptes(u64 user_mask, u64 accessed_mask, 1346 u64 dirty_mask, u64 nx_mask, u64 x_mask, u64 p_mask, 1347 u64 acc_track_mask, u64 me_mask); 1348 1349 void kvm_mmu_reset_context(struct kvm_vcpu *vcpu); 1350 void kvm_mmu_slot_remove_write_access(struct kvm *kvm, 1351 struct kvm_memory_slot *memslot, 1352 int start_level); 1353 void kvm_mmu_zap_collapsible_sptes(struct kvm *kvm, 1354 const struct kvm_memory_slot *memslot); 1355 void kvm_mmu_slot_leaf_clear_dirty(struct kvm *kvm, 1356 struct kvm_memory_slot *memslot); 1357 void kvm_mmu_slot_largepage_remove_write_access(struct kvm *kvm, 1358 struct kvm_memory_slot *memslot); 1359 void kvm_mmu_slot_set_dirty(struct kvm *kvm, 1360 struct kvm_memory_slot *memslot); 1361 void kvm_mmu_clear_dirty_pt_masked(struct kvm *kvm, 1362 struct kvm_memory_slot *slot, 1363 gfn_t gfn_offset, unsigned long mask); 1364 void kvm_mmu_zap_all(struct kvm *kvm); 1365 void kvm_mmu_invalidate_mmio_sptes(struct kvm *kvm, u64 gen); 1366 unsigned long kvm_mmu_calculate_default_mmu_pages(struct kvm *kvm); 1367 void kvm_mmu_change_mmu_pages(struct kvm *kvm, unsigned long kvm_nr_mmu_pages); 1368 1369 int load_pdptrs(struct kvm_vcpu *vcpu, struct kvm_mmu *mmu, unsigned long cr3); 1370 bool pdptrs_changed(struct kvm_vcpu *vcpu); 1371 1372 int emulator_write_phys(struct kvm_vcpu *vcpu, gpa_t gpa, 1373 const void *val, int bytes); 1374 1375 struct kvm_irq_mask_notifier { 1376 void (*func)(struct kvm_irq_mask_notifier *kimn, bool masked); 1377 int irq; 1378 struct hlist_node link; 1379 }; 1380 1381 void kvm_register_irq_mask_notifier(struct kvm *kvm, int irq, 1382 struct kvm_irq_mask_notifier *kimn); 1383 void kvm_unregister_irq_mask_notifier(struct kvm *kvm, int irq, 1384 struct kvm_irq_mask_notifier *kimn); 1385 void kvm_fire_mask_notifiers(struct kvm *kvm, unsigned irqchip, unsigned pin, 1386 bool mask); 1387 1388 extern bool tdp_enabled; 1389 1390 u64 vcpu_tsc_khz(struct kvm_vcpu *vcpu); 1391 1392 /* control of guest tsc rate supported? */ 1393 extern bool kvm_has_tsc_control; 1394 /* maximum supported tsc_khz for guests */ 1395 extern u32 kvm_max_guest_tsc_khz; 1396 /* number of bits of the fractional part of the TSC scaling ratio */ 1397 extern u8 kvm_tsc_scaling_ratio_frac_bits; 1398 /* maximum allowed value of TSC scaling ratio */ 1399 extern u64 kvm_max_tsc_scaling_ratio; 1400 /* 1ull << kvm_tsc_scaling_ratio_frac_bits */ 1401 extern u64 kvm_default_tsc_scaling_ratio; 1402 1403 extern u64 kvm_mce_cap_supported; 1404 1405 /* 1406 * EMULTYPE_NO_DECODE - Set when re-emulating an instruction (after completing 1407 * userspace I/O) to indicate that the emulation context 1408 * should be resued as is, i.e. skip initialization of 1409 * emulation context, instruction fetch and decode. 1410 * 1411 * EMULTYPE_TRAP_UD - Set when emulating an intercepted #UD from hardware. 1412 * Indicates that only select instructions (tagged with 1413 * EmulateOnUD) should be emulated (to minimize the emulator 1414 * attack surface). See also EMULTYPE_TRAP_UD_FORCED. 1415 * 1416 * EMULTYPE_SKIP - Set when emulating solely to skip an instruction, i.e. to 1417 * decode the instruction length. For use *only* by 1418 * kvm_x86_ops.skip_emulated_instruction() implementations. 1419 * 1420 * EMULTYPE_ALLOW_RETRY_PF - Set when the emulator should resume the guest to 1421 * retry native execution under certain conditions, 1422 * Can only be set in conjunction with EMULTYPE_PF. 1423 * 1424 * EMULTYPE_TRAP_UD_FORCED - Set when emulating an intercepted #UD that was 1425 * triggered by KVM's magic "force emulation" prefix, 1426 * which is opt in via module param (off by default). 1427 * Bypasses EmulateOnUD restriction despite emulating 1428 * due to an intercepted #UD (see EMULTYPE_TRAP_UD). 1429 * Used to test the full emulator from userspace. 1430 * 1431 * EMULTYPE_VMWARE_GP - Set when emulating an intercepted #GP for VMware 1432 * backdoor emulation, which is opt in via module param. 1433 * VMware backoor emulation handles select instructions 1434 * and reinjects the #GP for all other cases. 1435 * 1436 * EMULTYPE_PF - Set when emulating MMIO by way of an intercepted #PF, in which 1437 * case the CR2/GPA value pass on the stack is valid. 1438 */ 1439 #define EMULTYPE_NO_DECODE (1 << 0) 1440 #define EMULTYPE_TRAP_UD (1 << 1) 1441 #define EMULTYPE_SKIP (1 << 2) 1442 #define EMULTYPE_ALLOW_RETRY_PF (1 << 3) 1443 #define EMULTYPE_TRAP_UD_FORCED (1 << 4) 1444 #define EMULTYPE_VMWARE_GP (1 << 5) 1445 #define EMULTYPE_PF (1 << 6) 1446 1447 int kvm_emulate_instruction(struct kvm_vcpu *vcpu, int emulation_type); 1448 int kvm_emulate_instruction_from_buffer(struct kvm_vcpu *vcpu, 1449 void *insn, int insn_len); 1450 1451 void kvm_enable_efer_bits(u64); 1452 bool kvm_valid_efer(struct kvm_vcpu *vcpu, u64 efer); 1453 int __kvm_get_msr(struct kvm_vcpu *vcpu, u32 index, u64 *data, bool host_initiated); 1454 int kvm_get_msr(struct kvm_vcpu *vcpu, u32 index, u64 *data); 1455 int kvm_set_msr(struct kvm_vcpu *vcpu, u32 index, u64 data); 1456 int kvm_emulate_rdmsr(struct kvm_vcpu *vcpu); 1457 int kvm_emulate_wrmsr(struct kvm_vcpu *vcpu); 1458 1459 int kvm_fast_pio(struct kvm_vcpu *vcpu, int size, unsigned short port, int in); 1460 int kvm_emulate_cpuid(struct kvm_vcpu *vcpu); 1461 int kvm_emulate_halt(struct kvm_vcpu *vcpu); 1462 int kvm_vcpu_halt(struct kvm_vcpu *vcpu); 1463 int kvm_emulate_wbinvd(struct kvm_vcpu *vcpu); 1464 1465 void kvm_get_segment(struct kvm_vcpu *vcpu, struct kvm_segment *var, int seg); 1466 int kvm_load_segment_descriptor(struct kvm_vcpu *vcpu, u16 selector, int seg); 1467 void kvm_vcpu_deliver_sipi_vector(struct kvm_vcpu *vcpu, u8 vector); 1468 1469 int kvm_task_switch(struct kvm_vcpu *vcpu, u16 tss_selector, int idt_index, 1470 int reason, bool has_error_code, u32 error_code); 1471 1472 int kvm_set_cr0(struct kvm_vcpu *vcpu, unsigned long cr0); 1473 int kvm_set_cr3(struct kvm_vcpu *vcpu, unsigned long cr3); 1474 int kvm_set_cr4(struct kvm_vcpu *vcpu, unsigned long cr4); 1475 int kvm_set_cr8(struct kvm_vcpu *vcpu, unsigned long cr8); 1476 int kvm_set_dr(struct kvm_vcpu *vcpu, int dr, unsigned long val); 1477 int kvm_get_dr(struct kvm_vcpu *vcpu, int dr, unsigned long *val); 1478 unsigned long kvm_get_cr8(struct kvm_vcpu *vcpu); 1479 void kvm_lmsw(struct kvm_vcpu *vcpu, unsigned long msw); 1480 void kvm_get_cs_db_l_bits(struct kvm_vcpu *vcpu, int *db, int *l); 1481 int kvm_set_xcr(struct kvm_vcpu *vcpu, u32 index, u64 xcr); 1482 1483 int kvm_get_msr_common(struct kvm_vcpu *vcpu, struct msr_data *msr); 1484 int kvm_set_msr_common(struct kvm_vcpu *vcpu, struct msr_data *msr); 1485 1486 unsigned long kvm_get_rflags(struct kvm_vcpu *vcpu); 1487 void kvm_set_rflags(struct kvm_vcpu *vcpu, unsigned long rflags); 1488 bool kvm_rdpmc(struct kvm_vcpu *vcpu); 1489 1490 void kvm_queue_exception(struct kvm_vcpu *vcpu, unsigned nr); 1491 void kvm_queue_exception_e(struct kvm_vcpu *vcpu, unsigned nr, u32 error_code); 1492 void kvm_queue_exception_p(struct kvm_vcpu *vcpu, unsigned nr, unsigned long payload); 1493 void kvm_requeue_exception(struct kvm_vcpu *vcpu, unsigned nr); 1494 void kvm_requeue_exception_e(struct kvm_vcpu *vcpu, unsigned nr, u32 error_code); 1495 void kvm_inject_page_fault(struct kvm_vcpu *vcpu, struct x86_exception *fault); 1496 bool kvm_inject_emulated_page_fault(struct kvm_vcpu *vcpu, 1497 struct x86_exception *fault); 1498 int kvm_read_guest_page_mmu(struct kvm_vcpu *vcpu, struct kvm_mmu *mmu, 1499 gfn_t gfn, void *data, int offset, int len, 1500 u32 access); 1501 bool kvm_require_cpl(struct kvm_vcpu *vcpu, int required_cpl); 1502 bool kvm_require_dr(struct kvm_vcpu *vcpu, int dr); 1503 1504 static inline int __kvm_irq_line_state(unsigned long *irq_state, 1505 int irq_source_id, int level) 1506 { 1507 /* Logical OR for level trig interrupt */ 1508 if (level) 1509 __set_bit(irq_source_id, irq_state); 1510 else 1511 __clear_bit(irq_source_id, irq_state); 1512 1513 return !!(*irq_state); 1514 } 1515 1516 #define KVM_MMU_ROOT_CURRENT BIT(0) 1517 #define KVM_MMU_ROOT_PREVIOUS(i) BIT(1+i) 1518 #define KVM_MMU_ROOTS_ALL (~0UL) 1519 1520 int kvm_pic_set_irq(struct kvm_pic *pic, int irq, int irq_source_id, int level); 1521 void kvm_pic_clear_all(struct kvm_pic *pic, int irq_source_id); 1522 1523 void kvm_inject_nmi(struct kvm_vcpu *vcpu); 1524 1525 void kvm_update_dr7(struct kvm_vcpu *vcpu); 1526 1527 int kvm_mmu_unprotect_page(struct kvm *kvm, gfn_t gfn); 1528 int kvm_mmu_unprotect_page_virt(struct kvm_vcpu *vcpu, gva_t gva); 1529 void __kvm_mmu_free_some_pages(struct kvm_vcpu *vcpu); 1530 int kvm_mmu_load(struct kvm_vcpu *vcpu); 1531 void kvm_mmu_unload(struct kvm_vcpu *vcpu); 1532 void kvm_mmu_sync_roots(struct kvm_vcpu *vcpu); 1533 void kvm_mmu_free_roots(struct kvm_vcpu *vcpu, struct kvm_mmu *mmu, 1534 ulong roots_to_free); 1535 gpa_t translate_nested_gpa(struct kvm_vcpu *vcpu, gpa_t gpa, u32 access, 1536 struct x86_exception *exception); 1537 gpa_t kvm_mmu_gva_to_gpa_read(struct kvm_vcpu *vcpu, gva_t gva, 1538 struct x86_exception *exception); 1539 gpa_t kvm_mmu_gva_to_gpa_fetch(struct kvm_vcpu *vcpu, gva_t gva, 1540 struct x86_exception *exception); 1541 gpa_t kvm_mmu_gva_to_gpa_write(struct kvm_vcpu *vcpu, gva_t gva, 1542 struct x86_exception *exception); 1543 gpa_t kvm_mmu_gva_to_gpa_system(struct kvm_vcpu *vcpu, gva_t gva, 1544 struct x86_exception *exception); 1545 1546 bool kvm_apicv_activated(struct kvm *kvm); 1547 void kvm_apicv_init(struct kvm *kvm, bool enable); 1548 void kvm_vcpu_update_apicv(struct kvm_vcpu *vcpu); 1549 void kvm_request_apicv_update(struct kvm *kvm, bool activate, 1550 unsigned long bit); 1551 1552 int kvm_emulate_hypercall(struct kvm_vcpu *vcpu); 1553 1554 int kvm_mmu_page_fault(struct kvm_vcpu *vcpu, gpa_t cr2_or_gpa, u64 error_code, 1555 void *insn, int insn_len); 1556 void kvm_mmu_invlpg(struct kvm_vcpu *vcpu, gva_t gva); 1557 void kvm_mmu_invalidate_gva(struct kvm_vcpu *vcpu, struct kvm_mmu *mmu, 1558 gva_t gva, hpa_t root_hpa); 1559 void kvm_mmu_invpcid_gva(struct kvm_vcpu *vcpu, gva_t gva, unsigned long pcid); 1560 void kvm_mmu_new_pgd(struct kvm_vcpu *vcpu, gpa_t new_pgd, bool skip_tlb_flush, 1561 bool skip_mmu_sync); 1562 1563 void kvm_configure_mmu(bool enable_tdp, int tdp_max_root_level, 1564 int tdp_huge_page_level); 1565 1566 static inline u16 kvm_read_ldt(void) 1567 { 1568 u16 ldt; 1569 asm("sldt %0" : "=g"(ldt)); 1570 return ldt; 1571 } 1572 1573 static inline void kvm_load_ldt(u16 sel) 1574 { 1575 asm("lldt %0" : : "rm"(sel)); 1576 } 1577 1578 #ifdef CONFIG_X86_64 1579 static inline unsigned long read_msr(unsigned long msr) 1580 { 1581 u64 value; 1582 1583 rdmsrl(msr, value); 1584 return value; 1585 } 1586 #endif 1587 1588 static inline u32 get_rdx_init_val(void) 1589 { 1590 return 0x600; /* P6 family */ 1591 } 1592 1593 static inline void kvm_inject_gp(struct kvm_vcpu *vcpu, u32 error_code) 1594 { 1595 kvm_queue_exception_e(vcpu, GP_VECTOR, error_code); 1596 } 1597 1598 #define TSS_IOPB_BASE_OFFSET 0x66 1599 #define TSS_BASE_SIZE 0x68 1600 #define TSS_IOPB_SIZE (65536 / 8) 1601 #define TSS_REDIRECTION_SIZE (256 / 8) 1602 #define RMODE_TSS_SIZE \ 1603 (TSS_BASE_SIZE + TSS_REDIRECTION_SIZE + TSS_IOPB_SIZE + 1) 1604 1605 enum { 1606 TASK_SWITCH_CALL = 0, 1607 TASK_SWITCH_IRET = 1, 1608 TASK_SWITCH_JMP = 2, 1609 TASK_SWITCH_GATE = 3, 1610 }; 1611 1612 #define HF_GIF_MASK (1 << 0) 1613 #define HF_NMI_MASK (1 << 3) 1614 #define HF_IRET_MASK (1 << 4) 1615 #define HF_GUEST_MASK (1 << 5) /* VCPU is in guest-mode */ 1616 #define HF_SMM_MASK (1 << 6) 1617 #define HF_SMM_INSIDE_NMI_MASK (1 << 7) 1618 1619 #define __KVM_VCPU_MULTIPLE_ADDRESS_SPACE 1620 #define KVM_ADDRESS_SPACE_NUM 2 1621 1622 #define kvm_arch_vcpu_memslots_id(vcpu) ((vcpu)->arch.hflags & HF_SMM_MASK ? 1 : 0) 1623 #define kvm_memslots_for_spte_role(kvm, role) __kvm_memslots(kvm, (role).smm) 1624 1625 asmlinkage void kvm_spurious_fault(void); 1626 1627 /* 1628 * Hardware virtualization extension instructions may fault if a 1629 * reboot turns off virtualization while processes are running. 1630 * Usually after catching the fault we just panic; during reboot 1631 * instead the instruction is ignored. 1632 */ 1633 #define __kvm_handle_fault_on_reboot(insn) \ 1634 "666: \n\t" \ 1635 insn "\n\t" \ 1636 "jmp 668f \n\t" \ 1637 "667: \n\t" \ 1638 "1: \n\t" \ 1639 ".pushsection .discard.instr_begin \n\t" \ 1640 ".long 1b - . \n\t" \ 1641 ".popsection \n\t" \ 1642 "call kvm_spurious_fault \n\t" \ 1643 "1: \n\t" \ 1644 ".pushsection .discard.instr_end \n\t" \ 1645 ".long 1b - . \n\t" \ 1646 ".popsection \n\t" \ 1647 "668: \n\t" \ 1648 _ASM_EXTABLE(666b, 667b) 1649 1650 #define KVM_ARCH_WANT_MMU_NOTIFIER 1651 int kvm_unmap_hva_range(struct kvm *kvm, unsigned long start, unsigned long end, 1652 unsigned flags); 1653 int kvm_age_hva(struct kvm *kvm, unsigned long start, unsigned long end); 1654 int kvm_test_age_hva(struct kvm *kvm, unsigned long hva); 1655 int kvm_set_spte_hva(struct kvm *kvm, unsigned long hva, pte_t pte); 1656 int kvm_cpu_has_injectable_intr(struct kvm_vcpu *v); 1657 int kvm_cpu_has_interrupt(struct kvm_vcpu *vcpu); 1658 int kvm_arch_interrupt_allowed(struct kvm_vcpu *vcpu); 1659 int kvm_cpu_get_interrupt(struct kvm_vcpu *v); 1660 void kvm_vcpu_reset(struct kvm_vcpu *vcpu, bool init_event); 1661 void kvm_vcpu_reload_apic_access_page(struct kvm_vcpu *vcpu); 1662 1663 int kvm_pv_send_ipi(struct kvm *kvm, unsigned long ipi_bitmap_low, 1664 unsigned long ipi_bitmap_high, u32 min, 1665 unsigned long icr, int op_64_bit); 1666 1667 void kvm_define_user_return_msr(unsigned index, u32 msr); 1668 int kvm_set_user_return_msr(unsigned index, u64 val, u64 mask); 1669 1670 u64 kvm_scale_tsc(struct kvm_vcpu *vcpu, u64 tsc); 1671 u64 kvm_read_l1_tsc(struct kvm_vcpu *vcpu, u64 host_tsc); 1672 1673 unsigned long kvm_get_linear_rip(struct kvm_vcpu *vcpu); 1674 bool kvm_is_linear_rip(struct kvm_vcpu *vcpu, unsigned long linear_rip); 1675 1676 void kvm_make_mclock_inprogress_request(struct kvm *kvm); 1677 void kvm_make_scan_ioapic_request(struct kvm *kvm); 1678 void kvm_make_scan_ioapic_request_mask(struct kvm *kvm, 1679 unsigned long *vcpu_bitmap); 1680 1681 bool kvm_arch_async_page_not_present(struct kvm_vcpu *vcpu, 1682 struct kvm_async_pf *work); 1683 void kvm_arch_async_page_present(struct kvm_vcpu *vcpu, 1684 struct kvm_async_pf *work); 1685 void kvm_arch_async_page_ready(struct kvm_vcpu *vcpu, 1686 struct kvm_async_pf *work); 1687 void kvm_arch_async_page_present_queued(struct kvm_vcpu *vcpu); 1688 bool kvm_arch_can_dequeue_async_page_present(struct kvm_vcpu *vcpu); 1689 extern bool kvm_find_async_pf_gfn(struct kvm_vcpu *vcpu, gfn_t gfn); 1690 1691 int kvm_skip_emulated_instruction(struct kvm_vcpu *vcpu); 1692 int kvm_complete_insn_gp(struct kvm_vcpu *vcpu, int err); 1693 void __kvm_request_immediate_exit(struct kvm_vcpu *vcpu); 1694 1695 int kvm_is_in_guest(void); 1696 1697 int __x86_set_memory_region(struct kvm *kvm, int id, gpa_t gpa, u32 size); 1698 bool kvm_vcpu_is_reset_bsp(struct kvm_vcpu *vcpu); 1699 bool kvm_vcpu_is_bsp(struct kvm_vcpu *vcpu); 1700 1701 bool kvm_intr_is_single_vcpu(struct kvm *kvm, struct kvm_lapic_irq *irq, 1702 struct kvm_vcpu **dest_vcpu); 1703 1704 void kvm_set_msi_irq(struct kvm *kvm, struct kvm_kernel_irq_routing_entry *e, 1705 struct kvm_lapic_irq *irq); 1706 1707 static inline bool kvm_irq_is_postable(struct kvm_lapic_irq *irq) 1708 { 1709 /* We can only post Fixed and LowPrio IRQs */ 1710 return (irq->delivery_mode == APIC_DM_FIXED || 1711 irq->delivery_mode == APIC_DM_LOWEST); 1712 } 1713 1714 static inline void kvm_arch_vcpu_blocking(struct kvm_vcpu *vcpu) 1715 { 1716 if (kvm_x86_ops.vcpu_blocking) 1717 kvm_x86_ops.vcpu_blocking(vcpu); 1718 } 1719 1720 static inline void kvm_arch_vcpu_unblocking(struct kvm_vcpu *vcpu) 1721 { 1722 if (kvm_x86_ops.vcpu_unblocking) 1723 kvm_x86_ops.vcpu_unblocking(vcpu); 1724 } 1725 1726 static inline void kvm_arch_vcpu_block_finish(struct kvm_vcpu *vcpu) {} 1727 1728 static inline int kvm_cpu_get_apicid(int mps_cpu) 1729 { 1730 #ifdef CONFIG_X86_LOCAL_APIC 1731 return default_cpu_present_to_apicid(mps_cpu); 1732 #else 1733 WARN_ON_ONCE(1); 1734 return BAD_APICID; 1735 #endif 1736 } 1737 1738 #define put_smstate(type, buf, offset, val) \ 1739 *(type *)((buf) + (offset) - 0x7e00) = val 1740 1741 #define GET_SMSTATE(type, buf, offset) \ 1742 (*(type *)((buf) + (offset) - 0x7e00)) 1743 1744 #endif /* _ASM_X86_KVM_HOST_H */ 1745