1 /* 2 * Kernel-based Virtual Machine driver for Linux 3 * 4 * This header defines architecture specific interfaces, x86 version 5 * 6 * This work is licensed under the terms of the GNU GPL, version 2. See 7 * the COPYING file in the top-level directory. 8 * 9 */ 10 11 #ifndef _ASM_X86_KVM_HOST_H 12 #define _ASM_X86_KVM_HOST_H 13 14 #include <linux/types.h> 15 #include <linux/mm.h> 16 #include <linux/mmu_notifier.h> 17 #include <linux/tracepoint.h> 18 #include <linux/cpumask.h> 19 #include <linux/irq_work.h> 20 21 #include <linux/kvm.h> 22 #include <linux/kvm_para.h> 23 #include <linux/kvm_types.h> 24 #include <linux/perf_event.h> 25 #include <linux/pvclock_gtod.h> 26 #include <linux/clocksource.h> 27 28 #include <asm/pvclock-abi.h> 29 #include <asm/desc.h> 30 #include <asm/mtrr.h> 31 #include <asm/msr-index.h> 32 #include <asm/asm.h> 33 34 #define KVM_MAX_VCPUS 254 35 #define KVM_SOFT_MAX_VCPUS 160 36 #define KVM_USER_MEM_SLOTS 125 37 /* memory slots that are not exposed to userspace */ 38 #define KVM_PRIVATE_MEM_SLOTS 3 39 #define KVM_MEM_SLOTS_NUM (KVM_USER_MEM_SLOTS + KVM_PRIVATE_MEM_SLOTS) 40 41 #define KVM_MMIO_SIZE 16 42 43 #define KVM_PIO_PAGE_OFFSET 1 44 #define KVM_COALESCED_MMIO_PAGE_OFFSET 2 45 46 #define CR0_RESERVED_BITS \ 47 (~(unsigned long)(X86_CR0_PE | X86_CR0_MP | X86_CR0_EM | X86_CR0_TS \ 48 | X86_CR0_ET | X86_CR0_NE | X86_CR0_WP | X86_CR0_AM \ 49 | X86_CR0_NW | X86_CR0_CD | X86_CR0_PG)) 50 51 #define CR3_PAE_RESERVED_BITS ((X86_CR3_PWT | X86_CR3_PCD) - 1) 52 #define CR3_NONPAE_RESERVED_BITS ((PAGE_SIZE-1) & ~(X86_CR3_PWT | X86_CR3_PCD)) 53 #define CR3_PCID_ENABLED_RESERVED_BITS 0xFFFFFF0000000000ULL 54 #define CR3_L_MODE_RESERVED_BITS (CR3_NONPAE_RESERVED_BITS | \ 55 0xFFFFFF0000000000ULL) 56 #define CR4_RESERVED_BITS \ 57 (~(unsigned long)(X86_CR4_VME | X86_CR4_PVI | X86_CR4_TSD | X86_CR4_DE\ 58 | X86_CR4_PSE | X86_CR4_PAE | X86_CR4_MCE \ 59 | X86_CR4_PGE | X86_CR4_PCE | X86_CR4_OSFXSR | X86_CR4_PCIDE \ 60 | X86_CR4_OSXSAVE | X86_CR4_SMEP | X86_CR4_RDWRGSFS \ 61 | X86_CR4_OSXMMEXCPT | X86_CR4_VMXE)) 62 63 #define CR8_RESERVED_BITS (~(unsigned long)X86_CR8_TPR) 64 65 66 67 #define INVALID_PAGE (~(hpa_t)0) 68 #define VALID_PAGE(x) ((x) != INVALID_PAGE) 69 70 #define UNMAPPED_GVA (~(gpa_t)0) 71 72 /* KVM Hugepage definitions for x86 */ 73 #define KVM_NR_PAGE_SIZES 3 74 #define KVM_HPAGE_GFN_SHIFT(x) (((x) - 1) * 9) 75 #define KVM_HPAGE_SHIFT(x) (PAGE_SHIFT + KVM_HPAGE_GFN_SHIFT(x)) 76 #define KVM_HPAGE_SIZE(x) (1UL << KVM_HPAGE_SHIFT(x)) 77 #define KVM_HPAGE_MASK(x) (~(KVM_HPAGE_SIZE(x) - 1)) 78 #define KVM_PAGES_PER_HPAGE(x) (KVM_HPAGE_SIZE(x) / PAGE_SIZE) 79 80 #define SELECTOR_TI_MASK (1 << 2) 81 #define SELECTOR_RPL_MASK 0x03 82 83 #define IOPL_SHIFT 12 84 85 #define KVM_PERMILLE_MMU_PAGES 20 86 #define KVM_MIN_ALLOC_MMU_PAGES 64 87 #define KVM_MMU_HASH_SHIFT 10 88 #define KVM_NUM_MMU_PAGES (1 << KVM_MMU_HASH_SHIFT) 89 #define KVM_MIN_FREE_MMU_PAGES 5 90 #define KVM_REFILL_PAGES 25 91 #define KVM_MAX_CPUID_ENTRIES 80 92 #define KVM_NR_FIXED_MTRR_REGION 88 93 #define KVM_NR_VAR_MTRR 8 94 95 #define ASYNC_PF_PER_VCPU 64 96 97 extern raw_spinlock_t kvm_lock; 98 extern struct list_head vm_list; 99 100 struct kvm_vcpu; 101 struct kvm; 102 struct kvm_async_pf; 103 104 enum kvm_reg { 105 VCPU_REGS_RAX = 0, 106 VCPU_REGS_RCX = 1, 107 VCPU_REGS_RDX = 2, 108 VCPU_REGS_RBX = 3, 109 VCPU_REGS_RSP = 4, 110 VCPU_REGS_RBP = 5, 111 VCPU_REGS_RSI = 6, 112 VCPU_REGS_RDI = 7, 113 #ifdef CONFIG_X86_64 114 VCPU_REGS_R8 = 8, 115 VCPU_REGS_R9 = 9, 116 VCPU_REGS_R10 = 10, 117 VCPU_REGS_R11 = 11, 118 VCPU_REGS_R12 = 12, 119 VCPU_REGS_R13 = 13, 120 VCPU_REGS_R14 = 14, 121 VCPU_REGS_R15 = 15, 122 #endif 123 VCPU_REGS_RIP, 124 NR_VCPU_REGS 125 }; 126 127 enum kvm_reg_ex { 128 VCPU_EXREG_PDPTR = NR_VCPU_REGS, 129 VCPU_EXREG_CR3, 130 VCPU_EXREG_RFLAGS, 131 VCPU_EXREG_CPL, 132 VCPU_EXREG_SEGMENTS, 133 }; 134 135 enum { 136 VCPU_SREG_ES, 137 VCPU_SREG_CS, 138 VCPU_SREG_SS, 139 VCPU_SREG_DS, 140 VCPU_SREG_FS, 141 VCPU_SREG_GS, 142 VCPU_SREG_TR, 143 VCPU_SREG_LDTR, 144 }; 145 146 #include <asm/kvm_emulate.h> 147 148 #define KVM_NR_MEM_OBJS 40 149 150 #define KVM_NR_DB_REGS 4 151 152 #define DR6_BD (1 << 13) 153 #define DR6_BS (1 << 14) 154 #define DR6_FIXED_1 0xffff0ff0 155 #define DR6_VOLATILE 0x0000e00f 156 157 #define DR7_BP_EN_MASK 0x000000ff 158 #define DR7_GE (1 << 9) 159 #define DR7_GD (1 << 13) 160 #define DR7_FIXED_1 0x00000400 161 #define DR7_VOLATILE 0xffff23ff 162 163 /* apic attention bits */ 164 #define KVM_APIC_CHECK_VAPIC 0 165 /* 166 * The following bit is set with PV-EOI, unset on EOI. 167 * We detect PV-EOI changes by guest by comparing 168 * this bit with PV-EOI in guest memory. 169 * See the implementation in apic_update_pv_eoi. 170 */ 171 #define KVM_APIC_PV_EOI_PENDING 1 172 173 /* 174 * We don't want allocation failures within the mmu code, so we preallocate 175 * enough memory for a single page fault in a cache. 176 */ 177 struct kvm_mmu_memory_cache { 178 int nobjs; 179 void *objects[KVM_NR_MEM_OBJS]; 180 }; 181 182 /* 183 * kvm_mmu_page_role, below, is defined as: 184 * 185 * bits 0:3 - total guest paging levels (2-4, or zero for real mode) 186 * bits 4:7 - page table level for this shadow (1-4) 187 * bits 8:9 - page table quadrant for 2-level guests 188 * bit 16 - direct mapping of virtual to physical mapping at gfn 189 * used for real mode and two-dimensional paging 190 * bits 17:19 - common access permissions for all ptes in this shadow page 191 */ 192 union kvm_mmu_page_role { 193 unsigned word; 194 struct { 195 unsigned level:4; 196 unsigned cr4_pae:1; 197 unsigned quadrant:2; 198 unsigned pad_for_nice_hex_output:6; 199 unsigned direct:1; 200 unsigned access:3; 201 unsigned invalid:1; 202 unsigned nxe:1; 203 unsigned cr0_wp:1; 204 unsigned smep_andnot_wp:1; 205 }; 206 }; 207 208 struct kvm_mmu_page { 209 struct list_head link; 210 struct hlist_node hash_link; 211 212 /* 213 * The following two entries are used to key the shadow page in the 214 * hash table. 215 */ 216 gfn_t gfn; 217 union kvm_mmu_page_role role; 218 219 u64 *spt; 220 /* hold the gfn of each spte inside spt */ 221 gfn_t *gfns; 222 bool unsync; 223 int root_count; /* Currently serving as active root */ 224 unsigned int unsync_children; 225 unsigned long parent_ptes; /* Reverse mapping for parent_pte */ 226 DECLARE_BITMAP(unsync_child_bitmap, 512); 227 228 #ifdef CONFIG_X86_32 229 int clear_spte_count; 230 #endif 231 232 int write_flooding_count; 233 }; 234 235 struct kvm_pio_request { 236 unsigned long count; 237 int in; 238 int port; 239 int size; 240 }; 241 242 /* 243 * x86 supports 3 paging modes (4-level 64-bit, 3-level 64-bit, and 2-level 244 * 32-bit). The kvm_mmu structure abstracts the details of the current mmu 245 * mode. 246 */ 247 struct kvm_mmu { 248 void (*new_cr3)(struct kvm_vcpu *vcpu); 249 void (*set_cr3)(struct kvm_vcpu *vcpu, unsigned long root); 250 unsigned long (*get_cr3)(struct kvm_vcpu *vcpu); 251 u64 (*get_pdptr)(struct kvm_vcpu *vcpu, int index); 252 int (*page_fault)(struct kvm_vcpu *vcpu, gva_t gva, u32 err, 253 bool prefault); 254 void (*inject_page_fault)(struct kvm_vcpu *vcpu, 255 struct x86_exception *fault); 256 void (*free)(struct kvm_vcpu *vcpu); 257 gpa_t (*gva_to_gpa)(struct kvm_vcpu *vcpu, gva_t gva, u32 access, 258 struct x86_exception *exception); 259 gpa_t (*translate_gpa)(struct kvm_vcpu *vcpu, gpa_t gpa, u32 access); 260 int (*sync_page)(struct kvm_vcpu *vcpu, 261 struct kvm_mmu_page *sp); 262 void (*invlpg)(struct kvm_vcpu *vcpu, gva_t gva); 263 void (*update_pte)(struct kvm_vcpu *vcpu, struct kvm_mmu_page *sp, 264 u64 *spte, const void *pte); 265 hpa_t root_hpa; 266 int root_level; 267 int shadow_root_level; 268 union kvm_mmu_page_role base_role; 269 bool direct_map; 270 271 /* 272 * Bitmap; bit set = permission fault 273 * Byte index: page fault error code [4:1] 274 * Bit index: pte permissions in ACC_* format 275 */ 276 u8 permissions[16]; 277 278 u64 *pae_root; 279 u64 *lm_root; 280 u64 rsvd_bits_mask[2][4]; 281 282 /* 283 * Bitmap: bit set = last pte in walk 284 * index[0:1]: level (zero-based) 285 * index[2]: pte.ps 286 */ 287 u8 last_pte_bitmap; 288 289 bool nx; 290 291 u64 pdptrs[4]; /* pae */ 292 }; 293 294 enum pmc_type { 295 KVM_PMC_GP = 0, 296 KVM_PMC_FIXED, 297 }; 298 299 struct kvm_pmc { 300 enum pmc_type type; 301 u8 idx; 302 u64 counter; 303 u64 eventsel; 304 struct perf_event *perf_event; 305 struct kvm_vcpu *vcpu; 306 }; 307 308 struct kvm_pmu { 309 unsigned nr_arch_gp_counters; 310 unsigned nr_arch_fixed_counters; 311 unsigned available_event_types; 312 u64 fixed_ctr_ctrl; 313 u64 global_ctrl; 314 u64 global_status; 315 u64 global_ovf_ctrl; 316 u64 counter_bitmask[2]; 317 u64 global_ctrl_mask; 318 u8 version; 319 struct kvm_pmc gp_counters[INTEL_PMC_MAX_GENERIC]; 320 struct kvm_pmc fixed_counters[INTEL_PMC_MAX_FIXED]; 321 struct irq_work irq_work; 322 u64 reprogram_pmi; 323 }; 324 325 struct kvm_vcpu_arch { 326 /* 327 * rip and regs accesses must go through 328 * kvm_{register,rip}_{read,write} functions. 329 */ 330 unsigned long regs[NR_VCPU_REGS]; 331 u32 regs_avail; 332 u32 regs_dirty; 333 334 unsigned long cr0; 335 unsigned long cr0_guest_owned_bits; 336 unsigned long cr2; 337 unsigned long cr3; 338 unsigned long cr4; 339 unsigned long cr4_guest_owned_bits; 340 unsigned long cr8; 341 u32 hflags; 342 u64 efer; 343 u64 apic_base; 344 struct kvm_lapic *apic; /* kernel irqchip context */ 345 unsigned long apic_attention; 346 int32_t apic_arb_prio; 347 int mp_state; 348 int sipi_vector; 349 u64 ia32_misc_enable_msr; 350 bool tpr_access_reporting; 351 352 /* 353 * Paging state of the vcpu 354 * 355 * If the vcpu runs in guest mode with two level paging this still saves 356 * the paging mode of the l1 guest. This context is always used to 357 * handle faults. 358 */ 359 struct kvm_mmu mmu; 360 361 /* 362 * Paging state of an L2 guest (used for nested npt) 363 * 364 * This context will save all necessary information to walk page tables 365 * of the an L2 guest. This context is only initialized for page table 366 * walking and not for faulting since we never handle l2 page faults on 367 * the host. 368 */ 369 struct kvm_mmu nested_mmu; 370 371 /* 372 * Pointer to the mmu context currently used for 373 * gva_to_gpa translations. 374 */ 375 struct kvm_mmu *walk_mmu; 376 377 struct kvm_mmu_memory_cache mmu_pte_list_desc_cache; 378 struct kvm_mmu_memory_cache mmu_page_cache; 379 struct kvm_mmu_memory_cache mmu_page_header_cache; 380 381 struct fpu guest_fpu; 382 u64 xcr0; 383 384 struct kvm_pio_request pio; 385 void *pio_data; 386 387 u8 event_exit_inst_len; 388 389 struct kvm_queued_exception { 390 bool pending; 391 bool has_error_code; 392 bool reinject; 393 u8 nr; 394 u32 error_code; 395 } exception; 396 397 struct kvm_queued_interrupt { 398 bool pending; 399 bool soft; 400 u8 nr; 401 } interrupt; 402 403 int halt_request; /* real mode on Intel only */ 404 405 int cpuid_nent; 406 struct kvm_cpuid_entry2 cpuid_entries[KVM_MAX_CPUID_ENTRIES]; 407 /* emulate context */ 408 409 struct x86_emulate_ctxt emulate_ctxt; 410 bool emulate_regs_need_sync_to_vcpu; 411 bool emulate_regs_need_sync_from_vcpu; 412 int (*complete_userspace_io)(struct kvm_vcpu *vcpu); 413 414 gpa_t time; 415 struct pvclock_vcpu_time_info hv_clock; 416 unsigned int hw_tsc_khz; 417 unsigned int time_offset; 418 struct page *time_page; 419 /* set guest stopped flag in pvclock flags field */ 420 bool pvclock_set_guest_stopped_request; 421 422 struct { 423 u64 msr_val; 424 u64 last_steal; 425 u64 accum_steal; 426 struct gfn_to_hva_cache stime; 427 struct kvm_steal_time steal; 428 } st; 429 430 u64 last_guest_tsc; 431 u64 last_kernel_ns; 432 u64 last_host_tsc; 433 u64 tsc_offset_adjustment; 434 u64 this_tsc_nsec; 435 u64 this_tsc_write; 436 u8 this_tsc_generation; 437 bool tsc_catchup; 438 bool tsc_always_catchup; 439 s8 virtual_tsc_shift; 440 u32 virtual_tsc_mult; 441 u32 virtual_tsc_khz; 442 s64 ia32_tsc_adjust_msr; 443 444 atomic_t nmi_queued; /* unprocessed asynchronous NMIs */ 445 unsigned nmi_pending; /* NMI queued after currently running handler */ 446 bool nmi_injected; /* Trying to inject an NMI this entry */ 447 448 struct mtrr_state_type mtrr_state; 449 u32 pat; 450 451 int switch_db_regs; 452 unsigned long db[KVM_NR_DB_REGS]; 453 unsigned long dr6; 454 unsigned long dr7; 455 unsigned long eff_db[KVM_NR_DB_REGS]; 456 unsigned long guest_debug_dr7; 457 458 u64 mcg_cap; 459 u64 mcg_status; 460 u64 mcg_ctl; 461 u64 *mce_banks; 462 463 /* Cache MMIO info */ 464 u64 mmio_gva; 465 unsigned access; 466 gfn_t mmio_gfn; 467 468 struct kvm_pmu pmu; 469 470 /* used for guest single stepping over the given code position */ 471 unsigned long singlestep_rip; 472 473 /* fields used by HYPER-V emulation */ 474 u64 hv_vapic; 475 476 cpumask_var_t wbinvd_dirty_mask; 477 478 unsigned long last_retry_eip; 479 unsigned long last_retry_addr; 480 481 struct { 482 bool halted; 483 gfn_t gfns[roundup_pow_of_two(ASYNC_PF_PER_VCPU)]; 484 struct gfn_to_hva_cache data; 485 u64 msr_val; 486 u32 id; 487 bool send_user_only; 488 } apf; 489 490 /* OSVW MSRs (AMD only) */ 491 struct { 492 u64 length; 493 u64 status; 494 } osvw; 495 496 struct { 497 u64 msr_val; 498 struct gfn_to_hva_cache data; 499 } pv_eoi; 500 501 /* 502 * Indicate whether the access faults on its page table in guest 503 * which is set when fix page fault and used to detect unhandeable 504 * instruction. 505 */ 506 bool write_fault_to_shadow_pgtable; 507 }; 508 509 struct kvm_lpage_info { 510 int write_count; 511 }; 512 513 struct kvm_arch_memory_slot { 514 unsigned long *rmap[KVM_NR_PAGE_SIZES]; 515 struct kvm_lpage_info *lpage_info[KVM_NR_PAGE_SIZES - 1]; 516 }; 517 518 struct kvm_apic_map { 519 struct rcu_head rcu; 520 u8 ldr_bits; 521 /* fields bellow are used to decode ldr values in different modes */ 522 u32 cid_shift, cid_mask, lid_mask; 523 struct kvm_lapic *phys_map[256]; 524 /* first index is cluster id second is cpu id in a cluster */ 525 struct kvm_lapic *logical_map[16][16]; 526 }; 527 528 struct kvm_arch { 529 unsigned int n_used_mmu_pages; 530 unsigned int n_requested_mmu_pages; 531 unsigned int n_max_mmu_pages; 532 unsigned int indirect_shadow_pages; 533 struct hlist_head mmu_page_hash[KVM_NUM_MMU_PAGES]; 534 /* 535 * Hash table of struct kvm_mmu_page. 536 */ 537 struct list_head active_mmu_pages; 538 struct list_head assigned_dev_head; 539 struct iommu_domain *iommu_domain; 540 int iommu_flags; 541 struct kvm_pic *vpic; 542 struct kvm_ioapic *vioapic; 543 struct kvm_pit *vpit; 544 int vapics_in_nmi_mode; 545 struct mutex apic_map_lock; 546 struct kvm_apic_map *apic_map; 547 548 unsigned int tss_addr; 549 struct page *apic_access_page; 550 551 gpa_t wall_clock; 552 553 struct page *ept_identity_pagetable; 554 bool ept_identity_pagetable_done; 555 gpa_t ept_identity_map_addr; 556 557 unsigned long irq_sources_bitmap; 558 s64 kvmclock_offset; 559 raw_spinlock_t tsc_write_lock; 560 u64 last_tsc_nsec; 561 u64 last_tsc_write; 562 u32 last_tsc_khz; 563 u64 cur_tsc_nsec; 564 u64 cur_tsc_write; 565 u64 cur_tsc_offset; 566 u8 cur_tsc_generation; 567 int nr_vcpus_matched_tsc; 568 569 spinlock_t pvclock_gtod_sync_lock; 570 bool use_master_clock; 571 u64 master_kernel_ns; 572 cycle_t master_cycle_now; 573 574 struct kvm_xen_hvm_config xen_hvm_config; 575 576 /* fields used by HYPER-V emulation */ 577 u64 hv_guest_os_id; 578 u64 hv_hypercall; 579 580 #ifdef CONFIG_KVM_MMU_AUDIT 581 int audit_point; 582 #endif 583 }; 584 585 struct kvm_vm_stat { 586 u32 mmu_shadow_zapped; 587 u32 mmu_pte_write; 588 u32 mmu_pte_updated; 589 u32 mmu_pde_zapped; 590 u32 mmu_flooded; 591 u32 mmu_recycled; 592 u32 mmu_cache_miss; 593 u32 mmu_unsync; 594 u32 remote_tlb_flush; 595 u32 lpages; 596 }; 597 598 struct kvm_vcpu_stat { 599 u32 pf_fixed; 600 u32 pf_guest; 601 u32 tlb_flush; 602 u32 invlpg; 603 604 u32 exits; 605 u32 io_exits; 606 u32 mmio_exits; 607 u32 signal_exits; 608 u32 irq_window_exits; 609 u32 nmi_window_exits; 610 u32 halt_exits; 611 u32 halt_wakeup; 612 u32 request_irq_exits; 613 u32 irq_exits; 614 u32 host_state_reload; 615 u32 efer_reload; 616 u32 fpu_reload; 617 u32 insn_emulation; 618 u32 insn_emulation_fail; 619 u32 hypercalls; 620 u32 irq_injections; 621 u32 nmi_injections; 622 }; 623 624 struct x86_instruction_info; 625 626 struct msr_data { 627 bool host_initiated; 628 u32 index; 629 u64 data; 630 }; 631 632 struct kvm_x86_ops { 633 int (*cpu_has_kvm_support)(void); /* __init */ 634 int (*disabled_by_bios)(void); /* __init */ 635 int (*hardware_enable)(void *dummy); 636 void (*hardware_disable)(void *dummy); 637 void (*check_processor_compatibility)(void *rtn); 638 int (*hardware_setup)(void); /* __init */ 639 void (*hardware_unsetup)(void); /* __exit */ 640 bool (*cpu_has_accelerated_tpr)(void); 641 void (*cpuid_update)(struct kvm_vcpu *vcpu); 642 643 /* Create, but do not attach this VCPU */ 644 struct kvm_vcpu *(*vcpu_create)(struct kvm *kvm, unsigned id); 645 void (*vcpu_free)(struct kvm_vcpu *vcpu); 646 int (*vcpu_reset)(struct kvm_vcpu *vcpu); 647 648 void (*prepare_guest_switch)(struct kvm_vcpu *vcpu); 649 void (*vcpu_load)(struct kvm_vcpu *vcpu, int cpu); 650 void (*vcpu_put)(struct kvm_vcpu *vcpu); 651 652 void (*update_db_bp_intercept)(struct kvm_vcpu *vcpu); 653 int (*get_msr)(struct kvm_vcpu *vcpu, u32 msr_index, u64 *pdata); 654 int (*set_msr)(struct kvm_vcpu *vcpu, struct msr_data *msr); 655 u64 (*get_segment_base)(struct kvm_vcpu *vcpu, int seg); 656 void (*get_segment)(struct kvm_vcpu *vcpu, 657 struct kvm_segment *var, int seg); 658 int (*get_cpl)(struct kvm_vcpu *vcpu); 659 void (*set_segment)(struct kvm_vcpu *vcpu, 660 struct kvm_segment *var, int seg); 661 void (*get_cs_db_l_bits)(struct kvm_vcpu *vcpu, int *db, int *l); 662 void (*decache_cr0_guest_bits)(struct kvm_vcpu *vcpu); 663 void (*decache_cr3)(struct kvm_vcpu *vcpu); 664 void (*decache_cr4_guest_bits)(struct kvm_vcpu *vcpu); 665 void (*set_cr0)(struct kvm_vcpu *vcpu, unsigned long cr0); 666 void (*set_cr3)(struct kvm_vcpu *vcpu, unsigned long cr3); 667 int (*set_cr4)(struct kvm_vcpu *vcpu, unsigned long cr4); 668 void (*set_efer)(struct kvm_vcpu *vcpu, u64 efer); 669 void (*get_idt)(struct kvm_vcpu *vcpu, struct desc_ptr *dt); 670 void (*set_idt)(struct kvm_vcpu *vcpu, struct desc_ptr *dt); 671 void (*get_gdt)(struct kvm_vcpu *vcpu, struct desc_ptr *dt); 672 void (*set_gdt)(struct kvm_vcpu *vcpu, struct desc_ptr *dt); 673 void (*set_dr7)(struct kvm_vcpu *vcpu, unsigned long value); 674 void (*cache_reg)(struct kvm_vcpu *vcpu, enum kvm_reg reg); 675 unsigned long (*get_rflags)(struct kvm_vcpu *vcpu); 676 void (*set_rflags)(struct kvm_vcpu *vcpu, unsigned long rflags); 677 void (*fpu_activate)(struct kvm_vcpu *vcpu); 678 void (*fpu_deactivate)(struct kvm_vcpu *vcpu); 679 680 void (*tlb_flush)(struct kvm_vcpu *vcpu); 681 682 void (*run)(struct kvm_vcpu *vcpu); 683 int (*handle_exit)(struct kvm_vcpu *vcpu); 684 void (*skip_emulated_instruction)(struct kvm_vcpu *vcpu); 685 void (*set_interrupt_shadow)(struct kvm_vcpu *vcpu, int mask); 686 u32 (*get_interrupt_shadow)(struct kvm_vcpu *vcpu, int mask); 687 void (*patch_hypercall)(struct kvm_vcpu *vcpu, 688 unsigned char *hypercall_addr); 689 void (*set_irq)(struct kvm_vcpu *vcpu); 690 void (*set_nmi)(struct kvm_vcpu *vcpu); 691 void (*queue_exception)(struct kvm_vcpu *vcpu, unsigned nr, 692 bool has_error_code, u32 error_code, 693 bool reinject); 694 void (*cancel_injection)(struct kvm_vcpu *vcpu); 695 int (*interrupt_allowed)(struct kvm_vcpu *vcpu); 696 int (*nmi_allowed)(struct kvm_vcpu *vcpu); 697 bool (*get_nmi_mask)(struct kvm_vcpu *vcpu); 698 void (*set_nmi_mask)(struct kvm_vcpu *vcpu, bool masked); 699 void (*enable_nmi_window)(struct kvm_vcpu *vcpu); 700 void (*enable_irq_window)(struct kvm_vcpu *vcpu); 701 void (*update_cr8_intercept)(struct kvm_vcpu *vcpu, int tpr, int irr); 702 int (*vm_has_apicv)(struct kvm *kvm); 703 void (*hwapic_irr_update)(struct kvm_vcpu *vcpu, int max_irr); 704 void (*hwapic_isr_update)(struct kvm *kvm, int isr); 705 void (*load_eoi_exitmap)(struct kvm_vcpu *vcpu, u64 *eoi_exit_bitmap); 706 void (*set_virtual_x2apic_mode)(struct kvm_vcpu *vcpu, bool set); 707 int (*set_tss_addr)(struct kvm *kvm, unsigned int addr); 708 int (*get_tdp_level)(void); 709 u64 (*get_mt_mask)(struct kvm_vcpu *vcpu, gfn_t gfn, bool is_mmio); 710 int (*get_lpage_level)(void); 711 bool (*rdtscp_supported)(void); 712 bool (*invpcid_supported)(void); 713 void (*adjust_tsc_offset)(struct kvm_vcpu *vcpu, s64 adjustment, bool host); 714 715 void (*set_tdp_cr3)(struct kvm_vcpu *vcpu, unsigned long cr3); 716 717 void (*set_supported_cpuid)(u32 func, struct kvm_cpuid_entry2 *entry); 718 719 bool (*has_wbinvd_exit)(void); 720 721 void (*set_tsc_khz)(struct kvm_vcpu *vcpu, u32 user_tsc_khz, bool scale); 722 u64 (*read_tsc_offset)(struct kvm_vcpu *vcpu); 723 void (*write_tsc_offset)(struct kvm_vcpu *vcpu, u64 offset); 724 725 u64 (*compute_tsc_offset)(struct kvm_vcpu *vcpu, u64 target_tsc); 726 u64 (*read_l1_tsc)(struct kvm_vcpu *vcpu, u64 host_tsc); 727 728 void (*get_exit_info)(struct kvm_vcpu *vcpu, u64 *info1, u64 *info2); 729 730 int (*check_intercept)(struct kvm_vcpu *vcpu, 731 struct x86_instruction_info *info, 732 enum x86_intercept_stage stage); 733 }; 734 735 struct kvm_arch_async_pf { 736 u32 token; 737 gfn_t gfn; 738 unsigned long cr3; 739 bool direct_map; 740 }; 741 742 extern struct kvm_x86_ops *kvm_x86_ops; 743 744 static inline void adjust_tsc_offset_guest(struct kvm_vcpu *vcpu, 745 s64 adjustment) 746 { 747 kvm_x86_ops->adjust_tsc_offset(vcpu, adjustment, false); 748 } 749 750 static inline void adjust_tsc_offset_host(struct kvm_vcpu *vcpu, s64 adjustment) 751 { 752 kvm_x86_ops->adjust_tsc_offset(vcpu, adjustment, true); 753 } 754 755 int kvm_mmu_module_init(void); 756 void kvm_mmu_module_exit(void); 757 758 void kvm_mmu_destroy(struct kvm_vcpu *vcpu); 759 int kvm_mmu_create(struct kvm_vcpu *vcpu); 760 int kvm_mmu_setup(struct kvm_vcpu *vcpu); 761 void kvm_mmu_set_mask_ptes(u64 user_mask, u64 accessed_mask, 762 u64 dirty_mask, u64 nx_mask, u64 x_mask); 763 764 int kvm_mmu_reset_context(struct kvm_vcpu *vcpu); 765 void kvm_mmu_slot_remove_write_access(struct kvm *kvm, int slot); 766 void kvm_mmu_write_protect_pt_masked(struct kvm *kvm, 767 struct kvm_memory_slot *slot, 768 gfn_t gfn_offset, unsigned long mask); 769 void kvm_mmu_zap_all(struct kvm *kvm); 770 unsigned int kvm_mmu_calculate_mmu_pages(struct kvm *kvm); 771 void kvm_mmu_change_mmu_pages(struct kvm *kvm, unsigned int kvm_nr_mmu_pages); 772 773 int load_pdptrs(struct kvm_vcpu *vcpu, struct kvm_mmu *mmu, unsigned long cr3); 774 775 int emulator_write_phys(struct kvm_vcpu *vcpu, gpa_t gpa, 776 const void *val, int bytes); 777 u8 kvm_get_guest_memory_type(struct kvm_vcpu *vcpu, gfn_t gfn); 778 779 extern bool tdp_enabled; 780 781 u64 vcpu_tsc_khz(struct kvm_vcpu *vcpu); 782 783 /* control of guest tsc rate supported? */ 784 extern bool kvm_has_tsc_control; 785 /* minimum supported tsc_khz for guests */ 786 extern u32 kvm_min_guest_tsc_khz; 787 /* maximum supported tsc_khz for guests */ 788 extern u32 kvm_max_guest_tsc_khz; 789 790 enum emulation_result { 791 EMULATE_DONE, /* no further processing */ 792 EMULATE_DO_MMIO, /* kvm_run filled with mmio request */ 793 EMULATE_FAIL, /* can't emulate this instruction */ 794 }; 795 796 #define EMULTYPE_NO_DECODE (1 << 0) 797 #define EMULTYPE_TRAP_UD (1 << 1) 798 #define EMULTYPE_SKIP (1 << 2) 799 #define EMULTYPE_RETRY (1 << 3) 800 int x86_emulate_instruction(struct kvm_vcpu *vcpu, unsigned long cr2, 801 int emulation_type, void *insn, int insn_len); 802 803 static inline int emulate_instruction(struct kvm_vcpu *vcpu, 804 int emulation_type) 805 { 806 return x86_emulate_instruction(vcpu, 0, emulation_type, NULL, 0); 807 } 808 809 void kvm_enable_efer_bits(u64); 810 int kvm_get_msr(struct kvm_vcpu *vcpu, u32 msr_index, u64 *data); 811 int kvm_set_msr(struct kvm_vcpu *vcpu, struct msr_data *msr); 812 813 struct x86_emulate_ctxt; 814 815 int kvm_fast_pio_out(struct kvm_vcpu *vcpu, int size, unsigned short port); 816 void kvm_emulate_cpuid(struct kvm_vcpu *vcpu); 817 int kvm_emulate_halt(struct kvm_vcpu *vcpu); 818 int kvm_emulate_wbinvd(struct kvm_vcpu *vcpu); 819 820 void kvm_get_segment(struct kvm_vcpu *vcpu, struct kvm_segment *var, int seg); 821 int kvm_load_segment_descriptor(struct kvm_vcpu *vcpu, u16 selector, int seg); 822 823 int kvm_task_switch(struct kvm_vcpu *vcpu, u16 tss_selector, int idt_index, 824 int reason, bool has_error_code, u32 error_code); 825 826 int kvm_set_cr0(struct kvm_vcpu *vcpu, unsigned long cr0); 827 int kvm_set_cr3(struct kvm_vcpu *vcpu, unsigned long cr3); 828 int kvm_set_cr4(struct kvm_vcpu *vcpu, unsigned long cr4); 829 int kvm_set_cr8(struct kvm_vcpu *vcpu, unsigned long cr8); 830 int kvm_set_dr(struct kvm_vcpu *vcpu, int dr, unsigned long val); 831 int kvm_get_dr(struct kvm_vcpu *vcpu, int dr, unsigned long *val); 832 unsigned long kvm_get_cr8(struct kvm_vcpu *vcpu); 833 void kvm_lmsw(struct kvm_vcpu *vcpu, unsigned long msw); 834 void kvm_get_cs_db_l_bits(struct kvm_vcpu *vcpu, int *db, int *l); 835 int kvm_set_xcr(struct kvm_vcpu *vcpu, u32 index, u64 xcr); 836 837 int kvm_get_msr_common(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata); 838 int kvm_set_msr_common(struct kvm_vcpu *vcpu, struct msr_data *msr); 839 840 unsigned long kvm_get_rflags(struct kvm_vcpu *vcpu); 841 void kvm_set_rflags(struct kvm_vcpu *vcpu, unsigned long rflags); 842 bool kvm_rdpmc(struct kvm_vcpu *vcpu); 843 844 void kvm_queue_exception(struct kvm_vcpu *vcpu, unsigned nr); 845 void kvm_queue_exception_e(struct kvm_vcpu *vcpu, unsigned nr, u32 error_code); 846 void kvm_requeue_exception(struct kvm_vcpu *vcpu, unsigned nr); 847 void kvm_requeue_exception_e(struct kvm_vcpu *vcpu, unsigned nr, u32 error_code); 848 void kvm_inject_page_fault(struct kvm_vcpu *vcpu, struct x86_exception *fault); 849 int kvm_read_guest_page_mmu(struct kvm_vcpu *vcpu, struct kvm_mmu *mmu, 850 gfn_t gfn, void *data, int offset, int len, 851 u32 access); 852 void kvm_propagate_fault(struct kvm_vcpu *vcpu, struct x86_exception *fault); 853 bool kvm_require_cpl(struct kvm_vcpu *vcpu, int required_cpl); 854 855 static inline int __kvm_irq_line_state(unsigned long *irq_state, 856 int irq_source_id, int level) 857 { 858 /* Logical OR for level trig interrupt */ 859 if (level) 860 __set_bit(irq_source_id, irq_state); 861 else 862 __clear_bit(irq_source_id, irq_state); 863 864 return !!(*irq_state); 865 } 866 867 int kvm_pic_set_irq(struct kvm_pic *pic, int irq, int irq_source_id, int level); 868 void kvm_pic_clear_all(struct kvm_pic *pic, int irq_source_id); 869 870 void kvm_inject_nmi(struct kvm_vcpu *vcpu); 871 872 int fx_init(struct kvm_vcpu *vcpu); 873 874 void kvm_mmu_flush_tlb(struct kvm_vcpu *vcpu); 875 void kvm_mmu_pte_write(struct kvm_vcpu *vcpu, gpa_t gpa, 876 const u8 *new, int bytes); 877 int kvm_mmu_unprotect_page(struct kvm *kvm, gfn_t gfn); 878 int kvm_mmu_unprotect_page_virt(struct kvm_vcpu *vcpu, gva_t gva); 879 void __kvm_mmu_free_some_pages(struct kvm_vcpu *vcpu); 880 int kvm_mmu_load(struct kvm_vcpu *vcpu); 881 void kvm_mmu_unload(struct kvm_vcpu *vcpu); 882 void kvm_mmu_sync_roots(struct kvm_vcpu *vcpu); 883 gpa_t translate_nested_gpa(struct kvm_vcpu *vcpu, gpa_t gpa, u32 access); 884 gpa_t kvm_mmu_gva_to_gpa_read(struct kvm_vcpu *vcpu, gva_t gva, 885 struct x86_exception *exception); 886 gpa_t kvm_mmu_gva_to_gpa_fetch(struct kvm_vcpu *vcpu, gva_t gva, 887 struct x86_exception *exception); 888 gpa_t kvm_mmu_gva_to_gpa_write(struct kvm_vcpu *vcpu, gva_t gva, 889 struct x86_exception *exception); 890 gpa_t kvm_mmu_gva_to_gpa_system(struct kvm_vcpu *vcpu, gva_t gva, 891 struct x86_exception *exception); 892 893 int kvm_emulate_hypercall(struct kvm_vcpu *vcpu); 894 895 int kvm_mmu_page_fault(struct kvm_vcpu *vcpu, gva_t gva, u32 error_code, 896 void *insn, int insn_len); 897 void kvm_mmu_invlpg(struct kvm_vcpu *vcpu, gva_t gva); 898 899 void kvm_enable_tdp(void); 900 void kvm_disable_tdp(void); 901 902 int complete_pio(struct kvm_vcpu *vcpu); 903 bool kvm_check_iopl(struct kvm_vcpu *vcpu); 904 905 static inline gpa_t translate_gpa(struct kvm_vcpu *vcpu, gpa_t gpa, u32 access) 906 { 907 return gpa; 908 } 909 910 static inline struct kvm_mmu_page *page_header(hpa_t shadow_page) 911 { 912 struct page *page = pfn_to_page(shadow_page >> PAGE_SHIFT); 913 914 return (struct kvm_mmu_page *)page_private(page); 915 } 916 917 static inline u16 kvm_read_ldt(void) 918 { 919 u16 ldt; 920 asm("sldt %0" : "=g"(ldt)); 921 return ldt; 922 } 923 924 static inline void kvm_load_ldt(u16 sel) 925 { 926 asm("lldt %0" : : "rm"(sel)); 927 } 928 929 #ifdef CONFIG_X86_64 930 static inline unsigned long read_msr(unsigned long msr) 931 { 932 u64 value; 933 934 rdmsrl(msr, value); 935 return value; 936 } 937 #endif 938 939 static inline u32 get_rdx_init_val(void) 940 { 941 return 0x600; /* P6 family */ 942 } 943 944 static inline void kvm_inject_gp(struct kvm_vcpu *vcpu, u32 error_code) 945 { 946 kvm_queue_exception_e(vcpu, GP_VECTOR, error_code); 947 } 948 949 #define TSS_IOPB_BASE_OFFSET 0x66 950 #define TSS_BASE_SIZE 0x68 951 #define TSS_IOPB_SIZE (65536 / 8) 952 #define TSS_REDIRECTION_SIZE (256 / 8) 953 #define RMODE_TSS_SIZE \ 954 (TSS_BASE_SIZE + TSS_REDIRECTION_SIZE + TSS_IOPB_SIZE + 1) 955 956 enum { 957 TASK_SWITCH_CALL = 0, 958 TASK_SWITCH_IRET = 1, 959 TASK_SWITCH_JMP = 2, 960 TASK_SWITCH_GATE = 3, 961 }; 962 963 #define HF_GIF_MASK (1 << 0) 964 #define HF_HIF_MASK (1 << 1) 965 #define HF_VINTR_MASK (1 << 2) 966 #define HF_NMI_MASK (1 << 3) 967 #define HF_IRET_MASK (1 << 4) 968 #define HF_GUEST_MASK (1 << 5) /* VCPU is in guest-mode */ 969 970 /* 971 * Hardware virtualization extension instructions may fault if a 972 * reboot turns off virtualization while processes are running. 973 * Trap the fault and ignore the instruction if that happens. 974 */ 975 asmlinkage void kvm_spurious_fault(void); 976 extern bool kvm_rebooting; 977 978 #define ____kvm_handle_fault_on_reboot(insn, cleanup_insn) \ 979 "666: " insn "\n\t" \ 980 "668: \n\t" \ 981 ".pushsection .fixup, \"ax\" \n" \ 982 "667: \n\t" \ 983 cleanup_insn "\n\t" \ 984 "cmpb $0, kvm_rebooting \n\t" \ 985 "jne 668b \n\t" \ 986 __ASM_SIZE(push) " $666b \n\t" \ 987 "call kvm_spurious_fault \n\t" \ 988 ".popsection \n\t" \ 989 _ASM_EXTABLE(666b, 667b) 990 991 #define __kvm_handle_fault_on_reboot(insn) \ 992 ____kvm_handle_fault_on_reboot(insn, "") 993 994 #define KVM_ARCH_WANT_MMU_NOTIFIER 995 int kvm_unmap_hva(struct kvm *kvm, unsigned long hva); 996 int kvm_unmap_hva_range(struct kvm *kvm, unsigned long start, unsigned long end); 997 int kvm_age_hva(struct kvm *kvm, unsigned long hva); 998 int kvm_test_age_hva(struct kvm *kvm, unsigned long hva); 999 void kvm_set_spte_hva(struct kvm *kvm, unsigned long hva, pte_t pte); 1000 int cpuid_maxphyaddr(struct kvm_vcpu *vcpu); 1001 int kvm_cpu_has_injectable_intr(struct kvm_vcpu *v); 1002 int kvm_cpu_has_interrupt(struct kvm_vcpu *vcpu); 1003 int kvm_arch_interrupt_allowed(struct kvm_vcpu *vcpu); 1004 int kvm_cpu_get_interrupt(struct kvm_vcpu *v); 1005 1006 void kvm_define_shared_msr(unsigned index, u32 msr); 1007 void kvm_set_shared_msr(unsigned index, u64 val, u64 mask); 1008 1009 bool kvm_is_linear_rip(struct kvm_vcpu *vcpu, unsigned long linear_rip); 1010 1011 void kvm_arch_async_page_not_present(struct kvm_vcpu *vcpu, 1012 struct kvm_async_pf *work); 1013 void kvm_arch_async_page_present(struct kvm_vcpu *vcpu, 1014 struct kvm_async_pf *work); 1015 void kvm_arch_async_page_ready(struct kvm_vcpu *vcpu, 1016 struct kvm_async_pf *work); 1017 bool kvm_arch_can_inject_async_page_present(struct kvm_vcpu *vcpu); 1018 extern bool kvm_find_async_pf_gfn(struct kvm_vcpu *vcpu, gfn_t gfn); 1019 1020 void kvm_complete_insn_gp(struct kvm_vcpu *vcpu, int err); 1021 1022 int kvm_is_in_guest(void); 1023 1024 void kvm_pmu_init(struct kvm_vcpu *vcpu); 1025 void kvm_pmu_destroy(struct kvm_vcpu *vcpu); 1026 void kvm_pmu_reset(struct kvm_vcpu *vcpu); 1027 void kvm_pmu_cpuid_update(struct kvm_vcpu *vcpu); 1028 bool kvm_pmu_msr(struct kvm_vcpu *vcpu, u32 msr); 1029 int kvm_pmu_get_msr(struct kvm_vcpu *vcpu, u32 msr, u64 *data); 1030 int kvm_pmu_set_msr(struct kvm_vcpu *vcpu, u32 msr, u64 data); 1031 int kvm_pmu_read_pmc(struct kvm_vcpu *vcpu, unsigned pmc, u64 *data); 1032 void kvm_handle_pmu_event(struct kvm_vcpu *vcpu); 1033 void kvm_deliver_pmi(struct kvm_vcpu *vcpu); 1034 1035 #endif /* _ASM_X86_KVM_HOST_H */ 1036